[{"date_updated":"2022-01-06T06:57:25Z","_id":"26667","type":"conference","year":"2011","language":[{"iso":"eng"}],"status":"public","publication":"Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011)","date_created":"2021-10-21T10:59:51Z","department":[{"_id":"672"}],"citation":{"apa":"Kuznik, C., &#38; Müller, W. (2011). Aspect enhanced functional coverage driven verification in the SystemC HDVL. <i>Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011)</i>.","ama":"Kuznik C, Müller W. Aspect enhanced functional coverage driven verification in the SystemC HDVL. In: <i>Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011)</i>. ; 2011.","chicago":"Kuznik, Christoph, and Wolfgang Müller. “Aspect Enhanced Functional Coverage Driven Verification in the SystemC HDVL.” In <i>Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011)</i>, 2011.","ieee":"C. Kuznik and W. Müller, “Aspect enhanced functional coverage driven verification in the SystemC HDVL,” 2011.","mla":"Kuznik, Christoph, and Wolfgang Müller. “Aspect Enhanced Functional Coverage Driven Verification in the SystemC HDVL.” <i>Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011)</i>, 2011.","bibtex":"@inproceedings{Kuznik_Müller_2011, title={Aspect enhanced functional coverage driven verification in the SystemC HDVL}, booktitle={Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011)}, author={Kuznik, Christoph and Müller, Wolfgang}, year={2011} }","short":"C. Kuznik, W. Müller, in: Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011), 2011."},"user_id":"21240","title":"Aspect enhanced functional coverage driven verification in the SystemC HDVL","author":[{"first_name":"Christoph","full_name":"Kuznik, Christoph","last_name":"Kuznik"},{"id":"16243","last_name":"Müller","full_name":"Müller, Wolfgang","first_name":"Wolfgang"}]},{"author":[{"first_name":"Tao","full_name":"Xie, Tao","last_name":"Xie"},{"first_name":"Wolfgang","full_name":"Müller, Wolfgang","last_name":"Müller","id":"16243"}],"title":"IP-XACT based System Level Mutation Testing","department":[{"_id":"672"}],"user_id":"21240","citation":{"ama":"Xie T, Müller W. IP-XACT based System Level Mutation Testing. In: <i>Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT)</i>. ; 2011.","apa":"Xie, T., &#38; Müller, W. (2011). IP-XACT based System Level Mutation Testing. <i>Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT)</i>.","chicago":"Xie, Tao, and Wolfgang Müller. “IP-XACT Based System Level Mutation Testing.” In <i>Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT)</i>, 2011.","ieee":"T. Xie and W. Müller, “IP-XACT based System Level Mutation Testing,” 2011.","mla":"Xie, Tao, and Wolfgang Müller. “IP-XACT Based System Level Mutation Testing.” <i>Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT)</i>, 2011.","bibtex":"@inproceedings{Xie_Müller_2011, title={IP-XACT based System Level Mutation Testing}, booktitle={Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT)}, author={Xie, Tao and Müller, Wolfgang}, year={2011} }","short":"T. Xie, W. Müller, in: Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT), 2011."},"status":"public","language":[{"iso":"eng"}],"type":"conference","year":"2011","date_created":"2021-10-21T11:04:35Z","publication":"Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT)","date_updated":"2022-01-06T06:57:25Z","_id":"26669"},{"language":[{"iso":"eng"}],"year":"2011","type":"conference","status":"public","date_created":"2021-10-21T12:22:19Z","publication":"Proceedings of the 14th Euromicro Conference on Digital System Design (DSD)","date_updated":"2022-01-06T06:57:26Z","_id":"26698","title":"HDL-Mutation Based Simulation Data Generation by Propagation Guided Search","author":[{"last_name":"Xie","full_name":"Xie, Tao","first_name":"Tao"},{"full_name":"Müller, Wolfgang","first_name":"Wolfgang","id":"16243","last_name":"Müller"}],"department":[{"_id":"672"}],"citation":{"chicago":"Xie, Tao, and Wolfgang Müller. “HDL-Mutation Based Simulation Data Generation by Propagation Guided Search.” In <i>Proceedings of the 14th Euromicro Conference on Digital System Design (DSD)</i>, 2011.","ieee":"T. Xie and W. Müller, “HDL-Mutation Based Simulation Data Generation by Propagation Guided Search,” 2011.","apa":"Xie, T., &#38; Müller, W. (2011). HDL-Mutation Based Simulation Data Generation by Propagation Guided Search. <i>Proceedings of the 14th Euromicro Conference on Digital System Design (DSD)</i>.","ama":"Xie T, Müller W. HDL-Mutation Based Simulation Data Generation by Propagation Guided Search. In: <i>Proceedings of the 14th Euromicro Conference on Digital System Design (DSD)</i>. ; 2011.","short":"T. Xie, W. Müller, in: Proceedings of the 14th Euromicro Conference on Digital System Design (DSD), 2011.","mla":"Xie, Tao, and Wolfgang Müller. “HDL-Mutation Based Simulation Data Generation by Propagation Guided Search.” <i>Proceedings of the 14th Euromicro Conference on Digital System Design (DSD)</i>, 2011.","bibtex":"@inproceedings{Xie_Müller_2011, title={HDL-Mutation Based Simulation Data Generation by Propagation Guided Search}, booktitle={Proceedings of the 14th Euromicro Conference on Digital System Design (DSD)}, author={Xie, Tao and Müller, Wolfgang}, year={2011} }"},"user_id":"21240"},{"citation":{"mla":"Kuznik, Christoph, and Wolfgang Müller. “Verification Closure of SystemC Designs with Functional Coverage.” <i>North American SystemC User Group Meeting (16th)</i>, 2011.","bibtex":"@article{Kuznik_Müller_2011, title={Verification Closure of SystemC Designs with Functional Coverage}, journal={North American SystemC User Group Meeting (16th)}, author={Kuznik, Christoph and Müller, Wolfgang}, year={2011} }","short":"C. Kuznik, W. Müller, North American SystemC User Group Meeting (16th) (2011).","ama":"Kuznik C, Müller W. Verification Closure of SystemC Designs with Functional Coverage. <i>North American SystemC User Group Meeting (16th)</i>. Published online 2011.","apa":"Kuznik, C., &#38; Müller, W. (2011). Verification Closure of SystemC Designs with Functional Coverage. <i>North American SystemC User Group Meeting (16th)</i>. Jun. 2011 - 16th North American User Group Meeting (NASCUG).","chicago":"Kuznik, Christoph, and Wolfgang Müller. “Verification Closure of SystemC Designs with Functional Coverage.” <i>North American SystemC User Group Meeting (16th)</i>, 2011.","ieee":"C. Kuznik and W. Müller, “Verification Closure of SystemC Designs with Functional Coverage,” <i>North American SystemC User Group Meeting (16th)</i>, 2011."},"user_id":"21240","department":[{"_id":"672"}],"conference":{"name":"Jun. 2011 - 16th North American User Group Meeting (NASCUG)"},"title":"Verification Closure of SystemC Designs with Functional Coverage","author":[{"full_name":"Kuznik, Christoph","first_name":"Christoph","last_name":"Kuznik"},{"full_name":"Müller, Wolfgang","first_name":"Wolfgang","last_name":"Müller","id":"16243"}],"abstract":[{"lang":"eng","text":"In the area of dynamic verification of virtual prototypes, functional coverage is a valuable tool for answering the \"Are we done?\" question and achieving verification closure. Recent verification methodologies such as OVM and UVM contain multi-language support that provides a basic SystemC version. However, due to language shortcoming they cannot be utilized for the same amount of verification tasks in the SystemC ecosystem as in other supported hardware design and verification languages. In this presentation, we propose to boost the verification capabilities of SystemC by implementing functional coverage collection and evaluation according to the same metric as defined in the widely accepted IEEE-1800 SystemVerilog cover group feature. We implement a functional coverage library to enable coverage-driven verification of SystemC designs on multiple levels of abstraction enabling value, transition, and expression coverage. To our knowledge, the overall functionalities are not available in the IEEE-1666 SystemC standard or the SCV add-on library, nor are they complete compared to the aforementioned in any publicly available SystemC library.\r\n"}],"_id":"26705","date_updated":"2022-01-06T06:57:26Z","publication":"North American SystemC User Group Meeting (16th)","date_created":"2021-10-21T12:37:44Z","year":"2011","type":"journal_article","language":[{"iso":"eng"}],"status":"public"},{"date_updated":"2022-01-06T06:57:26Z","volume":294,"_id":"26710","page":"315-327","status":"public","type":"conference","year":"2011","language":[{"iso":"eng"}],"publisher":"Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn","publication":"8. Paderborner Workshop Entwurf mechatronischer Systeme, Band 294","date_created":"2021-10-21T12:46:10Z","department":[{"_id":"672"}],"user_id":"21240","citation":{"bibtex":"@inproceedings{Becker_Zabel_Müller_Elfeky_DiPasquale_2011, title={Virtual Prototyping softwareintensiver mechatronischer Systeme – Eine Fallstudie}, volume={294}, booktitle={8. Paderborner Workshop Entwurf mechatronischer Systeme, Band 294}, publisher={Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn}, author={Becker, Markus and Zabel, Henning and Müller, Wolfgang and Elfeky, Ahmed and DiPasquale, Anthony}, year={2011}, pages={315–327} }","mla":"Becker, Markus, et al. “Virtual Prototyping Softwareintensiver Mechatronischer Systeme – Eine Fallstudie.” <i>8. Paderborner Workshop Entwurf Mechatronischer Systeme, Band 294</i>, vol. 294, Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn, 2011, pp. 315–27.","short":"M. Becker, H. Zabel, W. Müller, A. Elfeky, A. DiPasquale, in: 8. Paderborner Workshop Entwurf Mechatronischer Systeme, Band 294, Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn, 2011, pp. 315–327.","ama":"Becker M, Zabel H, Müller W, Elfeky A, DiPasquale A. Virtual Prototyping softwareintensiver mechatronischer Systeme – Eine Fallstudie. In: <i>8. Paderborner Workshop Entwurf Mechatronischer Systeme, Band 294</i>. Vol 294. Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn; 2011:315-327.","apa":"Becker, M., Zabel, H., Müller, W., Elfeky, A., &#38; DiPasquale, A. (2011). Virtual Prototyping softwareintensiver mechatronischer Systeme – Eine Fallstudie. <i>8. Paderborner Workshop Entwurf Mechatronischer Systeme, Band 294</i>, <i>294</i>, 315–327.","ieee":"M. Becker, H. Zabel, W. Müller, A. Elfeky, and A. DiPasquale, “Virtual Prototyping softwareintensiver mechatronischer Systeme – Eine Fallstudie,” in <i>8. Paderborner Workshop Entwurf mechatronischer Systeme, Band 294</i>, 2011, vol. 294, pp. 315–327.","chicago":"Becker, Markus, Henning Zabel, Wolfgang Müller, Ahmed Elfeky, and Anthony DiPasquale. “Virtual Prototyping Softwareintensiver Mechatronischer Systeme – Eine Fallstudie.” In <i>8. Paderborner Workshop Entwurf Mechatronischer Systeme, Band 294</i>, 294:315–27. Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn, 2011."},"intvolume":"       294","author":[{"full_name":"Becker, Markus","first_name":"Markus","last_name":"Becker"},{"first_name":"Henning","full_name":"Zabel, Henning","last_name":"Zabel"},{"last_name":"Müller","id":"16243","full_name":"Müller, Wolfgang","first_name":"Wolfgang"},{"first_name":"Ahmed","full_name":"Elfeky, Ahmed","last_name":"Elfeky"},{"last_name":"DiPasquale","first_name":"Anthony","full_name":"DiPasquale, Anthony"}],"title":"Virtual Prototyping softwareintensiver mechatronischer Systeme – Eine Fallstudie"},{"citation":{"mla":"Klobedanz, Kay, et al. “A Reconfiguration Approach for Fault-Tolerant FlexRay Networks.” <i>Proceedings of Design, Automation, Test Europe - DATE2011</i>, IEEE Computer Society Press, 2011.","bibtex":"@inproceedings{Klobedanz_König_Müller_2011, place={Grenoble, France}, title={A Reconfiguration Approach for Fault-Tolerant FlexRay Networks}, booktitle={Proceedings of Design, Automation, Test Europe - DATE2011}, publisher={IEEE Computer Society Press}, author={Klobedanz, Kay and König, A. and Müller, Wolfgang}, year={2011} }","short":"K. Klobedanz, A. König, W. Müller, in: Proceedings of Design, Automation, Test Europe - DATE2011, IEEE Computer Society Press, Grenoble, France, 2011.","ama":"Klobedanz K, König A, Müller W. A Reconfiguration Approach for Fault-Tolerant FlexRay Networks. In: <i>Proceedings of Design, Automation, Test Europe - DATE2011</i>. IEEE Computer Society Press; 2011.","apa":"Klobedanz, K., König, A., &#38; Müller, W. (2011). A Reconfiguration Approach for Fault-Tolerant FlexRay Networks. <i>Proceedings of Design, Automation, Test Europe - DATE2011</i>.","chicago":"Klobedanz, Kay, A. König, and Wolfgang Müller. “A Reconfiguration Approach for Fault-Tolerant FlexRay Networks.” In <i>Proceedings of Design, Automation, Test Europe - DATE2011</i>. Grenoble, France: IEEE Computer Society Press, 2011.","ieee":"K. Klobedanz, A. König, and W. Müller, “A Reconfiguration Approach for Fault-Tolerant FlexRay Networks,” 14. - 18. Mrz. 2011, 2011."},"user_id":"21240","department":[{"_id":"672"}],"conference":{"location":"14. - 18. Mrz. 2011"},"title":"A Reconfiguration Approach for Fault-Tolerant FlexRay Networks","author":[{"first_name":"Kay","full_name":"Klobedanz, Kay","last_name":"Klobedanz"},{"last_name":"König","first_name":"A.","full_name":"König, A."},{"first_name":"Wolfgang","full_name":"Müller, Wolfgang","id":"16243","last_name":"Müller"}],"place":"Grenoble, France","_id":"26713","date_updated":"2022-01-06T06:57:26Z","publication":"Proceedings of Design, Automation, Test Europe - DATE2011","date_created":"2021-10-21T13:01:47Z","publisher":"IEEE Computer Society Press","type":"conference","year":"2011","language":[{"iso":"eng"}],"status":"public"},{"citation":{"mla":"Klobedanz, Kay, et al. “Self-Reconfiguration for Fault-Tolerant FlexRay Networks.” <i>Second IEEE Workshop on Self-Organizing Real-Time Systems - SORT 2011</i>, IEEE Computer Society Press, 2011.","bibtex":"@inproceedings{Klobedanz_König_Müller_Rettberg_2011, place={Newport Beach, California, USA}, title={Self-Reconfiguration for Fault-Tolerant FlexRay Networks}, booktitle={Second IEEE Workshop on Self-Organizing Real-Time Systems - SORT 2011}, publisher={IEEE Computer Society Press}, author={Klobedanz, Kay and König, A. and Müller, Wolfgang and Rettberg, Achim}, year={2011} }","short":"K. Klobedanz, A. König, W. Müller, A. Rettberg, in: Second IEEE Workshop on Self-Organizing Real-Time Systems - SORT 2011, IEEE Computer Society Press, Newport Beach, California, USA, 2011.","apa":"Klobedanz, K., König, A., Müller, W., &#38; Rettberg, A. (2011). Self-Reconfiguration for Fault-Tolerant FlexRay Networks. <i>Second IEEE Workshop on Self-Organizing Real-Time Systems - SORT 2011</i>.","ama":"Klobedanz K, König A, Müller W, Rettberg A. Self-Reconfiguration for Fault-Tolerant FlexRay Networks. In: <i>Second IEEE Workshop on Self-Organizing Real-Time Systems - SORT 2011</i>. IEEE Computer Society Press; 2011.","chicago":"Klobedanz, Kay, A. König, Wolfgang Müller, and Achim Rettberg. “Self-Reconfiguration for Fault-Tolerant FlexRay Networks.” In <i>Second IEEE Workshop on Self-Organizing Real-Time Systems - SORT 2011</i>. Newport Beach, California, USA: IEEE Computer Society Press, 2011.","ieee":"K. Klobedanz, A. König, W. Müller, and A. Rettberg, “Self-Reconfiguration for Fault-Tolerant FlexRay Networks,” 2011."},"user_id":"21240","department":[{"_id":"672"}],"title":"Self-Reconfiguration for Fault-Tolerant FlexRay Networks","author":[{"last_name":"Klobedanz","first_name":"Kay","full_name":"Klobedanz, Kay"},{"last_name":"König","full_name":"König, A.","first_name":"A."},{"last_name":"Müller","id":"16243","first_name":"Wolfgang","full_name":"Müller, Wolfgang"},{"last_name":"Rettberg","full_name":"Rettberg, Achim","first_name":"Achim"}],"place":"Newport Beach, California, USA","_id":"26714","date_updated":"2022-01-06T06:57:26Z","publication":"Second IEEE Workshop on Self-Organizing Real-Time Systems - SORT 2011","date_created":"2021-10-21T13:06:26Z","publisher":"IEEE Computer Society Press","year":"2011","type":"conference","language":[{"iso":"eng"}],"status":"public"},{"date_updated":"2022-01-06T06:57:26Z","_id":"26715","status":"public","type":"conference","year":"2011","language":[{"iso":"eng"}],"publication":"Proceedings of DVCON ","date_created":"2021-10-21T13:10:10Z","department":[{"_id":"672"}],"user_id":"21240","citation":{"ieee":"C. Kuznik and W. Müller, “Functional Coverage-driven Verification with SystemC on Multiple Level of Abstraction,” 2011.","chicago":"Kuznik, Christoph, and Wolfgang Müller. “Functional Coverage-Driven Verification with SystemC on Multiple Level of Abstraction.” In <i>Proceedings of DVCON </i>, 2011.","ama":"Kuznik C, Müller W. Functional Coverage-driven Verification with SystemC on Multiple Level of Abstraction. In: <i>Proceedings of DVCON </i>. ; 2011.","apa":"Kuznik, C., &#38; Müller, W. (2011). Functional Coverage-driven Verification with SystemC on Multiple Level of Abstraction. <i>Proceedings of DVCON </i>.","short":"C. Kuznik, W. Müller, in: Proceedings of DVCON , 2011.","bibtex":"@inproceedings{Kuznik_Müller_2011, title={Functional Coverage-driven Verification with SystemC on Multiple Level of Abstraction}, booktitle={Proceedings of DVCON }, author={Kuznik, Christoph and Müller, Wolfgang}, year={2011} }","mla":"Kuznik, Christoph, and Wolfgang Müller. “Functional Coverage-Driven Verification with SystemC on Multiple Level of Abstraction.” <i>Proceedings of DVCON </i>, 2011."},"abstract":[{"lang":"eng","text":"SystemC is a versatile C++ based design and verification language, offering various mechanisms and constructs required for embedded systems modeling. Using the add-on SystemC Verification Library (SCV) elemental constrained-random stimuli techniques may be used for verification. However, SCV has several drawbacks such as lack of a functional coverage facility supporting coverage collection on RTL and TLM models. In this article we present a functional coverage library which implements parts of the IEEE 1800-2005 SystemVerilog standard capturing functional coverage throughout the design and verification process, and allows to facilitate coverage-driven verification in SystemC."}],"author":[{"first_name":"Christoph","full_name":"Kuznik, Christoph","last_name":"Kuznik"},{"full_name":"Müller, Wolfgang","first_name":"Wolfgang","last_name":"Müller","id":"16243"}],"title":"Functional Coverage-driven Verification with SystemC on Multiple Level of Abstraction"},{"title":"A Retargetable SysML-based Front-End for High-Level Synthesis","author":[{"first_name":"Fabian","full_name":"Mischkalla, Fabian","last_name":"Mischkalla"},{"last_name":"He","full_name":"He, Da","first_name":"Da"},{"full_name":"Müller, Wolfgang","first_name":"Wolfgang","last_name":"Müller","id":"16243"}],"abstract":[{"text":"UML profiles like SysML and MARTE have been a major research topic in electronic system design, but are mainly applied for specification and analysis in early design phases. High-Level Synthesis (HLS), however, addresses the physical implementation aspect of electronic systems, and thus leads to different requirements on the accuracy of models. For this, modular interfaces are a novel object-oriented synthesizable technique to overcome the conflict between a higher degree of abstraction and necessary details for further synthesis. In this paper, we present our approach to use SysML as an adequate modeling language for modular interfaces and C/C++/SystemC-based HLS. We extended SysML with annotations for synthesizable SystemC and high-level synthesis constraints and implemented a code generation scheme to achieve design flow automation. Based on the SysML editor Artisan Studio and an industrial case study, we demonstrate the applicability of SysML as a retargetable front-end for HLS design flows.","lang":"eng"}],"citation":{"ama":"Mischkalla F, He D, Müller W. A Retargetable SysML-based Front-End for High-Level Synthesis. In: <i>Proceedings of 2nd Workshop on Model Based Engineering for Embedded Systems Design (M-BED)</i>. ; 2011.","apa":"Mischkalla, F., He, D., &#38; Müller, W. (2011). A Retargetable SysML-based Front-End for High-Level Synthesis. <i>Proceedings of 2nd Workshop on Model Based Engineering for Embedded Systems Design (M-BED)</i>.","chicago":"Mischkalla, Fabian, Da He, and Wolfgang Müller. “A Retargetable SysML-Based Front-End for High-Level Synthesis.” In <i>Proceedings of 2nd Workshop on Model Based Engineering for Embedded Systems Design (M-BED)</i>, 2011.","ieee":"F. Mischkalla, D. He, and W. Müller, “A Retargetable SysML-based Front-End for High-Level Synthesis,” 2011.","mla":"Mischkalla, Fabian, et al. “A Retargetable SysML-Based Front-End for High-Level Synthesis.” <i>Proceedings of 2nd Workshop on Model Based Engineering for Embedded Systems Design (M-BED)</i>, 2011.","bibtex":"@inproceedings{Mischkalla_He_Müller_2011, title={A Retargetable SysML-based Front-End for High-Level Synthesis}, booktitle={Proceedings of 2nd Workshop on Model Based Engineering for Embedded Systems Design (M-BED)}, author={Mischkalla, Fabian and He, Da and Müller, Wolfgang}, year={2011} }","short":"F. Mischkalla, D. He, W. Müller, in: Proceedings of 2nd Workshop on Model Based Engineering for Embedded Systems Design (M-BED), 2011."},"user_id":"21240","department":[{"_id":"672"}],"date_created":"2021-10-21T13:16:24Z","publication":"Proceedings of 2nd Workshop on Model Based Engineering for Embedded Systems Design (M-BED)","language":[{"iso":"eng"}],"type":"conference","year":"2011","status":"public","_id":"26716","date_updated":"2022-01-06T06:57:26Z"},{"publication":"Proceedings of 1st international QEMU Users Forum","date_created":"2021-10-21T13:18:27Z","year":"2011","type":"conference","language":[{"iso":"eng"}],"status":"public","_id":"26717","date_updated":"2022-01-06T06:57:26Z","title":"A SysML-based Framework with QEMU-SystemC Code Generation","author":[{"full_name":"He, Da","first_name":"Da","last_name":"He"},{"full_name":"Mischkalla, Fabian","first_name":"Fabian","last_name":"Mischkalla"},{"full_name":"Müller, Wolfgang","first_name":"Wolfgang","id":"16243","last_name":"Müller"}],"citation":{"chicago":"He, Da, Fabian Mischkalla, and Wolfgang Müller. “A SysML-Based Framework with QEMU-SystemC Code Generation.” In <i>Proceedings of 1st International QEMU Users Forum</i>, 2011.","ieee":"D. He, F. Mischkalla, and W. Müller, “A SysML-based Framework with QEMU-SystemC Code Generation,” 2011.","apa":"He, D., Mischkalla, F., &#38; Müller, W. (2011). A SysML-based Framework with QEMU-SystemC Code Generation. <i>Proceedings of 1st International QEMU Users Forum</i>.","ama":"He D, Mischkalla F, Müller W. A SysML-based Framework with QEMU-SystemC Code Generation. In: <i>Proceedings of 1st International QEMU Users Forum</i>. ; 2011.","short":"D. He, F. Mischkalla, W. Müller, in: Proceedings of 1st International QEMU Users Forum, 2011.","mla":"He, Da, et al. “A SysML-Based Framework with QEMU-SystemC Code Generation.” <i>Proceedings of 1st International QEMU Users Forum</i>, 2011.","bibtex":"@inproceedings{He_Mischkalla_Müller_2011, title={A SysML-based Framework with QEMU-SystemC Code Generation}, booktitle={Proceedings of 1st international QEMU Users Forum}, author={He, Da and Mischkalla, Fabian and Müller, Wolfgang}, year={2011} }"},"user_id":"21240","department":[{"_id":"672"}]},{"citation":{"apa":"Gnokam Defo, G. B., &#38; Müller, W. (2011). Synchronisation eines SystemC Restbus-Simulators mit einem Hardware-In-the-Loop FlexRay Netzwerk. <i>Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV)</i>.","ama":"Gnokam Defo GB, Müller W. Synchronisation eines SystemC Restbus-Simulators mit einem Hardware-In-the-Loop FlexRay Netzwerk. In: <i>Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV)</i>. ; 2011.","chicago":"Gnokam Defo, Gilles Bertrand, and Wolfgang Müller. “Synchronisation Eines SystemC Restbus-Simulators Mit Einem Hardware-In-the-Loop FlexRay Netzwerk.” In <i>Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV)</i>, 2011.","ieee":"G. B. Gnokam Defo and W. Müller, “Synchronisation eines SystemC Restbus-Simulators mit einem Hardware-In-the-Loop FlexRay Netzwerk,” 2011.","mla":"Gnokam Defo, Gilles Bertrand, and Wolfgang Müller. “Synchronisation Eines SystemC Restbus-Simulators Mit Einem Hardware-In-the-Loop FlexRay Netzwerk.” <i>Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV)</i>, 2011.","bibtex":"@inproceedings{Gnokam Defo_Müller_2011, title={Synchronisation eines SystemC Restbus-Simulators mit einem Hardware-In-the-Loop FlexRay Netzwerk}, booktitle={Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)}, author={Gnokam Defo, Gilles Bertrand and Müller, Wolfgang}, year={2011} }","short":"G.B. Gnokam Defo, W. Müller, in: Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV), 2011."},"user_id":"21240","department":[{"_id":"672"}],"title":"Synchronisation eines SystemC Restbus-Simulators mit einem Hardware-In-the-Loop FlexRay Netzwerk","author":[{"last_name":"Gnokam Defo","full_name":"Gnokam Defo, Gilles Bertrand","first_name":"Gilles Bertrand"},{"full_name":"Müller, Wolfgang","first_name":"Wolfgang","id":"16243","last_name":"Müller"}],"_id":"26784","date_updated":"2022-01-06T06:57:28Z","date_created":"2021-10-25T09:57:05Z","publication":"Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)","language":[{"iso":"eng"}],"type":"conference","year":"2011","status":"public"},{"publication":"Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing","date_created":"2021-10-25T10:02:47Z","status":"public","type":"conference","year":"2011","language":[{"iso":"eng"}],"_id":"26789","date_updated":"2022-01-06T06:57:28Z","author":[{"full_name":"Kuznik, Christoph","first_name":"Christoph","last_name":"Kuznik"},{"full_name":"Müller, Wolfgang","first_name":"Wolfgang","id":"16243","last_name":"Müller"}],"title":"Native binary mutation analysis for embedded software and virtual prototypes in SystemC","abstract":[{"text":"Mutation analysis is a powerful tool for white-box testing of the verification environment in order to produce dependable and higher quality software products. However, due to high computational costs and the focus on high-level software languages such as Java mutation analysis is not yet widely used in commercial design flows targeting embedded (software) systems. Here the industry is modeling both hardware and related software parts at higher levels of abstraction, called virtual prototypes, to accelerate parallel development and shorten time-to-market. In this paper we propose a mutation testing verification flow for SystemC based virtual prototypes that may not rely on source code only but on annotated basic blocks and enables mutant creation at assembler level to heavily reduce execution costs and equivalence mutants likelihood.","lang":"eng"}],"user_id":"21240","citation":{"bibtex":"@inproceedings{Kuznik_Müller_2011, title={Native binary mutation analysis for embedded software and virtual prototypes in SystemC}, booktitle={Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing}, author={Kuznik, Christoph and Müller, Wolfgang}, year={2011} }","mla":"Kuznik, Christoph, and Wolfgang Müller. “Native Binary Mutation Analysis for Embedded Software and Virtual Prototypes in SystemC.” <i>Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing</i>, 2011.","short":"C. Kuznik, W. Müller, in: Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing, 2011.","ama":"Kuznik C, Müller W. Native binary mutation analysis for embedded software and virtual prototypes in SystemC. In: <i>Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing</i>. ; 2011.","apa":"Kuznik, C., &#38; Müller, W. (2011). Native binary mutation analysis for embedded software and virtual prototypes in SystemC. <i>Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing</i>.","ieee":"C. Kuznik and W. Müller, “Native binary mutation analysis for embedded software and virtual prototypes in SystemC,” 2011.","chicago":"Kuznik, Christoph, and Wolfgang Müller. “Native Binary Mutation Analysis for Embedded Software and Virtual Prototypes in SystemC.” In <i>Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing</i>, 2011."},"department":[{"_id":"672"}]},{"conference":{"location":"Grenoble, France"},"title":"Proceedings of the 1st International QEMU Users' Forum","editor":[{"last_name":"Müller","id":"16243","full_name":"Müller, Wolfgang","first_name":"Wolfgang"},{"first_name":"Frederic","full_name":"Petrot, Frederic","last_name":"Petrot"}],"citation":{"short":"W. Müller, F. Petrot, eds., Proceedings of the 1st International QEMU Users’ Forum, 2011.","mla":"Müller, Wolfgang, and Frederic Petrot, editors. <i>Proceedings of the 1st International QEMU Users’ Forum</i>. 2011.","bibtex":"@book{Müller_Petrot_2011, title={Proceedings of the 1st International QEMU Users’ Forum}, year={2011} }","chicago":"Müller, Wolfgang, and Frederic Petrot, eds. <i>Proceedings of the 1st International QEMU Users’ Forum</i>, 2011.","ieee":"W. Müller and F. Petrot, Eds., <i>Proceedings of the 1st International QEMU Users’ Forum</i>. 2011.","ama":"Müller W, Petrot F, eds. <i>Proceedings of the 1st International QEMU Users’ Forum</i>.; 2011.","apa":"Müller, W., &#38; Petrot, F. (Eds.). (2011). <i>Proceedings of the 1st International QEMU Users’ Forum</i>."},"user_id":"16243","department":[{"_id":"58"}],"date_created":"2024-04-18T20:38:07Z","type":"book_editor","year":"2011","language":[{"iso":"eng"}],"status":"public","_id":"53580","date_updated":"2024-04-18T22:16:00Z"},{"place":"Paderborn","author":[{"last_name":"Becker","first_name":"Markus","full_name":"Becker, Markus"},{"first_name":"Henning","full_name":"Zabel, Henning","last_name":"Zabel"},{"last_name":"Müller","id":"16243","first_name":"Wolfgang","full_name":"Müller, Wolfgang"},{"first_name":"Ahmed","full_name":"Elfeky, Ahmed","last_name":"Elfeky"}],"title":"Virtual Prototyping software-intensiver mechatronischer Systeme - Eine Fallstudie","conference":{"name":"8. Paderborner Workshop Entwurf Mechatronischer Systeme"},"department":[{"_id":"672"}],"user_id":"5786","citation":{"chicago":"Becker, Markus, Henning Zabel, Wolfgang Müller, and Ahmed Elfeky. “Virtual Prototyping Software-Intensiver Mechatronischer Systeme - Eine Fallstudie.” Paderborn, 2011.","short":"M. Becker, H. Zabel, W. Müller, A. Elfeky, in: Paderborn, 2011.","ieee":"M. Becker, H. Zabel, W. Müller, and A. Elfeky, “Virtual Prototyping software-intensiver mechatronischer Systeme - Eine Fallstudie,” presented at the 8. Paderborner Workshop Entwurf Mechatronischer Systeme, 2011.","mla":"Becker, Markus, et al. <i>Virtual Prototyping Software-Intensiver Mechatronischer Systeme - Eine Fallstudie</i>. 2011.","apa":"Becker, M., Zabel, H., Müller, W., &#38; Elfeky, A. (2011). <i>Virtual Prototyping software-intensiver mechatronischer Systeme - Eine Fallstudie</i>. 8. Paderborner Workshop Entwurf Mechatronischer Systeme.","ama":"Becker M, Zabel H, Müller W, Elfeky A. Virtual Prototyping software-intensiver mechatronischer Systeme - Eine Fallstudie. In: ; 2011.","bibtex":"@inproceedings{Becker_Zabel_Müller_Elfeky_2011, place={Paderborn}, title={Virtual Prototyping software-intensiver mechatronischer Systeme - Eine Fallstudie}, author={Becker, Markus and Zabel, Henning and Müller, Wolfgang and Elfeky, Ahmed}, year={2011} }"},"status":"public","language":[{"iso":"eng"}],"type":"conference","year":"2011","date_created":"2023-01-17T08:59:23Z","date_updated":"2023-01-17T08:59:47Z","_id":"37001"},{"date_updated":"2023-01-17T09:05:58Z","_id":"37005","status":"public","language":[{"iso":"eng"}],"year":"2011","type":"conference","date_created":"2023-01-17T09:05:48Z","department":[{"_id":"672"}],"user_id":"5786","citation":{"apa":"Kuznik, C., &#38; Müller, W. (2011). <i>A SystemC Based Library for Functional Coverage</i>. Proceedings of the Design and Verification Conference (DVCON 2011), San Jose, CA.","ama":"Kuznik C, Müller W. A SystemC Based Library for Functional Coverage. In: ; 2011.","bibtex":"@inproceedings{Kuznik_Müller_2011, title={A SystemC Based Library for Functional Coverage}, author={Kuznik, Christoph and Müller, Wolfgang}, year={2011} }","mla":"Kuznik, Christoph, and Wolfgang Müller. <i>A SystemC Based Library for Functional Coverage</i>. 2011.","ieee":"C. Kuznik and W. Müller, “A SystemC Based Library for Functional Coverage,” presented at the Proceedings of the Design and Verification Conference (DVCON 2011), San Jose, CA, 2011.","chicago":"Kuznik, Christoph, and Wolfgang Müller. “A SystemC Based Library for Functional Coverage,” 2011.","short":"C. Kuznik, W. Müller, in: 2011."},"author":[{"last_name":"Kuznik","full_name":"Kuznik, Christoph","first_name":"Christoph"},{"last_name":"Müller","id":"16243","first_name":"Wolfgang","full_name":"Müller, Wolfgang"}],"title":"A SystemC Based Library for Functional Coverage","conference":{"location":"San Jose, CA","name":"Proceedings of the Design and Verification Conference (DVCON 2011)"}},{"date_created":"2023-01-17T09:09:25Z","publication":"Proceedings of DATE'11","publisher":"IEEE","language":[{"iso":"eng"}],"type":"conference","year":"2011","status":"public","_id":"37006","date_updated":"2023-01-17T09:09:33Z","title":"A Reconfiguration Approach for Faul-Tolerant FlexRay Networks","conference":{"name":"2011 Design, Automation & Test in Europe","location":"Grenoble, France"},"author":[{"last_name":"Klobedanz","first_name":"Kay","full_name":"Klobedanz, Kay"},{"last_name":"König","full_name":"König, Andreas","first_name":"Andreas"},{"full_name":"Müller, Wolfgang","first_name":"Wolfgang","last_name":"Müller","id":"16243"}],"place":"Grenoble, France","abstract":[{"lang":"eng","text":"In this paper we present an approach for the configuration and reconfiguration of FlexRay networks to increase their fault tolerance. To guarantee a correct and deterministic system behavior, the FlexRay specification does not allow a reconfiguration of the schedapproachule during run time. To avoid the necessity of a complete bus restart in case of a node failure, we propose a reconfiguration using redundant slots in the schedule and/or combine messages in existing frames and slots, to compensate node failures and increase robustness. Our approach supports the developer to increase the fault tolerance of the system during the design phase. It is a heuristic, which, additionally to a determined initial configuration, calculates possible reconfigurations for the remaining nodes of the FlexRay network in case of a node failure, to keep the system working properly. An evaluation by means of realistic safety-critical automotive real-time systems revealed that it determines valid reconfigurations for up to 80% of possible individual node failures. In summary, our approach offers major support for the developer of FlexRay networks since the results provide helpful feedback about reconfiguration capabilities. In an iterative design process these information can be used to determine and optimize valid reconfigurations."}],"doi":"10.1109/DATE.2011.5763022","citation":{"ieee":"K. Klobedanz, A. König, and W. Müller, “A Reconfiguration Approach for Faul-Tolerant FlexRay Networks,” presented at the 2011 Design, Automation &#38; Test in Europe, Grenoble, France, 2011, doi: <a href=\"https://doi.org/10.1109/DATE.2011.5763022\">10.1109/DATE.2011.5763022</a>.","short":"K. Klobedanz, A. König, W. Müller, in: Proceedings of DATE’11, IEEE, Grenoble, France, 2011.","chicago":"Klobedanz, Kay, Andreas König, and Wolfgang Müller. “A Reconfiguration Approach for Faul-Tolerant FlexRay Networks.” In <i>Proceedings of DATE’11</i>. Grenoble, France: IEEE, 2011. <a href=\"https://doi.org/10.1109/DATE.2011.5763022\">https://doi.org/10.1109/DATE.2011.5763022</a>.","ama":"Klobedanz K, König A, Müller W. A Reconfiguration Approach for Faul-Tolerant FlexRay Networks. In: <i>Proceedings of DATE’11</i>. IEEE; 2011. doi:<a href=\"https://doi.org/10.1109/DATE.2011.5763022\">10.1109/DATE.2011.5763022</a>","bibtex":"@inproceedings{Klobedanz_König_Müller_2011, place={Grenoble, France}, title={A Reconfiguration Approach for Faul-Tolerant FlexRay Networks}, DOI={<a href=\"https://doi.org/10.1109/DATE.2011.5763022\">10.1109/DATE.2011.5763022</a>}, booktitle={Proceedings of DATE’11}, publisher={IEEE}, author={Klobedanz, Kay and König, Andreas and Müller, Wolfgang}, year={2011} }","apa":"Klobedanz, K., König, A., &#38; Müller, W. (2011). A Reconfiguration Approach for Faul-Tolerant FlexRay Networks. <i>Proceedings of DATE’11</i>. 2011 Design, Automation &#38; Test in Europe, Grenoble, France. <a href=\"https://doi.org/10.1109/DATE.2011.5763022\">https://doi.org/10.1109/DATE.2011.5763022</a>","mla":"Klobedanz, Kay, et al. “A Reconfiguration Approach for Faul-Tolerant FlexRay Networks.” <i>Proceedings of DATE’11</i>, IEEE, 2011, doi:<a href=\"https://doi.org/10.1109/DATE.2011.5763022\">10.1109/DATE.2011.5763022</a>."},"keyword":["Schedules","Fault tolerant systems","Redundancy","Protocols","Automotive engineering","Genetic algorithms"],"user_id":"5786","department":[{"_id":"672"}]},{"publisher":"IEEE","date_created":"2023-01-17T09:02:48Z","publication":"Proceedings of Euromicro DSD 2011","status":"public","language":[{"iso":"eng"}],"publication_identifier":{"isbn":["978-1-4577-1048-3"]},"type":"conference","year":"2011","_id":"37002","date_updated":"2025-02-26T14:44:15Z","author":[{"last_name":"Xie","full_name":"Xie, Tao","first_name":"Tao"},{"last_name":"Müller","id":"16243","first_name":"Wolfgang","full_name":"Müller, Wolfgang"},{"last_name":"Letombe","full_name":"Letombe, Florian","first_name":"Florian"}],"title":"HDL-Mutation Based Simulation Data Generation by Propagation Guided Search","abstract":[{"text":"HDL-mutation based fault injection and analysis is considered as an important coverage metric for measuring the quality of design simulation processes [20, 3, 1, 2]. In this work, we try to solve the problem of automatic simulation data generation targeting HDL mutation faults. We follow a search based approach and eliminate the need for symbolic execution and mathematical constraint solving from existing work. An objective cost function is defined on the test input space and serves the guidance of search for fault-detecting test data. This is done by first mapping the simulation traces under a test onto a control and data flow graph structure which is extracted from the design. Then the progress of fault detection can be measured quantitatively on this graph to be the cost value. By minimizing this cost we approach the target test data. The effectiveness of the cost function is investigated under an example neighborhood search scheme. Case study with a floating point arithmetic IP design has shown that the cost function is able to guide effectively the search procedure towards a fault-detecting test. The cost calculation time as the search overhead was also observed to be minor compared to the actual design simulation time.","lang":"eng"}],"doi":"10.1109/DSD.2011.83","place":"Oulu, Finnland","keyword":["Hardware design languages","Cost function","Computational modeling","Fault detection","Data models","Analytical models","Testing"],"user_id":"5786","citation":{"short":"T. Xie, W. Müller, F. Letombe, in: Proceedings of Euromicro DSD 2011, IEEE, Oulu, Finnland, 2011.","mla":"Xie, Tao, et al. “HDL-Mutation Based Simulation Data Generation by Propagation Guided Search.” <i>Proceedings of Euromicro DSD 2011</i>, IEEE, 2011, doi:<a href=\"https://doi.org/10.1109/DSD.2011.83\">10.1109/DSD.2011.83</a>.","bibtex":"@inproceedings{Xie_Müller_Letombe_2011, place={Oulu, Finnland}, title={HDL-Mutation Based Simulation Data Generation by Propagation Guided Search}, DOI={<a href=\"https://doi.org/10.1109/DSD.2011.83\">10.1109/DSD.2011.83</a>}, booktitle={Proceedings of Euromicro DSD 2011}, publisher={IEEE}, author={Xie, Tao and Müller, Wolfgang and Letombe, Florian}, year={2011} }","chicago":"Xie, Tao, Wolfgang Müller, and Florian Letombe. “HDL-Mutation Based Simulation Data Generation by Propagation Guided Search.” In <i>Proceedings of Euromicro DSD 2011</i>. Oulu, Finnland: IEEE, 2011. <a href=\"https://doi.org/10.1109/DSD.2011.83\">https://doi.org/10.1109/DSD.2011.83</a>.","ieee":"T. Xie, W. Müller, and F. Letombe, “HDL-Mutation Based Simulation Data Generation by Propagation Guided Search,” 2011, doi: <a href=\"https://doi.org/10.1109/DSD.2011.83\">10.1109/DSD.2011.83</a>.","ama":"Xie T, Müller W, Letombe F. HDL-Mutation Based Simulation Data Generation by Propagation Guided Search. In: <i>Proceedings of Euromicro DSD 2011</i>. IEEE; 2011. doi:<a href=\"https://doi.org/10.1109/DSD.2011.83\">10.1109/DSD.2011.83</a>","apa":"Xie, T., Müller, W., &#38; Letombe, F. (2011). HDL-Mutation Based Simulation Data Generation by Propagation Guided Search. <i>Proceedings of Euromicro DSD 2011</i>. <a href=\"https://doi.org/10.1109/DSD.2011.83\">https://doi.org/10.1109/DSD.2011.83</a>"},"department":[{"_id":"672"}]},{"_id":"36999","date_updated":"2025-03-12T16:39:22Z","date_created":"2023-01-17T08:56:55Z","type":"conference","year":"2011","language":[{"iso":"eng"}],"status":"public","citation":{"apa":"Becker, M., Zabel, H., Müller, W., &#38; Elfeky, A. (2011). <i>Virtual Prototyping software-intensiver mechatronischer Systeme - Eine Fallstudie</i>. 8. Paderborner Workshop Entwurf Mechatronischer Systeme.","ama":"Becker M, Zabel H, Müller W, Elfeky A. Virtual Prototyping software-intensiver mechatronischer Systeme - Eine Fallstudie. In: ; 2011.","chicago":"Becker, Markus, Henning Zabel, Wolfgang Müller, and Ahmed Elfeky. “Virtual Prototyping Software-Intensiver Mechatronischer Systeme - Eine Fallstudie.” Paderborn, 2011.","ieee":"M. Becker, H. Zabel, W. Müller, and A. Elfeky, “Virtual Prototyping software-intensiver mechatronischer Systeme - Eine Fallstudie,” presented at the 8. Paderborner Workshop Entwurf Mechatronischer Systeme, 2011.","mla":"Becker, Markus, et al. <i>Virtual Prototyping Software-Intensiver Mechatronischer Systeme - Eine Fallstudie</i>. 2011.","bibtex":"@inproceedings{Becker_Zabel_Müller_Elfeky_2011, place={Paderborn}, title={Virtual Prototyping software-intensiver mechatronischer Systeme - Eine Fallstudie}, author={Becker, Markus and Zabel, Henning and Müller, Wolfgang and Elfeky, Ahmed}, year={2011} }","short":"M. Becker, H. Zabel, W. Müller, A. Elfeky, in: Paderborn, 2011."},"user_id":"5786","conference":{"name":"8. Paderborner Workshop Entwurf Mechatronischer Systeme"},"title":"Virtual Prototyping software-intensiver mechatronischer Systeme - Eine Fallstudie","author":[{"last_name":"Becker","first_name":"Markus","full_name":"Becker, Markus"},{"last_name":"Zabel","first_name":"Henning","full_name":"Zabel, Henning"},{"last_name":"Müller","id":"16243","full_name":"Müller, Wolfgang","first_name":"Wolfgang"},{"full_name":"Elfeky, Ahmed","first_name":"Ahmed","last_name":"Elfeky"}],"place":"Paderborn"},{"title":"Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design","editor":[{"last_name":"Gerard","full_name":"Gerard, Sebatian","first_name":"Sebatian"},{"last_name":"Müller","id":"16243","first_name":"Wolfgang","full_name":"Müller, Wolfgang"},{"full_name":"Rioux, L.","first_name":"L.","last_name":"Rioux"},{"last_name":"Selic","first_name":"Brand","full_name":"Selic, Brand"}],"place":"Dresden, Germany","citation":{"ieee":"S. Gerard, W. Müller, L. Rioux, and B. Selic, Eds., <i>Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design</i>. Dresden, Germany, 2010.","chicago":"Gerard, Sebatian, Wolfgang Müller, L. Rioux, and Brand Selic, eds. <i>Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design</i>. Dresden, Germany, 2010.","ama":"Gerard S, Müller W, Rioux L, Selic B, eds. <i>Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design</i>.; 2010.","apa":"Gerard, S., Müller, W., Rioux, L., &#38; Selic, B. (Eds.). (2010). <i>Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design</i>.","short":"S. Gerard, W. Müller, L. Rioux, B. Selic, eds., Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design, Dresden, Germany, 2010.","bibtex":"@book{Gerard_Müller_Rioux_Selic_2010, place={Dresden, Germany}, title={Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design}, year={2010} }","mla":"Gerard, Sebatian, et al., editors. <i>Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design</i>. 2010."},"user_id":"16243","department":[{"_id":"58"}],"date_created":"2024-04-18T20:43:03Z","language":[{"iso":"eng"}],"year":"2010","type":"book_editor","status":"public","_id":"53582","date_updated":"2024-04-18T22:15:27Z"},{"publication_identifier":{"eisbn":["978-3-9810801-6-2"]},"type":"conference","year":"2010","language":[{"iso":"eng"}],"status":"public","publication":"Proceedings of DATE’10","date_created":"2023-01-17T09:12:35Z","publisher":"IEEE","date_updated":"2023-01-17T09:12:44Z","_id":"37007","place":"Dresden","abstract":[{"lang":"eng","text":"UML is widely applied for the specification and modeling of software and some studies have demonstrated that it is applicable for HW/SW codesign. However, in this area there is still a big gap from UML modeling to SystemC-based verification and synthesis environments. This paper presents an efficient approach to bridge this gap in the context of Systems-on-a-Chip (SoC) design. We propose a framework for the seamless integration of a customized SysML entry with code generation for HW/SW cosimulation and high-level FPGA synthesis. For this, we extended the SysML UML profile by SystemC and synthesis capabilities. Two case studies demonstrate the applicability of our approach."}],"doi":"10.1109/DATE.2010.5456990","conference":{"name":"2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)","location":"Dresden"},"title":"Closing the Gap between UML-based Modeling and Simulation of Combined HW/SW Systems","author":[{"full_name":"Mischkalla, Fabian","first_name":"Fabian","last_name":"Mischkalla"},{"full_name":"He, Da","first_name":"Da","last_name":"He"},{"full_name":"Müller, Wolfgang","first_name":"Wolfgang","last_name":"Müller","id":"16243"}],"department":[{"_id":"672"}],"citation":{"bibtex":"@inproceedings{Mischkalla_He_Müller_2010, place={Dresden}, title={Closing the Gap between UML-based Modeling and Simulation of Combined HW/SW Systems}, DOI={<a href=\"https://doi.org/10.1109/DATE.2010.5456990\">10.1109/DATE.2010.5456990</a>}, booktitle={Proceedings of DATE’10}, publisher={IEEE}, author={Mischkalla, Fabian and He, Da and Müller, Wolfgang}, year={2010} }","mla":"Mischkalla, Fabian, et al. “Closing the Gap between UML-Based Modeling and Simulation of Combined HW/SW Systems.” <i>Proceedings of DATE’10</i>, IEEE, 2010, doi:<a href=\"https://doi.org/10.1109/DATE.2010.5456990\">10.1109/DATE.2010.5456990</a>.","short":"F. Mischkalla, D. He, W. Müller, in: Proceedings of DATE’10, IEEE, Dresden, 2010.","apa":"Mischkalla, F., He, D., &#38; Müller, W. (2010). Closing the Gap between UML-based Modeling and Simulation of Combined HW/SW Systems. <i>Proceedings of DATE’10</i>. 2010 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE 2010), Dresden. <a href=\"https://doi.org/10.1109/DATE.2010.5456990\">https://doi.org/10.1109/DATE.2010.5456990</a>","ama":"Mischkalla F, He D, Müller W. Closing the Gap between UML-based Modeling and Simulation of Combined HW/SW Systems. In: <i>Proceedings of DATE’10</i>. IEEE; 2010. doi:<a href=\"https://doi.org/10.1109/DATE.2010.5456990\">10.1109/DATE.2010.5456990</a>","ieee":"F. Mischkalla, D. He, and W. Müller, “Closing the Gap between UML-based Modeling and Simulation of Combined HW/SW Systems,” presented at the 2010 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE 2010), Dresden, 2010, doi: <a href=\"https://doi.org/10.1109/DATE.2010.5456990\">10.1109/DATE.2010.5456990</a>.","chicago":"Mischkalla, Fabian, Da He, and Wolfgang Müller. “Closing the Gap between UML-Based Modeling and Simulation of Combined HW/SW Systems.” In <i>Proceedings of DATE’10</i>. Dresden: IEEE, 2010. <a href=\"https://doi.org/10.1109/DATE.2010.5456990\">https://doi.org/10.1109/DATE.2010.5456990</a>."},"user_id":"5786","keyword":["Unified modeling language","Field programmable gate arrays","Bridges","Helium","Real time systems","Operating systems","Documentation","Application software","XML","Space exploration"]}]