---
_id: '34585'
abstract:
- lang: eng
  text: In this paper, we present an efficient approach to virtual platform modeling
    for TriCore-based SoCs by combining fast and open software emulation with IEEE-1666
    Standard SystemC simulation.  For evaluation we consider Infineon's recently introduced
    AURIX processor family as a target platform, which utilizes multiple CPU cores
    operating in lockstep mode, memories, hierarchical buses, and a rich set of peripherals.
    For SoC prototyping, we integrate the fast and open instruction accurate QEMU
    software emulator with the TLMu library for SystemC co-verification. This article
    reports our most recent efforts of the implementation of the TriCore instruction
    set for QEMU. The experimental results demonstrate the functional correctness
    and performance of our TriCore implementation.
author:
- first_name: Bastian
  full_name: Koppelmann, Bastian
  id: '25260'
  last_name: Koppelmann
- first_name: Bernd
  full_name: Messidat, Bernd
  last_name: Messidat
- first_name: Markus
  full_name: Becker, Markus
  last_name: Becker
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: J. Christoph
  full_name: Scheytt, J. Christoph
  id: '37144'
  last_name: Scheytt
  orcid: https://orcid.org/0000-0002-5950-6618
citation:
  ama: 'Koppelmann B, Messidat B, Becker M, Müller W, Scheytt JC. Fast and Open Virtual
    Platforms for TriCore-based SoCs Using QEMU. In: <i>Proceedings of the Design
    and Verification Conference Europe (DVCON Europe)</i>. ; 2014.'
  apa: Koppelmann, B., Messidat, B., Becker, M., Müller, W., &#38; Scheytt, J. C.
    (2014). Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU. <i>Proceedings
    of the Design and Verification Conference Europe (DVCON Europe)</i>.
  bibtex: '@inproceedings{Koppelmann_Messidat_Becker_Müller_Scheytt_2014, place={München},
    title={Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU}, booktitle={Proceedings
    of the Design and Verification Conference Europe (DVCON Europe)}, author={Koppelmann,
    Bastian and Messidat, Bernd and Becker, Markus and Müller, Wolfgang and Scheytt,
    J. Christoph}, year={2014} }'
  chicago: Koppelmann, Bastian, Bernd Messidat, Markus Becker, Wolfgang Müller, and
    J. Christoph Scheytt. “Fast and Open Virtual Platforms for TriCore-Based SoCs
    Using QEMU.” In <i>Proceedings of the Design and Verification Conference Europe
    (DVCON Europe)</i>. München, 2014.
  ieee: B. Koppelmann, B. Messidat, M. Becker, W. Müller, and J. C. Scheytt, “Fast
    and Open Virtual Platforms for TriCore-based SoCs Using QEMU,” 2014.
  mla: Koppelmann, Bastian, et al. “Fast and Open Virtual Platforms for TriCore-Based
    SoCs Using QEMU.” <i>Proceedings of the Design and Verification Conference Europe
    (DVCON Europe)</i>, 2014.
  short: 'B. Koppelmann, B. Messidat, M. Becker, W. Müller, J.C. Scheytt, in: Proceedings
    of the Design and Verification Conference Europe (DVCON Europe), München, 2014.'
date_created: 2022-12-20T10:48:25Z
date_updated: 2023-02-01T08:12:02Z
department:
- _id: '58'
keyword:
- System Design
- Verification
language:
- iso: eng
place: München
publication: Proceedings of the Design and Verification Conference Europe (DVCON Europe)
status: public
title: Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU
type: conference
user_id: '15931'
year: '2014'
...
---
_id: '34583'
abstract:
- lang: eng
  text: In this paper, we present an efficient approach to virtual platform modeling
    for TriCore-based SoCs by combining fast and open software emulation with IEEE-1666
    Standard SystemC simulation.  For evaluation we consider Infineon's recently introduced
    AURIX processor family as a target platform, which utilizes multiple CPU cores
    operating in lockstep mode, memories, hierarchical buses, and a rich set of peripherals.
    For SoC prototyping, we integrate the fast and open instruction accurate QEMU
    software emulator with the TLMu library for SystemC co-verification. This article
    reports our most recent efforts of the implementation of the TriCore instruction
    set for QEMU. The experimental results demonstrate the functional correctness
    and performance of our TriCore implementation.
author:
- first_name: Bastian
  full_name: Koppelmann, Bastian
  id: '25260'
  last_name: Koppelmann
- first_name: Bernd
  full_name: Messidat, Bernd
  last_name: Messidat
- first_name: Christoph
  full_name: Kuznik, Christoph
  last_name: Kuznik
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: Markus
  full_name: Becker, Markus
  last_name: Becker
- first_name: J. Christoph
  full_name: Scheytt, J. Christoph
  id: '37144'
  last_name: Scheytt
  orcid: https://orcid.org/0000-0002-5950-6618
citation:
  ama: 'Koppelmann B, Messidat B, Kuznik C, Müller W, Becker M, Scheytt JC. Fast and
    Open Virtual Platforms for TriCore-based SoCs Using QEMU. In: <i>Proceedings of
    the Design and Verification Conference Europe (DVCON Europe)</i>. ; 2014.'
  apa: Koppelmann, B., Messidat, B., Kuznik, C., Müller, W., Becker, M., &#38; Scheytt,
    J. C. (2014). Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU.
    <i>Proceedings of the Design and Verification Conference Europe (DVCON Europe)</i>.
  bibtex: '@inproceedings{Koppelmann_Messidat_Kuznik_Müller_Becker_Scheytt_2014, place={München},
    title={Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU}, booktitle={Proceedings
    of the Design and Verification Conference Europe (DVCON Europe)}, author={Koppelmann,
    Bastian and Messidat, Bernd and Kuznik, Christoph and Müller, Wolfgang and Becker,
    Markus and Scheytt, J. Christoph}, year={2014} }'
  chicago: Koppelmann, Bastian, Bernd Messidat, Christoph Kuznik, Wolfgang Müller,
    Markus Becker, and J. Christoph Scheytt. “Fast and Open Virtual Platforms for
    TriCore-Based SoCs Using QEMU.” In <i>Proceedings of the Design and Verification
    Conference Europe (DVCON Europe)</i>. München, 2014.
  ieee: B. Koppelmann, B. Messidat, C. Kuznik, W. Müller, M. Becker, and J. C. Scheytt,
    “Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU,” 2014.
  mla: Koppelmann, Bastian, et al. “Fast and Open Virtual Platforms for TriCore-Based
    SoCs Using QEMU.” <i>Proceedings of the Design and Verification Conference Europe
    (DVCON Europe)</i>, 2014.
  short: 'B. Koppelmann, B. Messidat, C. Kuznik, W. Müller, M. Becker, J.C. Scheytt,
    in: Proceedings of the Design and Verification Conference Europe (DVCON Europe),
    München, 2014.'
date_created: 2022-12-20T10:45:38Z
date_updated: 2025-02-26T14:42:18Z
department:
- _id: '58'
keyword:
- System Design
- Verification
language:
- iso: eng
place: München
publication: Proceedings of the Design and Verification Conference Europe (DVCON Europe)
status: public
title: Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU
type: conference
user_id: '16243'
year: '2014'
...
---
_id: '34580'
abstract:
- lang: eng
  text: In this paper, we present an efficient approach to virtual platform modeling
    for TriCore-based SoCs by combining fast and open software emulation with IEEE-1666
    Standard SystemC simulation.  For evaluation we consider Infineon's recently introduced
    AURIX processor family as a target platform, which utilizes multiple CPU cores
    operating in lockstep mode, memories, hierarchical buses, and a rich set of peripherals.
    For SoC prototyping, we integrate the fast and open instruction accurate QEMU
    software emulator with the TLMu library for SystemC co-verification. This article
    reports our most recent efforts of the implementation of the TriCore instruction
    set for QEMU. The experimental results demonstrate the functional correctness
    and performance of our TriCore implementation.
author:
- first_name: Markus
  full_name: Becker, Markus
  last_name: Becker
- first_name: Christoph
  full_name: Kuznik, Christoph
  last_name: Kuznik
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: Bastian
  full_name: Koppelmann, Bastian
  last_name: Koppelmann
- first_name: Bernd
  full_name: Messidat, Bernd
  last_name: Messidat
citation:
  ama: 'Becker M, Kuznik C, Müller W, Koppelmann B, Messidat B. Fast and Open Virtual
    Platforms for TriCore-based SoCs Using QEMU. In: <i>Proceedings of the Design
    and Verification Conference Europe </i>. ; 2014.'
  apa: Becker, M., Kuznik, C., Müller, W., Koppelmann, B., &#38; Messidat, B. (2014).
    Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU. <i>Proceedings
    of the Design and Verification Conference Europe </i>. DVCON Europe.
  bibtex: '@inproceedings{Becker_Kuznik_Müller_Koppelmann_Messidat_2014, place={München},
    title={Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU}, booktitle={Proceedings
    of the Design and Verification Conference Europe }, author={Becker, Markus and
    Kuznik, Christoph and Müller, Wolfgang and Koppelmann, Bastian and Messidat, Bernd},
    year={2014} }'
  chicago: Becker, Markus, Christoph Kuznik, Wolfgang Müller, Bastian Koppelmann,
    and Bernd Messidat. “Fast and Open Virtual Platforms for TriCore-Based SoCs Using
    QEMU.” In <i>Proceedings of the Design and Verification Conference Europe </i>.
    München, 2014.
  ieee: M. Becker, C. Kuznik, W. Müller, B. Koppelmann, and B. Messidat, “Fast and
    Open Virtual Platforms for TriCore-based SoCs Using QEMU,” presented at the DVCON
    Europe, 2014.
  mla: Becker, Markus, et al. “Fast and Open Virtual Platforms for TriCore-Based SoCs
    Using QEMU.” <i>Proceedings of the Design and Verification Conference Europe </i>,
    2014.
  short: 'M. Becker, C. Kuznik, W. Müller, B. Koppelmann, B. Messidat, in: Proceedings
    of the Design and Verification Conference Europe , München, 2014.'
conference:
  name: DVCON Europe
date_created: 2022-12-20T10:37:51Z
date_updated: 2025-02-26T14:44:30Z
language:
- iso: eng
place: München
publication: 'Proceedings of the Design and Verification Conference Europe '
status: public
title: Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU
type: conference
user_id: '5786'
year: '2014'
...
---
_id: '25117'
author:
- first_name: Bastian
  full_name: Koppelmann, Bastian
  id: '25260'
  last_name: Koppelmann
- first_name: Bernd
  full_name: Messidat, Bernd
  last_name: Messidat
- first_name: Markus
  full_name: Becker, Markus
  last_name: Becker
- first_name: Christoph
  full_name: Kuznik, Christoph
  last_name: Kuznik
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: J. Christoph
  full_name: Scheytt, J. Christoph
  id: '37144'
  last_name: Scheytt
  orcid: https://orcid.org/0000-0002-5950-6618
citation:
  ama: Koppelmann B, Messidat B, Becker M, Kuznik C, Müller W, Scheytt JC. Fast and
    Open Virtual Platforms for TriCore-based SoCs Using QEMU. <i>Design and Verification
    Conference (DVCON EUROPE)</i>. Published online 2014.
  apa: Koppelmann, B., Messidat, B., Becker, M., Kuznik, C., Müller, W., &#38; Scheytt,
    J. C. (2014). Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU.
    <i>Design and Verification Conference (DVCON EUROPE)</i>.
  bibtex: '@article{Koppelmann_Messidat_Becker_Kuznik_Müller_Scheytt_2014, title={Fast
    and Open Virtual Platforms for TriCore-based SoCs Using QEMU}, journal={Design
    and Verification Conference (DVCON EUROPE)}, author={Koppelmann, Bastian and Messidat,
    Bernd and Becker, Markus and Kuznik, Christoph and Müller, Wolfgang and Scheytt,
    J. Christoph}, year={2014} }'
  chicago: Koppelmann, Bastian, Bernd Messidat, Markus Becker, Christoph Kuznik, Wolfgang
    Müller, and J. Christoph Scheytt. “Fast and Open Virtual Platforms for TriCore-Based
    SoCs Using QEMU.” <i>Design and Verification Conference (DVCON EUROPE)</i>, 2014.
  ieee: B. Koppelmann, B. Messidat, M. Becker, C. Kuznik, W. Müller, and J. C. Scheytt,
    “Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU,” <i>Design
    and Verification Conference (DVCON EUROPE)</i>, 2014.
  mla: Koppelmann, Bastian, et al. “Fast and Open Virtual Platforms for TriCore-Based
    SoCs Using QEMU.” <i>Design and Verification Conference (DVCON EUROPE)</i>, 2014.
  short: B. Koppelmann, B. Messidat, M. Becker, C. Kuznik, W. Müller, J.C. Scheytt,
    Design and Verification Conference (DVCON EUROPE) (2014).
date_created: 2021-09-29T10:47:35Z
date_updated: 2025-02-26T14:44:48Z
department:
- _id: '672'
language:
- iso: eng
publication: Design and Verification Conference (DVCON EUROPE)
status: public
title: Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU
type: journal_article
user_id: '5786'
year: '2014'
...
---
_id: '25162'
author:
- first_name: Christoph
  full_name: Kuznik, Christoph
  last_name: Kuznik
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Kuznik C, Müller W. Verific-MM: Systematized Verification Metrics Generation
    with UCIS for Improved Automation on Verification Closure. <i>Design, Automation
    and Test in Europe DATE, University Booth, Dresden </i>. Published online 2014.'
  apa: 'Kuznik, C., &#38; Müller, W. (2014). Verific-MM: Systematized Verification
    Metrics Generation with UCIS for Improved Automation on Verification Closure.
    <i>Design, Automation and Test in Europe DATE, University Booth, Dresden </i>.'
  bibtex: '@article{Kuznik_Müller_2014, title={Verific-MM: Systematized Verification
    Metrics Generation with UCIS for Improved Automation on Verification Closure},
    journal={Design, Automation and Test in Europe DATE, University Booth, Dresden
    }, author={Kuznik, Christoph and Müller, Wolfgang}, year={2014} }'
  chicago: 'Kuznik, Christoph, and Wolfgang Müller. “Verific-MM: Systematized Verification
    Metrics Generation with UCIS for Improved Automation on Verification Closure.”
    <i>Design, Automation and Test in Europe DATE, University Booth, Dresden </i>,
    2014.'
  ieee: 'C. Kuznik and W. Müller, “Verific-MM: Systematized Verification Metrics Generation
    with UCIS for Improved Automation on Verification Closure,” <i>Design, Automation
    and Test in Europe DATE, University Booth, Dresden </i>, 2014.'
  mla: 'Kuznik, Christoph, and Wolfgang Müller. “Verific-MM: Systematized Verification
    Metrics Generation with UCIS for Improved Automation on Verification Closure.”
    <i>Design, Automation and Test in Europe DATE, University Booth, Dresden </i>,
    2014.'
  short: C. Kuznik, W. Müller, Design, Automation and Test in Europe DATE, University
    Booth, Dresden  (2014).
date_created: 2021-09-30T10:05:28Z
date_updated: 2025-02-26T14:45:04Z
department:
- _id: '672'
language:
- iso: eng
publication: 'Design, Automation and Test in Europe DATE, University Booth, Dresden '
status: public
title: 'Verific-MM: Systematized Verification Metrics Generation with UCIS for Improved
  Automation on Verification Closure'
type: journal_article
user_id: '5786'
year: '2014'
...
---
_id: '25169'
author:
- first_name: Jan-Hendrik
  full_name: Oetjens, Jan-Hendrik
  last_name: Oetjens
- first_name: Markus
  full_name: Becker, Markus
  last_name: Becker
- first_name: Christoph
  full_name: Kuznik, Christoph
  last_name: Kuznik
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Oetjens J-H, Becker M, Kuznik C, Müller W. Safety Evaluation of Automotive
    Electronics Using Virtual Prototypes: State of the Art and Research Challenges.
    In: <i>Design Automation Conference (DAC)</i>. ; 2014.'
  apa: 'Oetjens, J.-H., Becker, M., Kuznik, C., &#38; Müller, W. (2014). Safety Evaluation
    of Automotive Electronics Using Virtual Prototypes: State of the Art and Research
    Challenges. <i>Design Automation Conference (DAC)</i>.'
  bibtex: '@inproceedings{Oetjens_Becker_Kuznik_Müller_2014, title={Safety Evaluation
    of Automotive Electronics Using Virtual Prototypes: State of the Art and Research
    Challenges}, booktitle={Design Automation Conference (DAC)}, author={Oetjens,
    Jan-Hendrik and Becker, Markus and Kuznik, Christoph and Müller, Wolfgang}, year={2014}
    }'
  chicago: 'Oetjens, Jan-Hendrik, Markus Becker, Christoph Kuznik, and Wolfgang Müller.
    “Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of
    the Art and Research Challenges.” In <i>Design Automation Conference (DAC)</i>,
    2014.'
  ieee: 'J.-H. Oetjens, M. Becker, C. Kuznik, and W. Müller, “Safety Evaluation of
    Automotive Electronics Using Virtual Prototypes: State of the Art and Research
    Challenges,” 2014.'
  mla: 'Oetjens, Jan-Hendrik, et al. “Safety Evaluation of Automotive Electronics
    Using Virtual Prototypes: State of the Art and Research Challenges.” <i>Design
    Automation Conference (DAC)</i>, 2014.'
  short: 'J.-H. Oetjens, M. Becker, C. Kuznik, W. Müller, in: Design Automation Conference
    (DAC), 2014.'
date_created: 2021-09-30T11:01:14Z
date_updated: 2025-02-26T14:45:29Z
department:
- _id: '672'
language:
- iso: eng
publication: Design Automation Conference (DAC)
status: public
title: 'Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State
  of the Art and Research Challenges'
type: conference
user_id: '5786'
year: '2014'
...
---
_id: '25270'
author:
- first_name: M. tech. Mabel Mary
  full_name: Joy, M. tech. Mabel Mary
  last_name: Joy
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: Franz-Josef
  full_name: Rammig, Franz-Josef
  last_name: Rammig
citation:
  ama: 'Joy M tech. MM, Müller W, Rammig F-J. Early Phase Memory Leak Detection in
    Embedded Software Designs with Virtual Memory Management Model. In: <i>Proceedings
    of AVICPS 2013, Dez. 2013 IEEE Computer Society,</i>. Linköping University Electronic
    Press; 2013.'
  apa: Joy, M. tech. M. M., Müller, W., &#38; Rammig, F.-J. (2013). Early Phase Memory
    Leak Detection in Embedded Software Designs with Virtual Memory Management Model.
    <i>Proceedings of AVICPS 2013, Dez. 2013 IEEE Computer Society,</i>.
  bibtex: '@inproceedings{Joy_Müller_Rammig_2013, title={Early Phase Memory Leak Detection
    in Embedded Software Designs with Virtual Memory Management Model}, booktitle={Proceedings
    of AVICPS 2013, Dez. 2013 IEEE Computer Society,}, publisher={Linköping University
    Electronic Press}, author={Joy, M. tech. Mabel Mary and Müller, Wolfgang and Rammig,
    Franz-Josef}, year={2013} }'
  chicago: Joy, M. tech. Mabel Mary, Wolfgang Müller, and Franz-Josef Rammig. “Early
    Phase Memory Leak Detection in Embedded Software Designs with Virtual Memory Management
    Model.” In <i>Proceedings of AVICPS 2013, Dez. 2013 IEEE Computer Society,</i>.
    Linköping University Electronic Press, 2013.
  ieee: M. tech. M. M. Joy, W. Müller, and F.-J. Rammig, “Early Phase Memory Leak
    Detection in Embedded Software Designs with Virtual Memory Management Model,”
    2013.
  mla: Joy, M. tech. Mabel Mary, et al. “Early Phase Memory Leak Detection in Embedded
    Software Designs with Virtual Memory Management Model.” <i>Proceedings of AVICPS
    2013, Dez. 2013 IEEE Computer Society,</i> Linköping University Electronic Press,
    2013.
  short: 'M. tech. M.M. Joy, W. Müller, F.-J. Rammig, in: Proceedings of AVICPS 2013,
    Dez. 2013 IEEE Computer Society, Linköping University Electronic Press, 2013.'
date_created: 2021-10-04T08:25:24Z
date_updated: 2022-01-06T06:56:58Z
department:
- _id: '672'
language:
- iso: eng
publication: Proceedings of AVICPS 2013, Dez. 2013 IEEE Computer Society,
publisher: Linköping University Electronic Press
status: public
title: Early Phase Memory Leak Detection in Embedded Software Designs with Virtual
  Memory Management Model
type: conference
user_id: '21240'
year: '2013'
...
---
_id: '25271'
author:
- first_name: Da
  full_name: He, Da
  last_name: He
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'He D, Müller W. AN ENERGY-EFFICIENT HEURISTIC FOR HARD REAL- TIME SYSTEM ON
    MULTI-CORE PROCESSORS. In: <i>Proceedings of International Conference on Applied
    Computing (AC)</i>. ; 2013.'
  apa: He, D., &#38; Müller, W. (2013). AN ENERGY-EFFICIENT HEURISTIC FOR HARD REAL-
    TIME SYSTEM ON MULTI-CORE PROCESSORS. <i>Proceedings of International Conference
    on Applied Computing (AC)</i>.
  bibtex: '@inproceedings{He_Müller_2013, title={AN ENERGY-EFFICIENT HEURISTIC FOR
    HARD REAL- TIME SYSTEM ON MULTI-CORE PROCESSORS}, booktitle={Proceedings of International
    Conference on Applied Computing (AC)}, author={He, Da and Müller, Wolfgang}, year={2013}
    }'
  chicago: He, Da, and Wolfgang Müller. “AN ENERGY-EFFICIENT HEURISTIC FOR HARD REAL-
    TIME SYSTEM ON MULTI-CORE PROCESSORS.” In <i>Proceedings of International Conference
    on Applied Computing (AC)</i>, 2013.
  ieee: D. He and W. Müller, “AN ENERGY-EFFICIENT HEURISTIC FOR HARD REAL- TIME SYSTEM
    ON MULTI-CORE PROCESSORS,” 2013.
  mla: He, Da, and Wolfgang Müller. “AN ENERGY-EFFICIENT HEURISTIC FOR HARD REAL-
    TIME SYSTEM ON MULTI-CORE PROCESSORS.” <i>Proceedings of International Conference
    on Applied Computing (AC)</i>, 2013.
  short: 'D. He, W. Müller, in: Proceedings of International Conference on Applied
    Computing (AC), 2013.'
date_created: 2021-10-04T08:30:39Z
date_updated: 2022-01-06T06:56:58Z
department:
- _id: '672'
language:
- iso: eng
publication: Proceedings of International Conference on Applied Computing (AC)
status: public
title: AN ENERGY-EFFICIENT HEURISTIC FOR HARD REAL- TIME SYSTEM ON MULTI-CORE PROCESSORS
type: conference
user_id: '21240'
year: '2013'
...
---
_id: '25284'
author:
- first_name: Fabian
  full_name: Mischkalla, Fabian
  last_name: Mischkalla
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Mischkalla F, Müller W.  Efficient Power Intent Validation Using Loosely-Timed
    Simulation Models. In: <i> 23rd International Workshop on Power And Timing Modeling,
    Optimization and Simulation, Sep. 2013</i>. ; 2013.'
  apa: Mischkalla, F., &#38; Müller, W. (2013).  Efficient Power Intent Validation
    Using Loosely-Timed Simulation Models. <i> 23rd International Workshop on Power
    And Timing Modeling, Optimization and Simulation, Sep. 2013</i>.
  bibtex: '@inproceedings{Mischkalla_Müller_2013, title={ Efficient Power Intent Validation
    Using Loosely-Timed Simulation Models}, booktitle={ 23rd International Workshop
    on Power And Timing Modeling, Optimization and Simulation, Sep. 2013}, author={Mischkalla,
    Fabian and Müller, Wolfgang}, year={2013} }'
  chicago: Mischkalla, Fabian, and Wolfgang Müller. “ Efficient Power Intent Validation
    Using Loosely-Timed Simulation Models.” In <i> 23rd International Workshop on
    Power And Timing Modeling, Optimization and Simulation, Sep. 2013</i>, 2013.
  ieee: F. Mischkalla and W. Müller, “ Efficient Power Intent Validation Using Loosely-Timed
    Simulation Models,” 2013.
  mla: Mischkalla, Fabian, and Wolfgang Müller. “ Efficient Power Intent Validation
    Using Loosely-Timed Simulation Models.” <i> 23rd International Workshop on Power
    And Timing Modeling, Optimization and Simulation, Sep. 2013</i>, 2013.
  short: 'F. Mischkalla, W. Müller, in:  23rd International Workshop on Power And
    Timing Modeling, Optimization and Simulation, Sep. 2013, 2013.'
date_created: 2021-10-04T11:15:10Z
date_updated: 2022-01-06T06:56:59Z
department:
- _id: '672'
language:
- iso: eng
publication: ' 23rd International Workshop on Power And Timing Modeling, Optimization
  and Simulation, Sep. 2013'
status: public
title: ' Efficient Power Intent Validation Using Loosely-Timed Simulation Models'
type: conference
user_id: '21240'
year: '2013'
...
---
_id: '25291'
author:
- first_name: Markus
  full_name: Becker, Markus
  last_name: Becker
- first_name: Ulrich
  full_name: Kiffmeier, Ulrich
  last_name: Kiffmeier
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Becker M, Kiffmeier U, Müller W. HeroeS: Virtual Platform Driven Integration
    of Heterogeneous Software Components for Multi-Core Real-Time Architectures. In:
    <i>16th IEEE Computer Society Symposium on Object/Component/Service-Oriented Real-Time
    Distributed Computing</i>. ; 2013.'
  apa: 'Becker, M., Kiffmeier, U., &#38; Müller, W. (2013). HeroeS: Virtual Platform
    Driven Integration of Heterogeneous Software Components for Multi-Core Real-Time
    Architectures. <i>16th IEEE Computer Society Symposium on Object/Component/Service-Oriented
    Real-Time Distributed Computing</i>.'
  bibtex: '@inproceedings{Becker_Kiffmeier_Müller_2013, title={HeroeS: Virtual Platform
    Driven Integration of Heterogeneous Software Components for Multi-Core Real-Time
    Architectures}, booktitle={16th IEEE Computer Society Symposium on Object/Component/Service-oriented
    Real-time Distributed Computing}, author={Becker, Markus and Kiffmeier, Ulrich
    and Müller, Wolfgang}, year={2013} }'
  chicago: 'Becker, Markus, Ulrich Kiffmeier, and Wolfgang Müller. “HeroeS: Virtual
    Platform Driven Integration of Heterogeneous Software Components for Multi-Core
    Real-Time Architectures.” In <i>16th IEEE Computer Society Symposium on Object/Component/Service-Oriented
    Real-Time Distributed Computing</i>, 2013.'
  ieee: 'M. Becker, U. Kiffmeier, and W. Müller, “HeroeS: Virtual Platform Driven
    Integration of Heterogeneous Software Components for Multi-Core Real-Time Architectures,”
    2013.'
  mla: 'Becker, Markus, et al. “HeroeS: Virtual Platform Driven Integration of Heterogeneous
    Software Components for Multi-Core Real-Time Architectures.” <i>16th IEEE Computer
    Society Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing</i>,
    2013.'
  short: 'M. Becker, U. Kiffmeier, W. Müller, in: 16th IEEE Computer Society Symposium
    on Object/Component/Service-Oriented Real-Time Distributed Computing, 2013.'
date_created: 2021-10-04T12:20:10Z
date_updated: 2022-01-06T06:56:59Z
department:
- _id: '672'
language:
- iso: eng
publication: 16th IEEE Computer Society Symposium on Object/Component/Service-oriented
  Real-time Distributed Computing
status: public
title: 'HeroeS: Virtual Platform Driven Integration of Heterogeneous Software Components
  for Multi-Core Real-Time Architectures'
type: conference
user_id: '21240'
year: '2013'
...
---
_id: '25606'
author:
- first_name: Christoph
  full_name: Kuznik, Christoph
  last_name: Kuznik
- first_name: Marcio
  full_name: F. S. Oliveira, Marcio
  last_name: F. S. Oliveira
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Kuznik C, F. S. Oliveira M, Müller W. SystemC Verification Components - An
    enhanced OVM/UVM for SystemC. In: <i>EdaWorkshop 13</i>. ; 2013.'
  apa: Kuznik, C., F. S. Oliveira, M., &#38; Müller, W. (2013). SystemC Verification
    Components - An enhanced OVM/UVM for SystemC. <i>EdaWorkshop 13</i>.
  bibtex: '@inproceedings{Kuznik_F. S. Oliveira_Müller_2013, title={SystemC Verification
    Components - An enhanced OVM/UVM for SystemC}, booktitle={edaWorkshop 13}, author={Kuznik,
    Christoph and F. S. Oliveira, Marcio and Müller, Wolfgang}, year={2013} }'
  chicago: Kuznik, Christoph, Marcio F. S. Oliveira, and Wolfgang Müller. “SystemC
    Verification Components - An Enhanced OVM/UVM for SystemC.” In <i>EdaWorkshop
    13</i>, 2013.
  ieee: C. Kuznik, M. F. S. Oliveira, and W. Müller, “SystemC Verification Components
    - An enhanced OVM/UVM for SystemC,” Mrz. 2013 - Poster, 2013.
  mla: Kuznik, Christoph, et al. “SystemC Verification Components - An Enhanced OVM/UVM
    for SystemC.” <i>EdaWorkshop 13</i>, 2013.
  short: 'C. Kuznik, M. F. S. Oliveira, W. Müller, in: EdaWorkshop 13, 2013.'
conference:
  location: Mrz. 2013 - Poster
date_created: 2021-10-07T07:58:38Z
date_updated: 2022-01-06T06:57:07Z
department:
- _id: '672'
language:
- iso: eng
publication: edaWorkshop 13
status: public
title: SystemC Verification Components - An enhanced OVM/UVM for SystemC
type: conference
user_id: '21240'
year: '2013'
...
---
_id: '25612'
author:
- first_name: Fabian
  full_name: Mischkalla, Fabian
  last_name: Mischkalla
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Mischkalla F, Müller W. Funktionale Verifikation von Low-Power Designs unter
    Verwendung Virtueller Prototypen. In: <i>Methoden und Beschreibungssprachen zur
    Modellierung und Verifikation von Schaltungen und Systemen (MBMV)</i>. ; 2013.'
  apa: Mischkalla, F., &#38; Müller, W. (2013). Funktionale Verifikation von Low-Power
    Designs unter Verwendung Virtueller Prototypen. <i>Methoden und Beschreibungssprachen
    zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)</i>.
  bibtex: '@inproceedings{Mischkalla_Müller_2013, title={Funktionale Verifikation
    von Low-Power Designs unter Verwendung Virtueller Prototypen}, booktitle={Methoden
    und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und
    Systemen (MBMV)}, author={Mischkalla, Fabian and Müller, Wolfgang}, year={2013}
    }'
  chicago: Mischkalla, Fabian, and Wolfgang Müller. “Funktionale Verifikation von
    Low-Power Designs unter Verwendung Virtueller Prototypen.” In <i>Methoden und
    Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen
    (MBMV)</i>, 2013.
  ieee: F. Mischkalla and W. Müller, “Funktionale Verifikation von Low-Power Designs
    unter Verwendung Virtueller Prototypen,” 2013.
  mla: Mischkalla, Fabian, and Wolfgang Müller. “Funktionale Verifikation von Low-Power
    Designs unter Verwendung Virtueller Prototypen.” <i>Methoden und Beschreibungssprachen
    zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)</i>, 2013.
  short: 'F. Mischkalla, W. Müller, in: Methoden und Beschreibungssprachen zur Modellierung
    und Verifikation von Schaltungen und Systemen (MBMV), 2013.'
date_created: 2021-10-07T08:27:55Z
date_updated: 2022-01-06T06:57:08Z
department:
- _id: '672'
language:
- iso: ger
publication: Methoden und Beschreibungssprachen zur Modellierung und Verifikation
  von Schaltungen und Systemen (MBMV)
status: public
title: Funktionale Verifikation von Low-Power Designs unter Verwendung Virtueller
  Prototypen
type: conference
user_id: '21240'
year: '2013'
...
---
_id: '25614'
author:
- first_name: Christoph
  full_name: Kuznik, Christoph
  last_name: Kuznik
- first_name: Marcio
  full_name: F. S. Oliveira, Marcio
  last_name: F. S. Oliveira
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Kuznik C, F. S. Oliveira M, Müller W. SC OVM: An Advanced SystemC Library
    for OVM-based Verification. In: <i>Open SANITAS SystemC Verification Workshop</i>.
    ; 2013.'
  apa: 'Kuznik, C., F. S. Oliveira, M., &#38; Müller, W. (2013). SC OVM: An Advanced
    SystemC Library for OVM-based Verification. <i>Open SANITAS SystemC Verification
    Workshop</i>.'
  bibtex: '@inproceedings{Kuznik_F. S. Oliveira_Müller_2013, title={SC OVM: An Advanced
    SystemC Library for OVM-based Verification}, booktitle={Open SANITAS SystemC Verification
    Workshop}, author={Kuznik, Christoph and F. S. Oliveira, Marcio and Müller, Wolfgang},
    year={2013} }'
  chicago: 'Kuznik, Christoph, Marcio F. S. Oliveira, and Wolfgang Müller. “SC OVM:
    An Advanced SystemC Library for OVM-Based Verification.” In <i>Open SANITAS SystemC
    Verification Workshop</i>, 2013.'
  ieee: 'C. Kuznik, M. F. S. Oliveira, and W. Müller, “SC OVM: An Advanced SystemC
    Library for OVM-based Verification,” 2013.'
  mla: 'Kuznik, Christoph, et al. “SC OVM: An Advanced SystemC Library for OVM-Based
    Verification.” <i>Open SANITAS SystemC Verification Workshop</i>, 2013.'
  short: 'C. Kuznik, M. F. S. Oliveira, W. Müller, in: Open SANITAS SystemC Verification
    Workshop, 2013.'
date_created: 2021-10-07T08:31:07Z
date_updated: 2022-01-06T06:57:08Z
department:
- _id: '672'
language:
- iso: eng
publication: Open SANITAS SystemC Verification Workshop
status: public
title: 'SC OVM: An Advanced SystemC Library for OVM-based Verification'
type: conference
user_id: '21240'
year: '2013'
...
---
_id: '25615'
author:
- first_name: Gregor
  full_name: Engels, Gregor
  id: '107'
  last_name: Engels
- first_name: Christian
  full_name: Gerth, Christian
  last_name: Gerth
- first_name: Lisa
  full_name: Kleinjohann, Lisa
  id: '15588'
  last_name: Kleinjohann
- first_name: Bernd
  full_name: Kleinjohann, Bernd
  last_name: Kleinjohann
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: Engels G, Gerth C, Kleinjohann L, Kleinjohann B, Müller W.  Informationstechnik
    spart Ressourcen. <i>ForschungsForum Paderborn </i>. 2013.
  apa: Engels, G., Gerth, C., Kleinjohann, L., Kleinjohann, B., &#38; Müller, W. (2013).  Informationstechnik
    spart Ressourcen. <i>ForschungsForum Paderborn </i>.
  bibtex: '@article{Engels_Gerth_Kleinjohann_Kleinjohann_Müller_2013, title={ Informationstechnik
    spart Ressourcen}, journal={ForschungsForum Paderborn }, author={Engels, Gregor
    and Gerth, Christian and Kleinjohann, Lisa and Kleinjohann, Bernd and Müller,
    Wolfgang}, year={2013} }'
  chicago: Engels, Gregor, Christian Gerth, Lisa Kleinjohann, Bernd Kleinjohann, and
    Wolfgang Müller. “ Informationstechnik spart Ressourcen.” <i>ForschungsForum Paderborn
    </i>, 2013.
  ieee: G. Engels, C. Gerth, L. Kleinjohann, B. Kleinjohann, and W. Müller, “ Informationstechnik
    spart Ressourcen,” <i>ForschungsForum Paderborn </i>, 2013.
  mla: Engels, Gregor, et al. “ Informationstechnik spart Ressourcen.” <i>ForschungsForum
    Paderborn </i>, 2013.
  short: G. Engels, C. Gerth, L. Kleinjohann, B. Kleinjohann, W. Müller, ForschungsForum
    Paderborn  (2013).
date_created: 2021-10-07T08:34:47Z
date_updated: 2022-01-06T06:57:08Z
department:
- _id: '672'
language:
- iso: ger
publication: 'ForschungsForum Paderborn '
publication_date: 2013-02-01
status: public
title: ' Informationstechnik spart Ressourcen'
type: newspaper_article
user_id: '21240'
year: '2013'
...
---
_id: '25620'
author:
- first_name: Christoph
  full_name: Kuznik, Christoph
  last_name: Kuznik
- first_name: Marcio F.
  full_name: Oliveira, Marcio F.
  last_name: Oliveira
- first_name: Bertrand
  full_name: Defo, Bertrand
  last_name: Defo
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Kuznik C, Oliveira MF, Defo B, Müller W. Systematic Application of UCIS to
    Improve the Automation on Verification Closure. In: <i>Proceedings of DVCON</i>.
    ; 2013.'
  apa: Kuznik, C., Oliveira, M. F., Defo, B., &#38; Müller, W. (2013). Systematic
    Application of UCIS to Improve the Automation on Verification Closure. <i>Proceedings
    of DVCON</i>.
  bibtex: '@inproceedings{Kuznik_Oliveira_Defo_Müller_2013, title={Systematic Application
    of UCIS to Improve the Automation on Verification Closure}, booktitle={Proceedings
    of DVCON}, author={Kuznik, Christoph and Oliveira, Marcio F. and Defo, Bertrand
    and Müller, Wolfgang}, year={2013} }'
  chicago: Kuznik, Christoph, Marcio F. Oliveira, Bertrand Defo, and Wolfgang Müller.
    “Systematic Application of UCIS to Improve the Automation on Verification Closure.”
    In <i>Proceedings of DVCON</i>, 2013.
  ieee: C. Kuznik, M. F. Oliveira, B. Defo, and W. Müller, “Systematic Application
    of UCIS to Improve the Automation on Verification Closure,” 2013.
  mla: Kuznik, Christoph, et al. “Systematic Application of UCIS to Improve the Automation
    on Verification Closure.” <i>Proceedings of DVCON</i>, 2013.
  short: 'C. Kuznik, M.F. Oliveira, B. Defo, W. Müller, in: Proceedings of DVCON,
    2013.'
date_created: 2021-10-07T08:51:16Z
date_updated: 2022-01-06T06:57:08Z
department:
- _id: '672'
language:
- iso: eng
publication: Proceedings of DVCON
status: public
title: Systematic Application of UCIS to Improve the Automation on Verification Closure
type: conference
user_id: '21240'
year: '2013'
...
---
_id: '25632'
author:
- first_name: Kay
  full_name: Klobedanz, Kay
  last_name: Klobedanz
- first_name: Jan
  full_name: Jatzkowski, Jan
  last_name: Jatzkowski
- first_name: Achim
  full_name: Rettberg, Achim
  last_name: Rettberg
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Klobedanz K, Jatzkowski J, Rettberg A, Müller W. Fault-Tolerant Deployment
    of Real-Time Software in AUTOSAR ECU Networks. In: <i>International Embedded Systems
    Symposium (IESS) 2013</i>. Springer; 2013.'
  apa: Klobedanz, K., Jatzkowski, J., Rettberg, A., &#38; Müller, W. (2013). Fault-Tolerant
    Deployment of Real-Time Software in AUTOSAR ECU Networks. <i>International Embedded
    Systems Symposium (IESS) 2013</i>.
  bibtex: '@inproceedings{Klobedanz_Jatzkowski_Rettberg_Müller_2013, title={Fault-Tolerant
    Deployment of Real-Time Software in AUTOSAR ECU Networks}, booktitle={International
    Embedded Systems Symposium (IESS) 2013}, publisher={Springer}, author={Klobedanz,
    Kay and Jatzkowski, Jan and Rettberg, Achim and Müller, Wolfgang}, year={2013}
    }'
  chicago: Klobedanz, Kay, Jan Jatzkowski, Achim Rettberg, and Wolfgang Müller. “Fault-Tolerant
    Deployment of Real-Time Software in AUTOSAR ECU Networks.” In <i>International
    Embedded Systems Symposium (IESS) 2013</i>. Springer, 2013.
  ieee: K. Klobedanz, J. Jatzkowski, A. Rettberg, and W. Müller, “Fault-Tolerant Deployment
    of Real-Time Software in AUTOSAR ECU Networks,” 2013.
  mla: Klobedanz, Kay, et al. “Fault-Tolerant Deployment of Real-Time Software in
    AUTOSAR ECU Networks.” <i>International Embedded Systems Symposium (IESS) 2013</i>,
    Springer, 2013.
  short: 'K. Klobedanz, J. Jatzkowski, A. Rettberg, W. Müller, in: International Embedded
    Systems Symposium (IESS) 2013, Springer, 2013.'
date_created: 2021-10-07T09:46:48Z
date_updated: 2022-01-06T06:57:08Z
department:
- _id: '672'
language:
- iso: eng
publication: International Embedded Systems Symposium (IESS) 2013
publisher: Springer
status: public
title: Fault-Tolerant Deployment of Real-Time Software in AUTOSAR ECU Networks
type: conference
user_id: '21240'
year: '2013'
...
---
_id: '25740'
author:
- first_name: Da
  full_name: He, Da
  last_name: He
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: He D, Müller W.  A heuristic energy-aware approach for hard real-time systems
    on multi-core platforms. <i>Microprocessors and Microsystems - Embedded Hardware
    Design 37(6-7)</i>. Published online 2013:845-857.
  apa: He, D., &#38; Müller, W. (2013).  A heuristic energy-aware approach for hard
    real-time systems on multi-core platforms. <i>Microprocessors and Microsystems
    - Embedded Hardware Design 37(6-7)</i>, 845–857.
  bibtex: '@article{He_Müller_2013, title={ A heuristic energy-aware approach for
    hard real-time systems on multi-core platforms}, journal={Microprocessors and
    Microsystems - Embedded Hardware Design 37(6-7)}, author={He, Da and Müller, Wolfgang},
    year={2013}, pages={845–857} }'
  chicago: He, Da, and Wolfgang Müller. “ A Heuristic Energy-Aware Approach for Hard
    Real-Time Systems on Multi-Core Platforms.” <i>Microprocessors and Microsystems
    - Embedded Hardware Design 37(6-7)</i>, 2013, 845–57.
  ieee: D. He and W. Müller, “ A heuristic energy-aware approach for hard real-time
    systems on multi-core platforms,” <i>Microprocessors and Microsystems - Embedded
    Hardware Design 37(6-7)</i>, pp. 845–857, 2013.
  mla: He, Da, and Wolfgang Müller. “ A Heuristic Energy-Aware Approach for Hard Real-Time
    Systems on Multi-Core Platforms.” <i>Microprocessors and Microsystems - Embedded
    Hardware Design 37(6-7)</i>, 2013, pp. 845–57.
  short: D. He, W. Müller, Microprocessors and Microsystems - Embedded Hardware Design
    37(6-7) (2013) 845–857.
date_created: 2021-10-07T09:49:15Z
date_updated: 2022-01-06T06:57:12Z
department:
- _id: '672'
language:
- iso: eng
page: 845-857
publication: Microprocessors and Microsystems - Embedded Hardware Design 37(6-7)
status: public
title: ' A heuristic energy-aware approach for hard real-time systems on multi-core
  platforms'
type: journal_article
user_id: '21240'
year: '2013'
...
---
_id: '25743'
author:
- first_name: Harald
  full_name: Anacker, Harald
  last_name: Anacker
- first_name: Michael
  full_name: Dellnitz, Michael
  last_name: Dellnitz
- first_name: Kathrin
  full_name: Flaßkamp, Kathrin
  last_name: Flaßkamp
- first_name: Stefan
  full_name: Grösbrink, Stefan
  last_name: Grösbrink
- first_name: Philip
  full_name: Hartmann, Philip
  last_name: Hartmann
- first_name: Christian
  full_name: Heinzemann, Christian
  last_name: Heinzemann
- first_name: Christian
  full_name: Horenkamp, Christian
  last_name: Horenkamp
- first_name: Lisa
  full_name: Kleinjohann, Lisa
  id: '15588'
  last_name: Kleinjohann
- first_name: Bernd
  full_name: Kleinjohann, Bernd
  last_name: Kleinjohann
- first_name: Sebastian
  full_name: Korf, Sebastian
  last_name: Korf
- first_name: Martin
  full_name: Krüger, Martin
  last_name: Krüger
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: Sina
  full_name: Ober-Blöbaum, Sina
  id: '16494'
  last_name: Ober-Blöbaum
- first_name: Simon
  full_name: Oberthür, Simon
  id: '383'
  last_name: Oberthür
- first_name: Mario
  full_name: Porrmann, Mario
  last_name: Porrmann
- first_name: Claudia
  full_name: Priesterjahn, Claudia
  last_name: Priesterjahn
- first_name: W.
  full_name: Radkowski, W.
  last_name: Radkowski
- first_name: Christoph
  full_name: Rasche, Christoph
  last_name: Rasche
- first_name: Jan
  full_name: Rieke, Jan
  last_name: Rieke
- first_name: Maik
  full_name: Ringkamp, Maik
  last_name: Ringkamp
- first_name: Katharina
  full_name: Stahl, Katharina
  last_name: Stahl
- first_name: Dominik
  full_name: Steenken, Dominik
  last_name: Steenken
- first_name: Jörg
  full_name: Stöcklein, Jörg
  last_name: Stöcklein
- first_name: Robert
  full_name: Timmermann, Robert
  last_name: Timmermann
- first_name: Ansgar
  full_name: Trächtler, Ansgar
  id: '552'
  last_name: Trächtler
- first_name: Katrin
  full_name: Witting, Katrin
  last_name: Witting
- first_name: Tao
  full_name: Xie, Tao
  last_name: Xie
- first_name: Steffen
  full_name: Ziegert, Steffen
  last_name: Ziegert
citation:
  ama: 'Anacker H, Dellnitz M, Flaßkamp K, et al. Methods for the Design and Development.
    In: <i>Design Methodology for Intelligent Technical Systems Systems – Develop
    Intelligent Technical Systems of the Future</i>. Springer-Verlag; 2013:187-356.'
  apa: Anacker, H., Dellnitz, M., Flaßkamp, K., Grösbrink, S., Hartmann, P., Heinzemann,
    C., Horenkamp, C., Kleinjohann, L., Kleinjohann, B., Korf, S., Krüger, M., Müller,
    W., Ober-Blöbaum, S., Oberthür, S., Porrmann, M., Priesterjahn, C., Radkowski,
    W., Rasche, C., Rieke, J., … Ziegert, S. (2013). Methods for the Design and Development.
    In <i>Design Methodology for Intelligent Technical Systems Systems – Develop Intelligent
    Technical Systems of the Future</i> (pp. 187–356). Springer-Verlag.
  bibtex: '@inbook{Anacker_Dellnitz_Flaßkamp_Grösbrink_Hartmann_Heinzemann_Horenkamp_Kleinjohann_Kleinjohann_Korf_et
    al._2013, place={Heidelberg}, title={Methods for the Design and Development},
    booktitle={Design Methodology for Intelligent Technical Systems Systems – Develop
    Intelligent Technical Systems of the Future}, publisher={Springer-Verlag}, author={Anacker,
    Harald and Dellnitz, Michael and Flaßkamp, Kathrin and Grösbrink, Stefan and Hartmann,
    Philip and Heinzemann, Christian and Horenkamp, Christian and Kleinjohann, Lisa
    and Kleinjohann, Bernd and Korf, Sebastian and et al.}, year={2013}, pages={187–356}
    }'
  chicago: 'Anacker, Harald, Michael Dellnitz, Kathrin Flaßkamp, Stefan Grösbrink,
    Philip Hartmann, Christian Heinzemann, Christian Horenkamp, et al. “Methods for
    the Design and Development.” In <i>Design Methodology for Intelligent Technical
    Systems Systems – Develop Intelligent Technical Systems of the Future</i>, 187–356.
    Heidelberg: Springer-Verlag, 2013.'
  ieee: 'H. Anacker <i>et al.</i>, “Methods for the Design and Development,” in <i>Design
    Methodology for Intelligent Technical Systems Systems – Develop Intelligent Technical
    Systems of the Future</i>, Heidelberg: Springer-Verlag, 2013, pp. 187–356.'
  mla: Anacker, Harald, et al. “Methods for the Design and Development.” <i>Design
    Methodology for Intelligent Technical Systems Systems – Develop Intelligent Technical
    Systems of the Future</i>, Springer-Verlag, 2013, pp. 187–356.
  short: 'H. Anacker, M. Dellnitz, K. Flaßkamp, S. Grösbrink, P. Hartmann, C. Heinzemann,
    C. Horenkamp, L. Kleinjohann, B. Kleinjohann, S. Korf, M. Krüger, W. Müller, S.
    Ober-Blöbaum, S. Oberthür, M. Porrmann, C. Priesterjahn, W. Radkowski, C. Rasche,
    J. Rieke, M. Ringkamp, K. Stahl, D. Steenken, J. Stöcklein, R. Timmermann, A.
    Trächtler, K. Witting, T. Xie, S. Ziegert, in: Design Methodology for Intelligent
    Technical Systems Systems – Develop Intelligent Technical Systems of the Future,
    Springer-Verlag, Heidelberg, 2013, pp. 187–356.'
date_created: 2021-10-07T10:07:43Z
date_updated: 2022-01-06T06:57:12Z
department:
- _id: '672'
language:
- iso: eng
page: 187-356
place: Heidelberg
publication: Design Methodology for Intelligent Technical Systems Systems – Develop
  Intelligent Technical Systems of the Future
publisher: Springer-Verlag
status: public
title: Methods for the Design and Development
type: book_chapter
user_id: '21240'
year: '2013'
...
---
_id: '36919'
abstract:
- lang: eng
  text: Faced with increasing demands on energy efficiency, current electronic systems
    operate according to complex power management schemes including more and more
    fine-grained voltage frequency scaling and power shutdown scenarios. Consequently,
    validation of the power design intent should begin as early as possible at electronic
    system-level (ESL) together with first executable system specifications for integrity
    tests. However, today's system-level design methodologies usually focus on the
    abstraction of digital logic and time, so that typical low-power aspects cannot
    be considered so far. In this paper, we present a high-level modeling approach
    on top of the SystemC/TLM standard to simulate power distribution and voltage
    based implications in a "loosely-timed" functional execution context. The approach
    reuses legacy TLM models and prevents the need for detailed lock-step process
    synchronization in contrast to existing methods. A case study derived from an
    open source low-power design demonstrates the efficiency of our approach in terms
    of simulation performance and testability.
author:
- first_name: Fabian
  full_name: Mischkalla, Fabian
  last_name: Mischkalla
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Mischkalla F, Müller W. Efficient Power-Intent Validation Using “Loosely-Timed”
    Simulation Models: A Non-Invasive Approach. In: IEEE; 2013. doi:<a href="https://doi.org/10.1109/PATMOS.2013.6662171">10.1109/PATMOS.2013.6662171</a>'
  apa: 'Mischkalla, F., &#38; Müller, W. (2013). <i>Efficient Power-Intent Validation
    Using “Loosely-Timed” Simulation Models: A Non-Invasive Approach</i>. 23rd International
    Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS). <a
    href="https://doi.org/10.1109/PATMOS.2013.6662171">https://doi.org/10.1109/PATMOS.2013.6662171</a>'
  bibtex: '@inproceedings{Mischkalla_Müller_2013, place={Karlsruhe}, title={Efficient
    Power-Intent Validation Using “Loosely-Timed” Simulation Models: A Non-Invasive
    Approach}, DOI={<a href="https://doi.org/10.1109/PATMOS.2013.6662171">10.1109/PATMOS.2013.6662171</a>},
    publisher={IEEE}, author={Mischkalla, Fabian and Müller, Wolfgang}, year={2013}
    }'
  chicago: 'Mischkalla, Fabian, and Wolfgang Müller. “Efficient Power-Intent Validation
    Using ‘Loosely-Timed’ Simulation Models: A Non-Invasive Approach.” Karlsruhe:
    IEEE, 2013. <a href="https://doi.org/10.1109/PATMOS.2013.6662171">https://doi.org/10.1109/PATMOS.2013.6662171</a>.'
  ieee: 'F. Mischkalla and W. Müller, “Efficient Power-Intent Validation Using ‘Loosely-Timed’
    Simulation Models: A Non-Invasive Approach,” presented at the 23rd International
    Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2013,
    doi: <a href="https://doi.org/10.1109/PATMOS.2013.6662171">10.1109/PATMOS.2013.6662171</a>.'
  mla: 'Mischkalla, Fabian, and Wolfgang Müller. <i>Efficient Power-Intent Validation
    Using “Loosely-Timed” Simulation Models: A Non-Invasive Approach</i>. IEEE, 2013,
    doi:<a href="https://doi.org/10.1109/PATMOS.2013.6662171">10.1109/PATMOS.2013.6662171</a>.'
  short: 'F. Mischkalla, W. Müller, in: IEEE, Karlsruhe, 2013.'
conference:
  name: 23rd International Workshop on Power and Timing Modeling, Optimization and
    Simulation (PATMOS)
date_created: 2023-01-16T12:08:03Z
date_updated: 2023-01-16T12:08:17Z
department:
- _id: '672'
doi: 10.1109/PATMOS.2013.6662171
keyword:
- Time-varying systems
- Time-domain analysis
- Synchronization
- Context modeling
- Clocks
- Semantics
- Standards
language:
- iso: eng
place: Karlsruhe
publication_identifier:
  eisbn:
  - 978-1-4799-1170-7
publisher: IEEE
status: public
title: 'Efficient Power-Intent Validation Using "Loosely-Timed" Simulation Models:
  A Non-Invasive Approach'
type: conference
user_id: '5786'
year: '2013'
...
---
_id: '36920'
abstract:
- lang: eng
  text: 'In the electronic system development, energy consumption is clearly becoming
    one of the most important design concerns. From the system level point of view,
    Dynamic Power Management (DPM) and Dynamic Voltage and Frequency Scaling (DVFS)
    are two mostly applied techniques to adjust the tradeoff between the performance
    and power dissipation at runtime. In this paper, we study the problem of combined
    application of both techniques with regard to hard real-time systems running on
    cluster-based multi-core processors. To optimize the processor energy consumption,
    a heuristic based on simulated annealing with efficient termination criterion
    is proposed. The experiment results show that the proposed algorithm outperforms
    the existing approaches in terms of the energy reduction. '
author:
- first_name: Da
  full_name: He, Da
  last_name: He
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'He D, Müller W. An Energy-Efficient Heuristic for Hard Real-Time System on
    Multi-Core Processors. In: Weghorn H, ed. <i>Proceedings of the International
    Conference on Applied Computing (AC)</i>. ; 2013.'
  apa: He, D., &#38; Müller, W. (2013). An Energy-Efficient Heuristic for Hard Real-Time
    System on Multi-Core Processors. In H. Weghorn (Ed.), <i>Proceedings of the International
    Conference on Applied Computing (AC)</i>.
  bibtex: '@inproceedings{He_Müller_2013, place={Fort Worth, Texas, USA}, title={An
    Energy-Efficient Heuristic for Hard Real-Time System on Multi-Core Processors},
    booktitle={Proceedings of the International Conference on Applied Computing (AC)},
    author={He, Da and Müller, Wolfgang}, editor={Weghorn, Hans}, year={2013} }'
  chicago: He, Da, and Wolfgang Müller. “An Energy-Efficient Heuristic for Hard Real-Time
    System on Multi-Core Processors.” In <i>Proceedings of the International Conference
    on Applied Computing (AC)</i>, edited by Hans Weghorn. Fort Worth, Texas, USA,
    2013.
  ieee: D. He and W. Müller, “An Energy-Efficient Heuristic for Hard Real-Time System
    on Multi-Core Processors,” in <i>Proceedings of the International Conference on
    Applied Computing (AC)</i>, 2013.
  mla: He, Da, and Wolfgang Müller. “An Energy-Efficient Heuristic for Hard Real-Time
    System on Multi-Core Processors.” <i>Proceedings of the International Conference
    on Applied Computing (AC)</i>, edited by Hans Weghorn, 2013.
  short: 'D. He, W. Müller, in: H. Weghorn (Ed.), Proceedings of the International
    Conference on Applied Computing (AC), Fort Worth, Texas, USA, 2013.'
date_created: 2023-01-16T12:12:58Z
date_updated: 2023-01-16T12:15:44Z
department:
- _id: '672'
editor:
- first_name: Hans
  full_name: Weghorn, Hans
  last_name: Weghorn
keyword:
- Dynamic Power Management
- Dynamic Voltage and Frequency Scaling
- Hard Real-Time
- Multi-core Processor
language:
- iso: eng
place: Fort Worth, Texas, USA
publication: Proceedings of the International Conference on Applied Computing (AC)
publication_identifier:
  isbn:
  - '978-989-8533-20-3 '
status: public
title: An Energy-Efficient Heuristic for Hard Real-Time System on Multi-Core Processors
type: conference
user_id: '5786'
year: '2013'
...