--- _id: '26023' author: - first_name: Da full_name: He, Da last_name: He - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller citation: ama: 'He D, Müller W. Enhanced Schedulability Analysis of Hard Real-Time Systems on Power Manageable Multi-Core Platforms. In: Third International Symposium on Advances in Embedded Systems and Applications (ESA-2012). IEEE Xplore; 2012.' apa: He, D., & Müller, W. (2012). Enhanced Schedulability Analysis of Hard Real-Time Systems on Power Manageable Multi-Core Platforms. Third International Symposium on Advances in Embedded Systems and Applications (ESA-2012). bibtex: '@inproceedings{He_Müller_2012, title={Enhanced Schedulability Analysis of Hard Real-Time Systems on Power Manageable Multi-Core Platforms}, booktitle={Third International Symposium on Advances in Embedded Systems and Applications (ESA-2012)}, publisher={IEEE Xplore}, author={He, Da and Müller, Wolfgang}, year={2012} }' chicago: He, Da, and Wolfgang Müller. “Enhanced Schedulability Analysis of Hard Real-Time Systems on Power Manageable Multi-Core Platforms.” In Third International Symposium on Advances in Embedded Systems and Applications (ESA-2012). IEEE Xplore, 2012. ieee: D. He and W. Müller, “Enhanced Schedulability Analysis of Hard Real-Time Systems on Power Manageable Multi-Core Platforms,” 2012. mla: He, Da, and Wolfgang Müller. “Enhanced Schedulability Analysis of Hard Real-Time Systems on Power Manageable Multi-Core Platforms.” Third International Symposium on Advances in Embedded Systems and Applications (ESA-2012), IEEE Xplore, 2012. short: 'D. He, W. Müller, in: Third International Symposium on Advances in Embedded Systems and Applications (ESA-2012), IEEE Xplore, 2012.' date_created: 2021-10-11T08:43:05Z date_updated: 2022-01-06T06:57:15Z department: - _id: '672' language: - iso: eng publication: Third International Symposium on Advances in Embedded Systems and Applications (ESA-2012) publisher: IEEE Xplore status: public title: Enhanced Schedulability Analysis of Hard Real-Time Systems on Power Manageable Multi-Core Platforms type: conference user_id: '21240' year: '2012' ... --- _id: '26024' author: - first_name: Stephan full_name: Radke, Stephan last_name: Radke - first_name: Steffen full_name: Rülke, Steffen last_name: Rülke - first_name: Marcio F. full_name: Oliveira, Marcio F. last_name: Oliveira - first_name: Christoph full_name: Kuznik, Christoph last_name: Kuznik - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller - first_name: Wolfgang full_name: Ecker, Wolfgang last_name: Ecker - first_name: Volkan full_name: Esen, Volkan last_name: Esen - first_name: Simon full_name: Hufnagel, Simon last_name: Hufnagel - first_name: Nico full_name: Bannow, Nico last_name: Bannow - first_name: Jan-Hendrik full_name: Oetjens, Jan-Hendrik last_name: Oetjens - first_name: Helmut full_name: Brazdrum, Helmut last_name: Brazdrum - first_name: Peter full_name: Janssen, Peter last_name: Janssen - first_name: Hoang M. full_name: Le, Hoang M. last_name: Le - first_name: Daniel full_name: Große, Daniel last_name: Große - first_name: Finn full_name: Haedicke, Finn last_name: Haedicke - first_name: Rolf full_name: Drechsler, Rolf last_name: Drechsler - first_name: Gernot full_name: Koch, Gernot last_name: Koch - first_name: Andreas full_name: Burger, Andreas last_name: Burger - first_name: Oliver full_name: Bringmann, Oliver last_name: Bringmann - first_name: Wolfgang full_name: Rosenstiel, Wolfgang last_name: Rosenstiel - first_name: Ralph full_name: Görgen, Ralph last_name: Görgen citation: ama: 'Radke S, Rülke S, Oliveira MF, et al. Compilation of Methodologies to Speed up the Verification Process at System Level. In: EdaWorkshop 12. ; 2012.' apa: Radke, S., Rülke, S., Oliveira, M. F., Kuznik, C., Müller, W., Ecker, W., Esen, V., Hufnagel, S., Bannow, N., Oetjens, J.-H., Brazdrum, H., Janssen, P., Le, H. M., Große, D., Haedicke, F., Drechsler, R., Koch, G., Burger, A., Bringmann, O., … Görgen, R. (2012). Compilation of Methodologies to Speed up the Verification Process at System Level. EdaWorkshop 12. bibtex: '@inproceedings{Radke_Rülke_Oliveira_Kuznik_Müller_Ecker_Esen_Hufnagel_Bannow_Oetjens_et al._2012, title={Compilation of Methodologies to Speed up the Verification Process at System Level}, booktitle={edaWorkshop 12}, author={Radke, Stephan and Rülke, Steffen and Oliveira, Marcio F. and Kuznik, Christoph and Müller, Wolfgang and Ecker, Wolfgang and Esen, Volkan and Hufnagel, Simon and Bannow, Nico and Oetjens, Jan-Hendrik and et al.}, year={2012} }' chicago: Radke, Stephan, Steffen Rülke, Marcio F. Oliveira, Christoph Kuznik, Wolfgang Müller, Wolfgang Ecker, Volkan Esen, et al. “Compilation of Methodologies to Speed up the Verification Process at System Level.” In EdaWorkshop 12, 2012. ieee: S. Radke et al., “Compilation of Methodologies to Speed up the Verification Process at System Level,” 2012. mla: Radke, Stephan, et al. “Compilation of Methodologies to Speed up the Verification Process at System Level.” EdaWorkshop 12, 2012. short: 'S. Radke, S. Rülke, M.F. Oliveira, C. Kuznik, W. Müller, W. Ecker, V. Esen, S. Hufnagel, N. Bannow, J.-H. Oetjens, H. Brazdrum, P. Janssen, H.M. Le, D. Große, F. Haedicke, R. Drechsler, G. Koch, A. Burger, O. Bringmann, W. Rosenstiel, R. Görgen, in: EdaWorkshop 12, 2012.' date_created: 2021-10-11T08:54:53Z date_updated: 2022-01-06T06:57:15Z department: - _id: '672' language: - iso: eng main_file_link: - url: http://www.vde-verlag.de/proceedings-de/563428010.html publication: edaWorkshop 12 status: public title: Compilation of Methodologies to Speed up the Verification Process at System Level type: conference user_id: '21240' year: '2012' ... --- _id: '26031' author: - first_name: Da full_name: He, Da last_name: He - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller citation: ama: 'He D, Müller W. Online Energy-Efficient Hard Real-Time Scheduling for Component Oriented Systems. In: 2012 IEEE 15th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC). IEEE Xplore; 2012.' apa: He, D., & Müller, W. (2012). Online Energy-Efficient Hard Real-Time Scheduling for Component Oriented Systems. 2012 IEEE 15th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC). bibtex: '@inproceedings{He_Müller_2012, title={Online Energy-Efficient Hard Real-Time Scheduling for Component Oriented Systems}, booktitle={2012 IEEE 15th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC)}, publisher={IEEE Xplore}, author={He, Da and Müller, Wolfgang}, year={2012} }' chicago: He, Da, and Wolfgang Müller. “Online Energy-Efficient Hard Real-Time Scheduling for Component Oriented Systems.” In 2012 IEEE 15th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC). IEEE Xplore, 2012. ieee: D. He and W. Müller, “Online Energy-Efficient Hard Real-Time Scheduling for Component Oriented Systems,” 2012. mla: He, Da, and Wolfgang Müller. “Online Energy-Efficient Hard Real-Time Scheduling for Component Oriented Systems.” 2012 IEEE 15th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC), IEEE Xplore, 2012. short: 'D. He, W. Müller, in: 2012 IEEE 15th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC), IEEE Xplore, 2012.' date_created: 2021-10-11T10:16:06Z date_updated: 2022-01-06T06:57:15Z department: - _id: '672' language: - iso: eng publication: 2012 IEEE 15th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC) publisher: IEEE Xplore status: public title: Online Energy-Efficient Hard Real-Time Scheduling for Component Oriented Systems type: conference user_id: '21240' year: '2012' ... --- _id: '26036' author: - first_name: Marcio F. full_name: Oliveira, Marcio F. last_name: Oliveira - first_name: Christoph full_name: Kuznik, Christoph last_name: Kuznik - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller - first_name: Wolfgang full_name: Ecker, Wolfgang last_name: Ecker - first_name: Volkan full_name: Esen, Volkan last_name: Esen citation: ama: 'Oliveira MF, Kuznik C, Müller W, Ecker W, Esen V. A SystemC Library for Advanced TLM Verification. In: Proceeding of Design and Verification Conference (DVCON). ; 2012.' apa: Oliveira, M. F., Kuznik, C., Müller, W., Ecker, W., & Esen, V. (2012). A SystemC Library for Advanced TLM Verification. Proceeding of Design and Verification Conference (DVCON). bibtex: '@inproceedings{Oliveira_Kuznik_Müller_Ecker_Esen_2012, title={A SystemC Library for Advanced TLM Verification}, booktitle={Proceeding of Design and Verification Conference (DVCON)}, author={Oliveira, Marcio F. and Kuznik, Christoph and Müller, Wolfgang and Ecker, Wolfgang and Esen, Volkan}, year={2012} }' chicago: Oliveira, Marcio F., Christoph Kuznik, Wolfgang Müller, Wolfgang Ecker, and Volkan Esen. “A SystemC Library for Advanced TLM Verification.” In Proceeding of Design and Verification Conference (DVCON), 2012. ieee: M. F. Oliveira, C. Kuznik, W. Müller, W. Ecker, and V. Esen, “A SystemC Library for Advanced TLM Verification,” 2012. mla: Oliveira, Marcio F., et al. “A SystemC Library for Advanced TLM Verification.” Proceeding of Design and Verification Conference (DVCON), 2012. short: 'M.F. Oliveira, C. Kuznik, W. Müller, W. Ecker, V. Esen, in: Proceeding of Design and Verification Conference (DVCON), 2012.' date_created: 2021-10-11T11:57:27Z date_updated: 2022-01-06T06:57:15Z department: - _id: '672' language: - iso: eng publication: Proceeding of Design and Verification Conference (DVCON) status: public title: A SystemC Library for Advanced TLM Verification type: conference user_id: '21240' year: '2012' ... --- _id: '26079' author: - first_name: Markus full_name: Becker, Markus last_name: Becker - first_name: Gilles Bertrand full_name: Gnokam Defo, Gilles Bertrand last_name: Gnokam Defo - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller - first_name: F. full_name: Fummi, F. last_name: Fummi - first_name: G. full_name: Pravadelli, G. last_name: Pravadelli - first_name: Sara full_name: Vinco, Sara last_name: Vinco citation: ama: 'Becker M, Gnokam Defo GB, Müller W, Fummi F, Pravadelli G, Vinco S. MOUSSE: scaling MOdelling and verification to complex heterogeneoUS embedded Systems Evolution. In: Design, Automation and Test in Europe (DATE 2012). ; 2012.' apa: 'Becker, M., Gnokam Defo, G. B., Müller, W., Fummi, F., Pravadelli, G., & Vinco, S. (2012). MOUSSE: scaling MOdelling and verification to complex heterogeneoUS embedded Systems Evolution. Design, Automation and Test in Europe (DATE 2012).' bibtex: '@inproceedings{Becker_Gnokam Defo_Müller_Fummi_Pravadelli_Vinco_2012, place={Dresden}, title={MOUSSE: scaling MOdelling and verification to complex heterogeneoUS embedded Systems Evolution}, booktitle={Design, Automation and Test in Europe (DATE 2012)}, author={Becker, Markus and Gnokam Defo, Gilles Bertrand and Müller, Wolfgang and Fummi, F. and Pravadelli, G. and Vinco, Sara}, year={2012} }' chicago: 'Becker, Markus, Gilles Bertrand Gnokam Defo, Wolfgang Müller, F. Fummi, G. Pravadelli, and Sara Vinco. “MOUSSE: Scaling MOdelling and Verification to Complex HeterogeneoUS Embedded Systems Evolution.” In Design, Automation and Test in Europe (DATE 2012). Dresden, 2012.' ieee: 'M. Becker, G. B. Gnokam Defo, W. Müller, F. Fummi, G. Pravadelli, and S. Vinco, “MOUSSE: scaling MOdelling and verification to complex heterogeneoUS embedded Systems Evolution,” 2012.' mla: 'Becker, Markus, et al. “MOUSSE: Scaling MOdelling and Verification to Complex HeterogeneoUS Embedded Systems Evolution.” Design, Automation and Test in Europe (DATE 2012), 2012.' short: 'M. Becker, G.B. Gnokam Defo, W. Müller, F. Fummi, G. Pravadelli, S. Vinco, in: Design, Automation and Test in Europe (DATE 2012), Dresden, 2012.' date_created: 2021-10-12T10:06:15Z date_updated: 2022-01-06T06:57:16Z department: - _id: '672' language: - iso: eng place: Dresden publication: Design, Automation and Test in Europe (DATE 2012) status: public title: 'MOUSSE: scaling MOdelling and verification to complex heterogeneoUS embedded Systems Evolution' type: conference user_id: '21240' year: '2012' ... --- _id: '26080' author: - first_name: Markus full_name: Becker, Markus last_name: Becker - first_name: Christoph full_name: Kuznik, Christoph last_name: Kuznik - first_name: M. tech. Mabel full_name: Joy, M. tech. Mabel last_name: Joy - first_name: Tao full_name: Xie, Tao last_name: Xie - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller citation: ama: 'Becker M, Kuznik C, Joy M tech. M, Xie T, Müller W. XEMU: A QEMU Based Binary Mutation Testing Framework. In: Design, Automation and Test in Europe DATE. ; 2012.' apa: 'Becker, M., Kuznik, C., Joy, M. tech. M., Xie, T., & Müller, W. (2012). XEMU: A QEMU Based Binary Mutation Testing Framework. Design, Automation and Test in Europe DATE.' bibtex: '@inproceedings{Becker_Kuznik_Joy_Xie_Müller_2012, place={University Booth, Dresden}, title={XEMU: A QEMU Based Binary Mutation Testing Framework}, booktitle={Design, Automation and Test in Europe DATE}, author={Becker, Markus and Kuznik, Christoph and Joy, M. tech. Mabel and Xie, Tao and Müller, Wolfgang}, year={2012} }' chicago: 'Becker, Markus, Christoph Kuznik, M. tech. Mabel Joy, Tao Xie, and Wolfgang Müller. “XEMU: A QEMU Based Binary Mutation Testing Framework.” In Design, Automation and Test in Europe DATE. University Booth, Dresden, 2012.' ieee: 'M. Becker, C. Kuznik, M. tech. M. Joy, T. Xie, and W. Müller, “XEMU: A QEMU Based Binary Mutation Testing Framework,” 2012.' mla: 'Becker, Markus, et al. “XEMU: A QEMU Based Binary Mutation Testing Framework.” Design, Automation and Test in Europe DATE, 2012.' short: 'M. Becker, C. Kuznik, M. tech. M. Joy, T. Xie, W. Müller, in: Design, Automation and Test in Europe DATE, University Booth, Dresden, 2012.' date_created: 2021-10-12T10:57:15Z date_updated: 2022-01-06T06:57:16Z department: - _id: '672' language: - iso: eng place: University Booth, Dresden publication: Design, Automation and Test in Europe DATE status: public title: 'XEMU: A QEMU Based Binary Mutation Testing Framework' type: conference user_id: '21240' year: '2012' ... --- _id: '26092' author: - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller - first_name: Markus full_name: Becker, Markus last_name: Becker - first_name: Henning full_name: Zabel, Henning last_name: Zabel - first_name: Ahmed full_name: Elfeky, Ahmed last_name: Elfeky - first_name: Anthony full_name: DiPasquale, Anthony last_name: DiPasquale citation: ama: 'Müller W, Becker M, Zabel H, Elfeky A, DiPasquale A. Virtual Prototyping of Cyber-Physical Systems. In: In Proceedings of 17th Asia and South Pacific Design Automation Conference (ASP-DAC 2012. ; 2012.' apa: Müller, W., Becker, M., Zabel, H., Elfeky, A., & DiPasquale, A. (2012). Virtual Prototyping of Cyber-Physical Systems. In Proceedings of 17th Asia and South Pacific Design Automation Conference (ASP-DAC 2012. bibtex: '@inproceedings{Müller_Becker_Zabel_Elfeky_DiPasquale_2012, place={Sydney}, title={Virtual Prototyping of Cyber-Physical Systems}, booktitle={In Proceedings of 17th Asia and South Pacific Design Automation Conference (ASP-DAC 2012}, author={Müller, Wolfgang and Becker, Markus and Zabel, Henning and Elfeky, Ahmed and DiPasquale, Anthony}, year={2012} }' chicago: Müller, Wolfgang, Markus Becker, Henning Zabel, Ahmed Elfeky, and Anthony DiPasquale. “Virtual Prototyping of Cyber-Physical Systems.” In In Proceedings of 17th Asia and South Pacific Design Automation Conference (ASP-DAC 2012. Sydney, 2012. ieee: W. Müller, M. Becker, H. Zabel, A. Elfeky, and A. DiPasquale, “Virtual Prototyping of Cyber-Physical Systems,” 2012. mla: Müller, Wolfgang, et al. “Virtual Prototyping of Cyber-Physical Systems.” In Proceedings of 17th Asia and South Pacific Design Automation Conference (ASP-DAC 2012, 2012. short: 'W. Müller, M. Becker, H. Zabel, A. Elfeky, A. DiPasquale, in: In Proceedings of 17th Asia and South Pacific Design Automation Conference (ASP-DAC 2012, Sydney, 2012.' date_created: 2021-10-13T10:36:35Z date_updated: 2022-01-06T06:57:16Z department: - _id: '672' language: - iso: eng place: Sydney publication: In Proceedings of 17th Asia and South Pacific Design Automation Conference (ASP-DAC 2012 status: public title: Virtual Prototyping of Cyber-Physical Systems type: conference user_id: '21240' year: '2012' ... --- _id: '26695' abstract: - lang: eng text: The Unified Modeling Language (UML) is now widely accepted by the software community. More recently, UML has attracted attention as a unification language for systems description combining both hardware and software components. First, it has been recognized that electronic systems design can no longer be seen as an isolated hardware design activity. In addition, recent advances in tools supporting high level hardware synthesis from electronic system level languages, which are predominantly based on C/C++, open new perspectives for automatic code generation from UML models and opportunities to enhance the link between a high level specification and a concrete hardware/software implementation. Finally, UML has become a general purpose language which can be customized for specific purposes, such as the modelization of electronic systems. This chapter presents recent advances of the UML language applied to System-on-Chip (SoC) and hardware-related embedded systems design. In particular, several examples of specific UML customizations (UML profiles) relevant for SoC design are summarized. Various approaches associating UML with existing hardware/software design languages are presented. The question of tool support and association with well-known simulation environments, such as MATLAB/Simulink, is addressed as well. A concrete example of a UML profile for hardware/software co-modeling and code generation for hardware/software co-simulation is presented in more details for illustration purposes. author: - first_name: Yves full_name: Vanderperren, Yves last_name: Vanderperren - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller - first_name: Da full_name: He, Da last_name: He - first_name: Fabian full_name: Mischkalla, Fabian last_name: Mischkalla - first_name: Wim full_name: Dahaene, Wim last_name: Dahaene citation: ama: 'Vanderperren Y, Müller W, He D, Mischkalla F, Dahaene W. Extending UML for Electronic Systems Design: A Code Generation Perspective. In: Nicolescu G, O’Connor I, Piguet C, eds. Design Technology for Heterogeneous Embedded Systems. 1st Edition. Auflage. Springer Verlag; 2012:13-39.' apa: 'Vanderperren, Y., Müller, W., He, D., Mischkalla, F., & Dahaene, W. (2012). Extending UML for Electronic Systems Design: A Code Generation Perspective. In G. Nicolescu, I. O’Connor, & C. Piguet (Eds.), Design Technology for Heterogeneous Embedded Systems (1st Edition. Auflage, pp. 13–39). Springer Verlag.' bibtex: '@inbook{Vanderperren_Müller_He_Mischkalla_Dahaene_2012, edition={1st Edition. Auflage}, title={Extending UML for Electronic Systems Design: A Code Generation Perspective}, booktitle={Design Technology for Heterogeneous Embedded Systems}, publisher={Springer Verlag}, author={Vanderperren, Yves and Müller, Wolfgang and He, Da and Mischkalla, Fabian and Dahaene, Wim}, editor={Nicolescu, Gabriela and O’Connor, Ian and Piguet, Christian}, year={2012}, pages={13–39} }' chicago: 'Vanderperren, Yves, Wolfgang Müller, Da He, Fabian Mischkalla, and Wim Dahaene. “Extending UML for Electronic Systems Design: A Code Generation Perspective.” In Design Technology for Heterogeneous Embedded Systems, edited by Gabriela Nicolescu, Ian O’Connor, and Christian Piguet, 1st Edition. Auflage., 13–39. Springer Verlag, 2012.' ieee: 'Y. Vanderperren, W. Müller, D. He, F. Mischkalla, and W. Dahaene, “Extending UML for Electronic Systems Design: A Code Generation Perspective,” in Design Technology for Heterogeneous Embedded Systems, 1st Edition. Auflage., G. Nicolescu, I. O’Connor, and C. Piguet, Eds. Springer Verlag, 2012, pp. 13–39.' mla: 'Vanderperren, Yves, et al. “Extending UML for Electronic Systems Design: A Code Generation Perspective.” Design Technology for Heterogeneous Embedded Systems, edited by Gabriela Nicolescu et al., 1st Edition. Auflage, Springer Verlag, 2012, pp. 13–39.' short: 'Y. Vanderperren, W. Müller, D. He, F. Mischkalla, W. Dahaene, in: G. Nicolescu, I. O’Connor, C. Piguet (Eds.), Design Technology for Heterogeneous Embedded Systems, 1st Edition. Auflage, Springer Verlag, 2012, pp. 13–39.' date_created: 2021-10-21T12:14:17Z date_updated: 2022-10-18T09:53:40Z department: - _id: '672' edition: 1st Edition. Auflage editor: - first_name: Gabriela full_name: Nicolescu, Gabriela last_name: Nicolescu - first_name: Ian full_name: O'Connor, Ian last_name: O'Connor - first_name: Christian full_name: Piguet, Christian last_name: Piguet language: - iso: eng page: 13-39 publication: Design Technology for Heterogeneous Embedded Systems publication_identifier: isbn: - 978-94-007-1125-9 publisher: Springer Verlag status: public title: 'Extending UML for Electronic Systems Design: A Code Generation Perspective' type: book_chapter user_id: '5786' year: '2012' ... --- _id: '26038' abstract: - lang: eng text: We present an enhanced UVM for SystemC library which incorporates verification best practices from OVM-ML and UVM as well as project partner implementations. Moreover, we extended functionality and implemented missing features, such as domain specific components, stimuli sequence generation and management, call-back facilities, response to request routing, transaction recording and many more. Apart from that, we added crucial verification components, such as functional coverage. author: - first_name: Christoph full_name: Kuznik, Christoph last_name: Kuznik - first_name: Marcio F. full_name: Oliveira, Marcio F. last_name: Oliveira - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller citation: ama: Kuznik C, Oliveira MF, Müller W. SYSTEMC UVM VERIFICATION COMPONENTS. Design, Automation and Test in Europe DATE. Published online 2012. apa: Kuznik, C., Oliveira, M. F., & Müller, W. (2012). SYSTEMC UVM VERIFICATION COMPONENTS. Design, Automation and Test in Europe DATE. bibtex: '@article{Kuznik_Oliveira_Müller_2012, title={SYSTEMC UVM VERIFICATION COMPONENTS}, journal={Design, Automation and Test in Europe DATE}, author={Kuznik, Christoph and Oliveira, Marcio F. and Müller, Wolfgang}, year={2012} }' chicago: Kuznik, Christoph, Marcio F. Oliveira, and Wolfgang Müller. “SYSTEMC UVM VERIFICATION COMPONENTS.” Design, Automation and Test in Europe DATE, 2012. ieee: C. Kuznik, M. F. Oliveira, and W. Müller, “SYSTEMC UVM VERIFICATION COMPONENTS,” Design, Automation and Test in Europe DATE, 2012. mla: Kuznik, Christoph, et al. “SYSTEMC UVM VERIFICATION COMPONENTS.” Design, Automation and Test in Europe DATE, 2012. short: C. Kuznik, M.F. Oliveira, W. Müller, Design, Automation and Test in Europe DATE (2012). conference: location: ' University Booth, Dresden , Mrz. 2012' date_created: 2021-10-11T12:48:21Z date_updated: 2024-04-18T21:07:25Z department: - _id: '672' language: - iso: eng publication: Design, Automation and Test in Europe DATE status: public title: SYSTEMC UVM VERIFICATION COMPONENTS type: journal_article user_id: '5786' year: '2012' ... --- _id: '53593' citation: ama: Müller W, Ecker W, eds. Proceedings of the 1st Workshop on Metamodelling and Code Generation for Embedded Systems - MeCoEs .; 2012. apa: Müller, W., & Ecker, W. (Eds.). (2012). Proceedings of the 1st Workshop on Metamodelling and Code Generation for Embedded Systems - MeCoEs . bibtex: '@book{Müller_Ecker_2012, place={Tampere, Finland}, title={Proceedings of the 1st Workshop on Metamodelling and Code Generation for Embedded Systems - MeCoEs }, year={2012} }' chicago: Müller, Wolfgang, and Wolfgang Ecker, eds. Proceedings of the 1st Workshop on Metamodelling and Code Generation for Embedded Systems - MeCoEs . Tampere, Finland, 2012. ieee: W. Müller and W. Ecker, Eds., Proceedings of the 1st Workshop on Metamodelling and Code Generation for Embedded Systems - MeCoEs . Tampere, Finland, 2012. mla: Müller, Wolfgang, and Wolfgang Ecker, editors. Proceedings of the 1st Workshop on Metamodelling and Code Generation for Embedded Systems - MeCoEs . 2012. short: W. Müller, W. Ecker, eds., Proceedings of the 1st Workshop on Metamodelling and Code Generation for Embedded Systems - MeCoEs , Tampere, Finland, 2012. date_created: 2024-04-18T21:48:40Z date_updated: 2024-04-18T22:10:42Z department: - _id: '58' editor: - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller - first_name: Wolfgang full_name: Ecker, Wolfgang last_name: Ecker language: - iso: eng place: Tampere, Finland status: public title: 'Proceedings of the 1st Workshop on Metamodelling and Code Generation for Embedded Systems - MeCoEs ' type: book_editor user_id: '16243' year: '2012' ... --- _id: '36922' abstract: - lang: eng text: In this paper we present an approach for the self reconfiguration of distributed micro-controllers for increased fault tolerance. Based on a modified distributed system topology utilizing a time division multiple access (TDMA) protocol, i.e., Flex Ray, we present a self-organized distributed coordinator concept which performs the self-reconfiguration in the case of node failures. We introduce a distributed coordinator, which utilizes redundant slots in the Flex Ray communication schedule and combines messages in configured protocol frames and slots to avoid a complete bus restart. As such, the self-reconfiguration is realized by means of predetermined information about resulting changes in the communication dependencies and (re-)assignments determined in the design phase. To retrieve the necessary information, we present an analytical approach, which determines a combined solution for the initial configuration and all possible reconfigurations for the remaining nodes of the Flex Ray network in case of node failures. Hence, through this method we can design self-reconfiguring network-based systems enabling the handling of node failures for an increased fault tolerance. author: - first_name: Kay full_name: Klobedanz, Kay last_name: Klobedanz - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller - first_name: Achim full_name: Rettberg, Achim last_name: Rettberg citation: ama: 'Klobedanz K, Müller W, Rettberg A. An Approach for Self-Reconfiguring and Fault-Tolerant Distributed Real-Time Systems. In: IEEE; 2012. doi:10.1109/ISORCW.2012.41' apa: Klobedanz, K., Müller, W., & Rettberg, A. (2012). An Approach for Self-Reconfiguring and Fault-Tolerant Distributed Real-Time Systems. IEEE 15th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops. https://doi.org/10.1109/ISORCW.2012.41 bibtex: '@inproceedings{Klobedanz_Müller_Rettberg_2012, place={Shenzhen, China }, title={An Approach for Self-Reconfiguring and Fault-Tolerant Distributed Real-Time Systems}, DOI={10.1109/ISORCW.2012.41}, publisher={IEEE}, author={Klobedanz, Kay and Müller, Wolfgang and Rettberg, Achim}, year={2012} }' chicago: 'Klobedanz, Kay, Wolfgang Müller, and Achim Rettberg. “An Approach for Self-Reconfiguring and Fault-Tolerant Distributed Real-Time Systems.” Shenzhen, China : IEEE, 2012. https://doi.org/10.1109/ISORCW.2012.41.' ieee: 'K. Klobedanz, W. Müller, and A. Rettberg, “An Approach for Self-Reconfiguring and Fault-Tolerant Distributed Real-Time Systems,” presented at the IEEE 15th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, 2012, doi: 10.1109/ISORCW.2012.41.' mla: Klobedanz, Kay, et al. An Approach for Self-Reconfiguring and Fault-Tolerant Distributed Real-Time Systems. IEEE, 2012, doi:10.1109/ISORCW.2012.41. short: 'K. Klobedanz, W. Müller, A. Rettberg, in: IEEE, Shenzhen, China , 2012.' conference: name: IEEE 15th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops date_created: 2023-01-16T12:23:50Z date_updated: 2023-01-16T12:25:33Z department: - _id: '672' doi: 10.1109/ISORCW.2012.41 keyword: - Real time systems - Fault tolerant systems - Schedules - Protocols - Redundancy - Delay language: - iso: eng place: 'Shenzhen, China ' publication_identifier: eisbn: - 978-0-7695-4669-8 publisher: IEEE status: public title: An Approach for Self-Reconfiguring and Fault-Tolerant Distributed Real-Time Systems type: conference user_id: '5786' year: '2012' ... --- _id: '36921' author: - first_name: M. F. full_name: Oliveira, M. F. last_name: Oliveira - first_name: Christoph full_name: Kuznik, Christoph last_name: Kuznik - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller - first_name: V. full_name: Esen, V. last_name: Esen - first_name: W. full_name: Ecker, W. last_name: Ecker citation: ama: 'Oliveira MF, Kuznik C, Müller W, Esen V, Ecker W. Towards an Enhanced UVM for SystemC. In: Proceedings of the Design & Verification Conference (DVCon). ; 2012.' apa: Oliveira, M. F., Kuznik, C., Müller, W., Esen, V., & Ecker, W. (2012). Towards an Enhanced UVM for SystemC. Proceedings of the Design & Verification Conference (DVCon). bibtex: '@inproceedings{Oliveira_Kuznik_Müller_Esen_Ecker_2012, place={San Jose}, title={Towards an Enhanced UVM for SystemC}, booktitle={Proceedings of the Design & Verification Conference (DVCon)}, author={Oliveira, M. F. and Kuznik, Christoph and Müller, Wolfgang and Esen, V. and Ecker, W.}, year={2012} }' chicago: Oliveira, M. F., Christoph Kuznik, Wolfgang Müller, V. Esen, and W. Ecker. “Towards an Enhanced UVM for SystemC.” In Proceedings of the Design & Verification Conference (DVCon). San Jose, 2012. ieee: M. F. Oliveira, C. Kuznik, W. Müller, V. Esen, and W. Ecker, “Towards an Enhanced UVM for SystemC,” 2012. mla: Oliveira, M. F., et al. “Towards an Enhanced UVM for SystemC.” Proceedings of the Design & Verification Conference (DVCon), 2012. short: 'M.F. Oliveira, C. Kuznik, W. Müller, V. Esen, W. Ecker, in: Proceedings of the Design & Verification Conference (DVCon), San Jose, 2012.' date_created: 2023-01-16T12:19:39Z date_updated: 2023-01-16T12:21:17Z department: - _id: '672' language: - iso: eng place: San Jose publication: Proceedings of the Design & Verification Conference (DVCon) status: public title: Towards an Enhanced UVM for SystemC type: conference user_id: '5786' year: '2012' ... --- _id: '36994' abstract: - lang: eng text: This paper proposes a quality driven, simulation based approach to functional design verification, which applies mainly to IP-level HDL designs with well specified test instruction format and is evaluated on a soft microprocessor core MB-LITE [5]. The approach utilizes mutation analysis as the quality metric to steer an automated simulation data generation process. It leads to a simulation flow with two phases towards an enhanced mutation analysis result. First in a random simulation phase, an in-loop heuristics is deployed and adjusts dynamically the test probability distribution so as to improve the coverage efficiency. Next, for each remaining hard-to-kill mutant, a search heuristics on test input space is developed to iteratively locate a target test, using a specific objective cost function for the goal of killing HDL mutant. The effectiveness of this integrated two-phase simulation flow is demonstrated by the results with the MB-LITE microprocessor IP. author: - first_name: 'Tao ' full_name: 'Xie, Tao ' last_name: Xie - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller - first_name: Florian full_name: Letombe, Florian last_name: Letombe citation: ama: 'Xie T, Müller W, Letombe F. Mutation-Analysis Driven Functional Verification of a Soft Microprocessor. In: Proceedings of SOCC2012. IEEE; 2012. doi:10.1109/SOCC.2012.6398362' apa: Xie, T., Müller, W., & Letombe, F. (2012). Mutation-Analysis Driven Functional Verification of a Soft Microprocessor. Proceedings of SOCC2012. https://doi.org/10.1109/SOCC.2012.6398362 bibtex: '@inproceedings{Xie_Müller_Letombe_2012, place={ Niagara Falls, NY, USA }, title={Mutation-Analysis Driven Functional Verification of a Soft Microprocessor}, DOI={10.1109/SOCC.2012.6398362}, booktitle={Proceedings of SOCC2012}, publisher={IEEE}, author={Xie, Tao and Müller, Wolfgang and Letombe, Florian}, year={2012} }' chicago: 'Xie, Tao , Wolfgang Müller, and Florian Letombe. “Mutation-Analysis Driven Functional Verification of a Soft Microprocessor.” In Proceedings of SOCC2012. Niagara Falls, NY, USA : IEEE, 2012. https://doi.org/10.1109/SOCC.2012.6398362.' ieee: 'T. Xie, W. Müller, and F. Letombe, “Mutation-Analysis Driven Functional Verification of a Soft Microprocessor,” 2012, doi: 10.1109/SOCC.2012.6398362.' mla: Xie, Tao, et al. “Mutation-Analysis Driven Functional Verification of a Soft Microprocessor.” Proceedings of SOCC2012, IEEE, 2012, doi:10.1109/SOCC.2012.6398362. short: 'T. Xie, W. Müller, F. Letombe, in: Proceedings of SOCC2012, IEEE, Niagara Falls, NY, USA , 2012.' date_created: 2023-01-17T08:46:14Z date_updated: 2023-01-17T08:46:29Z department: - _id: '672' doi: 10.1109/SOCC.2012.6398362 keyword: - Analytical models - Hardware design languages - Microprocessors - Cost function - Data models - Search problems - IP networks language: - iso: eng place: ' Niagara Falls, NY, USA ' publication: Proceedings of SOCC2012 publication_identifier: eisbn: - 978-1-4673-1295-0 publisher: IEEE status: public title: Mutation-Analysis Driven Functional Verification of a Soft Microprocessor type: conference user_id: '5786' year: '2012' ... --- _id: '36997' author: - first_name: Tao full_name: Xie, Tao last_name: Xie - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller citation: ama: 'Xie T, Müller W. An IP-XACT-TO-SystemC Model Generator for Mutation Analysis. In: Proceedings of the MeCoES’12. ; 2012.' apa: Xie, T., & Müller, W. (2012). An IP-XACT-TO-SystemC Model Generator for Mutation Analysis. Proceedings of the MeCoES’12. bibtex: '@inproceedings{Xie_Müller_2012, place={Tampere, Finnland}, title={An IP-XACT-TO-SystemC Model Generator for Mutation Analysis}, booktitle={Proceedings of the MeCoES’12}, author={Xie, Tao and Müller, Wolfgang}, year={2012} }' chicago: Xie, Tao, and Wolfgang Müller. “An IP-XACT-TO-SystemC Model Generator for Mutation Analysis.” In Proceedings of the MeCoES’12. Tampere, Finnland, 2012. ieee: T. Xie and W. Müller, “An IP-XACT-TO-SystemC Model Generator for Mutation Analysis,” 2012. mla: Xie, Tao, and Wolfgang Müller. “An IP-XACT-TO-SystemC Model Generator for Mutation Analysis.” Proceedings of the MeCoES’12, 2012. short: 'T. Xie, W. Müller, in: Proceedings of the MeCoES’12, Tampere, Finnland, 2012.' date_created: 2023-01-17T08:52:59Z date_updated: 2023-01-17T08:53:54Z department: - _id: '672' language: - iso: eng place: Tampere, Finnland publication: Proceedings of the MeCoES’12 status: public title: An IP-XACT-TO-SystemC Model Generator for Mutation Analysis type: conference user_id: '5786' year: '2012' ... --- _id: '26667' author: - first_name: Christoph full_name: Kuznik, Christoph last_name: Kuznik - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller citation: ama: 'Kuznik C, Müller W. Aspect enhanced functional coverage driven verification in the SystemC HDVL. In: Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011). ; 2011.' apa: Kuznik, C., & Müller, W. (2011). Aspect enhanced functional coverage driven verification in the SystemC HDVL. Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011). bibtex: '@inproceedings{Kuznik_Müller_2011, title={Aspect enhanced functional coverage driven verification in the SystemC HDVL}, booktitle={Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011)}, author={Kuznik, Christoph and Müller, Wolfgang}, year={2011} }' chicago: Kuznik, Christoph, and Wolfgang Müller. “Aspect Enhanced Functional Coverage Driven Verification in the SystemC HDVL.” In Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011), 2011. ieee: C. Kuznik and W. Müller, “Aspect enhanced functional coverage driven verification in the SystemC HDVL,” 2011. mla: Kuznik, Christoph, and Wolfgang Müller. “Aspect Enhanced Functional Coverage Driven Verification in the SystemC HDVL.” Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011), 2011. short: 'C. Kuznik, W. Müller, in: Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011), 2011.' date_created: 2021-10-21T10:59:51Z date_updated: 2022-01-06T06:57:25Z department: - _id: '672' language: - iso: eng publication: Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011) status: public title: Aspect enhanced functional coverage driven verification in the SystemC HDVL type: conference user_id: '21240' year: '2011' ... --- _id: '26669' author: - first_name: Tao full_name: Xie, Tao last_name: Xie - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller citation: ama: 'Xie T, Müller W. IP-XACT based System Level Mutation Testing. In: Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT). ; 2011.' apa: Xie, T., & Müller, W. (2011). IP-XACT based System Level Mutation Testing. Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT). bibtex: '@inproceedings{Xie_Müller_2011, title={IP-XACT based System Level Mutation Testing}, booktitle={Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT)}, author={Xie, Tao and Müller, Wolfgang}, year={2011} }' chicago: Xie, Tao, and Wolfgang Müller. “IP-XACT Based System Level Mutation Testing.” In Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT), 2011. ieee: T. Xie and W. Müller, “IP-XACT based System Level Mutation Testing,” 2011. mla: Xie, Tao, and Wolfgang Müller. “IP-XACT Based System Level Mutation Testing.” Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT), 2011. short: 'T. Xie, W. Müller, in: Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT), 2011.' date_created: 2021-10-21T11:04:35Z date_updated: 2022-01-06T06:57:25Z department: - _id: '672' language: - iso: eng publication: Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT) status: public title: IP-XACT based System Level Mutation Testing type: conference user_id: '21240' year: '2011' ... --- _id: '26698' author: - first_name: Tao full_name: Xie, Tao last_name: Xie - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller citation: ama: 'Xie T, Müller W. HDL-Mutation Based Simulation Data Generation by Propagation Guided Search. In: Proceedings of the 14th Euromicro Conference on Digital System Design (DSD). ; 2011.' apa: Xie, T., & Müller, W. (2011). HDL-Mutation Based Simulation Data Generation by Propagation Guided Search. Proceedings of the 14th Euromicro Conference on Digital System Design (DSD). bibtex: '@inproceedings{Xie_Müller_2011, title={HDL-Mutation Based Simulation Data Generation by Propagation Guided Search}, booktitle={Proceedings of the 14th Euromicro Conference on Digital System Design (DSD)}, author={Xie, Tao and Müller, Wolfgang}, year={2011} }' chicago: Xie, Tao, and Wolfgang Müller. “HDL-Mutation Based Simulation Data Generation by Propagation Guided Search.” In Proceedings of the 14th Euromicro Conference on Digital System Design (DSD), 2011. ieee: T. Xie and W. Müller, “HDL-Mutation Based Simulation Data Generation by Propagation Guided Search,” 2011. mla: Xie, Tao, and Wolfgang Müller. “HDL-Mutation Based Simulation Data Generation by Propagation Guided Search.” Proceedings of the 14th Euromicro Conference on Digital System Design (DSD), 2011. short: 'T. Xie, W. Müller, in: Proceedings of the 14th Euromicro Conference on Digital System Design (DSD), 2011.' date_created: 2021-10-21T12:22:19Z date_updated: 2022-01-06T06:57:26Z department: - _id: '672' language: - iso: eng publication: Proceedings of the 14th Euromicro Conference on Digital System Design (DSD) status: public title: HDL-Mutation Based Simulation Data Generation by Propagation Guided Search type: conference user_id: '21240' year: '2011' ... --- _id: '26705' abstract: - lang: eng text: "In the area of dynamic verification of virtual prototypes, functional coverage is a valuable tool for answering the \"Are we done?\" question and achieving verification closure. Recent verification methodologies such as OVM and UVM contain multi-language support that provides a basic SystemC version. However, due to language shortcoming they cannot be utilized for the same amount of verification tasks in the SystemC ecosystem as in other supported hardware design and verification languages. In this presentation, we propose to boost the verification capabilities of SystemC by implementing functional coverage collection and evaluation according to the same metric as defined in the widely accepted IEEE-1800 SystemVerilog cover group feature. We implement a functional coverage library to enable coverage-driven verification of SystemC designs on multiple levels of abstraction enabling value, transition, and expression coverage. To our knowledge, the overall functionalities are not available in the IEEE-1666 SystemC standard or the SCV add-on library, nor are they complete compared to the aforementioned in any publicly available SystemC library.\r\n" author: - first_name: Christoph full_name: Kuznik, Christoph last_name: Kuznik - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller citation: ama: Kuznik C, Müller W. Verification Closure of SystemC Designs with Functional Coverage. North American SystemC User Group Meeting (16th). Published online 2011. apa: Kuznik, C., & Müller, W. (2011). Verification Closure of SystemC Designs with Functional Coverage. North American SystemC User Group Meeting (16th). Jun. 2011 - 16th North American User Group Meeting (NASCUG). bibtex: '@article{Kuznik_Müller_2011, title={Verification Closure of SystemC Designs with Functional Coverage}, journal={North American SystemC User Group Meeting (16th)}, author={Kuznik, Christoph and Müller, Wolfgang}, year={2011} }' chicago: Kuznik, Christoph, and Wolfgang Müller. “Verification Closure of SystemC Designs with Functional Coverage.” North American SystemC User Group Meeting (16th), 2011. ieee: C. Kuznik and W. Müller, “Verification Closure of SystemC Designs with Functional Coverage,” North American SystemC User Group Meeting (16th), 2011. mla: Kuznik, Christoph, and Wolfgang Müller. “Verification Closure of SystemC Designs with Functional Coverage.” North American SystemC User Group Meeting (16th), 2011. short: C. Kuznik, W. Müller, North American SystemC User Group Meeting (16th) (2011). conference: name: Jun. 2011 - 16th North American User Group Meeting (NASCUG) date_created: 2021-10-21T12:37:44Z date_updated: 2022-01-06T06:57:26Z department: - _id: '672' language: - iso: eng publication: North American SystemC User Group Meeting (16th) status: public title: Verification Closure of SystemC Designs with Functional Coverage type: journal_article user_id: '21240' year: '2011' ... --- _id: '26710' author: - first_name: Markus full_name: Becker, Markus last_name: Becker - first_name: Henning full_name: Zabel, Henning last_name: Zabel - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller - first_name: Ahmed full_name: Elfeky, Ahmed last_name: Elfeky - first_name: Anthony full_name: DiPasquale, Anthony last_name: DiPasquale citation: ama: "Becker M, Zabel H, Müller W, Elfeky A, DiPasquale A. Virtual Prototyping softwareintensiver mechatronischer Systeme \x96 Eine Fallstudie. In: 8. Paderborner Workshop Entwurf Mechatronischer Systeme, Band 294. Vol 294. Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn; 2011:315-327." apa: "Becker, M., Zabel, H., Müller, W., Elfeky, A., & DiPasquale, A. (2011). Virtual Prototyping softwareintensiver mechatronischer Systeme \x96 Eine Fallstudie. 8. Paderborner Workshop Entwurf Mechatronischer Systeme, Band 294, 294, 315–327." bibtex: "@inproceedings{Becker_Zabel_Müller_Elfeky_DiPasquale_2011, title={Virtual Prototyping softwareintensiver mechatronischer Systeme \x96 Eine Fallstudie}, volume={294}, booktitle={8. Paderborner Workshop Entwurf mechatronischer Systeme, Band 294}, publisher={Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn}, author={Becker, Markus and Zabel, Henning and Müller, Wolfgang and Elfeky, Ahmed and DiPasquale, Anthony}, year={2011}, pages={315–327} }" chicago: "Becker, Markus, Henning Zabel, Wolfgang Müller, Ahmed Elfeky, and Anthony DiPasquale. “Virtual Prototyping Softwareintensiver Mechatronischer Systeme \x96 Eine Fallstudie.” In 8. Paderborner Workshop Entwurf Mechatronischer Systeme, Band 294, 294:315–27. Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn, 2011." ieee: "M. Becker, H. Zabel, W. Müller, A. Elfeky, and A. DiPasquale, “Virtual Prototyping softwareintensiver mechatronischer Systeme \x96 Eine Fallstudie,” in 8. Paderborner Workshop Entwurf mechatronischer Systeme, Band 294, 2011, vol. 294, pp. 315–327." mla: "Becker, Markus, et al. “Virtual Prototyping Softwareintensiver Mechatronischer Systeme \x96 Eine Fallstudie.” 8. Paderborner Workshop Entwurf Mechatronischer Systeme, Band 294, vol. 294, Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn, 2011, pp. 315–27." short: 'M. Becker, H. Zabel, W. Müller, A. Elfeky, A. DiPasquale, in: 8. Paderborner Workshop Entwurf Mechatronischer Systeme, Band 294, Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn, 2011, pp. 315–327.' date_created: 2021-10-21T12:46:10Z date_updated: 2022-01-06T06:57:26Z department: - _id: '672' intvolume: ' 294' language: - iso: eng page: 315-327 publication: 8. Paderborner Workshop Entwurf mechatronischer Systeme, Band 294 publisher: Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn status: public title: "Virtual Prototyping softwareintensiver mechatronischer Systeme \x96 Eine Fallstudie" type: conference user_id: '21240' volume: 294 year: '2011' ... --- _id: '26713' author: - first_name: Kay full_name: Klobedanz, Kay last_name: Klobedanz - first_name: A. full_name: König, A. last_name: König - first_name: Wolfgang full_name: Müller, Wolfgang id: '16243' last_name: Müller citation: ama: 'Klobedanz K, König A, Müller W. A Reconfiguration Approach for Fault-Tolerant FlexRay Networks. In: Proceedings of Design, Automation, Test Europe - DATE2011. IEEE Computer Society Press; 2011.' apa: Klobedanz, K., König, A., & Müller, W. (2011). A Reconfiguration Approach for Fault-Tolerant FlexRay Networks. Proceedings of Design, Automation, Test Europe - DATE2011. bibtex: '@inproceedings{Klobedanz_König_Müller_2011, place={Grenoble, France}, title={A Reconfiguration Approach for Fault-Tolerant FlexRay Networks}, booktitle={Proceedings of Design, Automation, Test Europe - DATE2011}, publisher={IEEE Computer Society Press}, author={Klobedanz, Kay and König, A. and Müller, Wolfgang}, year={2011} }' chicago: 'Klobedanz, Kay, A. König, and Wolfgang Müller. “A Reconfiguration Approach for Fault-Tolerant FlexRay Networks.” In Proceedings of Design, Automation, Test Europe - DATE2011. Grenoble, France: IEEE Computer Society Press, 2011.' ieee: K. Klobedanz, A. König, and W. Müller, “A Reconfiguration Approach for Fault-Tolerant FlexRay Networks,” 14. - 18. Mrz. 2011, 2011. mla: Klobedanz, Kay, et al. “A Reconfiguration Approach for Fault-Tolerant FlexRay Networks.” Proceedings of Design, Automation, Test Europe - DATE2011, IEEE Computer Society Press, 2011. short: 'K. Klobedanz, A. König, W. Müller, in: Proceedings of Design, Automation, Test Europe - DATE2011, IEEE Computer Society Press, Grenoble, France, 2011.' conference: location: 14. - 18. Mrz. 2011 date_created: 2021-10-21T13:01:47Z date_updated: 2022-01-06T06:57:26Z department: - _id: '672' language: - iso: eng place: Grenoble, France publication: Proceedings of Design, Automation, Test Europe - DATE2011 publisher: IEEE Computer Society Press status: public title: A Reconfiguration Approach for Fault-Tolerant FlexRay Networks type: conference user_id: '21240' year: '2011' ...