@inproceedings{24215, abstract = {{Wireless Sensor Networks (WSN) consist of large number of distributed sensors nodes which are able to sense, read and transmit physical measurements such as temperature, humidity and pressure over wireless communication links. WSN nodes are often powered by batteries or can use energy harvesting methods from environmental energy sources. One of the major challenges in the design of WSN nodes is the high level of power dissipation for sensing, processing and communication. Operating at low-power levels reduces maintenance effort for periodic battery replacement or can even provide unlimited operation by means of energy harvesting. Since the communication process is the most power hungry process, ultra-low-power wireless communication is an enabler for network applications such as cyber-physical systems, Internet-of-Things and Industry 4.0 etc. Our research is based on Wake-up Receivers (WuR) architectures. Each of the WSN nodes contains a WuR which is always-on, listening for a wake-up signal from other nodes or the base station, and activating the node only when a wake-up signal is detected. By this scheme the communication with the base station becomes asynchronous, real-time and on-demand. Due to the centrally-coordinated, collision-free communication such WSNs can be scaled to very large node numbers. Designing always-on WuR at ultra-low-power dissipation levels makes the WSN nodes very energy efficient because they are only activated when a wake-up-signal is received. Additionally, the WuR must be robust to noise and co-channel interference in order to operate safely in parallel to other wireless systems. We investigate a novel radio architecture for the WuR using Linear Frequency Modulation (LFM) and passive analog signal processing by means of a Surface Acoustic Wave (SAW) correlator. The base station sends the required WSN node ID using LFM signal at 2.4 GHz. The node ID is encoded as chirp up or chirp down signal with chirping bandwidth of 80MHz. On the receiver side, the SAW chirp correlator demodulates the received LFM signal while suppressing other wireless signals. In order to achieve proper demodulation and high Signal-to-Noise Ratio (SNR), the SAW correlator is designed to behave like a Matched Filter (MF) which boosts up the SNR. After that the signal is amplified/detected by baseband amplifier stage, it is compared with the unique ID of the node, and the node's Wake up signal is asserted accordingly. Since the SAW correlator operates completely passive, the WuR can be implemented in a very energy-efficient way, without the need to use power hungry device such as Low Noise Amplifiers (LNA) or down conversion Local Oscillators (LO)}}, author = {{Abughannam, Saed and Scheytt, Christoph}}, booktitle = {{Kleinheubacher Tagung 2017}}, pages = {{47}}, title = {{{ Low-Power wake up receiver based on Surface Acoustic Wave Correlator}}}, year = {{2017}}, } @article{24216, abstract = {{In this article mixed analog/digital signal processing techniques based on parallel spread-spectrum sequencing (PSSS) and radio frequency (RF) carrier synchronization for ultra-broadband wireless communication are investigated on system and circuit level.}}, author = {{Scheytt, Christoph and Javed, Abdul Rehman and Bammidi, Eswara Rao and KrishneGowda, Karthik and Kallfass, Ingmar and Kraemer, Rolf}}, journal = {{Frequenz* Journal of RF-Engineering and Telecommunications}}, number = {{9-10}}, pages = {{399--414}}, title = {{{100 Gbps Wireless System and Circuit Design Using Parallel Spread-Spectrum Sequencing}}}, volume = {{71 }}, year = {{2017}}, } @inproceedings{24217, abstract = {{Parallel Sequence Spread Spectrum (PSSS) is a physical layer (PHY) baseband technology that is well suited for mixed-signal transceiver implementation for high data rate wireless communication systems. Mixed signal baseband realization allows for easier implementation of the channel equalization function and eliminates the need for high speed data converters. System design and architecture of a mixed signal baseband processor for 100 Gbps wireless communication is described that reduces the implementation complexity and results in a consequent reduction in power dissipation and chip area. An ultra-broadband analog correlator consisting of a four-quadrant multiplier and a fast resettable integrator using only NPN transistors was designed, fabricated, and measured. The correlator circuit is the core component of the receiver baseband. To the best knowledge of the authors, it is the fastest correlator circuit published so far.}}, author = {{Javed, Abdul Rehman and Scheytt, Christoph and Karthik, KrishneGowda and Kramer, Roland}}, booktitle = {{IEEE EUROCON 2017-17th International Conference on Smart Technologies}}, isbn = {{978-1-5090-3844-2}}, pages = {{228--233}}, title = {{{System design of a mixed signal PSSS transdeiver using a linear ultra-broadband analog correlator for the receiver baseband designed in 130nm SiGe BiCMOS technology}}}, doi = {{10.1109/EUROCON.2017.8011110}}, year = {{2017}}, } @misc{24218, abstract = {{ Die Erfindung betrifft eine Folge-Halte-Schaltung zum Konvertieren eines analogen Eingangssignals in ein digitales Ausgangssignal mit einer Haltekapazitätseinheit, mit einer Spannungsverstärkereinheit enthaltend einen Eingang, an dem ein analoges Eingangsspannungssignal anlegbar ist, und enthaltend einen Ausgang, der mit der Haltekapazitätseinheit verbunden ist, mit einer Arbeitspunkteinstelleinheit zur Steuerung der Spannungsverstärkereinheit, wobei an einem Eingang der Arbeitspunkteinstelleinheit ein Steuersignal anliegt, so dass in einem Folgebetrieb der Folge-Halte-Schaltung eine an dem Ausgang der Spannungsverstärkereinheit anliegendes Ausgangssignal einen an den Eingang der Spannungsverstärkereinheit anliegendes Eingangssignal folgt, und in einem Haltebetrieb der Folge-Halte-Schaltung das Ausgangssignal der Spannungsverstärkereinheit konstant ist, mit einer Taktsignalquelle zur Erzeugung einer Folge von einem Eingang der Arbeitspunkteinstelleinheit anliegenden Taktsignalen, wobei die Arbeitspunkteinstelleinheit elektrooptische Mittel zur Erzeugung des Steuersignals aufweist, dass die Taktsignalquelle als eine optische Taktsignalquelle ausgebildet ist, so dass als Taktsignal eine optische Impulsfolge mit hohen und tiefen Taktsignalen an den Eingang der Arbeitspunkteinstelleinheit anliegt. }}, author = {{Scheytt, Christoph}}, title = {{{Folge-Halte-Schaltung }}}, year = {{2017}}, } @inproceedings{24220, author = {{Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Mueller-Gritschneder, Daniel and Kleinjohann, Bernd and Scheytt, Christoph}}, booktitle = {{Tagungsband des Wissenschaftsforums Intelligente Technische Systeme}}, isbn = {{978-3-942647-88-5}}, publisher = {{Verlagsschriftenreihe des Heinz Nixdorf Instituts}}, title = {{{Automatisierte Fehlerinjektion zur Entwicklung sicherer Mikrocontrolleranwendungen auf der Basis virtueller Plattformen}}}, doi = {{10.17619/UNIPB/1-93}}, year = {{2017}}, } @book{24221, abstract = {{Das Wissenschaftsforum Intelligente Technische Systeme (WInTeSys) legt am 11. und 12. Mai 2017 in Paderborn den Schwerpunkt auf die Grundlagen und die Entwicklung intelligenter technischer Systeme im Kontext Industrie 4.0. Etwa 40 begutachtete hochkarätige Beiträge geben einen Überblick über Forschungsfelder, Technologien und Anwendungen. Die Veranstaltung bietet den Teilnehmerinnen und Teilnehmern eine ausgezeichnete Bühne für den Erfahrungsaustausch auf dem Weg in die Digitalisierung von Produkten und Produktionssystemen. »Das Besondere ist der Dialog von Hochschulforschung und industrieller Entwicklung, also das Aufeinandertreffen von »Science-Push« und »Application-Pull«. Die Beiträge spiegeln die hervorragende Vernetzung in der Region OWL und darüber hinaus wider«, sagt Veranstalter Prof. Jürgen Gausemeier (Heinz Nixdorf Institut, Universität Paderborn).}}, author = {{Gausemeier, Jürgen and Bodden, Eric and Dressler, Falko and Dumitrescu, Roman and Meyer auf der Heide, Friedhelm and Scheytt, Christoph and Trächtler, Ansgar}}, isbn = {{978-3-942647-88-5}}, publisher = {{Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn}}, title = {{{Wissenschaftsforum Intelligente Technische Systeme (WInTeSys)}}}, doi = {{10.17619/UNIPB/1-93}}, volume = {{369}}, year = {{2017}}, } @inproceedings{24223, abstract = {{This paper presents the design flow of using sampling technique for fault injection on sche- matic level. The parameters used in the docu- ment to calculate the likelihood could be modi- fied by using more realistic data from the fab. With the help of the fault simulator, the whole design flow of the fault effect simulation can be realized automatically.}}, author = {{Wu, Liang and Abughannam, Saed and Müller, Wolfgang and Scheytt, Christoph and Ecker, Wolfgang}}, booktitle = {{2nd Workshop on Resiliency in Embedded Electronic Systems (REES)}}, pages = {{68}}, title = {{{SPICE-Level Fault Injection with Likelihood Weighted Random Sampling - A Case Study}}}, year = {{2017}}, } @inproceedings{24224, author = {{Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Kleinjohann, Bernd and Scheytt, Christoph}}, booktitle = {{Design Automation and Testing in Europe (DATE), University Booth Interactive Presentation}}, title = {{{ANALISA - A Tool for Static Instruction Set Analysis}}}, year = {{2017}}, } @inproceedings{24225, author = {{Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Kleinjohann, Bernd and Scheytt, Christoph}}, booktitle = {{2nd Workshop on Resiliency in Embedded Electronic Systems (REES) }}, pages = {{44}}, title = {{{An Automatic Injection Framework for Safety Assessements of Embedded Software Binaries}}}, year = {{2017}}, } @article{24227, abstract = {{This work describes an electrical interferometer for contactless permittivity measurements working at 120 GHz. It was fabricated in a 130 nm SiGe process featuring an ft and fmax of 240 and 330 GHz. The on-chip system contains a 120 GHz VCO with a tuning range of 7 GHz featuring a divide-by-64 circuit to enable external PLL operation. The subsequent buffer provides 7 dBm of output power at 120 GHz. Additionally, the IC contains high-precision and high-resolution phase shifters based on a slow-wave transmission line approach with digital control for direct readout ability. A 120 GHz LNA with 17 dB gain and a power detector to provide DC output signals were realized on chip. It enables sample emulation capability by phase shift inducement in the measurement as well as a reference transmission line. In terms of phase detection, the system shows a sensitivity of 907.36 MHz/°.}}, author = {{Wessel, Jan and Schmalz, Klaus and Scheytt, Christoph and Kissinger, Dietmar}}, issn = {{1558-1764}}, journal = {{IEEE Microwave and Wireless Components Letters}}, number = {{2}}, pages = {{198--200}}, title = {{{A 120-GHz Electrical Interferometer for Contactless Permittivity Measurements With Direct Digital Read-Out}}}, doi = {{10.1109/LMWC.2017.2649384}}, volume = {{27}}, year = {{2017}}, } @book{27415, editor = {{Gausemeier, Jürgen and Bodden, Eric and Dressler, Falko and Dumitrescu, Roman and Meyer auf der Heide, Friedhelm and Scheytt, Christoph and Trächtler, Ansgar}}, publisher = {{Verlagsschriftenreihe des Heinz Nixdorf Instituts}}, title = {{{Wissenschaftsforum Intelligente Technische Systeme (WInTeSys). , Band 369}}}, volume = {{369}}, year = {{2017}}, } @article{24211, abstract = {{A fully-differential receiver structure for fiber links is presented, in which the photodiode (PD) is DC-coupled to the transimpedance amplifier (TIA) and biased through the feedback resistors. The biasing voltage is defined by the internal structure of the input stage. Different options are suggested that allow to adjust PD biasing. Multiple architecture variants are proposed, that were implemented in 0.25μm SiGe BiCMOS technology. Initial measurement results are reported, proving the feasibility of the concept. A 25Gbps hybrid receiver designed to comply with a specific standard is also presented, featuring large horizontal eye opening of 800mV, OMA of -15dBm at BER of 10 -6 and power dissipation of 330mW from a single 3.3V power supply.}}, author = {{Gudyriev, Sergiy and Scheytt, Christoph and Yan, Lei and Christian, Meuer and Zimmermann, Lars}}, issn = {{ 2378-590X}}, journal = {{IEEE Bipolar/BiCMOS Circuits and Technology Meeting}}, title = {{{Fully-differential, DC-coupled, Self-biased, Monolithically-integrated Optical Receiver in 0.25μm Photonic BiCMOS Technology for Multi-channel Fiber Links}}}, doi = {{10.1109/BCTM.2017.8112922}}, year = {{2017}}, } @inproceedings{24226, author = {{Scheytt, Christoph}}, booktitle = {{W3+Fair on Optoelectronics, Electronics, and Mechanics}}, title = {{{Silicon Photonics Microsystems for Communications and Sensing}}}, year = {{2017}}, } @article{24212, abstract = {{A hybrid multi-channel receiver featuring fully-differential transimpedance input stages for 25Gbps data rate per channel is presented along with measurement results focusing on the channel-to-channel interference and sensitivity. OMA of -16dBm at a BER of 10−4 is estimated at the photodiode for all channels. Each channel dissipates 330mW of power provided from a single 3.3V supply voltage.}}, author = {{Gudyriev, Sergiy and Scheytt, Christoph and Kress, Christian and Yan, Lei and Christian, Meuer and Zimmermann, Lars}}, isbn = {{978-1-943580-33-0}}, journal = {{OSA Frontiers in Optics + Laser Science}}, title = {{{Fully-Differential, Hybrid, Multi-channel 4x25Gbps Direct Direction Receiver in 0.25\textmum BiCMOS SiGe Technology}}}, doi = {{https://doi.org/10.1364/FIO.2017.FM3A.3}}, year = {{2017}}, } @inproceedings{24219, abstract = {{In this paper we present theoretical, simulated and measured data for a reader to tag communication RFID system at 5.8 GHz. First a theoretical link budget analysis for a reader to tag architecture is shown for a wireless industrial application at 1m distance. This includes a power budget of the passively powered transponder. The received power level of the backscattered data for the theoretical link budget is -52:5 dBm. For the first setup slot antennas are developed and measured in the anechoic chamber. The measured gain is 4.0 dB. The power of the backscatter data in setup 1 is -74:8 dBm. This corresponds to the theoretical link budget since, all losses such as cable or lower antenna gain are taken into account. Setup 2 is upgraded on the reader side with horn antennas. At 5.8 GHz, the gain reaches the value of 10.8 dB. The second setup shows improvement in the receiving backscattered power to a value of -62:4 dBm. Furthermore, as a solution to detect those transponders not presented in the main slope of the antenna, a steerable beam is introduced by means of a Rotman lens. On the topic of the passive transponder, different harvesting topologies at 5.8 GHz are investigated, and the efficiency simulation of the harvesting circuitry has been performed. The simulated efficiency of the implemented technique is 68 %.}}, author = {{Kuhn, Peter and Haddadian, Sanaz and Meyer, Frederic and Hoffmann, Marc and Grabmaier, Anton and Scheytt, Christoph and Kaiser, Thomas}}, booktitle = {{Smart SysTech 2017; European Conference on Smart Objects, Systems and Technologies}}, isbn = {{978-3-8007-4428-2}}, publisher = {{VDE ITG}}, title = {{{SHF RFID System for Automatic Process Optimization with Intelligent Tools}}}, year = {{2017}}, } @inproceedings{24222, abstract = {{This paper focuses on the design of a high efficiency cross-connected differential drive rectifier for next-generation passive RFID tags. To provide a realistic estimation of the transponders’power and efficiency requirements at 5.8 GHz, detailed link/power-budget analysis for various blocks of the tag chip is carried out. From link budget analysis realistic RF power levels are obtained and a rectifier with high conversion efficiency at low power levels is designed. Simulations based on a commercial 65nm CMOS technology investigate the suitability of the harvesting circuit for 5.8 GHz RFID tags.}}, author = {{Haddadian, Sanaz and Scheytt, Christoph and Kramer, Roland}}, booktitle = {{ANALOG 2017; 16th ITG/GMM-Symposium}}, pages = {{18}}, publisher = {{Technische Universität Berlin}}, title = {{{Energy Harvesting Analysis for Next Generation Passive RFID Tags}}}, year = {{2017}}, } @inproceedings{25069, author = {{Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Kleinjohann, Bernd and Scheytt, J. Christoph}}, booktitle = {{Design Automation and Testing in Europe (DATE)}}, location = {{Lausanne, CH, Mrz. 2017}}, title = {{{ANALISA - A Tool for Static Instruction Set Analysis}}}, year = {{2017}}, } @inproceedings{24264, abstract = {{Electronic systems, like they are embedded in road vehicles, have to be compliant to functional safety standards like ISO 26262 [1], which limit the impacts of malfunctions for safety critical systems. ISO 26262, for instance, defines different safety levels for road vehicles, which require different means and measures for a safety compliant system and its development process like risk analysis and fault effect simulation. For fault effect simulation it is important to investigate the impact of physical and hardware related effects to the correct function of a system. This article first studies code and model mutations for fault injection in the context of fault effect simulation through different system abstraction levels. It demonstrates how high level mutations correlate to bit flips of software binaries by examples from the TriCore™ instruction set and finally presents a virtual platform based implementation for automated injection of bit flip based mutations into software binaries. Experimental results demonstrate the efficiency of the implemented approach.}}, author = {{Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Becker, Markus and Kleinjohann, Bernd and Scheytt, Christoph}}, booktitle = {{Proceedings of the IEEE/IFIP International Conference on VLSI (VLSI-SOC)}}, issn = {{2324-8440}}, title = {{{Fast Dynamic Fault Injection for Virtual Microcontroller Platforms}}}, doi = {{10.1109/VLSI-SoC.2016.7753545}}, year = {{2016}}, } @inproceedings{24265, abstract = {{This paper presents a four stage all-transmission-line 220 GHz differential LNA in SiGe BiCMOS technology. Cascode topology is chosen for each stage. The amplifier takes advantage of microstrip transmission lines to realize the inductive load, Marshand balun, input, output, and inter-stage matching of the LNA. The LNA has a gain of 21 dB at 224 GHz, a 3 dB bandwidth of more than 6 GHz. It has a supply voltage of 3V and power dissipation of 234 mW. The amplifier is intended for the use in communication, security scanning, imaging and remote sensing at 220 GHz.}}, author = {{Mao, Yanfei and Schmalz, Klaus and Scheytt, Christoph and Shiju, E.}}, booktitle = {{IEEE International Symposium on Radio-Frequency Integration Technology}}, title = {{{An all-transmission-line 220 GHz differential LNA in SiGe BiCMOS}}}, doi = {{10.1109/RFIT.2016.7578132}}, year = {{2016}}, } @inproceedings{24263, abstract = {{The design of safety critical systems requires an efficient methodology for an effective fault effect simulation for analog and digital circuits where analog fault injection and fault effect simulation is currently a field of active research and commercial tools are not available yet. This article begins by discussing fault injection strategies for analog circuits applied on a case study with two topologies of a Voltage Controlled Oscillator (VCO). In the second part it performs on the basis of the example of a Wireless Sensor Network (WSN) node, how far different mixed level implementations with Verilog-A and SPICE can affect the simulation time and points out which component consumes the major part of the simulation time.}}, author = {{Abughannam, Saed and Wu, Liang and Müller, Wolfgang and Scheytt, Christoph and Ecker, Wolfgang and Novello, Christiano}}, booktitle = {{Analog 2016 - VDE}}, isbn = {{978-3-8007-4265-3}}, title = {{{Fault Injection and Mixed-Level Simulation for Analog Circuits - A Case Study}}}, year = {{2016}}, }