@inproceedings{24354, abstract = {{In this paper, a 6-bit true modular programmable frequency divider with division ratios ranging from 64 to 127 is reported. It is composed of a divider chain of 6 divide-by-2/3 cells, and ECL stages that are introduced as synchronization circuits for programming inputs. The synchronization circuits have CMOS input for compatibility with programming circuits. The stand-alone divider chain is functional up to an input clock frequency of 49 GHz. The combination of the divider chain with synchronization circuits is functional up to 44 GHz. The 6 stage divider draws 34 mA current from a 2.7 V supply. The synchronization circuits draw 30 mA from a 3 V supply. The circuit is fabricated in a 0.13 μm SiGe BiCMOS technology, and is well suited for millimeter-wave phase-locked loop (PLL) circuits which require fine frequency resolution.}}, author = {{Ergintav, Arzu and Sun, Yaoming and Scheytt, Christoph and Gürbüz, Yasar}}, booktitle = {{Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2013 IEEE 13th Topical Meeting on}}, title = {{{49 GHz 6-bit programmable divider in SiGe BiCMOS}}}, doi = {{10.1109/SiRF.2013.6489451}}, year = {{2013}}, } @inproceedings{24361, abstract = {{Two subharmonic receivers for 245 GHz spectroscopy sensor applications in the 245 GHz ISM band have been proposed. One receiver consists of an 2nd APDP (antiparallel diode pair) passive SHM (subharmonic mixer), a 120 GHz push-push VCO with 1/64 divider, and a 120 GHz PA (power amplifier). The other consists of a single-ended four-stage CB (common base) LNA, an 2 nd APDP passive SHM, an IF amplifier, a 120 GHz push-push VCO with 1/64 divider, and a 120 GHz PA. The receivers are fabricated in a SiGe:C BiCMOS technology with f T /f max =300/500 GHz. The measured conversion gain are -17 dB rsp. 10.6 dB at 245 GHz with 3-dB bandwidths of 13 GHz rsp. 14 GHz, and the single-side band noise figure are 17 dB rsp. 20 dB; the two receivers dissipates a power of 213 mW and 312 mW, respectively.}}, author = {{Mao, Yanfei and Schmalz, Klaus and Borngräber, Johannes and Scheytt, Christoph}}, booktitle = {{2013 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium}}, title = {{{245 GHz subharmonic receivers in SiGe}}}, doi = {{10.1109/RFIC.2013.6569533}}, year = {{2013}}, } @inproceedings{24358, abstract = {{A 240 GHz direct conversion IQ receiver manufactured in 0.13 SiGe BiCMOS technology with f T /f max of 300/500 GHz is presented. The receiver consists of a four stage LNA, an active power divider, an LO IQ generation network, and direct down-conversion fundamental mixers. The integrated IQ receiver yields a conversion gain of 18 dB, an 18 dB simulated DSB NF, and a 3 dB bandwidth of 25 GHz. The required 245 GHz LO power is in the order of -10 dBm. The receiver exhibits an IQ amplitude and phase imbalance of 1 dB and 3° respectively. It draws 135 mA from the 3.5 V supply and 20 mA from 2 V.}}, author = {{Elkhouly, Mohamed and Mao, Yanfei and Meliani, Chafik and Ellinger, Frank and Scheytt, Christoph}}, booktitle = {{2013 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium,}}, title = {{{A 240 GHz Direct Conversion IQ Receiver in 0.13 µm SiGe BiCMOS technology}}}, doi = {{10.1109/RFIC.2013.6569589}}, year = {{2013}}, } @inproceedings{24362, abstract = {{A subharmonic receiver for 245 GHz spectroscopy sensor applications have been proposed. The receiver consists of a CB (common base) LNA, 2 nd transconductance SHM (subharmonic mixer) and a 120 GHz push-push VCO with 1/64 divider. The receiver is fabricated in f T /f max =300/500 GHz SiGe: C BiCMOS technology. Its measured single-ended gain is 14.3 dB at 245 GHz with tuning range of 15 GHz, and the single-side band noise figure is 19 dB. The input 1-dB compression point is at -24 dBm. The receiver dissipates a power of 200 mW.}}, author = {{Mao, Yanfei and Schmalz, Klaus and Borngräber, Johannes and Scheytt, Christoph and Meliani, Chafik}}, booktitle = {{IEEE International Microwave Symposium, Advances in Low Noise Amplifiers and Receivers}}, title = {{{245 GHz Subharmonic Receiver in SiGe}}}, doi = {{10.1109/MWSYM.2013.6697429}}, year = {{2013}}, } @inproceedings{24360, author = {{Scheytt, Christoph}}, booktitle = {{IEEE International Conference on Communications}}, title = {{{Wireless 100Gb/s Using A Powerand}}}, year = {{2013}}, } @misc{24359, author = {{Scheytt, Christoph}}, title = {{{Hardware-Effizientes Mixed-Signal Entzerrfilter}}}, year = {{2013}}, } @inproceedings{24339, author = {{Scheytt, Christoph and Sun, Yaoming and Schmalz, Klaus and Mao, Yanfei and Wang, Ruoyu and Debski, Wojciech and Winkler, Wolfgang}}, booktitle = {{W 06 (EuMC & EuMIC)}}, title = {{{mm-Wave System-On-Chip Design in 0,13µm SiGe BiCMOS}}}, year = {{2013}}, } @article{24344, abstract = {{In this paper, a novel 180°hybrid with different input frequencies is proposed to combine RF and local oscillator (LO) signals with different frequencies in a gate/base-pumped harmonic mixer. The detailed analysis and design procedures are presented in this paper. To further reduce the chip size, the multilayer metallization above the lossy silicon substrate is employed to implement the hybrid. A V-band down-converted 2× harmonic mixer in 90-nm CMOS process and a D-band down-converted 4× harmonic mixer in the 130-nm SiGe process are designed, fabricated, and measured to verify the concept. The 2× harmonic mixer possesses 0-dB conversion gain at 60 GHz with 0-dBm LO power with merely 2.4-mW dc power. The 4× harmonic mixer achieves 0.5-dB conversion gain at 120 GHz with 2-dBm LO power and 27.3-mW dc power. With the proposed reduced-size 180° hybrid, gate/base-pumped harmonic mixers are very attractive in transceivers demanding low LO frequency and power.}}, author = {{Kuo, Jhe-Jia and Lien, Chun-Hsien and Tsai, Zuo-Min and Lin, Kun-You and Schmalz, Klaus and Scheytt, Christoph and Wang, Huei}}, journal = {{Microwave Theory and Techniques, IEEE Transactions on}}, number = {{8}}, pages = {{2473--2485}}, title = {{{Design and Analysis of Down-Conversion Gate/Base-Pumped Harmonic Mixers Using Novel Reduced-Size 180 ^\circ Hybrid With Different Input Frequencies }}}, doi = {{10.1109/TMTT.2012.2202039}}, volume = {{60}}, year = {{2013}}, } @inproceedings{24343, abstract = {{50 Jahre Moore‘s Gesetz ? „More Moore“ & „More than Moore“ ? Miniatur-Radar-System ? Silizium-Photonik für schnelle Kommunikation ? Photonischer Winkelsensor}}, author = {{Scheytt, Christoph}}, booktitle = {{HNI-Forum September }}, title = {{{Nano-/Mikroelektronik als Enabler für neue Ansätze}}}, year = {{2013}}, } @inproceedings{24345, author = {{Scheytt, Christoph}}, booktitle = {{RF-MST Cluster Workshop on MEMSWAVE 2013}}, title = {{{RF-MST Cluster Workshop on MEMSWAVE 2013}}}, year = {{2013}}, } @inproceedings{24340, author = {{Scheytt, Christoph and Kraemer, Rolf and Kallfass, Ingmar}}, booktitle = {{W 19 (EuMC \& EuMIC)}}, title = {{{Strategies for Energy-Efficient 100 Gb/s Baseband}}}, year = {{2013}}, } @inproceedings{24341, abstract = {{This paper presents a 220-245 GHz 4 way Butler Matrix chip in 0.13μm SiGe BiCMOS technology. The chip features four 230 GHz amplifiers with almost 9 dB of gain. A SP4T switch is integrated to select between the four outputs of the beamforming network. Finally, an amplifier used to compensate the losses of the SP4T is integrated. The chip exhibits 0 dB of insertion gain and draws 104 mA from 3.3 V supply mainly consumed by the amplifiers. The entire chip occupies 1.5 × 2.4 mm 2 .}}, author = {{Elkhouly, Mohamed and Mao, Yanfei and Meliani, Chafik and Ellinger, Frank and Scheytt, Christoph}}, booktitle = {{IEEE BIPOLAR / BiCMOS CIRCUITS AND TECHNOLOGY MEETING,}}, title = {{{A 220-245 GHz Switched Beam Butler Matrix in 0,13µm SiGe BiCMOS technology }}}, doi = {{10.1109/BCTM.2013.6798158}}, year = {{2013}}, } @inproceedings{24342, abstract = {{Two half-wavelength 122 GHz patch antennas were designed and manufactured by using Benzocyclobutene (BCB) as a dielectric layer above the SiGe BiCMOS wafer. It enables the full integration of the millimeter-wave transceiver circuits and the antennas on a single chip to simplify the packaging procedure at millimeter-wave frequencies, thereby reducing the cost. The two patch antennas are fed by different feeding methods, i.e. microstrip transmission line direct feed and proximity-coupled feed. They exhibit similar performance and offer the flexibility of designing the interconnects (feed lines routing) between the circuits and the antennas within the very limited chip area. The measured gain is 3.4 dBi at 122.5 GHz (the center frequency of the ISM band of 122-123 GHz) for both designs with a simulated efficiency of about 50%.}}, author = {{Wang, Ruoyu and Kaynak, Mehmet and Sun, Yaoming and Borngräber, Johannes and Beer, Stefan and Goettel, B. and Scheytt, Christoph}}, booktitle = {{24th Annual IEEE International Symposium on Personal, Indoor and Mobile Radio Communications}}, title = {{{122 GHz Patch Antenna Designs by Using BCB Above SiGe BiCMOS wafer process for system-on-chip applications}}}, doi = {{10.1109/PIMRC.2013.6666358}}, year = {{2013}}, } @article{24347, abstract = {{In this paper, an integrated dielectric sensor with a read-out circuit in an unmodified SiGe BiCMOS technology at 125 GHz is presented. The sensor consists of a 500-μm shorted half-wave coplanar-waveguide transmission line in the uppermost metal layer of the silicon process, while the read-out is obtained by reflection coefficient measurement with an integrated reflectometer and a signal source. The reflectometer is verified with a circuit breakout including an integrated dummy sensor. The reflectometer is able to measure the phase of the reflection coefficient from 117 to 134 GHz with a resolution of 0.1° and a standard deviation of 0.082°. The integrated sensor with the reflectometer circuit have been fabricated in a 190-GHz fT SiGe:C BiCMOS technology. It spans an area of 1.4 mm 2 and consumes 75 mA from a 3.3-V supply. The circuit has been assembled on a printed circuit board for characterization by immersion into test liquids. The sensor is controlled by a controller board and a personal computer enabling a measurement time of up to 1 ms per frequency point. Functionality of the sensor is demonstrated from 118 to 133 GHz with immersion of the sensor into different binary methanol-ethanol mixtures, showing good correlation between theory and measurement. The sensor shows a standard deviation of the measured phase of 0.220° and is able to detect a difference in ε' r of 0.0125}}, author = {{Laemmle, Benjamin and Schmalz, Klaus and Scheytt, Christoph and Weigel, Robert and Kissinger, Dietmar}}, journal = {{Microwave Theory and Techniques, IEEE Transactions on}}, number = {{5}}, pages = {{2185--2194}}, title = {{{A 125-GHz Permittivity Sensor With Read-Out Circuit in a 250-nm SiGe BiCMOS Technology}}}, doi = {{10.1109/TMTT.2013.2253792}}, volume = {{61}}, year = {{2013}}, } @inproceedings{24348, author = {{Scheytt, Christoph and Grau, Günter}}, booktitle = {{Wissenschaftsforum 2013, Intelligente Technische Systeme, Heinz Nixdorf Institut}}, title = {{{Neue Ansätze für miniaturisierte, hochintegrierte Abstands-, Geschwindigkeits- und Drehwinkelsensoren}}}, year = {{2013}}, } @inproceedings{24346, author = {{Scheytt, Christoph}}, booktitle = {{System, IC and Integrated Antenna Design for Miniaturized, Millimeter-wave Radar Sensors}}, title = {{{Introduction to Integrated mm‐Wave Sensors}}}, year = {{2013}}, } @article{24350, abstract = {{This paper describes the design of D-band phased-array circuits in 0.25 μm technology. The first part describes the design of the passive components which are used in the phased-array systems such as balun, Wilkinson divider and branch-line coupler. A millimeter-wave vector-modulator is designed to support both amplitude and phase control for beam-forming applications. In the second part the designed circuits are integrated together to form a two channel 110-130 GHz phased-array chip. Each channel exhibits 360° phase control with 15 dB of amplitude control range and gain of -10 dB. The entire chip draws 45 mA from 3.3 V supply. The millimeter-wave phase shifting and the low-power consumption makes it ideal for highly integrated scalable beam-forming systems for both imaging and communication.}}, author = {{Elkhouly, Mohamed and Glisic, Srdjan and Meliani, Chafik and Ellinger, Frank and Scheytt, Christoph}}, journal = {{Microwave Theory and Techniques, IEEE Transactions on}}, number = {{99}}, pages = {{1--13}}, title = {{{220–250-GHz Phased-Array Circuits in 0.13- \mu\hbox m SiGe BiCMOS Technology}}}, doi = {{10.1109/TMTT.2013.2258032}}, volume = {{PP}}, year = {{2013}}, } @article{24352, abstract = {{This paper analyses substrate-related spurious tones in fractional-N phase- locked loops with integrated VCOs. Spur positions are calculated and experimentally verified as a function of the divider ratios of prescaler and programmable divider. For an integrated wideband PLL in SiGe BiCMOS technology the spur power levels are measured and compared with theoretical expectations. The power in these spurs is minimized by layout techniques shielding the reference input buffer. Spur minimization by using a variable reference frequency is experimentally demonstrated. Based on this observation, a programmable integer-N PLL for driving the fractional-N synthesizer is suggested to reduce the worst-case spur level significantly. Index Terms — Fractional-N, frequency synthesizers, fractional spurs, substrate spurs, phase-locked loops (PLLs), phase noise. }}, author = {{Osmany, Sabbir Ahmed and Herzel, Frank and Scheytt, Christoph}}, journal = {{Analog Integrated Circuits and Signal Processing}}, number = {{3}}, pages = {{545--556}}, title = {{{Analysis and minimization of substrate spurs in fractional-N frequency synthesizers}}}, doi = {{10.1007/s10470-012-0002-x}}, volume = {{74}}, year = {{2013}}, } @inproceedings{24349, abstract = {{This paper presents the packaging technology and the integrated antenna design for a miniaturized 122-GHz radar sensor. The package layout and the assembly process are shortly explained. Measurements of the antenna including the flip chip interconnect are presented that have been achieved by replacing the IC with a dummy chip that only contains a through-line. Afterwards, radiation pattern measurements are shown that were recorded using the radar sensor as transmitter. Finally, details of the fully integrated radar sensor are given, together with results of the first Doppler measurements.}}, author = {{Beer, Stefan and Girma, Mekdes Gebresilassie and Sun, Yaoming and Winkler, Wolfgang and Debski, Wojciech and Paaso, Jaska and Kunkel, Gerhard and Scheytt, Christoph and Hasch, Jürgen and Zwick, Thomas}}, booktitle = {{7th EUROPEAN CONFERENCE ON ANTENNAS AND PROPAGATION}}, title = {{{Flip-Chip Package with Integrated Antenna on a Polyimide Substrate for a 122-GHz Bistatic Radar IC}}}, year = {{2013}}, } @inproceedings{24351, abstract = {{We demonstrate the first 80 Gb/s decision feedback equalizer in various electrical and optical applications. The device, designed in SiGe:C BiCMOS 0.13 μm technology, enables error-free data recovery of heavily distorted signals transmitted at a bandwidth less than 30% of their bit rate. The fastest nonlinear electrical equalizer reported yet utilizes a novel 1-tap look-ahead architecture.}}, author = {{Möller, Lothar and Awny, Ahmed and Junio, Josef and Scheytt, Christoph and Thiede, Andreas}}, booktitle = {{Optical Fiber Communication Conference}}, title = {{{80 Gb/s Decision Feedback Equalizer for Intersymbol Interference}}}, doi = {{10.1364/OFC.2013.OW4B.2 }}, year = {{2013}}, }