@inproceedings{24418,
  abstract     = {{The paper presents a four stage 245 GHz LNA in an f t /f max =280/425 GHz SiGe technology and a 4 th sub harmonic 245 GHz transconductance mixer in an f t /f max =250/300 GHz SiGe technology. The LNA takes advantage of common base (CB) topology for each stage and has 12 dB gain at 245 GHz, while exhibiting a 3 dB bandwidth of 26 GHz. It has a supply voltage of 2V and power dissipation of 28 mW. The transconductance mixer has -7 dB conversion gain at 245 GHz with an LO power of 8 dBm at 61 GHz. The mixer draws 9.8 mA at 3V. Simulation results of the receiver comprising the CB LNA and SHM mixer are given.}},
  author       = {{Mao, Yanfei and Schmalz, Klaus and Borngräber, Johannes and Scheytt, Christoph}},
  booktitle    = {{SiRF 2012 (Silicon Monolithic Integrated Circuits in RF Systems)}},
  pages        = {{5--8}},
  title        = {{{A 245 GHz CB LNA and SHM mixer in SiGe technology}}},
  doi          = {{10.1109/SiRF.2012.6160120}},
  year         = {{2012}},
}

@inproceedings{24419,
  abstract     = {{In this publication an integrated reflectometer in SiGe BiCMOS technology for sensor readout at 62 GHz is presented. The circuit includes an oscillator, a six-port reflectometer, and a dummy sensor for verification purposes. The circuit has a bandwidth of 8GHz at a center frequency of 62 GHz. It operates at 3.75V supply voltage and consumes 282 mW. The measurement principle is demonstrated and the scattering parameters of the dummy sensor are compared to measurement of a breakout circuit with a commercially available vector network analyzer. The circuit has been fabricated in a 190-GHz SiGe:C BiCMOS technology and occupies an area of 0.9 mm 2 .}},
  author       = {{Laemmle, Benjamin and Schmalz, Klaus and Scheytt, Christoph and Kissinger, Dietmar and Weigel, Robert}},
  booktitle    = {{SiRF 2012 (Silicon Monolithic Integrated Circuits in RF Systems)}},
  title        = {{{A 62GHz Reflectometer for Biomedical Sensor Readout in SiGe BiCMOS Technology}}},
  doi          = {{10.1109/SiRF.2012.6160125}},
  year         = {{2012}},
}

@inproceedings{24420,
  author       = {{Scheytt, Christoph and Debski, Wojciech and Sun, Yaoming and Wang, Ruoyu and Winkler, Wolfgang}},
  title        = {{{122 GHz Radartransceiver und Komponenten in 0.13ym SiGe BiCMOS}}},
  year         = {{2012}},
}

@misc{24425,
  abstract     = {{PSSS-Dekodierschaltung, dadurch gekennzeichnet, dass das analoge PSSS-Eingangssignal mit N Spreizsequenzen und N Verknüpfungselementen (z. B. Multiplizierer) verknüpft werden und die Ausgangssignale der N Verknüpfungselemente mit N analogen Integrierern auf integriert werden, dass die Integrierer jeweils zum Beginn der empfangenen Spreizsequenzen gleichzeitig mit dem Signal SYNC zurückgesetzt werden, dass der Integrator über die Dauer einer Code-Sequenz das Eingangssignal auf integriert, dass nach der Integration an den Ausgängen der Integratoren jeweils das dekodierte Datensignal anliegt, dass die Ausgangssignale der Integrierer mit N parallelen einem AD-Wandler digitalisiert werden. }},
  author       = {{Scheytt, Christoph}},
  title        = {{{Mixed-Signal PSSS-Empfänger}}},
  year         = {{2012}},
}

@inproceedings{24543,
  author       = {{Sun, Yaoming and Beer, Stefan and Scheytt, Christoph and Wang, Ruoyu and Zwick, Thomas}},
  booktitle    = {{RF-MST Cluster Workshop on MEMSWAVE 2012}},
  location     = {{Antalya}},
  title        = {{{mm-Wave SOC and SIP Design for 122 GHz Radar SSensor in the EU-FP7 Project SUCCESS}}},
  year         = {{2012}},
}

@inproceedings{24544,
  abstract     = {{Design of a 40 Gb/s VCSEL driver IC capable of providing up to 10mA current to common-cathode VCSELs is presented. Using low-power bandwidth enhancement techniques, a prototype IC is successfully developed in 180-GHz SiGe BiCMOS technology. Measured results show 34 GHz of bandwidth, open eye diagram with rise/fall time below 10 ps, and power dissipation of 130 mW.}},
  author       = {{Sedighi, Behnam and Scheytt, Christoph}},
  booktitle    = {{Microwave Symposium Digest (MTT), 2012 IEEE MTT-S International}},
  location     = {{ Montreal, QC, Canada}},
  pages        = {{1 --3}},
  title        = {{{40 Gb/s VCSEL driver IC with a new output current and pre-emphasis adjustment method}}},
  doi          = {{10.1109/MWSYM.2012.6259501}},
  year         = {{2012}},
}

@inproceedings{24545,
  abstract     = {{this paper presents a new circuit for high-speed BiCMOS track-and-holds. The proposed approach improves the signal feedthrough in the hold mode and the bandwidth in the tracking mode. A prototype circuit is implemented in a 0.13 µm BiCMOS technology, operating at 10 GS/s and consuming 19 mW from 3.3 V supply. It is shown that the circuit is capable of providing a harmonic distortion below −50 dB.}},
  author       = {{Sedighi, Behnam and Borokhovych, Yevgen and Gustat, Hans and Scheytt, Christoph}},
  booktitle    = {{Microwave Symposium Digest (MTT), 2012 IEEE MTT-S International}},
  pages        = {{1 --3}},
  title        = {{{Low-power BiCMOS track-and-hold circuit with reduced signal feedthrough}}},
  doi          = {{10.1109/MWSYM.2012.6259505}},
  year         = {{2012}},
}

@inproceedings{24546,
  abstract     = {{this paper investigates low-power design of high-speed and high-swing electronic driver circuits. A method to estimate and optimize the power consumption of such driver ICs is presented. A 20-Gb/s driver circuit is fabricated in 0.25 µm SiGe BiCMOS process and an output swing of 2.5 V pp is measured. The driver consumes 0.75 W from 5 V supply.}},
  author       = {{Sedighi, Behnam and Ostrovskyy, Philip and Scheytt, Christoph and Stille, Karl Stephan Christian and Böcker, Joachim}},
  booktitle    = {{Microwave Symposium Digest (MTT), 2012 IEEE MTT-S International}},
  pages        = {{1 --3}},
  title        = {{{Low-power 20-Gb/s SiGe BiCMOS driver with 2.5 V output swing}}},
  doi          = {{10.1109/MWSYM.2012.6259502}},
  year         = {{2012}},
}

@inproceedings{24423,
  author       = {{Scheytt, Christoph and Sun, Yaoming}},
  booktitle    = {{System, MMIC and Package Design for Low-Cost Radar Sensor}},
  title        = {{{122 GHz FMCW Radar Transceiver and Components in 0.13µm SiGe BiCMOS Technology}}},
  year         = {{2012}},
}

@inproceedings{24421,
  author       = {{Koelnberger, Andreas and Herzel, Frank and Heyer, Heinz-Volker and Lia, Enrico and Piironen, Petri and Telle, Holger and Scheytt, Christoph}},
  booktitle    = {{Simulations and Measurements of In-Band}},
  title        = {{{Spurs and Phase Noise for an integrated 8-12 GHZ Fractional-N PLL Synthesizer in SiGe BiCMOS   }}},
  year         = {{2012}},
}

@misc{24400,
  abstract     = {{Chipantenne (102), umfassend mindestens einen Strahler (114,116), der sich parallel zu einer Hauptoberfläche eines die Chipantenne tragenden Halbleitersubstrats (104) erstreckt, wobei der Strahler auf einer inselartigen Trägerzone (122,124) des Halbleitersubstrats angeordnet ist, die von mindestens einem vollständig mit einem Gas gefüllten Graben (126,128) umgeben ist, welcher das Halbleitersubstrat in dessen gesamter Tiefenerstreckung durchdringt und durch mindestens einen Haltesteg (130,132,134,136) überbrückt ist, welcher eine tragende Verbindung zwischen der Trägerzone und dem übrigen Halbleitersubstrat bildet.}},
  author       = {{Wang, Ruoyu and Sun, Yaoming and Kaynak, Mehmet and Scheytt, J. Christoph}},
  title        = {{{Chip-Antenne, Elektronisches Bauelement und Herstellungsverfahren}}},
  year         = {{2012}},
}

@article{45774,
  author       = {{Osmany, Sabbir A. and Herzel, Frank and Scheytt, J. Christoph}},
  journal      = {{IEEE Journal of Solid-State Circuits}},
  number       = {{9}},
  pages        = {{1657--1668}},
  title        = {{{An integrated 0.6–4.6 GHz, 5–7 GHz, 10–14 GHz, and 20–28 GHz frequency synthesizer for software-defined radio applications}}},
  doi          = {{10.1109/JSSC.2010.2051476}},
  volume       = {{45}},
  year         = {{2010}},
}

@article{45772,
  author       = {{Herzel, Frank and Osmany, Sabbir A.  and Scheytt, J. Christoph}},
  journal      = {{IEEE Transactions on Circuits and Systems I: Regular Papers}},
  number       = {{8}},
  pages        = {{1914--1924}},
  title        = {{{Analytical Phase-Noise Modeling and Charge Pump Optimization for Fractional-$N$ PLLs}}},
  volume       = {{57}},
  year         = {{2010}},
}

