---
_id: '433'
abstract:
- lang: eng
text: Virtual FPGAs are overlay architectures realized on top of physical FPGAs.
They are proposed to enhance or abstract away from the physical FPGA for experimenting
with novel architectures and design tool flows. In this paper, we present an embedding
of a ZUMA-based virtual FPGA fabric into a complete configurable system-on-chip.
Such an embedding is required to fully harness the potential of virtual FPGAs,
in particular to give the virtual circuits access to main memory and operating
system services, and to enable a concurrent operation of virtualized and non-virtualized
circuitry. We discuss our extension to ZUMA and its embedding into the ReconOS
operating system for hardware/software systems. Furthermore, we present an open
source tool flow to synthesize configurations for the virtual FPGA.
author:
- first_name: Tobias
full_name: Wiersema, Tobias
id: '3118'
last_name: Wiersema
- first_name: Arne
full_name: Bockhorn, Arne
last_name: Bockhorn
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Wiersema T, Bockhorn A, Platzner M. Embedding FPGA Overlays into Configurable
Systems-on-Chip: ReconOS meets ZUMA. In: Proceedings of the International Conference
on ReConFigurable Computing and FPGAs (ReConFig). ; 2014:1-6. doi:10.1109/ReConFig.2014.7032514'
apa: 'Wiersema, T., Bockhorn, A., & Platzner, M. (2014). Embedding FPGA Overlays
into Configurable Systems-on-Chip: ReconOS meets ZUMA. In Proceedings of the
International Conference on ReConFigurable Computing and FPGAs (ReConFig)
(pp. 1–6). https://doi.org/10.1109/ReConFig.2014.7032514'
bibtex: '@inproceedings{Wiersema_Bockhorn_Platzner_2014, title={Embedding FPGA Overlays
into Configurable Systems-on-Chip: ReconOS meets ZUMA}, DOI={10.1109/ReConFig.2014.7032514},
booktitle={Proceedings of the International Conference on ReConFigurable Computing
and FPGAs (ReConFig)}, author={Wiersema, Tobias and Bockhorn, Arne and Platzner,
Marco}, year={2014}, pages={1–6} }'
chicago: 'Wiersema, Tobias, Arne Bockhorn, and Marco Platzner. “Embedding FPGA Overlays
into Configurable Systems-on-Chip: ReconOS Meets ZUMA.” In Proceedings of the
International Conference on ReConFigurable Computing and FPGAs (ReConFig),
1–6, 2014. https://doi.org/10.1109/ReConFig.2014.7032514.'
ieee: 'T. Wiersema, A. Bockhorn, and M. Platzner, “Embedding FPGA Overlays into
Configurable Systems-on-Chip: ReconOS meets ZUMA,” in Proceedings of the International
Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–6.'
mla: 'Wiersema, Tobias, et al. “Embedding FPGA Overlays into Configurable Systems-on-Chip:
ReconOS Meets ZUMA.” Proceedings of the International Conference on ReConFigurable
Computing and FPGAs (ReConFig), 2014, pp. 1–6, doi:10.1109/ReConFig.2014.7032514.'
short: 'T. Wiersema, A. Bockhorn, M. Platzner, in: Proceedings of the International
Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–6.'
date_created: 2017-10-17T12:42:16Z
date_updated: 2022-01-06T07:00:56Z
ddc:
- '040'
department:
- _id: '78'
doi: 10.1109/ReConFig.2014.7032514
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-16T11:30:58Z
date_updated: 2018-03-16T11:30:58Z
file_id: '1355'
file_name: 433-wiersema14_reconfig_IEEE_approved.pdf
file_size: 369333
relation: main_file
success: 1
file_date_updated: 2018-03-16T11:30:58Z
has_accepted_license: '1'
language:
- iso: eng
page: '1-6 '
project:
- _id: '1'
name: SFB 901
- _id: '12'
name: SFB 901 - Subprojekt B4
- _id: '3'
name: SFB 901 - Project Area B
publication: Proceedings of the International Conference on ReConFigurable Computing
and FPGAs (ReConFig)
status: public
title: 'Embedding FPGA Overlays into Configurable Systems-on-Chip: ReconOS meets ZUMA'
type: conference
user_id: '477'
year: '2014'
...
---
_id: '10602'
author:
- first_name: Lars
full_name: Schaefers, Lars
last_name: Schaefers
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: Schaefers L, Platzner M. A Novel Technique and its Application to Computer
Go. IEEE Transactions on Computational Intelligence and AI in Games. 2014;6(3):361-374.
doi:10.1109/TCIAIG.2014.2346997
apa: Schaefers, L., & Platzner, M. (2014). A Novel Technique and its Application
to Computer Go. IEEE Transactions on Computational Intelligence and AI in Games,
6(3), 361–374. https://doi.org/10.1109/TCIAIG.2014.2346997
bibtex: '@article{Schaefers_Platzner_2014, title={A Novel Technique and its Application
to Computer Go}, volume={6}, DOI={10.1109/TCIAIG.2014.2346997},
number={3}, journal={IEEE Transactions on Computational Intelligence and AI in
Games}, author={Schaefers, Lars and Platzner, Marco}, year={2014}, pages={361–374}
}'
chicago: 'Schaefers, Lars, and Marco Platzner. “A Novel Technique and Its Application
to Computer Go.” IEEE Transactions on Computational Intelligence and AI in
Games 6, no. 3 (2014): 361–74. https://doi.org/10.1109/TCIAIG.2014.2346997.'
ieee: L. Schaefers and M. Platzner, “A Novel Technique and its Application to Computer
Go,” IEEE Transactions on Computational Intelligence and AI in Games, vol.
6, no. 3, pp. 361–374, 2014.
mla: Schaefers, Lars, and Marco Platzner. “A Novel Technique and Its Application
to Computer Go.” IEEE Transactions on Computational Intelligence and AI in
Games, vol. 6, no. 3, 2014, pp. 361–74, doi:10.1109/TCIAIG.2014.2346997.
short: L. Schaefers, M. Platzner, IEEE Transactions on Computational Intelligence
and AI in Games 6 (2014) 361–374.
date_created: 2019-07-10T09:22:43Z
date_updated: 2022-01-06T06:50:47Z
department:
- _id: '78'
doi: 10.1109/TCIAIG.2014.2346997
intvolume: ' 6'
issue: '3'
language:
- iso: eng
page: 361-374
publication: IEEE Transactions on Computational Intelligence and AI in Games
status: public
title: A Novel Technique and its Application to Computer Go
type: journal_article
user_id: '3118'
volume: 6
year: '2014'
...
---
_id: '10603'
author:
- first_name: Heiner
full_name: Giefers, Heiner
last_name: Giefers
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: Giefers H, Platzner M. An FPGA-based Reconfigurable Mesh Many-Core. IEEE
Transactions on Computers. 2014;63(12):2919-2932. doi:10.1109/TC.2013.174
apa: Giefers, H., & Platzner, M. (2014). An FPGA-based Reconfigurable Mesh Many-Core.
IEEE Transactions on Computers, 63(12), 2919–2932. https://doi.org/10.1109/TC.2013.174
bibtex: '@article{Giefers_Platzner_2014, title={An FPGA-based Reconfigurable Mesh
Many-Core}, volume={63}, DOI={10.1109/TC.2013.174},
number={12}, journal={IEEE Transactions on Computers}, author={Giefers, Heiner
and Platzner, Marco}, year={2014}, pages={2919–2932} }'
chicago: 'Giefers, Heiner, and Marco Platzner. “An FPGA-Based Reconfigurable Mesh
Many-Core.” IEEE Transactions on Computers 63, no. 12 (2014): 2919–32.
https://doi.org/10.1109/TC.2013.174.'
ieee: H. Giefers and M. Platzner, “An FPGA-based Reconfigurable Mesh Many-Core,”
IEEE Transactions on Computers, vol. 63, no. 12, pp. 2919–2932, 2014.
mla: Giefers, Heiner, and Marco Platzner. “An FPGA-Based Reconfigurable Mesh Many-Core.”
IEEE Transactions on Computers, vol. 63, no. 12, 2014, pp. 2919–32, doi:10.1109/TC.2013.174.
short: H. Giefers, M. Platzner, IEEE Transactions on Computers 63 (2014) 2919–2932.
date_created: 2019-07-10T09:22:44Z
date_updated: 2022-01-06T06:50:47Z
department:
- _id: '78'
doi: 10.1109/TC.2013.174
intvolume: ' 63'
issue: '12'
language:
- iso: eng
page: 2919 - 2932
publication: IEEE Transactions on Computers
status: public
title: An FPGA-based Reconfigurable Mesh Many-Core
type: journal_article
user_id: '398'
volume: 63
year: '2014'
...
---
_id: '10621'
author:
- first_name: Jahanzeb
full_name: Anwer, Jahanzeb
last_name: Anwer
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Sebastian
full_name: Meisner, Sebastian
last_name: Meisner
citation:
ama: 'Anwer J, Platzner M, Meisner S. FPGA Redundancy Configurations: An Automated
Design Space Exploration. In: Reconfigurable Architectures Workshop (RAW).
RAW. ; 2014. doi:10.1109/IPDPSW.2014.37'
apa: 'Anwer, J., Platzner, M., & Meisner, S. (2014). FPGA Redundancy Configurations:
An Automated Design Space Exploration. In Reconfigurable Architectures Workshop
(RAW). https://doi.org/10.1109/IPDPSW.2014.37'
bibtex: '@inproceedings{Anwer_Platzner_Meisner_2014, series={RAW}, title={FPGA Redundancy
Configurations: An Automated Design Space Exploration}, DOI={10.1109/IPDPSW.2014.37},
booktitle={Reconfigurable Architectures Workshop (RAW)}, author={Anwer, Jahanzeb
and Platzner, Marco and Meisner, Sebastian}, year={2014}, collection={RAW} }'
chicago: 'Anwer, Jahanzeb, Marco Platzner, and Sebastian Meisner. “FPGA Redundancy
Configurations: An Automated Design Space Exploration.” In Reconfigurable Architectures
Workshop (RAW). RAW, 2014. https://doi.org/10.1109/IPDPSW.2014.37.'
ieee: 'J. Anwer, M. Platzner, and S. Meisner, “FPGA Redundancy Configurations: An
Automated Design Space Exploration,” in Reconfigurable Architectures Workshop
(RAW), 2014.'
mla: 'Anwer, Jahanzeb, et al. “FPGA Redundancy Configurations: An Automated Design
Space Exploration.” Reconfigurable Architectures Workshop (RAW), 2014,
doi:10.1109/IPDPSW.2014.37.'
short: 'J. Anwer, M. Platzner, S. Meisner, in: Reconfigurable Architectures Workshop
(RAW), 2014.'
date_created: 2019-07-10T09:32:58Z
date_updated: 2022-01-06T06:50:48Z
department:
- _id: '78'
doi: 10.1109/IPDPSW.2014.37
language:
- iso: eng
publication: Reconfigurable Architectures Workshop (RAW)
series_title: RAW
status: public
title: 'FPGA Redundancy Configurations: An Automated Design Space Exploration'
type: conference
user_id: '3118'
year: '2014'
...
---
_id: '10632'
author:
- first_name: Alexander
full_name: Boschmann, Alexander
last_name: Boschmann
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Boschmann A, Platzner M. A computer vision-based approach to high density
EMG pattern recognition using structural similarity. In: Proc. MyoElectric
Controls Symposium (MEC). ; 2014.'
apa: Boschmann, A., & Platzner, M. (2014). A computer vision-based approach
to high density EMG pattern recognition using structural similarity. In Proc.
MyoElectric Controls Symposium (MEC).
bibtex: '@inproceedings{Boschmann_Platzner_2014, title={A computer vision-based
approach to high density EMG pattern recognition using structural similarity},
booktitle={Proc. MyoElectric Controls Symposium (MEC)}, author={Boschmann, Alexander
and Platzner, Marco}, year={2014} }'
chicago: Boschmann, Alexander, and Marco Platzner. “A Computer Vision-Based Approach
to High Density EMG Pattern Recognition Using Structural Similarity.” In Proc.
MyoElectric Controls Symposium (MEC), 2014.
ieee: A. Boschmann and M. Platzner, “A computer vision-based approach to high density
EMG pattern recognition using structural similarity,” in Proc. MyoElectric
Controls Symposium (MEC), 2014.
mla: Boschmann, Alexander, and Marco Platzner. “A Computer Vision-Based Approach
to High Density EMG Pattern Recognition Using Structural Similarity.” Proc.
MyoElectric Controls Symposium (MEC), 2014.
short: 'A. Boschmann, M. Platzner, in: Proc. MyoElectric Controls Symposium (MEC),
2014.'
date_created: 2019-07-10T11:02:58Z
date_updated: 2022-01-06T06:50:49Z
department:
- _id: '78'
language:
- iso: eng
publication: Proc. MyoElectric Controls Symposium (MEC)
status: public
title: A computer vision-based approach to high density EMG pattern recognition using
structural similarity
type: conference
user_id: '3118'
year: '2014'
...
---
_id: '10633'
author:
- first_name: Alexander
full_name: Boschmann, Alexander
last_name: Boschmann
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Boschmann A, Platzner M. Towards robust HD EMG pattern recognition: Reducing
electrode displacement effect using structural similarity. In: Proc. IEEE Int.
Conf. Eng. Med. Biolog. (EMBC). ; 2014.'
apa: 'Boschmann, A., & Platzner, M. (2014). Towards robust HD EMG pattern recognition:
Reducing electrode displacement effect using structural similarity. In Proc.
IEEE Int. Conf. Eng. Med. Biolog. (EMBC).'
bibtex: '@inproceedings{Boschmann_Platzner_2014, title={Towards robust HD EMG pattern
recognition: Reducing electrode displacement effect using structural similarity},
booktitle={Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC)}, author={Boschmann,
Alexander and Platzner, Marco}, year={2014} }'
chicago: 'Boschmann, Alexander, and Marco Platzner. “Towards Robust HD EMG Pattern
Recognition: Reducing Electrode Displacement Effect Using Structural Similarity.”
In Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2014.'
ieee: 'A. Boschmann and M. Platzner, “Towards robust HD EMG pattern recognition:
Reducing electrode displacement effect using structural similarity,” in Proc.
IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2014.'
mla: 'Boschmann, Alexander, and Marco Platzner. “Towards Robust HD EMG Pattern Recognition:
Reducing Electrode Displacement Effect Using Structural Similarity.” Proc.
IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2014.'
short: 'A. Boschmann, M. Platzner, in: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC),
2014.'
date_created: 2019-07-10T11:02:59Z
date_updated: 2022-01-06T06:50:49Z
department:
- _id: '78'
language:
- iso: eng
publication: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC)
status: public
title: 'Towards robust HD EMG pattern recognition: Reducing electrode displacement
effect using structural similarity'
type: conference
user_id: '3118'
year: '2014'
...
---
_id: '10674'
author:
- first_name: Nam
full_name: Ho, Nam
last_name: Ho
- first_name: Paul
full_name: Kaufmann, Paul
last_name: Kaufmann
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Ho N, Kaufmann P, Platzner M. A hardware/software infrastructure for performance
monitoring on LEON3 multicore platforms. In: 24th Intl. Conf. on Field Programmable
Logic and Applications (FPL). ; 2014:1-4. doi:10.1109/FPL.2014.6927437'
apa: Ho, N., Kaufmann, P., & Platzner, M. (2014). A hardware/software infrastructure
for performance monitoring on LEON3 multicore platforms. In 24th Intl. Conf.
on Field Programmable Logic and Applications (FPL) (pp. 1–4). https://doi.org/10.1109/FPL.2014.6927437
bibtex: '@inproceedings{Ho_Kaufmann_Platzner_2014, title={A hardware/software infrastructure
for performance monitoring on LEON3 multicore platforms}, DOI={10.1109/FPL.2014.6927437},
booktitle={24th Intl. Conf. on Field Programmable Logic and Applications (FPL)},
author={Ho, Nam and Kaufmann, Paul and Platzner, Marco}, year={2014}, pages={1–4}
}'
chicago: Ho, Nam, Paul Kaufmann, and Marco Platzner. “A Hardware/Software Infrastructure
for Performance Monitoring on LEON3 Multicore Platforms.” In 24th Intl. Conf.
on Field Programmable Logic and Applications (FPL), 1–4, 2014. https://doi.org/10.1109/FPL.2014.6927437.
ieee: N. Ho, P. Kaufmann, and M. Platzner, “A hardware/software infrastructure for
performance monitoring on LEON3 multicore platforms,” in 24th Intl. Conf. on
Field Programmable Logic and Applications (FPL), 2014, pp. 1–4.
mla: Ho, Nam, et al. “A Hardware/Software Infrastructure for Performance Monitoring
on LEON3 Multicore Platforms.” 24th Intl. Conf. on Field Programmable Logic
and Applications (FPL), 2014, pp. 1–4, doi:10.1109/FPL.2014.6927437.
short: 'N. Ho, P. Kaufmann, M. Platzner, in: 24th Intl. Conf. on Field Programmable
Logic and Applications (FPL), 2014, pp. 1–4.'
date_created: 2019-07-10T11:18:01Z
date_updated: 2022-01-06T06:50:49Z
department:
- _id: '78'
doi: 10.1109/FPL.2014.6927437
keyword:
- Linux
- hardware-software codesign
- multiprocessing systems
- parallel processing
- LEON3 multicore platform
- Linux kernel
- PMU
- hardware counters
- hardware-software infrastructure
- high performance embedded computing
- perf_event
- performance monitoring unit
- Computer architecture
- Hardware
- Monitoring
- Phasor measurement units
- Radiation detectors
- Registers
- Software
language:
- iso: eng
page: 1-4
project:
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: 24th Intl. Conf. on Field Programmable Logic and Applications (FPL)
status: public
title: A hardware/software infrastructure for performance monitoring on LEON3 multicore
platforms
type: conference
user_id: '3118'
year: '2014'
...
---
_id: '10677'
author:
- first_name: Nam
full_name: Ho, Nam
last_name: Ho
- first_name: Paul
full_name: Kaufmann, Paul
last_name: Kaufmann
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Ho N, Kaufmann P, Platzner M. Towards self-adaptive caches: A run-time reconfigurable
multi-core infrastructure. In: 2014 {IEEE} Intl. Conf. on Evolvable Systems
(ICES). ; 2014:31-37. doi:10.1109/ICES.2014.7008719'
apa: 'Ho, N., Kaufmann, P., & Platzner, M. (2014). Towards self-adaptive caches:
A run-time reconfigurable multi-core infrastructure. In 2014 {IEEE} Intl. Conf.
on Evolvable Systems (ICES) (pp. 31–37). https://doi.org/10.1109/ICES.2014.7008719'
bibtex: '@inproceedings{Ho_Kaufmann_Platzner_2014, title={Towards self-adaptive
caches: A run-time reconfigurable multi-core infrastructure}, DOI={10.1109/ICES.2014.7008719},
booktitle={2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES)}, author={Ho, Nam
and Kaufmann, Paul and Platzner, Marco}, year={2014}, pages={31–37} }'
chicago: 'Ho, Nam, Paul Kaufmann, and Marco Platzner. “Towards Self-Adaptive Caches:
A Run-Time Reconfigurable Multi-Core Infrastructure.” In 2014 {IEEE} Intl.
Conf. on Evolvable Systems (ICES), 31–37, 2014. https://doi.org/10.1109/ICES.2014.7008719.'
ieee: 'N. Ho, P. Kaufmann, and M. Platzner, “Towards self-adaptive caches: A run-time
reconfigurable multi-core infrastructure,” in 2014 {IEEE} Intl. Conf. on Evolvable
Systems (ICES), 2014, pp. 31–37.'
mla: 'Ho, Nam, et al. “Towards Self-Adaptive Caches: A Run-Time Reconfigurable Multi-Core
Infrastructure.” 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES), 2014,
pp. 31–37, doi:10.1109/ICES.2014.7008719.'
short: 'N. Ho, P. Kaufmann, M. Platzner, in: 2014 {IEEE} Intl. Conf. on Evolvable
Systems (ICES), 2014, pp. 31–37.'
date_created: 2019-07-10T11:23:00Z
date_updated: 2022-01-06T06:50:49Z
department:
- _id: '78'
doi: 10.1109/ICES.2014.7008719
keyword:
- Linux
- cache storage
- embedded systems
- granular computing
- multiprocessing systems
- reconfigurable architectures
- Leon3 SPARe processor
- custom logic events
- evolvable-self-adaptable processor cache
- fine granular profiling
- integer unit events
- measurement infrastructure
- microarchitectural events
- multicore embedded system
- perf_event standard Linux performance measurement interface
- processor properties
- run-time reconfigurable memory-to-cache address mapping engine
- run-time reconfigurable multicore infrastructure
- split-level caching
- Field programmable gate arrays
- Frequency locked loops
- Irrigation
- Phasor measurement units
- Registers
- Weaving
language:
- iso: eng
page: 31-37
publication: 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES)
status: public
title: 'Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure'
type: conference
user_id: '3118'
year: '2014'
...
---
_id: '10764'
author:
- first_name: Jahanzeb
full_name: Anwer, Jahanzeb
last_name: Anwer
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Anwer J, Platzner M. Analytic reliability evaluation for fault-tolerant circuit
structures on FPGAs. In: IEEE International Symposium on Defect and Fault Tolerance
in VLSI and Nanotechnology Systems (DFT). IEEE; 2014:177-184. doi:10.1109/DFT.2014.6962108'
apa: Anwer, J., & Platzner, M. (2014). Analytic reliability evaluation for fault-tolerant
circuit structures on FPGAs. In IEEE International Symposium on Defect and
Fault Tolerance in VLSI and Nanotechnology Systems (DFT) (pp. 177–184). IEEE.
https://doi.org/10.1109/DFT.2014.6962108
bibtex: '@inproceedings{Anwer_Platzner_2014, title={Analytic reliability evaluation
for fault-tolerant circuit structures on FPGAs}, DOI={10.1109/DFT.2014.6962108},
booktitle={IEEE International Symposium on Defect and Fault Tolerance in VLSI
and Nanotechnology Systems (DFT)}, publisher={IEEE}, author={Anwer, Jahanzeb and
Platzner, Marco}, year={2014}, pages={177–184} }'
chicago: Anwer, Jahanzeb, and Marco Platzner. “Analytic Reliability Evaluation for
Fault-Tolerant Circuit Structures on FPGAs.” In IEEE International Symposium
on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 177–84.
IEEE, 2014. https://doi.org/10.1109/DFT.2014.6962108.
ieee: J. Anwer and M. Platzner, “Analytic reliability evaluation for fault-tolerant
circuit structures on FPGAs,” in IEEE International Symposium on Defect and
Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2014, pp. 177–184.
mla: Anwer, Jahanzeb, and Marco Platzner. “Analytic Reliability Evaluation for Fault-Tolerant
Circuit Structures on FPGAs.” IEEE International Symposium on Defect and Fault
Tolerance in VLSI and Nanotechnology Systems (DFT), IEEE, 2014, pp. 177–84,
doi:10.1109/DFT.2014.6962108.
short: 'J. Anwer, M. Platzner, in: IEEE International Symposium on Defect and Fault
Tolerance in VLSI and Nanotechnology Systems (DFT), IEEE, 2014, pp. 177–184.'
date_created: 2019-07-10T12:07:05Z
date_updated: 2022-01-06T06:50:50Z
department:
- _id: '78'
doi: 10.1109/DFT.2014.6962108
language:
- iso: eng
page: 177-184
publication: IEEE International Symposium on Defect and Fault Tolerance in VLSI and
Nanotechnology Systems (DFT)
publisher: IEEE
status: public
title: Analytic reliability evaluation for fault-tolerant circuit structures on FPGAs
type: conference
user_id: '398'
year: '2014'
...
---
_id: '13154'
author:
- first_name: Tobias
full_name: Graf, Tobias
last_name: Graf
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Graf T, Platzner M. Common Fate Graph Patterns in Monte Carlo Tree Search
for Computer Go. In: 2014 IEEE Conference on Computational Intelligence and
Games. ; 2014:1-8. doi:10.1109/CIG.2014.6932863'
apa: Graf, T., & Platzner, M. (2014). Common Fate Graph Patterns in Monte Carlo
Tree Search for Computer Go. In 2014 IEEE Conference on Computational Intelligence
and Games (pp. 1–8). https://doi.org/10.1109/CIG.2014.6932863
bibtex: '@inproceedings{Graf_Platzner_2014, title={Common Fate Graph Patterns in
Monte Carlo Tree Search for Computer Go}, DOI={10.1109/CIG.2014.6932863},
booktitle={2014 IEEE Conference on Computational Intelligence and Games}, author={Graf,
Tobias and Platzner, Marco}, year={2014}, pages={1–8} }'
chicago: Graf, Tobias, and Marco Platzner. “Common Fate Graph Patterns in Monte
Carlo Tree Search for Computer Go.” In 2014 IEEE Conference on Computational
Intelligence and Games, 1–8, 2014. https://doi.org/10.1109/CIG.2014.6932863.
ieee: T. Graf and M. Platzner, “Common Fate Graph Patterns in Monte Carlo Tree Search
for Computer Go,” in 2014 IEEE Conference on Computational Intelligence and
Games, 2014, pp. 1–8.
mla: Graf, Tobias, and Marco Platzner. “Common Fate Graph Patterns in Monte Carlo
Tree Search for Computer Go.” 2014 IEEE Conference on Computational Intelligence
and Games, 2014, pp. 1–8, doi:10.1109/CIG.2014.6932863.
short: 'T. Graf, M. Platzner, in: 2014 IEEE Conference on Computational Intelligence
and Games, 2014, pp. 1–8.'
date_created: 2019-09-09T09:09:31Z
date_updated: 2022-01-06T06:51:29Z
department:
- _id: '78'
doi: 10.1109/CIG.2014.6932863
language:
- iso: eng
page: 1-8
project:
- _id: '52'
name: Computing Resources Provided by the Paderborn Center for Parallel Computing
publication: 2014 IEEE Conference on Computational Intelligence and Games
status: public
title: Common Fate Graph Patterns in Monte Carlo Tree Search for Computer Go
type: conference
user_id: '40778'
year: '2014'
...
---
_id: '335'
abstract:
- lang: eng
text: Im Bereich der Computersysteme ist die Festlegung der Grenze zwischen Hardware
und Software eine zentrale Problemstellung. Diese Grenze hat in den letzten Jahrzehnten
nicht nur die Entwicklung von Computersystemen bestimmt, sondern auch die Strukturierung
der Ausbildung in den Computerwissenschaften beeinflusst und sogar zur Entstehung
von neuen Forschungsrichtungen gef{\"u}hrt. In diesem Beitrag besch{\"a}ftigen
wir uns mit Verschiebungen an der Grenze zwischen Hardware und Software und diskutieren
insgesamt drei qualitativ unterschiedliche Formen solcher Verschiebungen. Wir
beginnen mit der Entwicklung von Computersystemen im letzten Jahrhundert und der
Entstehung dieser Grenze, die Hardware und Software erst als eigenst{\"a}ndige
Produkte differenziert. Dann widmen wir uns der Frage, welche Funktionen in einem
Computersystem besser in Hardware und welche besser in Software realisiert werden
sollten, eine Fragestellung die zu Beginn der 90er-Jahre zur Bildung einer eigenen
Forschungsrichtung, dem sogenannten Hardware/Software Co-design, gef{\"u}hrt hat.
Im Hardware/Software Co-design findet eine Verschiebung von Funktionen an der Grenze
zwischen Hardware und Software w{\"a}hrend der Entwicklung eines Produktes statt,
um Produkteigenschaften zu optimieren. Im fertig entwickelten und eingesetzten
Produkt hingegen k{\"o}nnen wir dann eine feste Grenze zwischen Hardware und Software
beobachten. Im dritten Teil dieses Beitrags stellen wir mit selbst-adaptiven Systemen
eine hochaktuelle Forschungsrichtung vor. In unserem Kontext bedeutet Selbstadaption,
dass ein System Verschiebungen von Funktionen an der Grenze zwischen Hardware
und Software autonom w{\"a}hrend der Betriebszeit vornimmt. Solche Systeme beruhen
auf rekonfigurierbarer Hardware, einer relativ neuen Technologie mit der die Hardware
eines Computers w{\"a}hrend der Laufzeit ver{\"a}ndert werden kann. Diese Technologie
f{\"u}hrt zu einer durchl{\"a}ssigen Grenze zwischen Hardware und Software bzw.
l{\"o}st sie die herk{\"o}mmliche Vorstellung einer festen Hardware und einer
flexiblen Software damit auf.
author:
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Platzner M, Plessl C. Verschiebungen an der Grenze zwischen Hardware und Software.
In: Künsemöller J, Eke NO, Foit L, Kaerlein T, eds. Logiken strukturbildender
Prozesse: Automatismen. Schriftenreihe des Graduiertenkollegs “Automatismen.”
Wilhelm Fink; 2014:123-144.'
apa: 'Platzner, M., & Plessl, C. (2014). Verschiebungen an der Grenze zwischen
Hardware und Software. In J. Künsemöller, N. O. Eke, L. Foit, & T. Kaerlein
(Eds.), Logiken strukturbildender Prozesse: Automatismen (pp. 123–144).
Wilhelm Fink.'
bibtex: '@inbook{Platzner_Plessl_2014, place={Paderborn}, series={Schriftenreihe
des Graduiertenkollegs “Automatismen”}, title={Verschiebungen an der Grenze zwischen
Hardware und Software}, booktitle={Logiken strukturbildender Prozesse: Automatismen},
publisher={Wilhelm Fink}, author={Platzner, Marco and Plessl, Christian}, editor={Künsemöller,
Jörn and Eke, Norber Otto and Foit, Lioba and Kaerlein, Timo}, year={2014}, pages={123–144},
collection={Schriftenreihe des Graduiertenkollegs “Automatismen”} }'
chicago: 'Platzner, Marco, and Christian Plessl. “Verschiebungen an der Grenze zwischen
Hardware und Software.” In Logiken strukturbildender Prozesse: Automatismen,
edited by Jörn Künsemöller, Norber Otto Eke, Lioba Foit, and Timo Kaerlein, 123–44.
Schriftenreihe des Graduiertenkollegs “Automatismen.” Paderborn: Wilhelm Fink,
2014.'
ieee: 'M. Platzner and C. Plessl, “Verschiebungen an der Grenze zwischen Hardware
und Software,” in Logiken strukturbildender Prozesse: Automatismen, J.
Künsemöller, N. O. Eke, L. Foit, and T. Kaerlein, Eds. Paderborn: Wilhelm Fink,
2014, pp. 123–144.'
mla: 'Platzner, Marco, and Christian Plessl. “Verschiebungen an der Grenze zwischen
Hardware und Software.” Logiken strukturbildender Prozesse: Automatismen,
edited by Jörn Künsemöller et al., Wilhelm Fink, 2014, pp. 123–44.'
short: 'M. Platzner, C. Plessl, in: J. Künsemöller, N.O. Eke, L. Foit, T. Kaerlein
(Eds.), Logiken strukturbildender Prozesse: Automatismen, Wilhelm Fink, Paderborn,
2014, pp. 123–144.'
date_created: 2017-10-17T12:41:57Z
date_updated: 2023-09-26T13:32:49Z
ddc:
- '040'
department:
- _id: '518'
- _id: '27'
- _id: '78'
editor:
- first_name: Jörn
full_name: Künsemöller, Jörn
last_name: Künsemöller
- first_name: Norber Otto
full_name: Eke, Norber Otto
last_name: Eke
- first_name: Lioba
full_name: Foit, Lioba
last_name: Foit
- first_name: Timo
full_name: Kaerlein, Timo
last_name: Kaerlein
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-20T07:29:58Z
date_updated: 2018-03-20T07:29:58Z
file_id: '1424'
file_name: 335-2014_plessl_automatismen.pdf
file_size: 2848154
relation: main_file
success: 1
file_date_updated: 2018-03-20T07:29:58Z
has_accepted_license: '1'
language:
- iso: ger
page: 123-144
place: Paderborn
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
publication: 'Logiken strukturbildender Prozesse: Automatismen'
publication_identifier:
isbn:
- 978-3-7705-5730-1
publication_status: published
publisher: Wilhelm Fink
quality_controlled: '1'
series_title: Schriftenreihe des Graduiertenkollegs "Automatismen"
status: public
title: Verschiebungen an der Grenze zwischen Hardware und Software
type: book_chapter
user_id: '15278'
year: '2014'
...
---
_id: '363'
abstract:
- lang: eng
text: Due to the continuously shrinking device structures and increasing densities
of FPGAs, thermal aspects have become the new focus for many research projects
over the last years. Most researchers rely on temperature simulations to evaluate
their novel thermal management techniques. However, these temperature simulations
require a high computational effort if a detailed thermal model is used and their
accuracies are often unclear. In contrast to simulations, the use of synthetic
heat sources allows for experimental evaluation of temperature management methods.
In this paper we investigate the creation of significant rises in temperature
on modern FPGAs to enable future evaluation of thermal management techniques based
on experiments. To that end, we have developed seven different heat-generating
cores that use different subsets of FPGA resources. Our experimental results show
that, according to external temperature probes connected to the FPGA’s heat sink,
we can increase the temperature by an average of 81 !C. This corresponds to an
average increase of 156.3 !C as measured by the built-in thermal diodes of our
Virtex-5 FPGAs in less than 30 min by only utilizing about 21 percent of the slices.
author:
- first_name: Andreas
full_name: Agne, Andreas
last_name: Agne
- first_name: Hendrik
full_name: Hangmann, Hendrik
last_name: Hangmann
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: Agne A, Hangmann H, Happe M, Platzner M, Plessl C. Seven Recipes for Setting
Your FPGA on Fire – A Cookbook on Heat Generators. Microprocessors and Microsystems.
2014;38(8, Part B):911-919. doi:10.1016/j.micpro.2013.12.001
apa: Agne, A., Hangmann, H., Happe, M., Platzner, M., & Plessl, C. (2014). Seven
Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators. Microprocessors
and Microsystems, 38(8, Part B), 911–919. https://doi.org/10.1016/j.micpro.2013.12.001
bibtex: '@article{Agne_Hangmann_Happe_Platzner_Plessl_2014, title={Seven Recipes
for Setting Your FPGA on Fire – A Cookbook on Heat Generators}, volume={38}, DOI={10.1016/j.micpro.2013.12.001},
number={8, Part B}, journal={Microprocessors and Microsystems}, publisher={Elsevier},
author={Agne, Andreas and Hangmann, Hendrik and Happe, Markus and Platzner, Marco
and Plessl, Christian}, year={2014}, pages={911–919} }'
chicago: 'Agne, Andreas, Hendrik Hangmann, Markus Happe, Marco Platzner, and Christian
Plessl. “Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators.”
Microprocessors and Microsystems 38, no. 8, Part B (2014): 911–19. https://doi.org/10.1016/j.micpro.2013.12.001.'
ieee: 'A. Agne, H. Hangmann, M. Happe, M. Platzner, and C. Plessl, “Seven Recipes
for Setting Your FPGA on Fire – A Cookbook on Heat Generators,” Microprocessors
and Microsystems, vol. 38, no. 8, Part B, pp. 911–919, 2014, doi: 10.1016/j.micpro.2013.12.001.'
mla: Agne, Andreas, et al. “Seven Recipes for Setting Your FPGA on Fire – A Cookbook
on Heat Generators.” Microprocessors and Microsystems, vol. 38, no. 8,
Part B, Elsevier, 2014, pp. 911–19, doi:10.1016/j.micpro.2013.12.001.
short: A. Agne, H. Hangmann, M. Happe, M. Platzner, C. Plessl, Microprocessors and
Microsystems 38 (2014) 911–919.
date_created: 2017-10-17T12:42:02Z
date_updated: 2023-09-26T13:33:06Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1016/j.micpro.2013.12.001
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-20T07:20:31Z
date_updated: 2018-03-20T07:20:31Z
file_id: '1408'
file_name: 363-plessl13_micpro.pdf
file_size: 1499996
relation: main_file
success: 1
file_date_updated: 2018-03-20T07:20:31Z
has_accepted_license: '1'
intvolume: ' 38'
issue: 8, Part B
language:
- iso: eng
page: 911-919
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: Microprocessors and Microsystems
publisher: Elsevier
quality_controlled: '1'
status: public
title: Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators
type: journal_article
user_id: '15278'
volume: 38
year: '2014'
...
---
_id: '365'
abstract:
- lang: eng
text: Self-aware computing is a paradigm for structuring and simplifying the design
and operation of computing systems that face unprecedented levels of system dynamics
and thus require novel forms of adaptivity. The generality of the paradigm makes
it applicable to many types of computing systems and, previously, researchers
started to introduce concepts of self-awareness to multicore architectures. In
our work we build on a recent reference architectural framework as a model for
self-aware computing and instantiate it for an FPGA-based heterogeneous multicore
running the ReconOS reconfigurable architecture and operating system. After presenting
the model for self-aware computing and ReconOS, we demonstrate with a case study
how a multicore application built on the principle of self-awareness, autonomously
adapts to changes in the workload and system state. Our work shows that the reference
architectural framework as a model for self-aware computing can be practically
applied and allows us to structure and simplify the design process, which is essential
for designing complex future computing systems.
article_number: '13'
author:
- first_name: Andreas
full_name: Agne, Andreas
last_name: Agne
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Achim
full_name: Lösch, Achim
id: '43646'
last_name: Lösch
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: Agne A, Happe M, Lösch A, Plessl C, Platzner M. Self-awareness as a Model for
Designing and Operating Heterogeneous Multicores. ACM Transactions on Reconfigurable
Technology and Systems (TRETS). 2014;7(2). doi:10.1145/2617596
apa: Agne, A., Happe, M., Lösch, A., Plessl, C., & Platzner, M. (2014). Self-awareness
as a Model for Designing and Operating Heterogeneous Multicores. ACM Transactions
on Reconfigurable Technology and Systems (TRETS), 7(2), Article 13.
https://doi.org/10.1145/2617596
bibtex: '@article{Agne_Happe_Lösch_Plessl_Platzner_2014, title={Self-awareness as
a Model for Designing and Operating Heterogeneous Multicores}, volume={7}, DOI={10.1145/2617596}, number={213}, journal={ACM
Transactions on Reconfigurable Technology and Systems (TRETS)}, publisher={ACM},
author={Agne, Andreas and Happe, Markus and Lösch, Achim and Plessl, Christian
and Platzner, Marco}, year={2014} }'
chicago: Agne, Andreas, Markus Happe, Achim Lösch, Christian Plessl, and Marco Platzner.
“Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores.”
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7, no.
2 (2014). https://doi.org/10.1145/2617596.
ieee: 'A. Agne, M. Happe, A. Lösch, C. Plessl, and M. Platzner, “Self-awareness
as a Model for Designing and Operating Heterogeneous Multicores,” ACM Transactions
on Reconfigurable Technology and Systems (TRETS), vol. 7, no. 2, Art. no.
13, 2014, doi: 10.1145/2617596.'
mla: Agne, Andreas, et al. “Self-Awareness as a Model for Designing and Operating
Heterogeneous Multicores.” ACM Transactions on Reconfigurable Technology and
Systems (TRETS), vol. 7, no. 2, 13, ACM, 2014, doi:10.1145/2617596.
short: A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, ACM Transactions on
Reconfigurable Technology and Systems (TRETS) 7 (2014).
date_created: 2017-10-17T12:42:03Z
date_updated: 2023-09-26T13:33:31Z
ddc:
- '040'
department:
- _id: '27'
- _id: '78'
- _id: '518'
doi: 10.1145/2617596
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-20T07:19:19Z
date_updated: 2018-03-20T07:19:19Z
file_id: '1406'
file_name: 365-plessl14_trets_01.pdf
file_size: 916052
relation: main_file
success: 1
file_date_updated: 2018-03-20T07:19:19Z
has_accepted_license: '1'
intvolume: ' 7'
issue: '2'
language:
- iso: eng
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: ACM Transactions on Reconfigurable Technology and Systems (TRETS)
publisher: ACM
quality_controlled: '1'
status: public
title: Self-awareness as a Model for Designing and Operating Heterogeneous Multicores
type: journal_article
user_id: '15278'
volume: 7
year: '2014'
...
---
_id: '328'
abstract:
- lang: eng
text: The ReconOS operating system for reconfigurable computing offers a unified
multi-threaded programming model and operating system services for threads executing
in software and threads mapped to reconfigurable hardware. The operating system
interface allows hardware threads to interact with software threads using well-known
mechanisms such as semaphores, mutexes, condition variables, and message queues.
By semantically integrating hardware accelerators into a standard operating system
environment, ReconOS allows for rapid design space exploration, supports a structured
application development process and improves the portability of applications
author:
- first_name: Andreas
full_name: Agne, Andreas
last_name: Agne
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Ariane
full_name: Keller, Ariane
last_name: Keller
- first_name: Enno
full_name: Lübbers, Enno
last_name: Lübbers
- first_name: Bernhard
full_name: Plattner, Bernhard
last_name: Plattner
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: Agne A, Happe M, Keller A, et al. ReconOS - An Operating System Approach for
Reconfigurable Computing. IEEE Micro. 2014;34(1):60-71. doi:10.1109/MM.2013.110
apa: Agne, A., Happe, M., Keller, A., Lübbers, E., Plattner, B., Platzner, M., &
Plessl, C. (2014). ReconOS - An Operating System Approach for Reconfigurable Computing.
IEEE Micro, 34(1), 60–71. https://doi.org/10.1109/MM.2013.110
bibtex: '@article{Agne_Happe_Keller_Lübbers_Plattner_Platzner_Plessl_2014, title={ReconOS
- An Operating System Approach for Reconfigurable Computing}, volume={34}, DOI={10.1109/MM.2013.110}, number={1},
journal={IEEE Micro}, publisher={IEEE}, author={Agne, Andreas and Happe, Markus
and Keller, Ariane and Lübbers, Enno and Plattner, Bernhard and Platzner, Marco
and Plessl, Christian}, year={2014}, pages={60–71} }'
chicago: 'Agne, Andreas, Markus Happe, Ariane Keller, Enno Lübbers, Bernhard Plattner,
Marco Platzner, and Christian Plessl. “ReconOS - An Operating System Approach
for Reconfigurable Computing.” IEEE Micro 34, no. 1 (2014): 60–71. https://doi.org/10.1109/MM.2013.110.'
ieee: 'A. Agne et al., “ReconOS - An Operating System Approach for Reconfigurable
Computing,” IEEE Micro, vol. 34, no. 1, pp. 60–71, 2014, doi: 10.1109/MM.2013.110.'
mla: Agne, Andreas, et al. “ReconOS - An Operating System Approach for Reconfigurable
Computing.” IEEE Micro, vol. 34, no. 1, IEEE, 2014, pp. 60–71, doi:10.1109/MM.2013.110.
short: A. Agne, M. Happe, A. Keller, E. Lübbers, B. Plattner, M. Platzner, C. Plessl,
IEEE Micro 34 (2014) 60–71.
date_created: 2017-10-17T12:41:55Z
date_updated: 2023-09-26T13:32:31Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/MM.2013.110
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-20T07:31:40Z
date_updated: 2018-03-20T07:31:40Z
file_id: '1426'
file_name: 328-plessl14_micro_01.pdf
file_size: 1877185
relation: main_file
success: 1
file_date_updated: 2018-03-20T07:31:40Z
has_accepted_license: '1'
intvolume: ' 34'
issue: '1'
language:
- iso: eng
page: 60-71
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: IEEE Micro
publisher: IEEE
quality_controlled: '1'
status: public
title: ReconOS - An Operating System Approach for Reconfigurable Computing
type: journal_article
user_id: '15278'
volume: 34
year: '2014'
...
---
_id: '10604'
author:
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Enno
full_name: Lübbers, Enno
last_name: Lübbers
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: Happe M, Lübbers E, Platzner M. A Self-adaptive Heterogeneous Multi-core Architecture
for Embedded Real-time Video Object Tracking. International Journal of Real-time
Image Processing. 2013;8(1):95-110. doi:doi:10.1007/s11554-011-0212-y
apa: Happe, M., Lübbers, E., & Platzner, M. (2013). A Self-adaptive Heterogeneous
Multi-core Architecture for Embedded Real-time Video Object Tracking. International
Journal of Real-Time Image Processing, 8(1), 95–110. https://doi.org/doi:10.1007/s11554-011-0212-y
bibtex: '@article{Happe_Lübbers_Platzner_2013, title={A Self-adaptive Heterogeneous
Multi-core Architecture for Embedded Real-time Video Object Tracking}, volume={8},
DOI={doi:10.1007/s11554-011-0212-y},
number={1}, journal={International Journal of Real-time Image Processing}, publisher={Springer},
author={Happe, Markus and Lübbers, Enno and Platzner, Marco}, year={2013}, pages={95–110}
}'
chicago: 'Happe, Markus, Enno Lübbers, and Marco Platzner. “A Self-Adaptive Heterogeneous
Multi-Core Architecture for Embedded Real-Time Video Object Tracking.” International
Journal of Real-Time Image Processing 8, no. 1 (2013): 95–110. https://doi.org/doi:10.1007/s11554-011-0212-y.'
ieee: M. Happe, E. Lübbers, and M. Platzner, “A Self-adaptive Heterogeneous Multi-core
Architecture for Embedded Real-time Video Object Tracking,” International Journal
of Real-time Image Processing, vol. 8, no. 1, pp. 95–110, 2013.
mla: Happe, Markus, et al. “A Self-Adaptive Heterogeneous Multi-Core Architecture
for Embedded Real-Time Video Object Tracking.” International Journal of Real-Time
Image Processing, vol. 8, no. 1, Springer, 2013, pp. 95–110, doi:doi:10.1007/s11554-011-0212-y.
short: M. Happe, E. Lübbers, M. Platzner, International Journal of Real-Time Image
Processing 8 (2013) 95–110.
date_created: 2019-07-10T09:22:45Z
date_updated: 2022-01-06T06:50:47Z
department:
- _id: '78'
doi: doi:10.1007/s11554-011-0212-y
intvolume: ' 8'
issue: '1'
language:
- iso: eng
page: 95 - 110
publication: International Journal of Real-time Image Processing
publisher: Springer
status: public
title: A Self-adaptive Heterogeneous Multi-core Architecture for Embedded Real-time
Video Object Tracking
type: journal_article
user_id: '398'
volume: 8
year: '2013'
...
---
_id: '10620'
author:
- first_name: Jahanzeb
full_name: Anwer, Jahanzeb
last_name: Anwer
- first_name: Sebastian
full_name: Meisner, Sebastian
last_name: Meisner
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Anwer J, Meisner S, Platzner M. Dynamic reliability management: Reconfiguring
reliability-levels of hardware designs at runtime. In: Reconfigurable Computing
and FPGAs (ReConFig), 2013 International Conference On. ; 2013:1-6. doi:10.1109/ReConFig.2013.6732280'
apa: 'Anwer, J., Meisner, S., & Platzner, M. (2013). Dynamic reliability management:
Reconfiguring reliability-levels of hardware designs at runtime. In Reconfigurable
Computing and FPGAs (ReConFig), 2013 International Conference on (pp. 1–6).
https://doi.org/10.1109/ReConFig.2013.6732280'
bibtex: '@inproceedings{Anwer_Meisner_Platzner_2013, title={Dynamic reliability
management: Reconfiguring reliability-levels of hardware designs at runtime},
DOI={10.1109/ReConFig.2013.6732280},
booktitle={Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference
on}, author={Anwer, Jahanzeb and Meisner, Sebastian and Platzner, Marco}, year={2013},
pages={1–6} }'
chicago: 'Anwer, Jahanzeb, Sebastian Meisner, and Marco Platzner. “Dynamic Reliability
Management: Reconfiguring Reliability-Levels of Hardware Designs at Runtime.”
In Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference
On, 1–6, 2013. https://doi.org/10.1109/ReConFig.2013.6732280.'
ieee: 'J. Anwer, S. Meisner, and M. Platzner, “Dynamic reliability management: Reconfiguring
reliability-levels of hardware designs at runtime,” in Reconfigurable Computing
and FPGAs (ReConFig), 2013 International Conference on, 2013, pp. 1–6.'
mla: 'Anwer, Jahanzeb, et al. “Dynamic Reliability Management: Reconfiguring Reliability-Levels
of Hardware Designs at Runtime.” Reconfigurable Computing and FPGAs (ReConFig),
2013 International Conference On, 2013, pp. 1–6, doi:10.1109/ReConFig.2013.6732280.'
short: 'J. Anwer, S. Meisner, M. Platzner, in: Reconfigurable Computing and FPGAs
(ReConFig), 2013 International Conference On, 2013, pp. 1–6.'
date_created: 2019-07-10T09:32:57Z
date_updated: 2022-01-06T06:50:48Z
department:
- _id: '78'
doi: 10.1109/ReConFig.2013.6732280
keyword:
- fault tolerant computing
- field programmable gate arrays
- logic design
- reliability
- BYU-LANL tool
- DRM tool flow
- FPGA based hardware designs
- avionic application
- device technologies
- dynamic reliability management
- fault-tolerant operation
- hardware designs
- reconfiguring reliability levels
- space applications
- Field programmable gate arrays
- Hardware
- Redundancy
- Reliability engineering
- Runtime
- Tunneling magnetoresistance
language:
- iso: eng
page: 1-6
publication: Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference
on
status: public
title: 'Dynamic reliability management: Reconfiguring reliability-levels of hardware
designs at runtime'
type: conference
user_id: '3118'
year: '2013'
...
---
_id: '10634'
author:
- first_name: Alexander
full_name: Boschmann, Alexander
last_name: Boschmann
- first_name: Barbara
full_name: Nofen, Barbara
last_name: Nofen
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Boschmann A, Nofen B, Platzner M. Improving transient state myoelectric signal
recognition in hand movement classification using gyroscopes. In: Proc. IEEE
Int. Conf. Eng. Med. Biolog. (EMBC). ; 2013.'
apa: Boschmann, A., Nofen, B., & Platzner, M. (2013). Improving transient state
myoelectric signal recognition in hand movement classification using gyroscopes.
In Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC).
bibtex: '@inproceedings{Boschmann_Nofen_Platzner_2013, title={Improving transient
state myoelectric signal recognition in hand movement classification using gyroscopes},
booktitle={Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC)}, author={Boschmann,
Alexander and Nofen, Barbara and Platzner, Marco}, year={2013} }'
chicago: Boschmann, Alexander, Barbara Nofen, and Marco Platzner. “Improving Transient
State Myoelectric Signal Recognition in Hand Movement Classification Using Gyroscopes.”
In Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2013.
ieee: A. Boschmann, B. Nofen, and M. Platzner, “Improving transient state myoelectric
signal recognition in hand movement classification using gyroscopes,” in Proc.
IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2013.
mla: Boschmann, Alexander, et al. “Improving Transient State Myoelectric Signal
Recognition in Hand Movement Classification Using Gyroscopes.” Proc. IEEE Int.
Conf. Eng. Med. Biolog. (EMBC), 2013.
short: 'A. Boschmann, B. Nofen, M. Platzner, in: Proc. IEEE Int. Conf. Eng. Med.
Biolog. (EMBC), 2013.'
date_created: 2019-07-10T11:03:00Z
date_updated: 2022-01-06T06:50:49Z
department:
- _id: '78'
language:
- iso: eng
publication: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC)
status: public
title: Improving transient state myoelectric signal recognition in hand movement classification
using gyroscopes
type: conference
user_id: '3118'
year: '2013'
...
---
_id: '10635'
author:
- first_name: Alexander
full_name: Boschmann, Alexander
last_name: Boschmann
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Boschmann A, Platzner M. Reducing the limb position effect in pattern recognition
based myoelectric control using a high density electrode array. In: Proc. IEEE
ISSNIP Biosignals and Biorobotics Conference (BRC). ; 2013.'
apa: Boschmann, A., & Platzner, M. (2013). Reducing the limb position effect
in pattern recognition based myoelectric control using a high density electrode
array. In Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC).
bibtex: '@inproceedings{Boschmann_Platzner_2013, title={Reducing the limb position
effect in pattern recognition based myoelectric control using a high density electrode
array}, booktitle={Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC)},
author={Boschmann, Alexander and Platzner, Marco}, year={2013} }'
chicago: Boschmann, Alexander, and Marco Platzner. “Reducing the Limb Position Effect
in Pattern Recognition Based Myoelectric Control Using a High Density Electrode
Array.” In Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC),
2013.
ieee: A. Boschmann and M. Platzner, “Reducing the limb position effect in pattern
recognition based myoelectric control using a high density electrode array,” in
Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC), 2013.
mla: Boschmann, Alexander, and Marco Platzner. “Reducing the Limb Position Effect
in Pattern Recognition Based Myoelectric Control Using a High Density Electrode
Array.” Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC),
2013.
short: 'A. Boschmann, M. Platzner, in: Proc. IEEE ISSNIP Biosignals and Biorobotics
Conference (BRC), 2013.'
date_created: 2019-07-10T11:03:01Z
date_updated: 2022-01-06T06:50:49Z
department:
- _id: '78'
language:
- iso: eng
publication: Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC)
status: public
title: Reducing the limb position effect in pattern recognition based myoelectric
control using a high density electrode array
type: conference
user_id: '3118'
year: '2013'
...
---
_id: '10684'
author:
- first_name: Paul
full_name: Kaufmann, Paul
last_name: Kaufmann
- first_name: Kyrre
full_name: Glette, Kyrre
last_name: Glette
- first_name: Tiemo
full_name: Gruber, Tiemo
last_name: Gruber
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Jim
full_name: Torresen, Jim
last_name: Torresen
- first_name: Bernhard
full_name: Sick, Bernhard
last_name: Sick
citation:
ama: 'Kaufmann P, Glette K, Gruber T, Platzner M, Torresen J, Sick B. Classification
of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers.
IEEE Transactions on Evolutionary Computation. 2013;17(1):46-63. doi:10.1109/TEVC.2012.2185845'
apa: 'Kaufmann, P., Glette, K., Gruber, T., Platzner, M., Torresen, J., & Sick,
B. (2013). Classification of Electromyographic Signals: Comparing Evolvable Hardware
to Conventional Classifiers. IEEE Transactions on Evolutionary Computation,
17(1), 46–63. https://doi.org/10.1109/TEVC.2012.2185845'
bibtex: '@article{Kaufmann_Glette_Gruber_Platzner_Torresen_Sick_2013, title={Classification
of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers},
volume={17}, DOI={10.1109/TEVC.2012.2185845},
number={1}, journal={IEEE Transactions on Evolutionary Computation}, author={Kaufmann,
Paul and Glette, Kyrre and Gruber, Tiemo and Platzner, Marco and Torresen, Jim
and Sick, Bernhard}, year={2013}, pages={46–63} }'
chicago: 'Kaufmann, Paul, Kyrre Glette, Tiemo Gruber, Marco Platzner, Jim Torresen,
and Bernhard Sick. “Classification of Electromyographic Signals: Comparing Evolvable
Hardware to Conventional Classifiers.” IEEE Transactions on Evolutionary Computation
17, no. 1 (2013): 46–63. https://doi.org/10.1109/TEVC.2012.2185845.'
ieee: 'P. Kaufmann, K. Glette, T. Gruber, M. Platzner, J. Torresen, and B. Sick,
“Classification of Electromyographic Signals: Comparing Evolvable Hardware to
Conventional Classifiers,” IEEE Transactions on Evolutionary Computation,
vol. 17, no. 1, pp. 46–63, 2013.'
mla: 'Kaufmann, Paul, et al. “Classification of Electromyographic Signals: Comparing
Evolvable Hardware to Conventional Classifiers.” IEEE Transactions on Evolutionary
Computation, vol. 17, no. 1, 2013, pp. 46–63, doi:10.1109/TEVC.2012.2185845.'
short: P. Kaufmann, K. Glette, T. Gruber, M. Platzner, J. Torresen, B. Sick, IEEE
Transactions on Evolutionary Computation 17 (2013) 46–63.
date_created: 2019-07-10T11:27:28Z
date_updated: 2022-01-06T06:50:49Z
department:
- _id: '78'
doi: 10.1109/TEVC.2012.2185845
intvolume: ' 17'
issue: '1'
language:
- iso: eng
page: 46-63
publication: IEEE Transactions on Evolutionary Computation
status: public
title: 'Classification of Electromyographic Signals: Comparing Evolvable Hardware
to Conventional Classifiers'
type: journal_article
user_id: '398'
volume: 17
year: '2013'
...
---
_id: '13645'
author:
- first_name: Tobias
full_name: Graf, Tobias
last_name: Graf
- first_name: Lars
full_name: Schäfers, Lars
last_name: Schäfers
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Graf T, Schäfers L, Platzner M. On Semeai Detection in Monte-Carlo Go. In:
Proceedings of the International Conference on Computers and Games (CG).
Springer; 2013.'
apa: Graf, T., Schäfers, L., & Platzner, M. (2013). On Semeai Detection in Monte-Carlo
Go. In Proceedings of the International Conference on Computers and Games (CG).
Springer.
bibtex: '@inproceedings{Graf_Schäfers_Platzner_2013, title={On Semeai Detection
in Monte-Carlo Go.}, booktitle={Proceedings of the International Conference on
Computers and Games (CG)}, publisher={Springer}, author={Graf, Tobias and Schäfers,
Lars and Platzner, Marco}, year={2013} }'
chicago: Graf, Tobias, Lars Schäfers, and Marco Platzner. “On Semeai Detection in
Monte-Carlo Go.” In Proceedings of the International Conference on Computers
and Games (CG). Springer, 2013.
ieee: T. Graf, L. Schäfers, and M. Platzner, “On Semeai Detection in Monte-Carlo
Go.,” in Proceedings of the International Conference on Computers and Games
(CG), 2013.
mla: Graf, Tobias, et al. “On Semeai Detection in Monte-Carlo Go.” Proceedings
of the International Conference on Computers and Games (CG), Springer, 2013.
short: 'T. Graf, L. Schäfers, M. Platzner, in: Proceedings of the International
Conference on Computers and Games (CG), Springer, 2013.'
date_created: 2019-10-04T22:50:51Z
date_updated: 2022-01-06T06:51:40Z
department:
- _id: '78'
language:
- iso: eng
publication: Proceedings of the International Conference on Computers and Games (CG)
publisher: Springer
status: public
title: On Semeai Detection in Monte-Carlo Go.
type: conference
user_id: '398'
year: '2013'
...