[{"citation":{"apa":"Hadipour, A. H., Jafari, A., Awais, M., &#38; Platzner, M. (2025). A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation. <i>2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)</i>. <a href=\"https://doi.org/10.1109/ddecs63720.2025.11006769\">https://doi.org/10.1109/ddecs63720.2025.11006769</a>","ieee":"A. H. Hadipour, A. Jafari, M. Awais, and M. Platzner, “A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation,” 2025, doi: <a href=\"https://doi.org/10.1109/ddecs63720.2025.11006769\">10.1109/ddecs63720.2025.11006769</a>.","short":"A.H. Hadipour, A. Jafari, M. Awais, M. Platzner, in: 2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), IEEE, 2025.","chicago":"Hadipour, Amir Hossein, Atousa Jafari, Muhammad Awais, and Marco Platzner. “A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation.” In <i>2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)</i>. IEEE, 2025. <a href=\"https://doi.org/10.1109/ddecs63720.2025.11006769\">https://doi.org/10.1109/ddecs63720.2025.11006769</a>.","mla":"Hadipour, Amir Hossein, et al. “A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation.” <i>2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)</i>, IEEE, 2025, doi:<a href=\"https://doi.org/10.1109/ddecs63720.2025.11006769\">10.1109/ddecs63720.2025.11006769</a>.","ama":"Hadipour AH, Jafari A, Awais M, Platzner M. A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation. In: <i>2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)</i>. IEEE; 2025. doi:<a href=\"https://doi.org/10.1109/ddecs63720.2025.11006769\">10.1109/ddecs63720.2025.11006769</a>","bibtex":"@inproceedings{Hadipour_Jafari_Awais_Platzner_2025, title={A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation}, DOI={<a href=\"https://doi.org/10.1109/ddecs63720.2025.11006769\">10.1109/ddecs63720.2025.11006769</a>}, booktitle={2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)}, publisher={IEEE}, author={Hadipour, Amir Hossein and Jafari, Atousa and Awais, Muhammad and Platzner, Marco}, year={2025} }"},"publication":"2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","date_created":"2026-02-24T11:50:01Z","type":"conference","author":[{"first_name":"Amir Hossein","last_name":"Hadipour","full_name":"Hadipour, Amir Hossein","id":"110924"},{"id":"99966","full_name":"Jafari, Atousa","last_name":"Jafari","first_name":"Atousa"},{"id":"64665","full_name":"Awais, Muhammad","orcid":"https://orcid.org/0000-0003-4148-2969","last_name":"Awais","first_name":"Muhammad"},{"id":"398","full_name":"Platzner, Marco","first_name":"Marco","last_name":"Platzner"}],"title":"A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation","year":"2025","status":"public","publication_status":"published","date_updated":"2026-04-29T13:13:41Z","publisher":"IEEE","_id":"64610","language":[{"iso":"eng"}],"user_id":"110924","doi":"10.1109/ddecs63720.2025.11006769"}]