@inproceedings{639, abstract = {{Service-oriented computing (SOC) emerges as a promising trend solving many issues in distributed software development. Following the essence of SOC, service descriptions are dened by the service partners based on current standards, e.g., WSDL [15]. However, these standards are mostly structural and do not provide any behavioral description, which may lead to inaccurate service discovery results. There is a requirement for a rich service description language for service partners that encompasses the structural as well as behavioral information in the service description. Furthermore, service discovery based on an automatic matching of these comprehensive service descriptions is a complex task, which is further complicated through the heterogeneity of the service partners' domains in terms of dierent underlying ontologies. In this paper, we propose a rich service description language based on UML, which allows the specication of structural and behavioral features of a service. In addition, we also briefly discuss how some existing matching approaches can be extended to dene an automatic matching mechanism for rich service descriptions resolving the underlying heterogeneity.}}, author = {{Huma, Zille and Gerth, Christian and Engels, Gregor and Juwig, Oliver}}, booktitle = {{Proceedings of the Forum at the CAiSE'12 Conference on Advanced Information Systems Engineering}}, pages = {{90----97}}, title = {{{A UML-based Rich Service Description for Automatic Service Discovery}}}, year = {{2012}}, } @inproceedings{640, abstract = {{Small-world networks have received significant attention because of their potential as models for the interaction networks of complex systems. Specifically, neither random networks nor regular lattices seem to be an adequate framework within which to study real-world complex systems such as chemical-reaction networks, neural networks, food webs, social networks, scientific-collaboration networks, and computer networks. Small-world networks provide some desired properties like an expected polylogarithmic distance between two processes in the network, which allows routing in polylogarithmic hops by simple greedy routing, and robustness against attacks or failures. By these properties, small-world networks are possible solutions for large overlay networks comparable to structured overlay networks like CAN, Pastry, Chord, which also provide polylogarithmic routing, but due to their uniform structure, structured overlay networks are more vulnerable to attacks or failures. In this paper we bring together a randomized process converging to a small-world network and a self-stabilization process so that a small-world network is formed out of any weakly connected initial state. To the best of our knowledge this is the first distributed self-stabilization process for building a small-world network.}}, author = {{Kniesburges, Sebastian and Koutsopoulos, Andreas and Scheideler, Christian}}, booktitle = {{Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium (IPDPS)}}, pages = {{1261----1271}}, title = {{{A Self-Stabilization Process for Small-World Networks}}}, doi = {{10.1109/IPDPS.2012.115}}, year = {{2012}}, } @misc{641, author = {{Schluessler, Jonathan}}, publisher = {{Universität Paderborn}}, title = {{{A Forensic Framework for Automatic Information Retrieval in Distributed Systems}}}, year = {{2012}}, } @article{5183, author = {{Bodden, Eric and Lam, Patrick and Hendren, Laurie}}, issn = {{0164-0925}}, journal = {{ACM Transactions on Programming Languages and Systems}}, number = {{2}}, pages = {{1--52}}, publisher = {{Association for Computing Machinery (ACM)}}, title = {{{Partially Evaluating Finite-State Runtime Monitors Ahead of Time}}}, doi = {{10.1145/2220365.2220366}}, volume = {{34}}, year = {{2012}}, } @inproceedings{565, abstract = {{In model-driven development of multi-layer systems (e.g. application, platform and infrastructure), each layer is usually described by separate models. When generating analysis models or code, these separate models rst of all need to be linked. Hence, existing model transformations for single layers cannot be simply re-used. In this paper, we present a modular approach to the transformation of multi-layer systems. It employs model weaving to dene the interconnections between models of dierent layers. The weaving models themselves are subject to model transformations: The result of transforming a weaving model constitutes a conguration for the models obtained by transforming single layers, thereby allowing for a re-use of existing model transformations. We exemplify our approach by the generation of analysis models for component-based software.}}, author = {{Besova, Galina and Walther, Sven and Wehrheim, Heike and Becker, Steffen}}, booktitle = {{Proceedings of the 15th International Conference on Model Driven Engineering Languages & Systems (MoDELS)}}, pages = {{776--792}}, title = {{{Weaving-based configuration and modular transformation of multi-layer systems}}}, doi = {{10.1007/978-3-642-33666-9_49}}, year = {{2012}}, } @misc{566, author = {{Hilger, Ina}}, publisher = {{Universität Paderborn}}, title = {{{Untersuchung von Modellen zur operativen Planung in Trinkwasserversorgungsnetzwerken}}}, year = {{2012}}, } @misc{13462, author = {{Lewis, Peter and Platzner, Marco and Yao, Xin}}, publisher = {{Awareness Magazine}}, title = {{{An outlook for self-awareness in computing systems}}}, year = {{2012}}, } @phdthesis{34169, author = {{Brangewitz, Sonja}}, title = {{{Coalitional and Strategic Market Games}}}, year = {{2012}}, } @inproceedings{615, abstract = {{Due to the continuously shrinking device structures and increasing densities of FPGAs, thermal aspects have become the new focus for many research projects over the last years. Most researchers rely on temperature simulations to evaluate their novel thermal management techniques. However, the accuracy of the simulations is to some extent questionable and they require a high computational effort if a detailed thermal model is used.For experimental evaluation of real-world temperature management methods, often synthetic heat sources are employed. Therefore, in this paper we investigated the question if we can create significant rises in temperature on modern FPGAs to enable future evaluation of thermal management techniques based on experiments in contrast to simulations. Therefore, we have developed eight different heat-generating cores that use different subsets of the FPGA resources. Our experimental results show that, according to the built-in thermal diode of our Xilinx Virtex-5 FPGA, we can increase the chip temperature by 134 degree C in less than 12 minutes by only utilizing about 21% of the slices.}}, author = {{Happe, Markus and Hangmann, Hendrik and Agne, Andreas and Plessl, Christian}}, booktitle = {{Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig)}}, pages = {{1--8}}, publisher = {{IEEE}}, title = {{{Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators}}}, doi = {{10.1109/ReConFig.2012.6416745}}, year = {{2012}}, } @inproceedings{591, abstract = {{One major obstacle for a wide spread FPGA usage in general-purpose computing is the development tool flow that requires much higher effort than for pure software solutions. Convey Computer promises a solution to this problem for their HC-1 platform, where the FPGAs are configured to run as a vector processor and the software source code can be annotated with pragmas that guide an automated vectorization process. We investigate this approach for a stereo matching algorithm that has abundant parallelism and a number of different computational patterns. We note that for this case study the automated vectorization in its current state doesn’t hold its productivity promise. However, we also show that using the Vector Personality can yield a significant speedups compared to CPU implementations in two of three investigated phases of the algorithm. Those speedups don’t match custom FPGA implementations, but can come with much reduced development effort.}}, author = {{Kenter, Tobias and Plessl, Christian and Schmitz, Henning}}, booktitle = {{Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)}}, pages = {{1--8}}, publisher = {{IEEE}}, title = {{{Pragma based parallelization - Trading hardware efficiency for ease of use?}}}, doi = {{10.1109/ReConFig.2012.6416773}}, year = {{2012}}, } @inproceedings{609, abstract = {{Today's design and operation principles and methods do not scale well with future reconfigurable computing systems due to an increased complexity in system architectures and applications, run-time dynamics and corresponding requirements. Hence, novel design and operation principles and methods are needed that possibly break drastically with the static ones we have built into our systems and the fixed abstraction layers we have cherished over the last decades. Thus, we propose a HW/SW platform that collects and maintains information about its state and progress which enables the system to reason about its behavior (self-awareness) and utilizes its knowledge to effectively and autonomously adapt its behavior to changing requirements (self-expression).To enable self-awareness, our compute nodes collect information using a variety of sensors, i.e. performance counters and thermal diodes, and use internal self-awareness models that process these information. For self-awareness, on-line learning is crucial such that the node learns and continuously updates its models at run-time to react to changing conditions. To enable self-expression, we break with the classic design-time abstraction layers of hardware, operating system and software. In contrast, our system is able to vertically migrate functionalities between the layers at run-time to exploit trade-offs between abstraction and optimization.This paper presents a heterogeneous multi-core architecture, that enables self-awareness and self-expression, an operating system for our proposed hardware/software platform and a novel self-expression method.}}, author = {{Happe, Markus and Agne, Andreas and Plessl, Christian and Platzner, Marco}}, booktitle = {{Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS)}}, pages = {{8--9}}, title = {{{Hardware/Software Platform for Self-aware Compute Nodes}}}, year = {{2012}}, } @inproceedings{567, abstract = {{Heterogeneous machines are gaining momentum in the High Performance Computing field, due to the theoretical speedups and power consumption. In practice, while some applications meet the performance expectations, heterogeneous architectures still require a tremendous effort from the application developers. This work presents a code generation method to port codes into heterogeneous platforms, based on transformations of the control flow into function calls. The results show that the cost of the function-call mechanism is affordable for the tested HPC kernels. The complete toolchain, based on the LLVM compiler infrastructure, is fully automated once the sequential specification is provided.}}, author = {{Barrio, Pablo and Carreras, Carlos and Sierra, Roberto and Kenter, Tobias and Plessl, Christian}}, booktitle = {{Proceedings of the International Conference on High Performance Computing and Simulation (HPCS)}}, pages = {{559--565}}, publisher = {{IEEE}}, title = {{{Turning control flow graphs into function calls: Code generation for heterogeneous architectures}}}, doi = {{10.1109/HPCSim.2012.6266973}}, year = {{2012}}, } @inproceedings{612, abstract = {{While numerous publications have presented ring oscillator designs for temperature measurements a detailed study of the ring oscillator's design space is still missing. In this work, we introduce metrics for comparing the performance and area efficiency of ring oscillators and a methodology for determining these metrics. As a result, we present a systematic study of the design space for ring oscillators for a Xilinx Virtex-5 platform FPGA.}}, author = {{Rüthing, Christoph and Happe, Markus and Agne, Andreas and Plessl, Christian}}, booktitle = {{Proceedings of the International Conference on Field Programmable Logic and Applications (FPL)}}, pages = {{559--562}}, publisher = {{IEEE}}, title = {{{Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs}}}, doi = {{10.1109/FPL.2012.6339370}}, year = {{2012}}, } @article{2512, abstract = {{In this paper we introduce the concept of an overall power function that is meant to combine two sources of a party’s power in a parliament. The first source is based on the possibilities for the party to be part of a majority coalition and it is typically modeled using a cooperative simple game. The second source takes into account parties’ asymmetries outside the cooperative game and it is displayed by a vector of exogenously given weights. We adopt a normative point of view and provide an axiomatic characterization of a specific overall power function, in which the weights enter in a proportional fashion.}}, author = {{Dimitrov, Dinko and Haake, Claus-Jochen}}, issn = {{1742-7355}}, journal = {{International Journal of Economic Theory}}, number = {{2}}, pages = {{189--200}}, publisher = {{Wiley-Blackwell}}, title = {{{Proportionality and the power of unequal parties}}}, doi = {{10.1111/j.1742-7363.2011.00158.x}}, volume = {{7}}, year = {{2011}}, } @misc{17997, author = {{Setzer, Alexander}}, publisher = {{Universität Paderborn}}, title = {{{Lokale Online-Strategien zur linearen Anordnung von Teilnehmern in einem Peer-to-Peer Netzwerk}}}, year = {{2011}}, } @misc{642, author = {{Diehl, Matthias}}, publisher = {{Universität Paderborn}}, title = {{{Vorteile der Paketbildung in Verhandlungen: Ein prozeduraler Zugang zu Superadditivität}}}, year = {{2011}}, } @misc{643, author = {{Welp, Daniel}}, publisher = {{Universität Paderborn}}, title = {{{User-space Scheduling for Heterogeneous System under Linux}}}, year = {{2011}}, } @inproceedings{644, abstract = {{In reverse engineering, dynamic pattern detection is accomplished by collecting execution traces and comparing them to expected behavioral patterns. The traces are collected by manually executing the program in question and therefore represent only part of all relevant program behavior. This can lead to false conclusions about the detected patterns. In this paper, we propose to generate all relevant program traces by using symbolic execution. In order to reduce the created trace data, we allow to limit the trace collection to a user-selectable subset of the statically detected pattern candidates.}}, author = {{von Detten, Markus}}, booktitle = {{Proceedings of the 10th ACM SIGPLAN/SIGSOFT Workshop on Program Analysis for Software Tools and Engineering (PASTE)}}, pages = {{17--20}}, title = {{{Towards Systematic, Comprehensive Trace Generation for Behavioral Pattern Detection through Symbolic Execution}}}, doi = {{10.1145/2024569.2024573}}, year = {{2011}}, } @inproceedings{645, abstract = {{In the standard consensus problem there are n processes with possibly di®erent input values and the goal is to eventually reach a point at which all processes commit to exactly one of these values. We are studying a slight variant of the consensus problem called the stabilizing consensus problem [2]. In this problem, we do not require that each process commits to a ¯nal value at some point, but that eventually they arrive at a common, stable value without necessarily being aware of that. This should work irrespective of the states in which the processes are starting. Our main result is a simple randomized algorithm called median rule that, with high probability, just needs O(logmlog log n + log n) time and work per process to arrive at an almost stable consensus for any set of m legal values as long as an adversary can corrupt the states of at most p n processes at any time. Without adversarial involvement, just O(log n) time and work is needed for a stable consensus, with high probability. As a by-product, we obtain a simple distributed algorithm for approximating the median of n numbers in time O(logmlog log n + log n) under adversarial presence.}}, author = {{Doerr, Benjamin and Goldberg, Leslie Ann and Minder, Lorenz and Sauerwald, Thomas and Scheideler, Christian}}, booktitle = {{Proceedings of the 23rd ACM Symposium on Parallelism in Algorithms and Architectures (SPAA)}}, pages = {{149--158}}, title = {{{Stabilizing consensus with the power of two choices}}}, doi = {{10.1145/1989493.1989516}}, year = {{2011}}, } @inproceedings{646, abstract = {{This paper presents a dynamic overlay network based on the De Bruijn graph which we call Linearized De Bruijn (LDB) network. The LDB network has the advantage that it has a guaranteed constant node degree and that the routing between any two nodes takes at most O(log n) hops with high probability. Also, we show that there is a simple local-control algorithm that can recover the LDB network from any network topology that is weakly connected.}}, author = {{Richa, Andrea W. and Scheideler, Christian}}, booktitle = {{Proceedings of the 13th International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS)}}, pages = {{416--430}}, title = {{{Self-Stabilizing DeBruijn Networks}}}, doi = {{10.1007/978-3-642-24550-3_31}}, year = {{2011}}, }