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Different Sources of the Variance of Online Consumer Ratings and their Impact on Price and Demand. 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Kenter, H. Schmitz, C. Plessl, International Journal of Reconfigurable Computing (IJRC) 2015 (2015).","apa":"Kenter, T., Schmitz, H., &#38; Plessl, C. (2015). Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study. <i>International Journal of Reconfigurable Computing (IJRC)</i>, <i>2015</i>, Article 859425. <a href=\"https://doi.org/10.1155/2015/859425\">https://doi.org/10.1155/2015/859425</a>","ieee":"T. Kenter, H. Schmitz, and C. Plessl, “Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study,” <i>International Journal of Reconfigurable Computing (IJRC)</i>, vol. 2015, Art. no. 859425, 2015, doi: <a href=\"https://doi.org/10.1155/2015/859425\">10.1155/2015/859425</a>.","ama":"Kenter T, Schmitz H, Plessl C. Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study. <i>International Journal of Reconfigurable Computing (IJRC)</i>. 2015;2015. doi:<a href=\"https://doi.org/10.1155/2015/859425\">10.1155/2015/859425</a>","bibtex":"@article{Kenter_Schmitz_Plessl_2015, title={Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study}, volume={2015}, DOI={<a href=\"https://doi.org/10.1155/2015/859425\">10.1155/2015/859425</a>}, number={859425}, journal={International Journal of Reconfigurable Computing (IJRC)}, publisher={Hindawi}, author={Kenter, Tobias and Schmitz, Henning and Plessl, Christian}, year={2015} }","mla":"Kenter, Tobias, et al. “Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study.” <i>International Journal of Reconfigurable Computing (IJRC)</i>, vol. 2015, 859425, Hindawi, 2015, doi:<a href=\"https://doi.org/10.1155/2015/859425\">10.1155/2015/859425</a>."},"file_date_updated":"2018-03-20T07:47:56Z","project":[{"grant_number":"160364472","_id":"1","name":"SFB 901"},{"_id":"14","grant_number":"160364472","name":"SFB 901 - Subprojekt C2"},{"_id":"4","name":"SFB 901 - Project Area C"},{"_id":"34","grant_number":"610996","name":"Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures"}],"quality_controlled":"1","_id":"296","publisher":"Hindawi","volume":2015,"user_id":"15278","ddc":["040"],"status":"public","has_accepted_license":"1","date_created":"2017-10-17T12:41:49Z","file":[{"date_created":"2018-03-20T07:47:56Z","creator":"florida","file_id":"1444","success":1,"content_type":"application/pdf","file_name":"296-859425.pdf","access_level":"closed","file_size":2993898,"relation":"main_file","date_updated":"2018-03-20T07:47:56Z"}],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"type":"journal_article","publication":"International Journal of Reconfigurable Computing (IJRC)","abstract":[{"lang":"eng","text":"FPGAs are known to permit huge gains in performance and efficiency for suitable applications but still require reduced design efforts and shorter development cycles for wider adoption. In this work, we compare the resulting performance of two design concepts that in different ways promise such increased productivity. As common starting point, we employ a kernel-centric design approach, where computational hotspots in an application are identified and individually accelerated on FPGA. By means of a complex stereo matching application, we evaluate two fundamentally different design philosophies and approaches for implementing the required kernels on FPGAs. In the first implementation approach, we designed individually specialized data flow kernels in a spatial programming language for a Maxeler FPGA platform; in the alternative design approach, we target a vector coprocessor with large vector lengths, which is implemented as a form of programmable overlay on the application FPGAs of a Convey HC-1. We assess both approaches in terms of overall system performance, raw kernel performance, and performance relative to invested resources. After compensating for the effects of the underlying hardware platforms, the specialized dataflow kernels on the Maxeler platform are around 3x faster than kernels executing on the Convey vector coprocessor. In our concrete scenario, due to trade-offs between reconfiguration overheads and exposed parallelism, the advantage of specialized dataflow kernels is reduced to around 2.5x."}],"language":[{"iso":"eng"}],"article_number":"859425","doi":"10.1155/2015/859425","author":[{"full_name":"Kenter, Tobias","last_name":"Kenter","first_name":"Tobias","id":"3145"},{"last_name":"Schmitz","first_name":"Henning","full_name":"Schmitz, Henning"},{"first_name":"Christian","last_name":"Plessl","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","id":"16153"}],"title":"Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study","year":"2015","intvolume":"      2015","date_updated":"2023-09-26T13:29:08Z"},{"publication":"Proceedings of the 5th International Workshop on Adaptive Self-tuning Computing Systems (ADAPT)","abstract":[{"lang":"eng","text":"This paper introduces Binary Acceleration At Runtime(BAAR), an easy-to-use on-the-fly binary acceleration mechanismwhich aims to tackle the problem of enabling existentsoftware to automatically utilize accelerators at runtime. BAARis based on the LLVM Compiler Infrastructure and has aclient-server architecture. The client runs the program to beaccelerated in an environment which allows program analysisand profiling. Program parts which are identified as suitable forthe available accelerator are exported and sent to the server.The server optimizes these program parts for the acceleratorand provides RPC execution for the client. The client transformsits program to utilize accelerated execution on the server foroffloaded program parts. We evaluate our work with a proofof-concept implementation of BAAR that uses an Intel XeonPhi 5110P as the acceleration target and performs automaticoffloading, parallelization and vectorization of suitable programparts. The practicality of BAAR for real-world examples is shownbased on a study of stencil codes. Our results show a speedup ofup to 4 without any developer-provided hints and 5.77 withhints over the same code compiled with the Intel Compiler atoptimization level O2 and running on an Intel Xeon E5-2670machine. Based on our insights gained during implementationand evaluation we outline future directions of research, e.g.,offloading more fine-granular program parts than functions, amore sophisticated communication mechanism or introducing onstack-replacement."}],"file":[{"creator":"florida","date_created":"2018-03-20T07:46:46Z","date_updated":"2019-08-01T09:10:44Z","relation":"main_file","file_size":1176620,"access_level":"open_access","file_name":"303-plessl15_adapt.pdf","content_type":"application/pdf","file_id":"1442"}],"date_created":"2017-10-17T12:41:51Z","type":"conference","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"title":"Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores","year":"2015","author":[{"full_name":"Damschen, Marvin","first_name":"Marvin","last_name":"Damschen"},{"id":"16153","first_name":"Christian","last_name":"Plessl","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian"}],"date_updated":"2023-09-26T13:29:59Z","language":[{"iso":"eng"}],"file_date_updated":"2019-08-01T09:10:44Z","citation":{"ama":"Damschen M, Plessl C. Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores. In: <i>Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT)</i>. ; 2015.","bibtex":"@inproceedings{Damschen_Plessl_2015, title={Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores}, booktitle={Proceedings of the 5th International Workshop on Adaptive Self-tuning Computing Systems (ADAPT)}, author={Damschen, Marvin and Plessl, Christian}, year={2015} }","mla":"Damschen, Marvin, and Christian Plessl. “Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores.” <i>Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT)</i>, 2015.","short":"M. Damschen, C. Plessl, in: Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT), 2015.","chicago":"Damschen, Marvin, and Christian Plessl. “Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores.” In <i>Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT)</i>, 2015.","apa":"Damschen, M., &#38; Plessl, C. (2015). Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores. <i>Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT)</i>.","ieee":"M. Damschen and C. Plessl, “Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores,” 2015."},"quality_controlled":"1","project":[{"_id":"1","grant_number":"160364472","name":"SFB 901"},{"_id":"14","grant_number":"160364472","name":"SFB 901 - Subprojekt C2"},{"_id":"4","name":"SFB 901 - Project Area C"},{"grant_number":"610996","_id":"34","name":"Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures"}],"external_id":{"arxiv":["1412.3906"]},"oa":"1","status":"public","has_accepted_license":"1","_id":"303","ddc":["040"],"user_id":"15278"},{"doi":"10.7873/DATE.2015.1124","language":[{"iso":"eng"}],"date_updated":"2023-09-26T13:31:44Z","author":[{"last_name":"Damschen","first_name":"Marvin","full_name":"Damschen, Marvin"},{"full_name":"Riebler, Heinrich","last_name":"Riebler","first_name":"Heinrich","id":"8961"},{"id":"30332","full_name":"Vaz, Gavin Francis","first_name":"Gavin Francis","last_name":"Vaz"},{"last_name":"Plessl","first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","id":"16153"}],"year":"2015","title":"Transparent offloading of computational hotspots from binary code to Xeon Phi","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"type":"conference","date_created":"2017-10-17T12:41:38Z","file":[{"relation":"main_file","date_updated":"2018-03-21T10:29:49Z","file_name":"238-plessl15_date.pdf","file_size":380552,"access_level":"closed","file_id":"1500","success":1,"content_type":"application/pdf","creator":"florida","date_created":"2018-03-21T10:29:49Z"}],"abstract":[{"text":"In this paper, we study how binary applications can be transparently accelerated with novel heterogeneous computing resources without requiring any manual porting or developer-provided hints. Our work is based on Binary Acceleration At Runtime (BAAR), our previously introduced binary acceleration mechanism that uses the LLVM Compiler Infrastructure. BAAR is designed as a client-server architecture. The client runs the program to be accelerated in an environment, which allows program analysis and profiling and identifies and extracts suitable program parts to be offloaded. The server compiles and optimizes these offloaded program parts for the accelerator and offers access to these functions to the client with a remote procedure call (RPC) interface. Our previous work proved the feasibility of our approach, but also showed that communication time and overheads limit the granularity of functions that can be meaningfully offloaded. In this work, we motivate the importance of a lightweight, high-performance communication between server and client and present a communication mechanism based on the Message Passing Interface (MPI). We evaluate our approach by using an Intel Xeon Phi 5110P as the acceleration target and show that the communication overhead can be reduced from 40% to 10%, thus enabling even small hotspots to benefit from offloading to an accelerator.","lang":"eng"}],"publication":"Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE)","user_id":"15278","ddc":["040"],"publisher":"EDA Consortium / IEEE","_id":"238","page":"1078-1083","has_accepted_license":"1","status":"public","project":[{"name":"SFB 901","_id":"1","grant_number":"160364472"},{"name":"SFB 901 - Subprojekt C2","grant_number":"160364472","_id":"14"},{"_id":"4","name":"SFB 901 - Project Area C"},{"name":"Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures","_id":"34","grant_number":"610996"}],"quality_controlled":"1","citation":{"ieee":"M. Damschen, H. Riebler, G. F. Vaz, and C. Plessl, “Transparent offloading of computational hotspots from binary code to Xeon Phi,” in <i>Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE)</i>, 2015, pp. 1078–1083, doi: <a href=\"https://doi.org/10.7873/DATE.2015.1124\">10.7873/DATE.2015.1124</a>.","apa":"Damschen, M., Riebler, H., Vaz, G. F., &#38; Plessl, C. (2015). Transparent offloading of computational hotspots from binary code to Xeon Phi. <i>Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE)</i>, 1078–1083. <a href=\"https://doi.org/10.7873/DATE.2015.1124\">https://doi.org/10.7873/DATE.2015.1124</a>","mla":"Damschen, Marvin, et al. “Transparent Offloading of Computational Hotspots from Binary Code to Xeon Phi.” <i>Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE)</i>, EDA Consortium / IEEE, 2015, pp. 1078–83, doi:<a href=\"https://doi.org/10.7873/DATE.2015.1124\">10.7873/DATE.2015.1124</a>.","bibtex":"@inproceedings{Damschen_Riebler_Vaz_Plessl_2015, title={Transparent offloading of computational hotspots from binary code to Xeon Phi}, DOI={<a href=\"https://doi.org/10.7873/DATE.2015.1124\">10.7873/DATE.2015.1124</a>}, booktitle={Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE)}, publisher={EDA Consortium / IEEE}, author={Damschen, Marvin and Riebler, Heinrich and Vaz, Gavin Francis and Plessl, Christian}, year={2015}, pages={1078–1083} }","chicago":"Damschen, Marvin, Heinrich Riebler, Gavin Francis Vaz, and Christian Plessl. “Transparent Offloading of Computational Hotspots from Binary Code to Xeon Phi.” In <i>Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE)</i>, 1078–83. EDA Consortium / IEEE, 2015. <a href=\"https://doi.org/10.7873/DATE.2015.1124\">https://doi.org/10.7873/DATE.2015.1124</a>.","ama":"Damschen M, Riebler H, Vaz GF, Plessl C. Transparent offloading of computational hotspots from binary code to Xeon Phi. In: <i>Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE)</i>. EDA Consortium / IEEE; 2015:1078-1083. doi:<a href=\"https://doi.org/10.7873/DATE.2015.1124\">10.7873/DATE.2015.1124</a>","short":"M. Damschen, H. Riebler, G.F. Vaz, C. Plessl, in: Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), EDA Consortium / IEEE, 2015, pp. 1078–1083."},"file_date_updated":"2018-03-21T10:29:49Z"},{"issue":"3","publication":"Economic Theory","type":"journal_article","department":[{"_id":"205"},{"_id":"475"}],"file":[{"creator":"cjhaake","date_created":"2018-08-09T09:35:19Z","file_size":391317,"access_level":"closed","file_name":"Competitive outcomes and the inner core of NTU market games.pdf","date_updated":"2018-08-09T09:35:19Z","relation":"main_file","content_type":"application/pdf","file_id":"3868"}],"date_created":"2018-04-26T10:52:28Z","date_updated":"2022-01-06T06:56:55Z","publication_status":"published","intvolume":"        57","title":"Competitive outcomes and the inner core of NTU market games","year":"2014","author":[{"first_name":"Sonja","last_name":"Brangewitz","full_name":"Brangewitz, Sonja"},{"full_name":"Gamp, Jan-Philip","first_name":"Jan-Philip","last_name":"Gamp"}],"publication_identifier":{"issn":["0938-2259","1432-0479"]},"doi":"10.1007/s00199-014-0846-7","language":[{"iso":"eng"}],"project":[{"_id":"1","name":"SFB 901"},{"_id":"2","name":"SFB 901 - Project Area A"},{"_id":"7","name":"SFB 901 - Subproject A3"}],"file_date_updated":"2018-08-09T09:35:19Z","citation":{"ieee":"S. Brangewitz and J.-P. Gamp, “Competitive outcomes and the inner core of NTU market games,” <i>Economic Theory</i>, vol. 57, no. 3, pp. 529–554, 2014.","apa":"Brangewitz, S., &#38; Gamp, J.-P. (2014). Competitive outcomes and the inner core of NTU market games. <i>Economic Theory</i>, <i>57</i>(3), 529–554. <a href=\"https://doi.org/10.1007/s00199-014-0846-7\">https://doi.org/10.1007/s00199-014-0846-7</a>","short":"S. Brangewitz, J.-P. Gamp, Economic Theory 57 (2014) 529–554.","chicago":"Brangewitz, Sonja, and Jan-Philip Gamp. “Competitive Outcomes and the Inner Core of NTU Market Games.” <i>Economic Theory</i> 57, no. 3 (2014): 529–54. <a href=\"https://doi.org/10.1007/s00199-014-0846-7\">https://doi.org/10.1007/s00199-014-0846-7</a>.","mla":"Brangewitz, Sonja, and Jan-Philip Gamp. “Competitive Outcomes and the Inner Core of NTU Market Games.” <i>Economic Theory</i>, vol. 57, no. 3, Springer Nature, 2014, pp. 529–54, doi:<a href=\"https://doi.org/10.1007/s00199-014-0846-7\">10.1007/s00199-014-0846-7</a>.","bibtex":"@article{Brangewitz_Gamp_2014, title={Competitive outcomes and the inner core of NTU market games}, volume={57}, DOI={<a href=\"https://doi.org/10.1007/s00199-014-0846-7\">10.1007/s00199-014-0846-7</a>}, number={3}, journal={Economic Theory}, publisher={Springer Nature}, author={Brangewitz, Sonja and Gamp, Jan-Philip}, year={2014}, pages={529–554} }","ama":"Brangewitz S, Gamp J-P. Competitive outcomes and the inner core of NTU market games. <i>Economic Theory</i>. 2014;57(3):529-554. doi:<a href=\"https://doi.org/10.1007/s00199-014-0846-7\">10.1007/s00199-014-0846-7</a>"},"has_accepted_license":"1","status":"public","ddc":["040"],"user_id":"65453","volume":57,"page":"529-554","publisher":"Springer Nature","_id":"2522"},{"file":[{"relation":"main_file","date_updated":"2018-03-20T07:30:29Z","file_name":"329-maxinet_networking14_01.pdf","file_size":786320,"access_level":"closed","file_id":"1425","success":1,"content_type":"application/pdf","creator":"florida","date_created":"2018-03-20T07:30:29Z"}],"date_created":"2017-10-17T12:41:56Z","type":"conference","department":[{"_id":"75"}],"file_date_updated":"2018-03-20T07:30:29Z","publication":"Proceedings of the 2014 IFIP Networking Conference (Networking 2014)","citation":{"ama":"Wette P, Dräxler M, Schwabe A, Wallaschek F, Zahraee MH, Karl H. MaxiNet: Distributed Emulation of Software-Defined Networks. In: <i>Proceedings of the 2014 IFIP Networking Conference (Networking 2014)</i>. ; 2014:1-9. doi:<a href=\"https://doi.org/10.1109/IFIPNetworking.2014.6857078\">10.1109/IFIPNetworking.2014.6857078</a>","bibtex":"@inproceedings{Wette_Dräxler_Schwabe_Wallaschek_Zahraee_Karl_2014, title={MaxiNet: Distributed Emulation of Software-Defined Networks}, DOI={<a href=\"https://doi.org/10.1109/IFIPNetworking.2014.6857078\">10.1109/IFIPNetworking.2014.6857078</a>}, booktitle={Proceedings of the 2014 IFIP Networking Conference (Networking 2014)}, author={Wette, Philip and Dräxler, Martin and Schwabe, Arne and Wallaschek, Felix and Zahraee, Mohammad Hassan and Karl, Holger}, year={2014}, pages={1–9} }","mla":"Wette, Philip, et al. “MaxiNet: Distributed Emulation of Software-Defined Networks.” <i>Proceedings of the 2014 IFIP Networking Conference (Networking 2014)</i>, 2014, pp. 1–9, doi:<a href=\"https://doi.org/10.1109/IFIPNetworking.2014.6857078\">10.1109/IFIPNetworking.2014.6857078</a>.","short":"P. Wette, M. Dräxler, A. Schwabe, F. Wallaschek, M.H. Zahraee, H. Karl, in: Proceedings of the 2014 IFIP Networking Conference (Networking 2014), 2014, pp. 1–9.","chicago":"Wette, Philip, Martin Dräxler, Arne Schwabe, Felix Wallaschek, Mohammad Hassan Zahraee, and Holger Karl. “MaxiNet: Distributed Emulation of Software-Defined Networks.” In <i>Proceedings of the 2014 IFIP Networking Conference (Networking 2014)</i>, 1–9, 2014. <a href=\"https://doi.org/10.1109/IFIPNetworking.2014.6857078\">https://doi.org/10.1109/IFIPNetworking.2014.6857078</a>.","apa":"Wette, P., Dräxler, M., Schwabe, A., Wallaschek, F., Zahraee, M. H., &#38; Karl, H. (2014). MaxiNet: Distributed Emulation of Software-Defined Networks. In <i>Proceedings of the 2014 IFIP Networking Conference (Networking 2014)</i> (pp. 1–9). <a href=\"https://doi.org/10.1109/IFIPNetworking.2014.6857078\">https://doi.org/10.1109/IFIPNetworking.2014.6857078</a>","ieee":"P. Wette, M. Dräxler, A. Schwabe, F. Wallaschek, M. H. Zahraee, and H. Karl, “MaxiNet: Distributed Emulation of Software-Defined Networks,” in <i>Proceedings of the 2014 IFIP Networking Conference (Networking 2014)</i>, 2014, pp. 1–9."},"abstract":[{"text":"Network emulations are widely used for testing novel network protocols and routing algorithms in realistic scenarios. Up to now, there is no emulation tool that is able to emulate large software-deﬁned data center networks that consist of several thousand nodes. Mininet is the most common tool to emulate Software-Deﬁned Networks of several hundred nodes. We extend Mininet to span an emulated network over several physical machines, making it possible to emulate networks of several thousand nodes on just a handful of physical machines. This enables us to emulate, e.g., large data center networks. To test this approach, we additionally introduce a trafﬁc generator for data center trafﬁc. Since there are no data center trafﬁc traces publicly available we use the results of two recent trafﬁc studies to create synthetic trafﬁc. We show the design and discuss some challenges we had in building our trafﬁc generator. As a showcase for our work we emulated a data center consisting of 3200 hosts on a cluster of only 12 physical machines. We show the resulting workloads and the trade-offs involved.","lang":"eng"}],"project":[{"name":"SFB 901","_id":"1"},{"name":"SFB 901 - Subprojekt A2","_id":"6"},{"_id":"2","name":"SFB 901 - Project Area A"}],"page":"1-9","_id":"329","user_id":"15572","doi":"10.1109/IFIPNetworking.2014.6857078","ddc":["040"],"status":"public","year":"2014","title":"MaxiNet: Distributed Emulation of Software-Defined Networks","author":[{"full_name":"Wette, Philip","last_name":"Wette","first_name":"Philip"},{"full_name":"Dräxler, Martin","last_name":"Dräxler","first_name":"Martin"},{"full_name":"Schwabe, Arne","first_name":"Arne","last_name":"Schwabe"},{"last_name":"Wallaschek","first_name":"Felix","full_name":"Wallaschek, Felix"},{"full_name":"Zahraee, Mohammad Hassan","first_name":"Mohammad Hassan","last_name":"Zahraee"},{"first_name":"Holger","last_name":"Karl","full_name":"Karl, Holger","id":"126"}],"date_updated":"2022-01-06T06:59:09Z","has_accepted_license":"1"},{"date_created":"2017-10-17T12:41:56Z","department":[{"_id":"280"}],"type":"bachelorsthesis","supervisor":[{"id":"37339","full_name":"Hehenkamp, Burkhard","first_name":"Burkhard","last_name":"Hehenkamp"}],"citation":{"ama":"Drigalsky L. <i>Zur Ausbreitung und Behinderung von Epidemien - Eine Netzwerkanalyse</i>. Universität Paderborn; 2014.","bibtex":"@book{Drigalsky_2014, title={Zur Ausbreitung und Behinderung von Epidemien - Eine Netzwerkanalyse}, publisher={Universität Paderborn}, author={Drigalsky, Liesa}, year={2014} }","mla":"Drigalsky, Liesa. <i>Zur Ausbreitung und Behinderung von Epidemien - Eine Netzwerkanalyse</i>. Universität Paderborn, 2014.","chicago":"Drigalsky, Liesa. <i>Zur Ausbreitung und Behinderung von Epidemien - Eine Netzwerkanalyse</i>. Universität Paderborn, 2014.","short":"L. Drigalsky, Zur Ausbreitung und Behinderung von Epidemien - Eine Netzwerkanalyse, Universität Paderborn, 2014.","apa":"Drigalsky, L. (2014). <i>Zur Ausbreitung und Behinderung von Epidemien - Eine Netzwerkanalyse</i>. Universität Paderborn.","ieee":"L. Drigalsky, <i>Zur Ausbreitung und Behinderung von Epidemien - Eine Netzwerkanalyse</i>. Universität Paderborn, 2014."},"project":[{"_id":"1","name":"SFB 901"},{"_id":"7","name":"SFB 901 - Subprojekt A3"},{"name":"SFB 901 - Project Area A","_id":"2"}],"_id":"330","language":[{"iso":"ger"}],"publisher":"Universität Paderborn","user_id":"42447","author":[{"last_name":"Drigalsky","first_name":"Liesa","full_name":"Drigalsky, Liesa"}],"status":"public","title":"Zur Ausbreitung und Behinderung von Epidemien - Eine Netzwerkanalyse","year":"2014","date_updated":"2022-01-06T06:59:09Z"},{"date_updated":"2022-01-06T06:59:10Z","author":[{"last_name":"Wu","first_name":"Sen","full_name":"Wu, Sen"}],"year":"2014","title":"Webcam application using virtual FPGA","status":"public","user_id":"477","publisher":"Universität Paderborn","_id":"331","project":[{"_id":"1","name":"SFB 901"},{"_id":"12","name":"SFB 901 - Subprojekt B4"},{"name":"SFB 901 - Project Area B","_id":"3"}],"citation":{"ieee":"S. Wu, <i>Webcam application using virtual FPGA</i>. Universität Paderborn, 2014.","apa":"Wu, S. (2014). <i>Webcam application using virtual FPGA</i>. Universität Paderborn.","chicago":"Wu, Sen. <i>Webcam Application Using Virtual FPGA</i>. Universität Paderborn, 2014.","short":"S. Wu, Webcam Application Using Virtual FPGA, Universität Paderborn, 2014.","mla":"Wu, Sen. <i>Webcam Application Using Virtual FPGA</i>. Universität Paderborn, 2014.","bibtex":"@book{Wu_2014, title={Webcam application using virtual FPGA}, publisher={Universität Paderborn}, author={Wu, Sen}, year={2014} }","ama":"Wu S. <i>Webcam Application Using Virtual FPGA</i>. Universität Paderborn; 2014."},"type":"bachelorsthesis","date_created":"2017-10-17T12:41:56Z"},{"user_id":"477","_id":"332","language":[{"iso":"ger"}],"publisher":"Universität Paderborn","date_updated":"2022-01-06T06:59:10Z","author":[{"last_name":"Lange","first_name":"Maximilian","full_name":"Lange, Maximilian"}],"status":"public","title":"Was tun um Kunden von der Qualität seiner Produkte zu überzeugen - Möglichkeiten der Zertifizierung und von Reputationssystemen auf Onlinemärkten","year":"2014","type":"bachelorsthesis","date_created":"2017-10-17T12:41:56Z","project":[{"_id":"1","name":"SFB 901"},{"_id":"8","name":"SFB 901 - Subprojekt A4"},{"name":"SFB 901 - Project Area A","_id":"2"}],"citation":{"bibtex":"@book{Lange_2014, title={Was tun um Kunden von der Qualität seiner Produkte zu überzeugen - Möglichkeiten der Zertifizierung und von Reputationssystemen auf Onlinemärkten}, publisher={Universität Paderborn}, author={Lange, Maximilian}, year={2014} }","ama":"Lange M. <i>Was tun um Kunden von der Qualität seiner Produkte zu überzeugen - Möglichkeiten der Zertifizierung und von Reputationssystemen auf Onlinemärkten</i>. Universität Paderborn; 2014.","mla":"Lange, Maximilian. <i>Was tun um Kunden von der Qualität seiner Produkte zu überzeugen - Möglichkeiten der Zertifizierung und von Reputationssystemen auf Onlinemärkten</i>. Universität Paderborn, 2014.","short":"M. Lange, Was tun um Kunden von der Qualität seiner Produkte zu überzeugen - Möglichkeiten der Zertifizierung und von Reputationssystemen auf Onlinemärkten, Universität Paderborn, 2014.","chicago":"Lange, Maximilian. <i>Was tun um Kunden von der Qualität seiner Produkte zu überzeugen - Möglichkeiten der Zertifizierung und von Reputationssystemen auf Onlinemärkten</i>. Universität Paderborn, 2014.","ieee":"M. Lange, <i>Was tun um Kunden von der Qualität seiner Produkte zu überzeugen - Möglichkeiten der Zertifizierung und von Reputationssystemen auf Onlinemärkten</i>. Universität Paderborn, 2014.","apa":"Lange, M. (2014). <i>Was tun um Kunden von der Qualität seiner Produkte zu überzeugen - Möglichkeiten der Zertifizierung und von Reputationssystemen auf Onlinemärkten</i>. Universität Paderborn."}},{"project":[{"name":"SFB 901","_id":"1"},{"_id":"11","name":"SFB 901 - Subprojekt B3"},{"name":"SFB 901 - Project Area B","_id":"3"}],"citation":{"apa":"Osterbrink, S. (2014). <i>Visualisierung von SMT-Solver-Ausgaben</i>. Universität Paderborn.","ieee":"S. Osterbrink, <i>Visualisierung von SMT-Solver-Ausgaben</i>. Universität Paderborn, 2014.","chicago":"Osterbrink, Sebastian. <i>Visualisierung von SMT-Solver-Ausgaben</i>. Universität Paderborn, 2014.","short":"S. Osterbrink, Visualisierung von SMT-Solver-Ausgaben, Universität Paderborn, 2014.","mla":"Osterbrink, Sebastian. <i>Visualisierung von SMT-Solver-Ausgaben</i>. Universität Paderborn, 2014.","ama":"Osterbrink S. <i>Visualisierung von SMT-Solver-Ausgaben</i>. Universität Paderborn; 2014.","bibtex":"@book{Osterbrink_2014, title={Visualisierung von SMT-Solver-Ausgaben}, publisher={Universität Paderborn}, author={Osterbrink, Sebastian}, year={2014} }"},"type":"bachelorsthesis","date_created":"2017-10-17T12:41:56Z","date_updated":"2022-01-06T06:59:10Z","author":[{"full_name":"Osterbrink, Sebastian","first_name":"Sebastian","last_name":"Osterbrink"}],"status":"public","title":"Visualisierung von SMT-Solver-Ausgaben","year":"2014","user_id":"477","_id":"333","publisher":"Universität Paderborn"},{"citation":{"bibtex":"@book{Wagener_2014, title={Vertical Thread Migration in FPGA based Sound Localization}, publisher={Universität Paderborn}, author={Wagener, Peter}, year={2014} }","ama":"Wagener P. <i>Vertical Thread Migration in FPGA Based Sound Localization</i>. Universität Paderborn; 2014.","mla":"Wagener, Peter. <i>Vertical Thread Migration in FPGA Based Sound Localization</i>. Universität Paderborn, 2014.","short":"P. Wagener, Vertical Thread Migration in FPGA Based Sound Localization, Universität Paderborn, 2014.","chicago":"Wagener, Peter. <i>Vertical Thread Migration in FPGA Based Sound Localization</i>. Universität Paderborn, 2014.","ieee":"P. Wagener, <i>Vertical Thread Migration in FPGA based Sound Localization</i>. Universität Paderborn, 2014.","apa":"Wagener, P. (2014). <i>Vertical Thread Migration in FPGA based Sound Localization</i>. Universität Paderborn."},"project":[{"name":"SFB 901","_id":"1"},{"name":"SFB 901 - Subprojekt C2","_id":"14"},{"_id":"4","name":"SFB 901 - Project Area C"}],"date_created":"2017-10-17T12:41:57Z","type":"bachelorsthesis","author":[{"full_name":"Wagener, Peter","first_name":"Peter","last_name":"Wagener"}],"title":"Vertical Thread Migration in FPGA based Sound Localization","status":"public","year":"2014","date_updated":"2022-01-06T06:59:10Z","publisher":"Universität Paderborn","_id":"334","user_id":"477"},{"department":[{"_id":"77"}],"type":"conference","date_created":"2017-10-17T12:41:57Z","file":[{"file_name":"336-facs2014_walther.pdf","access_level":"closed","file_size":484422,"relation":"main_file","date_updated":"2018-03-20T07:29:29Z","file_id":"1423","success":1,"content_type":"application/pdf","creator":"florida","date_created":"2018-03-20T07:29:29Z"}],"abstract":[{"text":"Today, service compositions often need to be assembled or changed on-the-fly, which leaves only little time for quality assurance. Moreover, quality assurance is complicated by service providers only giving information on their services in terms of domain specific concepts with only limited semantic meaning. In this paper, we propose a method to construct service compositions based on pre-verifiedtemplates. Templates, given as workflow descriptions, are typed over a (domain-independent) template ontology defining concepts and predicates. Templates are proven correct using an abstract semantics, leaving the specific meaning of ontology concepts open, however, only up to given ontology rules. Construction of service compositions amounts to instantiation of templates with domain-specific services.Correctness of an instantiation can then simply be checked by verifying that the domain ontology(a) adheres to the rules of the template ontology, and (b) fulfills the constraints of the employed template.","lang":"eng"}],"publication":"Proceedings of the 11th International Symposium on Formal Aspects of Component Software (FACS)","doi":"10.1007/978-3-319-15317-9_3","series_title":"LNCS","language":[{"iso":"eng"}],"date_updated":"2022-01-06T06:59:13Z","author":[{"first_name":"Sven","last_name":"Walther","full_name":"Walther, Sven"},{"id":"573","last_name":"Wehrheim","first_name":"Heike","full_name":"Wehrheim, Heike"}],"title":"Verified Service Compositions by Template-Based Construction","year":"2014","project":[{"_id":"1","name":"SFB 901"},{"_id":"11","name":"SFB 901 - Subprojekt B3"},{"name":"SFB 901 - Project Area B","_id":"3"}],"citation":{"chicago":"Walther, Sven, and Heike Wehrheim. “Verified Service Compositions by Template-Based Construction.” In <i>Proceedings of the 11th International Symposium on Formal Aspects of Component Software (FACS)</i>, edited by Ivan Lanese and Eric Madelaine, 31–48. LNCS, 2014. <a href=\"https://doi.org/10.1007/978-3-319-15317-9_3\">https://doi.org/10.1007/978-3-319-15317-9_3</a>.","ama":"Walther S, Wehrheim H. Verified Service Compositions by Template-Based Construction. In: Lanese I, Madelaine E, eds. <i>Proceedings of the 11th International Symposium on Formal Aspects of Component Software (FACS)</i>. LNCS. ; 2014:31-48. doi:<a href=\"https://doi.org/10.1007/978-3-319-15317-9_3\">10.1007/978-3-319-15317-9_3</a>","short":"S. Walther, H. Wehrheim, in: I. Lanese, E. Madelaine (Eds.), Proceedings of the 11th International Symposium on Formal Aspects of Component Software (FACS), 2014, pp. 31–48.","bibtex":"@inproceedings{Walther_Wehrheim_2014, series={LNCS}, title={Verified Service Compositions by Template-Based Construction}, DOI={<a href=\"https://doi.org/10.1007/978-3-319-15317-9_3\">10.1007/978-3-319-15317-9_3</a>}, booktitle={Proceedings of the 11th International Symposium on Formal Aspects of Component Software (FACS)}, author={Walther, Sven and Wehrheim, Heike}, editor={Lanese, Ivan and Madelaine, EricEditors}, year={2014}, pages={31–48}, collection={LNCS} }","mla":"Walther, Sven, and Heike Wehrheim. “Verified Service Compositions by Template-Based Construction.” <i>Proceedings of the 11th International Symposium on Formal Aspects of Component Software (FACS)</i>, edited by Ivan Lanese and Eric Madelaine, 2014, pp. 31–48, doi:<a href=\"https://doi.org/10.1007/978-3-319-15317-9_3\">10.1007/978-3-319-15317-9_3</a>.","apa":"Walther, S., &#38; Wehrheim, H. (2014). Verified Service Compositions by Template-Based Construction. In I. Lanese &#38; E. Madelaine (Eds.), <i>Proceedings of the 11th International Symposium on Formal Aspects of Component Software (FACS)</i> (pp. 31–48). <a href=\"https://doi.org/10.1007/978-3-319-15317-9_3\">https://doi.org/10.1007/978-3-319-15317-9_3</a>","ieee":"S. Walther and H. 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