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Plessl, “FINN-HPC: Closing the Gap for Energy-Efficient Neural Network Inference on FPGAs in HPC,” presented at the The International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies 2025 (HEART 2025), Kumamoto, Japan, 2025, doi: <a href=\"https://doi.org/10.1145/3728179.3728189\">10.1145/3728179.3728189</a>.","chicago":"Jungemann, Linus, Bjarne Wintermann, Heinrich Riebler, and Christian Plessl. “FINN-HPC: Closing the Gap for Energy-Efficient Neural Network Inference on FPGAs in HPC.” In <i>Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies</i>. New York City: ACM, 2025. <a href=\"https://doi.org/10.1145/3728179.3728189\">https://doi.org/10.1145/3728179.3728189</a>.","apa":"Jungemann, L., Wintermann, B., Riebler, H., &#38; Plessl, C. (2025). FINN-HPC: Closing the Gap for Energy-Efficient Neural Network Inference on FPGAs in HPC. <i>Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies</i>. The International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies 2025 (HEART 2025), Kumamoto, Japan. <a href=\"https://doi.org/10.1145/3728179.3728189\">https://doi.org/10.1145/3728179.3728189</a>","mla":"Jungemann, Linus, et al. “FINN-HPC: Closing the Gap for Energy-Efficient Neural Network Inference on FPGAs in HPC.” <i>Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies</i>, ACM, 2025, doi:<a href=\"https://doi.org/10.1145/3728179.3728189\">10.1145/3728179.3728189</a>.","short":"L. Jungemann, B. Wintermann, H. Riebler, C. Plessl, in: Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, ACM, New York City, 2025.","bibtex":"@inproceedings{Jungemann_Wintermann_Riebler_Plessl_2025, place={New York City}, title={FINN-HPC: Closing the Gap for Energy-Efficient Neural Network Inference on FPGAs in HPC}, DOI={<a href=\"https://doi.org/10.1145/3728179.3728189\">10.1145/3728179.3728189</a>}, booktitle={Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies}, publisher={ACM}, author={Jungemann, Linus and Wintermann, Bjarne and Riebler, Heinrich and Plessl, Christian}, year={2025} }"},"publication_status":"published","publication_identifier":{"unknown":["979-8-4007-1432-0/25/05"]},"title":"FINN-HPC: Closing the Gap for Energy-Efficient Neural Network Inference on FPGAs in HPC","doi":"10.1145/3728179.3728189","conference":{"end_date":"2025-05-28","location":"Kumamoto, Japan","name":"The International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies 2025 (HEART 2025)","start_date":"2025-05-26"},"publisher":"ACM","date_updated":"2025-06-23T08:39:26Z","author":[{"first_name":"Linus","full_name":"Jungemann, Linus","id":"67601","last_name":"Jungemann","orcid":"0009-0003-9757-988X"},{"last_name":"Wintermann","full_name":"Wintermann, Bjarne","first_name":"Bjarne"},{"first_name":"Heinrich","id":"8961","full_name":"Riebler, Heinrich","last_name":"Riebler"},{"full_name":"Plessl, Christian","id":"16153","last_name":"Plessl","orcid":"0000-0001-5728-9982","first_name":"Christian"}],"date_created":"2025-05-05T11:12:47Z"},{"conference":{"name":"The International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies 2025 (HEART 2025) ","start_date":"2025-05-26","end_date":"2025-05-28","location":"Kumamoto, Japan"},"doi":"10.1145/3728179.3728190","title":"AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference","date_created":"2025-05-06T09:53:41Z","author":[{"full_name":"Pape, Gerrit","last_name":"Pape","first_name":"Gerrit"},{"full_name":"Wintermann, Bjarne","id":"62900","orcid":"0009-0000-0856-6250","last_name":"Wintermann","first_name":"Bjarne"},{"first_name":"Linus","orcid":"0009-0003-9757-988X","last_name":"Jungemann","id":"67601","full_name":"Jungemann, Linus"},{"last_name":"Lass","full_name":"Lass, Michael","first_name":"Michael"},{"first_name":"Marius","full_name":"Meyer, Marius","last_name":"Meyer"},{"first_name":"Heinrich","last_name":"Riebler","id":"8961","full_name":"Riebler, Heinrich"},{"first_name":"Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","id":"16153","full_name":"Plessl, Christian"}],"date_updated":"2025-06-23T08:40:28Z","citation":{"ieee":"G. Pape <i>et al.</i>, “AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference,” presented at the The International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies 2025 (HEART 2025) , Kumamoto, Japan, 2025, doi: <a href=\"https://doi.org/10.1145/3728179.3728190\">10.1145/3728179.3728190</a>.","chicago":"Pape, Gerrit, Bjarne Wintermann, Linus Jungemann, Michael Lass, Marius Meyer, Heinrich Riebler, and Christian Plessl. “AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference.” In <i>Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies</i>, 2025. <a href=\"https://doi.org/10.1145/3728179.3728190\">https://doi.org/10.1145/3728179.3728190</a>.","ama":"Pape G, Wintermann B, Jungemann L, et al. AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference. In: <i>Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies</i>. ; 2025. doi:<a href=\"https://doi.org/10.1145/3728179.3728190\">10.1145/3728179.3728190</a>","bibtex":"@inproceedings{Pape_Wintermann_Jungemann_Lass_Meyer_Riebler_Plessl_2025, title={AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference}, DOI={<a href=\"https://doi.org/10.1145/3728179.3728190\">10.1145/3728179.3728190</a>}, booktitle={Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies}, author={Pape, Gerrit and Wintermann, Bjarne and Jungemann, Linus and Lass, Michael and Meyer, Marius and Riebler, Heinrich and Plessl, Christian}, year={2025} }","mla":"Pape, Gerrit, et al. “AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference.” <i>Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies</i>, 2025, doi:<a href=\"https://doi.org/10.1145/3728179.3728190\">10.1145/3728179.3728190</a>.","short":"G. Pape, B. Wintermann, L. Jungemann, M. Lass, M. Meyer, H. Riebler, C. Plessl, in: Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2025.","apa":"Pape, G., Wintermann, B., Jungemann, L., Lass, M., Meyer, M., Riebler, H., &#38; Plessl, C. (2025). AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference. <i>Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies</i>. The International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies 2025 (HEART 2025) , Kumamoto, Japan. <a href=\"https://doi.org/10.1145/3728179.3728190\">https://doi.org/10.1145/3728179.3728190</a>"},"year":"2025","publication_status":"published","language":[{"iso":"eng"}],"department":[{"_id":"27"}],"user_id":"67601","_id":"59816","project":[{"name":"EKI-App: EKI-App: Energieeffiziente Künstliche Intelligenz im Rechenzentrum durch Approximation von tiefen neuronalen Netzen für Field-Programmable Gate Arrays","_id":"296"}],"status":"public","publication":"Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies","type":"conference"}]