[{"project":[{"_id":"1","name":"SFB 901"},{"_id":"9","name":"SFB 901 - Subprojekt B1"},{"_id":"3","name":"SFB 901 - Project Area B"}],"citation":{"bibtex":"@book{Platenius_2011, title={Reengineering of Design Deficiencies in Component-Based Software Architectures}, publisher={Universität Paderborn}, author={Platenius, Marie Christin}, year={2011} }","short":"M.C. Platenius, Reengineering of Design Deficiencies in Component-Based Software Architectures, Universität Paderborn, 2011.","ama":"Platenius MC. <i>Reengineering of Design Deficiencies in Component-Based Software Architectures</i>. Universität Paderborn; 2011.","chicago":"Platenius, Marie Christin. <i>Reengineering of Design Deficiencies in Component-Based Software Architectures</i>. Universität Paderborn, 2011.","ieee":"M. C. Platenius, <i>Reengineering of Design Deficiencies in Component-Based Software Architectures</i>. Universität Paderborn, 2011.","mla":"Platenius, Marie Christin. <i>Reengineering of Design Deficiencies in Component-Based Software Architectures</i>. Universität Paderborn, 2011.","apa":"Platenius, M. C. (2011). <i>Reengineering of Design Deficiencies in Component-Based Software Architectures</i>. Universität Paderborn."},"type":"mastersthesis","department":[{"_id":"76"}],"date_created":"2017-10-17T12:42:58Z","date_updated":"2022-01-06T07:03:08Z","year":"2011","status":"public","title":"Reengineering of Design Deficiencies in Component-Based Software Architectures","author":[{"first_name":"Marie Christin","last_name":"Platenius","full_name":"Platenius, Marie Christin"}],"user_id":"477","_id":"650","publisher":"Universität Paderborn","language":[{"iso":"eng"}]},{"status":"public","has_accepted_license":"1","_id":"652","page":"218--225","user_id":"477","ddc":["040"],"citation":{"bibtex":"@inproceedings{Gerth_Luckey_Küster_Engels_2011, title={Precise Mappings between Business Process Models in Versioning Scenarios}, DOI={<a href=\"https://doi.org/10.1109/SCC.2011.65\">10.1109/SCC.2011.65</a>}, booktitle={Proceedings of the IEEE 8th International Conference on Service Computingt (SCC)}, author={Gerth, Christian and Luckey, Markus and Küster, Jochen and Engels, Gregor}, year={2011}, pages={218--225} }","chicago":"Gerth, Christian, Markus Luckey, Jochen Küster, and Gregor Engels. “Precise Mappings between Business Process Models in Versioning Scenarios.” In <i>Proceedings of the IEEE 8th International Conference on Service Computingt (SCC)</i>, 218--225, 2011. <a href=\"https://doi.org/10.1109/SCC.2011.65\">https://doi.org/10.1109/SCC.2011.65</a>.","ama":"Gerth C, Luckey M, Küster J, Engels G. Precise Mappings between Business Process Models in Versioning Scenarios. In: <i>Proceedings of the IEEE 8th International Conference on Service Computingt (SCC)</i>. ; 2011:218--225. doi:<a href=\"https://doi.org/10.1109/SCC.2011.65\">10.1109/SCC.2011.65</a>","short":"C. Gerth, M. Luckey, J. Küster, G. Engels, in: Proceedings of the IEEE 8th International Conference on Service Computingt (SCC), 2011, pp. 218--225.","ieee":"C. Gerth, M. Luckey, J. Küster, and G. Engels, “Precise Mappings between Business Process Models in Versioning Scenarios,” in <i>Proceedings of the IEEE 8th International Conference on Service Computingt (SCC)</i>, 2011, pp. 218--225.","apa":"Gerth, C., Luckey, M., Küster, J., &#38; Engels, G. (2011). Precise Mappings between Business Process Models in Versioning Scenarios. In <i>Proceedings of the IEEE 8th International Conference on Service Computingt (SCC)</i> (pp. 218--225). <a href=\"https://doi.org/10.1109/SCC.2011.65\">https://doi.org/10.1109/SCC.2011.65</a>","mla":"Gerth, Christian, et al. “Precise Mappings between Business Process Models in Versioning Scenarios.” <i>Proceedings of the IEEE 8th International Conference on Service Computingt (SCC)</i>, 2011, pp. 218--225, doi:<a href=\"https://doi.org/10.1109/SCC.2011.65\">10.1109/SCC.2011.65</a>."},"file_date_updated":"2018-03-14T13:53:51Z","project":[{"_id":"1","name":"SFB 901"},{"name":"SFB 901 - Subprojekt B1","_id":"9"},{"name":"SFB 901 - Project Area B","_id":"3"}],"author":[{"last_name":"Gerth","first_name":"Christian","full_name":"Gerth, Christian"},{"full_name":"Luckey, Markus","first_name":"Markus","last_name":"Luckey"},{"first_name":"Jochen","last_name":"Küster","full_name":"Küster, Jochen"},{"last_name":"Engels","first_name":"Gregor","full_name":"Engels, Gregor","id":"107"}],"year":"2011","title":"Precise Mappings between Business Process Models in Versioning Scenarios","date_updated":"2022-01-06T07:03:10Z","language":[{"iso":"eng"}],"doi":"10.1109/SCC.2011.65","publication":"Proceedings of the IEEE 8th International Conference on Service Computingt (SCC)","abstract":[{"lang":"eng","text":"In the development process of service-oriented systems, business process models are used at different levels. Typically, high-level business process models that describe business requirements and needs are stepwise refined to the IT level by different business modelers and software architects. As a result, different process model versions must be compared and merged by means of model version control. An important prerequisite for process model version control is an elaborated matching approach that results in precise mappings between different process model versions. The challenge of such an approach is to deal with syntactically different process models that are semantically equivalent. For that purpose, matching techniques must consider the semantics of process modeling languages.In this paper, we present a matching approach for process models in a versioning scenario. Based on a term formalization of process models, we enable an efficient and effective way to match syntactically different but semantically equivalent process models resulting in precise mappings."}],"date_created":"2017-10-17T12:42:59Z","file":[{"date_created":"2018-03-14T13:53:51Z","creator":"florida","content_type":"application/pdf","success":1,"file_id":"1223","access_level":"closed","file_size":713943,"file_name":"652-06009264.pdf","date_updated":"2018-03-14T13:53:51Z","relation":"main_file"}],"department":[{"_id":"66"}],"type":"conference"},{"type":"conference","file":[{"relation":"main_file","date_updated":"2018-03-14T13:53:10Z","file_name":"653-Protocom-Lehrig_Zolynski.pdf","file_size":773622,"access_level":"closed","file_id":"1222","success":1,"content_type":"application/pdf","creator":"florida","date_created":"2018-03-14T13:53:10Z"}],"date_created":"2017-10-17T12:42:59Z","abstract":[{"lang":"eng","text":"Performance prototyping is an often used technique to assess the performance of software architectures early in the development process without relying on models of the system under study. ProtoCom is a prototype generator for the PCM realised as model-2-text transformation for which no experience report in a larger, virtualised setting exists. In this paper, we report on four case studies performed with an improved version of ProtoCom and report on the results gained with respect to analysis accuracy and usability. Our results demonstrate that the new version is much easier to use than previous versions and that results gained in our virtualised execution environment help in early assessments of performance under realistic conditions."}],"project":[{"_id":"1","name":"SFB 901"},{"name":"SFB 901 - Subprojekt B3","_id":"11"},{"_id":"3","name":"SFB 901 - Project Area B"}],"publication":"Proceedings of the Palladio Days 2011","file_date_updated":"2018-03-14T13:53:10Z","citation":{"short":"S. Lehrig, T. Zolynski, in: Proceedings of the Palladio Days 2011, 2011, pp. 15–22.","chicago":"Lehrig, Sebastian, and Thomas Zolynski. “Performance Prototyping with ProtoCom in a Virtualised Environment: A Case Study.” In <i>Proceedings of the Palladio Days 2011</i>, 15–22. Karlsruhe Reports in Informatics, 2011. <a href=\"https://doi.org/10.5445/IR/1000025188 \">https://doi.org/10.5445/IR/1000025188 </a>.","ieee":"S. Lehrig and T. Zolynski, “Performance Prototyping with ProtoCom in a Virtualised Environment: A Case Study,” in <i>Proceedings of the Palladio Days 2011</i>, 2011, pp. 15–22.","apa":"Lehrig, S., &#38; Zolynski, T. (2011). Performance Prototyping with ProtoCom in a Virtualised Environment: A Case Study. In <i>Proceedings of the Palladio Days 2011</i> (pp. 15–22). <a href=\"https://doi.org/10.5445/IR/1000025188 \">https://doi.org/10.5445/IR/1000025188 </a>","bibtex":"@inproceedings{Lehrig_Zolynski_2011, series={Karlsruhe Reports in Informatics}, title={Performance Prototyping with ProtoCom in a Virtualised Environment: A Case Study}, DOI={<a href=\"https://doi.org/10.5445/IR/1000025188 \">10.5445/IR/1000025188 </a>}, booktitle={Proceedings of the Palladio Days 2011}, author={Lehrig, Sebastian and Zolynski, Thomas}, year={2011}, pages={15–22}, collection={Karlsruhe Reports in Informatics} }","ama":"Lehrig S, Zolynski T. Performance Prototyping with ProtoCom in a Virtualised Environment: A Case Study. In: <i>Proceedings of the Palladio Days 2011</i>. Karlsruhe Reports in Informatics. ; 2011:15-22. doi:<a href=\"https://doi.org/10.5445/IR/1000025188 \">10.5445/IR/1000025188 </a>","mla":"Lehrig, Sebastian, and Thomas Zolynski. “Performance Prototyping with ProtoCom in a Virtualised Environment: A Case Study.” <i>Proceedings of the Palladio Days 2011</i>, 2011, pp. 15–22, doi:<a href=\"https://doi.org/10.5445/IR/1000025188 \">10.5445/IR/1000025188 </a>."},"ddc":["040"],"doi":"10.5445/IR/1000025188 ","user_id":"15504","page":"15-22","_id":"653","series_title":"Karlsruhe Reports in Informatics","date_updated":"2022-01-06T07:03:10Z","has_accepted_license":"1","title":"Performance Prototyping with ProtoCom in a Virtualised Environment: A Case Study","year":"2011","status":"public","author":[{"last_name":"Lehrig","first_name":"Sebastian","full_name":"Lehrig, Sebastian"},{"full_name":"Zolynski, Thomas","last_name":"Zolynski","first_name":"Thomas"}]},{"user_id":"477","publisher":"Universität Paderborn","_id":"655","language":[{"iso":"ger"}],"date_updated":"2022-01-06T07:03:11Z","year":"2011","status":"public","title":"Modellgetriebene Skalierbarkeitsanalyse von selbst-adaptiven Komponentenbasierten Softwaresystemen in der Cloud","author":[{"full_name":"Meyer, Joachim","last_name":"Meyer","first_name":"Joachim"}],"type":"mastersthesis","date_created":"2017-10-17T12:42:59Z","project":[{"_id":"1","name":"SFB 901"},{"_id":"11","name":"SFB 901 - Subprojekt B3"},{"name":"SFB 901 - Project Area B","_id":"3"}],"citation":{"chicago":"Meyer, Joachim. <i>Modellgetriebene Skalierbarkeitsanalyse von selbst-adaptiven Komponentenbasierten Softwaresystemen in der Cloud</i>. Universität Paderborn, 2011.","short":"J. Meyer, Modellgetriebene Skalierbarkeitsanalyse von selbst-adaptiven Komponentenbasierten Softwaresystemen in der Cloud, Universität Paderborn, 2011.","ieee":"J. Meyer, <i>Modellgetriebene Skalierbarkeitsanalyse von selbst-adaptiven Komponentenbasierten Softwaresystemen in der Cloud</i>. Universität Paderborn, 2011.","apa":"Meyer, J. (2011). <i>Modellgetriebene Skalierbarkeitsanalyse von selbst-adaptiven Komponentenbasierten Softwaresystemen in der Cloud</i>. Universität Paderborn.","bibtex":"@book{Meyer_2011, title={Modellgetriebene Skalierbarkeitsanalyse von selbst-adaptiven Komponentenbasierten Softwaresystemen in der Cloud}, publisher={Universität Paderborn}, author={Meyer, Joachim}, year={2011} }","ama":"Meyer J. <i>Modellgetriebene Skalierbarkeitsanalyse von selbst-adaptiven Komponentenbasierten Softwaresystemen in der Cloud</i>. Universität Paderborn; 2011.","mla":"Meyer, Joachim. <i>Modellgetriebene Skalierbarkeitsanalyse von selbst-adaptiven Komponentenbasierten Softwaresystemen in der Cloud</i>. Universität Paderborn, 2011."}},{"date_created":"2017-10-17T12:43:00Z","type":"mastersthesis","department":[{"_id":"77"}],"supervisor":[{"id":"573","full_name":"Wehrheim, Heike","first_name":"Heike","last_name":"Wehrheim"}],"citation":{"bibtex":"@book{Schremmer_2011, title={Function Specification Inference Using Craig Interpolation}, publisher={Universität Paderborn}, author={Schremmer, Alexander}, year={2011} }","ama":"Schremmer A. <i>Function Specification Inference Using Craig Interpolation</i>. Universität Paderborn; 2011.","mla":"Schremmer, Alexander. <i>Function Specification Inference Using Craig Interpolation</i>. Universität Paderborn, 2011.","short":"A. Schremmer, Function Specification Inference Using Craig Interpolation, Universität Paderborn, 2011.","chicago":"Schremmer, Alexander. <i>Function Specification Inference Using Craig Interpolation</i>. Universität Paderborn, 2011.","ieee":"A. Schremmer, <i>Function Specification Inference Using Craig Interpolation</i>. Universität Paderborn, 2011.","apa":"Schremmer, A. (2011). <i>Function Specification Inference Using Craig Interpolation</i>. Universität Paderborn."},"project":[{"_id":"1","name":"SFB 901"},{"_id":"12","name":"SFB 901 - Subprojekt B4"},{"name":"SFB 901 - Project Area B","_id":"3"}],"publisher":"Universität Paderborn","_id":"658","language":[{"iso":"eng"}],"user_id":"477","year":"2011","status":"public","title":"Function Specification Inference Using Craig Interpolation","author":[{"full_name":"Schremmer, Alexander","last_name":"Schremmer","first_name":"Alexander"}],"date_updated":"2022-01-06T07:03:12Z"},{"project":[{"_id":"1","name":"SFB 901"},{"name":"SFB 901 - Subprojekt B1","_id":"9"},{"name":"SFB 901 - Project Area B","_id":"3"}],"supervisor":[{"full_name":"Engels, Gregor","first_name":"Gregor","last_name":"Engels","id":"107"}],"citation":{"bibtex":"@book{Arifulina_2011, title={Coverage Criteria for Testing DMM Specifications}, publisher={Universität Paderborn}, author={Arifulina, Svetlana}, year={2011} }","short":"S. Arifulina, Coverage Criteria for Testing DMM Specifications, Universität Paderborn, 2011.","ama":"Arifulina S. <i>Coverage Criteria for Testing DMM Specifications</i>. Universität Paderborn; 2011.","chicago":"Arifulina, Svetlana. <i>Coverage Criteria for Testing DMM Specifications</i>. Universität Paderborn, 2011.","ieee":"S. Arifulina, <i>Coverage Criteria for Testing DMM Specifications</i>. Universität Paderborn, 2011.","mla":"Arifulina, Svetlana. <i>Coverage Criteria for Testing DMM Specifications</i>. Universität Paderborn, 2011.","apa":"Arifulina, S. (2011). <i>Coverage Criteria for Testing DMM Specifications</i>. Universität Paderborn."},"department":[{"_id":"66"}],"type":"mastersthesis","date_created":"2017-10-17T12:43:00Z","date_updated":"2022-01-06T07:03:13Z","author":[{"full_name":"Arifulina, Svetlana","first_name":"Svetlana","last_name":"Arifulina"}],"title":"Coverage Criteria for Testing DMM Specifications","year":"2011","status":"public","user_id":"477","_id":"661","publisher":"Universität Paderborn","language":[{"iso":"eng"}]},{"date_updated":"2022-01-06T07:03:14Z","author":[{"full_name":"Drzevitzky, Stephanie","first_name":"Stephanie","last_name":"Drzevitzky"},{"full_name":"Platzner, Marco","last_name":"Platzner","first_name":"Marco","id":"398"}],"title":"Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach","year":"2011","doi":"10.1109/ReCoSoC.2011.5981499","language":[{"iso":"eng"}],"abstract":[{"text":"Reconfigurable systems on chip are increasingly deployed in security and safety critical contexts. When downloading and configuring new hardware functions, we want to make sure that modules adhere to certain security specifications and do not, for example, contain hardware Trojans. As a possible approach to achieving hardware security we propose and demonstrate the concept of proof-carrying hardware, a concept inspired by previous work on proof-carrying code techniques in the software domain. In this paper, we discuss the hardware trust and threat models behind proof-carrying hardware and then present our experimental setup. We detail the employed open-source tool chain for the runtime verification of combinational equivalence and our bitstream format for an abstract FPGA architecture that allows us to experimentally validate the feasibility of our approach.","lang":"eng"}],"publication":"Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)","department":[{"_id":"78"}],"type":"conference","date_created":"2017-10-17T12:43:01Z","file":[{"creator":"florida","date_created":"2018-03-14T13:40:48Z","date_updated":"2018-03-14T13:40:48Z","relation":"main_file","access_level":"closed","file_size":666039,"file_name":"666-drzevitzky11_recosoc.pdf","success":1,"content_type":"application/pdf","file_id":"1214"}],"has_accepted_license":"1","status":"public","ddc":["040"],"user_id":"477","_id":"666","page":"58-65","project":[{"name":"SFB 901","_id":"1"},{"_id":"12","name":"SFB 901 - Subprojekt B4"},{"name":"SFB 901 - Project Area B","_id":"3"}],"citation":{"mla":"Drzevitzky, Stephanie, and Marco Platzner. “Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach.” <i>Proceedings of the 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)</i>, 2011, pp. 58–65, doi:<a href=\"https://doi.org/10.1109/ReCoSoC.2011.5981499\">10.1109/ReCoSoC.2011.5981499</a>.","ama":"Drzevitzky S, Platzner M. Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach. In: <i>Proceedings of the 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)</i>. ; 2011:58-65. doi:<a href=\"https://doi.org/10.1109/ReCoSoC.2011.5981499\">10.1109/ReCoSoC.2011.5981499</a>","bibtex":"@inproceedings{Drzevitzky_Platzner_2011, title={Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach}, DOI={<a href=\"https://doi.org/10.1109/ReCoSoC.2011.5981499\">10.1109/ReCoSoC.2011.5981499</a>}, booktitle={Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)}, author={Drzevitzky, Stephanie and Platzner, Marco}, year={2011}, pages={58–65} }","apa":"Drzevitzky, S., &#38; Platzner, M. (2011). Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach. In <i>Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)</i> (pp. 58–65). <a href=\"https://doi.org/10.1109/ReCoSoC.2011.5981499\">https://doi.org/10.1109/ReCoSoC.2011.5981499</a>","ieee":"S. Drzevitzky and M. Platzner, “Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach,” in <i>Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)</i>, 2011, pp. 58–65.","chicago":"Drzevitzky, Stephanie, and Marco Platzner. “Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach.” In <i>Proceedings of the 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)</i>, 58–65, 2011. <a href=\"https://doi.org/10.1109/ReCoSoC.2011.5981499\">https://doi.org/10.1109/ReCoSoC.2011.5981499</a>.","short":"S. Drzevitzky, M. Platzner, in: Proceedings of the 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), 2011, pp. 58–65."},"file_date_updated":"2018-03-14T13:40:48Z"}]