[{"quality_controlled":"1","year":"2016","date_created":"2017-10-17T12:41:24Z","publisher":"EDA Consortium / IEEE","title":"Performance-centric scheduling with task migration for a heterogeneous compute node in the data center","publication":"Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE)","file":[{"relation":"main_file","success":1,"content_type":"application/pdf","file_id":"1541","access_level":"closed","file_name":"168-07459438.pdf","file_size":261356,"creator":"florida","date_created":"2018-03-21T12:41:55Z","date_updated":"2018-03-21T12:41:55Z"}],"abstract":[{"lang":"eng","text":"The use of heterogeneous computing resources, such as Graphic Processing Units or other specialized coprocessors, has become widespread in recent years because of their per- formance and energy efficiency advantages. Approaches for managing and scheduling tasks to heterogeneous resources are still subject to research. Although queuing systems have recently been extended to support accelerator resources, a general solution that manages heterogeneous resources at the operating system- level to exploit a global view of the system state is still missing.In this paper we present a user space scheduler that enables task scheduling and migration on heterogeneous processing resources in Linux. Using run queues for available resources we perform scheduling decisions based on the system state and on task characterization from earlier measurements. With a pro- gramming pattern that supports the integration of checkpoints into applications, we preempt tasks and migrate them between three very different compute resources. Considering static and dynamic workload scenarios, we show that this approach can gain up to 17% performance, on average 7%, by effectively avoiding idle resources. We demonstrate that a work-conserving strategy without migration is no suitable alternative."}],"language":[{"iso":"eng"}],"ddc":["040"],"has_accepted_license":"1","citation":{"bibtex":"@inproceedings{Lösch_Beisel_Kenter_Plessl_Platzner_2016, title={Performance-centric scheduling with task migration for a heterogeneous compute node in the data center}, booktitle={Proceedings of the 2016 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE)}, publisher={EDA Consortium / IEEE}, author={Lösch, Achim and Beisel, Tobias and Kenter, Tobias and Plessl, Christian and Platzner, Marco}, year={2016}, pages={912–917} }","short":"A. Lösch, T. Beisel, T. Kenter, C. Plessl, M. Platzner, in: Proceedings of the 2016 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–917.","mla":"Lösch, Achim, et al. “Performance-Centric Scheduling with Task Migration for a Heterogeneous Compute Node in the Data Center.” <i>Proceedings of the 2016 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE)</i>, EDA Consortium / IEEE, 2016, pp. 912–17.","apa":"Lösch, A., Beisel, T., Kenter, T., Plessl, C., &#38; Platzner, M. (2016). Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. <i>Proceedings of the 2016 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE)</i>, 912–917.","ama":"Lösch A, Beisel T, Kenter T, Plessl C, Platzner M. Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. In: <i>Proceedings of the 2016 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE)</i>. EDA Consortium / IEEE; 2016:912-917.","chicago":"Lösch, Achim, Tobias Beisel, Tobias Kenter, Christian Plessl, and Marco Platzner. “Performance-Centric Scheduling with Task Migration for a Heterogeneous Compute Node in the Data Center.” In <i>Proceedings of the 2016 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE)</i>, 912–17. EDA Consortium / IEEE, 2016.","ieee":"A. Lösch, T. Beisel, T. Kenter, C. Plessl, and M. Platzner, “Performance-centric scheduling with task migration for a heterogeneous compute node in the data center,” in <i>Proceedings of the 2016 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE)</i>, 2016, pp. 912–917."},"page":"912-917","author":[{"first_name":"Achim","full_name":"Lösch, Achim","id":"43646","last_name":"Lösch"},{"first_name":"Tobias","last_name":"Beisel","full_name":"Beisel, Tobias"},{"id":"3145","full_name":"Kenter, Tobias","last_name":"Kenter","first_name":"Tobias"},{"id":"16153","full_name":"Plessl, Christian","last_name":"Plessl","orcid":"0000-0001-5728-9982","first_name":"Christian"},{"first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco","id":"398"}],"date_updated":"2023-09-26T13:27:00Z","type":"conference","status":"public","user_id":"15278","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"project":[{"_id":"1","name":"SFB 901","grant_number":"160364472"},{"grant_number":"160364472","name":"SFB 901 - Subprojekt C2","_id":"14"},{"_id":"4","name":"SFB 901 - Project Area C"},{"_id":"30","name":"Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models","grant_number":"01|H11004A"}],"_id":"168","file_date_updated":"2018-03-21T12:41:55Z"},{"title":"Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing","date_created":"2019-07-10T09:36:58Z","supervisor":[{"first_name":"Christian","full_name":"Plessl, Christian","id":"16153","orcid":"0000-0001-5728-9982","last_name":"Plessl"}],"author":[{"first_name":"Tobias","full_name":"Beisel, Tobias","last_name":"Beisel"}],"publisher":"Logos Verlag Berlin GmbH","date_updated":"2022-01-06T06:50:48Z","page":"183","citation":{"apa":"Beisel, T. (2015). <i>Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing</i>. Berlin: Logos Verlag Berlin GmbH.","mla":"Beisel, Tobias. <i>Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing</i>. Logos Verlag Berlin GmbH, 2015.","short":"T. Beisel, Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing, Logos Verlag Berlin GmbH, Berlin, 2015.","bibtex":"@book{Beisel_2015, place={Berlin}, title={Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing}, publisher={Logos Verlag Berlin GmbH}, author={Beisel, Tobias}, year={2015} }","chicago":"Beisel, Tobias. <i>Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing</i>. Berlin: Logos Verlag Berlin GmbH, 2015.","ieee":"T. Beisel, <i>Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing</i>. Berlin: Logos Verlag Berlin GmbH, 2015.","ama":"Beisel T. <i>Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing</i>. Berlin: Logos Verlag Berlin GmbH; 2015."},"place":"Berlin","year":"2015","publication_identifier":{"isbn":["978-3-8325-4155-2"]},"language":[{"iso":"eng"}],"department":[{"_id":"78"},{"_id":"27"},{"_id":"518"}],"user_id":"3118","_id":"10624","project":[{"grant_number":"01|H11004","_id":"30","name":"Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models"}],"status":"public","abstract":[{"lang":"eng","text":"The use of heterogeneous computing resources, such as graphics processing units or other specialized co-processors, has become widespread in recent years because of their performance and energy efficiency advantages. Operating system approaches that are limited to optimizing CPU usage are no longer sufficient for the efficient utilization of systems that comprise diverse resource types.\r\n\r\nEnabling task preemption on these architectures and migration of tasks between different resource types at run-time is not only key to improving the performance and energy consumption but also to enabling automatic scheduling methods for heterogeneous compute nodes.\r\n\r\nThis thesis proposes novel techniques for run-time management of heterogeneous resources and enabling tasks to migrate between diverse hardware. It provides fundamental work towards future operating systems by discussing implications, limitations, and chances of the heterogeneity and introducing solutions for energy- and performance-efficient run-time systems. Scheduling methods to utilize heterogeneous systems by the use of a centralized scheduler are presented that show benefits over existing approaches in varying case studies."}],"type":"dissertation"},{"quality_controlled":"1","publication_identifier":{"isbn":["978-0-7695-4979-8"]},"year":"2013","place":"Washington, DC, USA","page":"64-73","citation":{"bibtex":"@inproceedings{Suess_Schoenrock_Meisner_Plessl_2013, place={Washington, DC, USA}, title={Parallel Macro Pipelining on the Intel SCC Many-Core Computer}, DOI={<a href=\"https://doi.org/10.1109/IPDPSW.2013.136\">10.1109/IPDPSW.2013.136</a>}, booktitle={Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)}, publisher={IEEE Computer Society}, author={Suess, Tim and Schoenrock, Andrew and Meisner, Sebastian and Plessl, Christian}, year={2013}, pages={64–73} }","short":"T. Suess, A. Schoenrock, S. Meisner, C. Plessl, in: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE Computer Society, Washington, DC, USA, 2013, pp. 64–73.","mla":"Suess, Tim, et al. “Parallel Macro Pipelining on the Intel SCC Many-Core Computer.” <i>Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)</i>, IEEE Computer Society, 2013, pp. 64–73, doi:<a href=\"https://doi.org/10.1109/IPDPSW.2013.136\">10.1109/IPDPSW.2013.136</a>.","apa":"Suess, T., Schoenrock, A., Meisner, S., &#38; Plessl, C. (2013). Parallel Macro Pipelining on the Intel SCC Many-Core Computer. <i>Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)</i>, 64–73. <a href=\"https://doi.org/10.1109/IPDPSW.2013.136\">https://doi.org/10.1109/IPDPSW.2013.136</a>","ama":"Suess T, Schoenrock A, Meisner S, Plessl C. Parallel Macro Pipelining on the Intel SCC Many-Core Computer. In: <i>Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)</i>. IEEE Computer Society; 2013:64-73. doi:<a href=\"https://doi.org/10.1109/IPDPSW.2013.136\">10.1109/IPDPSW.2013.136</a>","chicago":"Suess, Tim, Andrew Schoenrock, Sebastian Meisner, and Christian Plessl. “Parallel Macro Pipelining on the Intel SCC Many-Core Computer.” In <i>Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)</i>, 64–73. Washington, DC, USA: IEEE Computer Society, 2013. <a href=\"https://doi.org/10.1109/IPDPSW.2013.136\">https://doi.org/10.1109/IPDPSW.2013.136</a>.","ieee":"T. Suess, A. Schoenrock, S. Meisner, and C. Plessl, “Parallel Macro Pipelining on the Intel SCC Many-Core Computer,” in <i>Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)</i>, 2013, pp. 64–73, doi: <a href=\"https://doi.org/10.1109/IPDPSW.2013.136\">10.1109/IPDPSW.2013.136</a>."},"publisher":"IEEE Computer Society","date_updated":"2023-09-26T13:38:05Z","date_created":"2018-03-26T14:51:05Z","author":[{"first_name":"Tim","last_name":"Suess","full_name":"Suess, Tim"},{"first_name":"Andrew","last_name":"Schoenrock","full_name":"Schoenrock, Andrew"},{"first_name":"Sebastian","full_name":"Meisner, Sebastian","last_name":"Meisner"},{"first_name":"Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","full_name":"Plessl, Christian","id":"16153"}],"title":"Parallel Macro Pipelining on the Intel SCC Many-Core Computer","doi":"10.1109/IPDPSW.2013.136","publication":"Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)","type":"conference","status":"public","_id":"1787","project":[{"grant_number":"01|H11004A","_id":"30","name":"Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models"}],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"},{"_id":"63"}],"user_id":"15278","language":[{"iso":"eng"}]},{"publication":"Proc. Workshop on Computer Architecture and Operating System Co-design (CAOS)","type":"conference","status":"public","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"user_id":"15278","_id":"2180","project":[{"name":"Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models","_id":"30","grant_number":"01|H11004A"}],"language":[{"iso":"eng"}],"keyword":["funding-enhance"],"quality_controlled":"1","citation":{"chicago":"Beisel, Tobias, Tobias Wiersema, Christian Plessl, and André Brinkmann. “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux.” In <i>Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS)</i>, 2012.","ieee":"T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux,” 2012.","ama":"Beisel T, Wiersema T, Plessl C, Brinkmann A. Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. In: <i>Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS)</i>. ; 2012.","short":"T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.","bibtex":"@inproceedings{Beisel_Wiersema_Plessl_Brinkmann_2012, title={Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux}, booktitle={Proc. Workshop on Computer Architecture and Operating System Co-design (CAOS)}, author={Beisel, Tobias and Wiersema, Tobias and Plessl, Christian and Brinkmann, André}, year={2012} }","mla":"Beisel, Tobias, et al. “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux.” <i>Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS)</i>, 2012.","apa":"Beisel, T., Wiersema, T., Plessl, C., &#38; Brinkmann, A. (2012). Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. <i>Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS)</i>."},"year":"2012","date_created":"2018-04-03T09:18:33Z","author":[{"first_name":"Tobias","full_name":"Beisel, Tobias","last_name":"Beisel"},{"full_name":"Wiersema, Tobias","id":"3118","last_name":"Wiersema","first_name":"Tobias"},{"first_name":"Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","id":"16153","full_name":"Plessl, Christian"},{"first_name":"André","full_name":"Brinkmann, André","last_name":"Brinkmann"}],"date_updated":"2023-09-26T13:40:17Z","title":"Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux"},{"status":"public","type":"conference","publication":"Symp. on Application Accelerators in High Performance Computing (SAAHPC)","language":[{"iso":"eng"}],"keyword":["tet_topic_hpc"],"user_id":"15278","department":[{"_id":"27"},{"_id":"518"},{"_id":"15"},{"_id":"78"}],"project":[{"grant_number":"01|H11004A","_id":"30","name":"Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models"}],"_id":"2194","citation":{"short":"B. Meyer, C. Plessl, J. Förstner, in: Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63.","mla":"Meyer, Björn, et al. “Transformation of Scientific Algorithms to Parallel Computing Code: Subdomain Support in a MPI-Multi-GPU Backend.” <i>Symp. on Application Accelerators in High Performance Computing (SAAHPC)</i>, IEEE Computer Society, 2011, pp. 60–63, doi:<a href=\"https://doi.org/10.1109/SAAHPC.2011.12\">10.1109/SAAHPC.2011.12</a>.","bibtex":"@inproceedings{Meyer_Plessl_Förstner_2011, title={Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend}, DOI={<a href=\"https://doi.org/10.1109/SAAHPC.2011.12\">10.1109/SAAHPC.2011.12</a>}, booktitle={Symp. on Application Accelerators in High Performance Computing (SAAHPC)}, publisher={IEEE Computer Society}, author={Meyer, Björn and Plessl, Christian and Förstner, Jens}, year={2011}, pages={60–63} }","apa":"Meyer, B., Plessl, C., &#38; Förstner, J. (2011). Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. <i>Symp. on Application Accelerators in High Performance Computing (SAAHPC)</i>, 60–63. <a href=\"https://doi.org/10.1109/SAAHPC.2011.12\">https://doi.org/10.1109/SAAHPC.2011.12</a>","ama":"Meyer B, Plessl C, Förstner J. Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. In: <i>Symp. on Application Accelerators in High Performance Computing (SAAHPC)</i>. IEEE Computer Society; 2011:60-63. doi:<a href=\"https://doi.org/10.1109/SAAHPC.2011.12\">10.1109/SAAHPC.2011.12</a>","ieee":"B. Meyer, C. Plessl, and J. Förstner, “Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend,” in <i>Symp. on Application Accelerators in High Performance Computing (SAAHPC)</i>, 2011, pp. 60–63, doi: <a href=\"https://doi.org/10.1109/SAAHPC.2011.12\">10.1109/SAAHPC.2011.12</a>.","chicago":"Meyer, Björn, Christian Plessl, and Jens Förstner. “Transformation of Scientific Algorithms to Parallel Computing Code: Subdomain Support in a MPI-Multi-GPU Backend.” In <i>Symp. on Application Accelerators in High Performance Computing (SAAHPC)</i>, 60–63. IEEE Computer Society, 2011. <a href=\"https://doi.org/10.1109/SAAHPC.2011.12\">https://doi.org/10.1109/SAAHPC.2011.12</a>."},"page":"60-63","year":"2011","quality_controlled":"1","doi":"10.1109/SAAHPC.2011.12","title":"Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend","date_created":"2018-04-03T14:55:57Z","author":[{"last_name":"Meyer","full_name":"Meyer, Björn","first_name":"Björn"},{"first_name":"Christian","full_name":"Plessl, Christian","id":"16153","last_name":"Plessl","orcid":"0000-0001-5728-9982"},{"first_name":"Jens","full_name":"Förstner, Jens","id":"158","orcid":"0000-0001-7059-9862","last_name":"Förstner"}],"date_updated":"2023-09-26T13:44:11Z","publisher":"IEEE Computer Society"},{"status":"public","publication":"Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)","type":"conference","language":[{"iso":"eng"}],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"user_id":"15278","_id":"2193","project":[{"grant_number":"01|H11004A","name":"Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models","_id":"30"}],"page":"223-226","citation":{"ama":"Beisel T, Wiersema T, Plessl C, Brinkmann A. Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. In: <i>Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)</i>. IEEE Computer Society; 2011:223-226. doi:<a href=\"https://doi.org/10.1109/ASAP.2011.6043273\">10.1109/ASAP.2011.6043273</a>","chicago":"Beisel, Tobias, Tobias Wiersema, Christian Plessl, and André Brinkmann. “Cooperative Multitasking for Heterogeneous Accelerators in the Linux Completely Fair Scheduler.” In <i>Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)</i>, 223–26. IEEE Computer Society, 2011. <a href=\"https://doi.org/10.1109/ASAP.2011.6043273\">https://doi.org/10.1109/ASAP.2011.6043273</a>.","ieee":"T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler,” in <i>Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)</i>, 2011, pp. 223–226, doi: <a href=\"https://doi.org/10.1109/ASAP.2011.6043273\">10.1109/ASAP.2011.6043273</a>.","short":"T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011, pp. 223–226.","bibtex":"@inproceedings{Beisel_Wiersema_Plessl_Brinkmann_2011, title={Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler}, DOI={<a href=\"https://doi.org/10.1109/ASAP.2011.6043273\">10.1109/ASAP.2011.6043273</a>}, booktitle={Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)}, publisher={IEEE Computer Society}, author={Beisel, Tobias and Wiersema, Tobias and Plessl, Christian and Brinkmann, André}, year={2011}, pages={223–226} }","mla":"Beisel, Tobias, et al. “Cooperative Multitasking for Heterogeneous Accelerators in the Linux Completely Fair Scheduler.” <i>Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)</i>, IEEE Computer Society, 2011, pp. 223–26, doi:<a href=\"https://doi.org/10.1109/ASAP.2011.6043273\">10.1109/ASAP.2011.6043273</a>.","apa":"Beisel, T., Wiersema, T., Plessl, C., &#38; Brinkmann, A. (2011). Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. <i>Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)</i>, 223–226. <a href=\"https://doi.org/10.1109/ASAP.2011.6043273\">https://doi.org/10.1109/ASAP.2011.6043273</a>"},"year":"2011","quality_controlled":"1","doi":"10.1109/ASAP.2011.6043273","title":"Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler","author":[{"first_name":"Tobias","full_name":"Beisel, Tobias","last_name":"Beisel"},{"first_name":"Tobias","last_name":"Wiersema","id":"3118","full_name":"Wiersema, Tobias"},{"first_name":"Christian","full_name":"Plessl, Christian","id":"16153","orcid":"0000-0001-5728-9982","last_name":"Plessl"},{"first_name":"André","full_name":"Brinkmann, André","last_name":"Brinkmann"}],"date_created":"2018-04-03T14:37:14Z","date_updated":"2023-09-26T13:43:48Z","publisher":"IEEE Computer Society"}]