@misc{607, author = {{Haarhoff, Thomas}}, publisher = {{Universität Paderborn}}, title = {{{Identitätsbasierte Kryptographie - Implementierung von Paarungen für Körper der Charakteristik 2}}}, year = {{2012}}, } @misc{611, author = {{Hangmann, Hendrik}}, publisher = {{Universität Paderborn}}, title = {{{Generating Adjustable Temperature Gradients on modern FPGAs}}}, year = {{2012}}, } @misc{613, author = {{Wohlfarth, Stefan}}, publisher = {{Universität Paderborn}}, title = {{{Erweiterung von d3fact um die Domäne Wasserversorgung in Verbindung mit der Analyse und Implementierung eines hydraulischen Simulationsverfahrens}}}, year = {{2012}}, } @misc{620, author = {{Mittendorf, Robert}}, publisher = {{Universität Paderborn}}, title = {{{Datenschutzgerechtes DRM im Cloud Computing}}}, year = {{2012}}, } @misc{621, author = {{Sekula, Stephan}}, publisher = {{Universität Paderborn}}, title = {{{Datenschutzgerechte E-Payment-Schemata im On-The-Fly Computing}}}, year = {{2012}}, } @inproceedings{623, abstract = {{This paper initiates the formal study of a fundamental problem: How to efficiently allocate a shared communication medium among a set of K co-existing networks in the presence of arbitrary external interference? While most literature on medium access focuses on how to share a medium among nodes, these approaches are often either not directly applicable to co-existing networks as they would violate the independence requirement, or they yield a low throughput if applied to multiple networks. We present the randomized medium access (MAC) protocol COMAC which guarantees that a given communication channel is shared fairly among competing and independent networks, and that the available bandwidth is used efficiently. These performance guarantees hold in the presence of arbitrary external interference or even under adversarial jamming. Concretely, we show that the co-existing networks can use a Ω(ε2 min{ε, 1/poly(K)})-fraction of the non-jammed time steps for successful message transmissions, where ε is the (arbitrarily distributed) fraction of time which is not jammed.}}, author = {{Richa, Andrea W. and Scheideler, Christian and Schmid, Stefan and Zhang, Jin }}, booktitle = {{Proceedings of the 31st Annual ACM SIGACT-SIGOPS Symposium on Principles and Distributed Computing (PODC)}}, pages = {{291--300}}, title = {{{Competitive and fair throughput for co-existing networks under adversarial interference}}}, doi = {{10.1145/2332432.2332488}}, year = {{2012}}, } @misc{629, author = {{Schleiter, Patrick}}, publisher = {{Universität Paderborn}}, title = {{{Attribute-basierte Verschlüsselung}}}, year = {{2012}}, } @misc{633, author = {{Pischel, Daniel}}, publisher = {{Universität Paderborn}}, title = {{{Analyse, Konzeption und Implementierung von Aggregationsverfahren für Trinkwasserversorgungsnetze}}}, year = {{2012}}, } @misc{634, author = {{Kratzmann, Julian}}, publisher = {{Universität Paderborn}}, title = {{{Analyse und Simulation von energieeffizienten Online-Scheduling Algorithmen}}}, year = {{2012}}, } @inproceedings{635, abstract = {{In Germany, the optimization of water supply systems has gained more and more attention due to a growing cost pressure for German municipal utilities. In this work, a model is presented which optimizes the usage of water tanks. On the one hand locations of new tanks are identified, and on the other hand the size of existing tanks is optimized, subject to satisfying the demand of clients and providing the necessary amount of fire water during all time periods. The main difficulty is the consideration of the head loss equation which is required to model the hydraulic properties of a water supply system. As this equation is non-convex and quadratic the optimization model becomes a non-convex Mixed Integer Quadratically Constrained Program (MIQCP). To solve this MIQCP different solution methods are applied.}}, author = {{Dohle (married name: Hallmann) , Corinna and Suhl, Leena}}, booktitle = {{Proceedings of the International Conference on Applied Mathematical Optimization and Modelling (APMOD)}}, pages = {{404--408}}, title = {{{An Optimization Model for the optimal Usage of Water Tanks in Water Supply Systems}}}, year = {{2012}}, } @misc{566, author = {{Hilger, Ina}}, publisher = {{Universität Paderborn}}, title = {{{Untersuchung von Modellen zur operativen Planung in Trinkwasserversorgungsnetzwerken}}}, year = {{2012}}, } @misc{13462, author = {{Lewis, Peter and Platzner, Marco and Yao, Xin}}, publisher = {{Awareness Magazine}}, title = {{{An outlook for self-awareness in computing systems}}}, year = {{2012}}, } @inproceedings{615, abstract = {{Due to the continuously shrinking device structures and increasing densities of FPGAs, thermal aspects have become the new focus for many research projects over the last years. Most researchers rely on temperature simulations to evaluate their novel thermal management techniques. However, the accuracy of the simulations is to some extent questionable and they require a high computational effort if a detailed thermal model is used.For experimental evaluation of real-world temperature management methods, often synthetic heat sources are employed. Therefore, in this paper we investigated the question if we can create significant rises in temperature on modern FPGAs to enable future evaluation of thermal management techniques based on experiments in contrast to simulations. Therefore, we have developed eight different heat-generating cores that use different subsets of the FPGA resources. Our experimental results show that, according to the built-in thermal diode of our Xilinx Virtex-5 FPGA, we can increase the chip temperature by 134 degree C in less than 12 minutes by only utilizing about 21% of the slices.}}, author = {{Happe, Markus and Hangmann, Hendrik and Agne, Andreas and Plessl, Christian}}, booktitle = {{Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig)}}, pages = {{1--8}}, publisher = {{IEEE}}, title = {{{Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators}}}, doi = {{10.1109/ReConFig.2012.6416745}}, year = {{2012}}, } @inproceedings{591, abstract = {{One major obstacle for a wide spread FPGA usage in general-purpose computing is the development tool flow that requires much higher effort than for pure software solutions. Convey Computer promises a solution to this problem for their HC-1 platform, where the FPGAs are configured to run as a vector processor and the software source code can be annotated with pragmas that guide an automated vectorization process. We investigate this approach for a stereo matching algorithm that has abundant parallelism and a number of different computational patterns. We note that for this case study the automated vectorization in its current state doesn’t hold its productivity promise. However, we also show that using the Vector Personality can yield a significant speedups compared to CPU implementations in two of three investigated phases of the algorithm. Those speedups don’t match custom FPGA implementations, but can come with much reduced development effort.}}, author = {{Kenter, Tobias and Plessl, Christian and Schmitz, Henning}}, booktitle = {{Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)}}, pages = {{1--8}}, publisher = {{IEEE}}, title = {{{Pragma based parallelization - Trading hardware efficiency for ease of use?}}}, doi = {{10.1109/ReConFig.2012.6416773}}, year = {{2012}}, } @inproceedings{609, abstract = {{Today's design and operation principles and methods do not scale well with future reconfigurable computing systems due to an increased complexity in system architectures and applications, run-time dynamics and corresponding requirements. Hence, novel design and operation principles and methods are needed that possibly break drastically with the static ones we have built into our systems and the fixed abstraction layers we have cherished over the last decades. Thus, we propose a HW/SW platform that collects and maintains information about its state and progress which enables the system to reason about its behavior (self-awareness) and utilizes its knowledge to effectively and autonomously adapt its behavior to changing requirements (self-expression).To enable self-awareness, our compute nodes collect information using a variety of sensors, i.e. performance counters and thermal diodes, and use internal self-awareness models that process these information. For self-awareness, on-line learning is crucial such that the node learns and continuously updates its models at run-time to react to changing conditions. To enable self-expression, we break with the classic design-time abstraction layers of hardware, operating system and software. In contrast, our system is able to vertically migrate functionalities between the layers at run-time to exploit trade-offs between abstraction and optimization.This paper presents a heterogeneous multi-core architecture, that enables self-awareness and self-expression, an operating system for our proposed hardware/software platform and a novel self-expression method.}}, author = {{Happe, Markus and Agne, Andreas and Plessl, Christian and Platzner, Marco}}, booktitle = {{Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS)}}, pages = {{8--9}}, title = {{{Hardware/Software Platform for Self-aware Compute Nodes}}}, year = {{2012}}, } @inproceedings{567, abstract = {{Heterogeneous machines are gaining momentum in the High Performance Computing field, due to the theoretical speedups and power consumption. In practice, while some applications meet the performance expectations, heterogeneous architectures still require a tremendous effort from the application developers. This work presents a code generation method to port codes into heterogeneous platforms, based on transformations of the control flow into function calls. The results show that the cost of the function-call mechanism is affordable for the tested HPC kernels. The complete toolchain, based on the LLVM compiler infrastructure, is fully automated once the sequential specification is provided.}}, author = {{Barrio, Pablo and Carreras, Carlos and Sierra, Roberto and Kenter, Tobias and Plessl, Christian}}, booktitle = {{Proceedings of the International Conference on High Performance Computing and Simulation (HPCS)}}, pages = {{559--565}}, publisher = {{IEEE}}, title = {{{Turning control flow graphs into function calls: Code generation for heterogeneous architectures}}}, doi = {{10.1109/HPCSim.2012.6266973}}, year = {{2012}}, } @inproceedings{612, abstract = {{While numerous publications have presented ring oscillator designs for temperature measurements a detailed study of the ring oscillator's design space is still missing. In this work, we introduce metrics for comparing the performance and area efficiency of ring oscillators and a methodology for determining these metrics. As a result, we present a systematic study of the design space for ring oscillators for a Xilinx Virtex-5 platform FPGA.}}, author = {{Rüthing, Christoph and Happe, Markus and Agne, Andreas and Plessl, Christian}}, booktitle = {{Proceedings of the International Conference on Field Programmable Logic and Applications (FPL)}}, pages = {{559--562}}, publisher = {{IEEE}}, title = {{{Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs}}}, doi = {{10.1109/FPL.2012.6339370}}, year = {{2012}}, } @misc{643, author = {{Welp, Daniel}}, publisher = {{Universität Paderborn}}, title = {{{User-space Scheduling for Heterogeneous System under Linux}}}, year = {{2011}}, } @inproceedings{645, abstract = {{In the standard consensus problem there are n processes with possibly di®erent input values and the goal is to eventually reach a point at which all processes commit to exactly one of these values. We are studying a slight variant of the consensus problem called the stabilizing consensus problem [2]. In this problem, we do not require that each process commits to a ¯nal value at some point, but that eventually they arrive at a common, stable value without necessarily being aware of that. This should work irrespective of the states in which the processes are starting. Our main result is a simple randomized algorithm called median rule that, with high probability, just needs O(logmlog log n + log n) time and work per process to arrive at an almost stable consensus for any set of m legal values as long as an adversary can corrupt the states of at most p n processes at any time. Without adversarial involvement, just O(log n) time and work is needed for a stable consensus, with high probability. As a by-product, we obtain a simple distributed algorithm for approximating the median of n numbers in time O(logmlog log n + log n) under adversarial presence.}}, author = {{Doerr, Benjamin and Goldberg, Leslie Ann and Minder, Lorenz and Sauerwald, Thomas and Scheideler, Christian}}, booktitle = {{Proceedings of the 23rd ACM Symposium on Parallelism in Algorithms and Architectures (SPAA)}}, pages = {{149--158}}, title = {{{Stabilizing consensus with the power of two choices}}}, doi = {{10.1145/1989493.1989516}}, year = {{2011}}, } @inproceedings{646, abstract = {{This paper presents a dynamic overlay network based on the De Bruijn graph which we call Linearized De Bruijn (LDB) network. The LDB network has the advantage that it has a guaranteed constant node degree and that the routing between any two nodes takes at most O(log n) hops with high probability. Also, we show that there is a simple local-control algorithm that can recover the LDB network from any network topology that is weakly connected.}}, author = {{Richa, Andrea W. and Scheideler, Christian}}, booktitle = {{Proceedings of the 13th International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS)}}, pages = {{416--430}}, title = {{{Self-Stabilizing DeBruijn Networks}}}, doi = {{10.1007/978-3-642-24550-3_31}}, year = {{2011}}, }