@inproceedings{30908,
  author       = {{Ghasemzadeh Mohammadi, Hassan and Jentzsch, Felix and Kuschel, Maurice and Arshad, Rahil  and Rautmare, Sneha and Manjunatha, Suraj and Platzner, Marco and Boschmann, Alexander and Schollbach, Dirk }},
  booktitle    = {{ Machine Learning and Principles and Practice of Knowledge Discovery in Databases}},
  publisher    = {{Springer}},
  title        = {{{FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics}}},
  doi          = {{https://doi.org/10.1007/978-3-030-93736-2_27}},
  year         = {{2021}},
}

@article{31132,
  author       = {{Dann, Andreas Peter and Plate, Henrik and Hermann, Ben and Ponta, Serena Elisa and Bodden, Eric}},
  issn         = {{0098-5589}},
  journal      = {{IEEE Transactions on Software Engineering}},
  keywords     = {{Software}},
  pages        = {{1--1}},
  publisher    = {{Institute of Electrical and Electronics Engineers (IEEE)}},
  title        = {{{Identifying Challenges for OSS Vulnerability Scanners - A Study & Test Suite}}},
  doi          = {{10.1109/tse.2021.3101739}},
  year         = {{2021}},
}

@misc{20820,
  author       = {{Thiele, Simon}},
  title        = {{{Implementing Machine Learning Functions as PYNQ FPGA Overlays}}},
  year         = {{2020}},
}

@misc{20821,
  author       = {{Jaganath, Vivek}},
  title        = {{{Extension and Evaluation of Python-based High-Level Synthesis Tool Flows}}},
  year         = {{2020}},
}

@inproceedings{16487,
  author       = {{Bobolz, Jan and Eidens, Fabian and Krenn, Stephan and Slamanig, Daniel and Striecks, Christoph}},
  booktitle    = {{Proceedings of the 15th ACM Asia Conference on Computer and Communications Security (ASIA CCS ’20),}},
  location     = {{Taiwan}},
  publisher    = {{ACM}},
  title        = {{{Privacy-Preserving Incentive Systems with Highly Efficient Point-Collection}}},
  doi          = {{10.1145/3320269.3384769}},
  year         = {{2020}},
}

@article{13770,
  author       = {{Karl, Holger and Kundisch, Dennis and Meyer auf der Heide, Friedhelm and Wehrheim, Heike}},
  journal      = {{Business & Information Systems Engineering}},
  number       = {{6}},
  pages        = {{467--481}},
  publisher    = {{Springer}},
  title        = {{{A Case for a New IT Ecosystem: On-The-Fly Computing}}},
  doi          = {{10.1007/s12599-019-00627-x}},
  volume       = {{62}},
  year         = {{2020}},
}

@inproceedings{20808,
  author       = {{Ghasemzadeh Mohammadi, Hassan and Arshad, Rahil and Rautmare, Sneha and Manjunatha, Suraj and Kuschel, Maurice and Jentzsch, Felix Paul and Platzner, Marco and Boschmann, Alexander and Schollbach, Dirk}},
  booktitle    = {{2020 25th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA)}},
  isbn         = {{9781728189567}},
  title        = {{{DeepWind: An Accurate Wind Turbine Condition Monitoring Framework via Deep Learning on Embedded Platforms}}},
  doi          = {{10.1109/etfa46521.2020.9211880}},
  year         = {{2020}},
}

@misc{21433,
  abstract     = {{Modern machine learning (ML) techniques continue to move into the embedded system space because traditional centralized compute resources do not suit certain application domains, for example in mobile or real-time environments. Google’s TensorFlow Lite (TFLite) framework supports this shift from cloud to edge computing and makes ML inference accessible on resource-constrained devices. While it offers the possibility to partially delegate computation to hardware accelerators, there is no such “delegate” available to utilize the promising characteristics of reconfigurable hardware.
This thesis incorporates modern platform FPGAs into TFLite by implementing a modular delegate framework, which allows accelerators within the programmable logic to take over the execution of neural network layers. To facilitate the necessary hardware/software codesign, the FPGA delegate is based on the operating system for reconfigurable
computing (ReconOS), whose partial reconfiguration support enables the instantiation of model-tailored accelerator architectures. In the hardware back-end, a streaming-based prototype accelerator for the MobileNet model family showcases the working order of the platform, but falls short of the desired performance. Thus, it indicates the need for further exploration of alternative accelerator designs, which the delegate could automatically synthesize to meet a model’s demands.}},
  author       = {{Jentzsch, Felix P.}},
  title        = {{{Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture}}},
  year         = {{2020}},
}

@misc{15874,
  author       = {{Lienen, Christian}},
  publisher    = {{Universität Paderborn}},
  title        = {{{Implementing a Real-time System on a Platform FPGA operated with ReconOS}}},
  year         = {{2019}},
}