[{"type":"conference","year":"2012","citation":{"mla":"Congiu, Giuseppe, et al. “One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services.” Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS), IEEE, 2012, pp. 16–24, doi:10.1109/ClusterW.2012.16.","bibtex":"@inproceedings{Congiu_Grawinkel_Narasimhamurthy_Brinkmann_2012, title={One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services}, DOI={10.1109/ClusterW.2012.16}, booktitle={Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS)}, publisher={IEEE}, author={Congiu, Giuseppe and Grawinkel, Matthias and Narasimhamurthy, Sai and Brinkmann, André}, year={2012}, pages={16–24} }","chicago":"Congiu, Giuseppe, Matthias Grawinkel, Sai Narasimhamurthy, and André Brinkmann. “One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services.” In Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS), 16–24. IEEE, 2012. https://doi.org/10.1109/ClusterW.2012.16.","ama":"Congiu G, Grawinkel M, Narasimhamurthy S, Brinkmann A. One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services. In: Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS). IEEE; 2012:16-24. doi:10.1109/ClusterW.2012.16","apa":"Congiu, G., Grawinkel, M., Narasimhamurthy, S., & Brinkmann, A. (2012). One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services. In Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS) (pp. 16–24). IEEE. https://doi.org/10.1109/ClusterW.2012.16","ieee":"G. Congiu, M. Grawinkel, S. Narasimhamurthy, and A. Brinkmann, “One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services,” in Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS), 2012, pp. 16–24.","short":"G. Congiu, M. Grawinkel, S. Narasimhamurthy, A. Brinkmann, in: Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS), IEEE, 2012, pp. 16–24."},"page":"16-24","_id":"2105","date_updated":"2022-01-06T06:54:42Z","doi":"10.1109/ClusterW.2012.16","author":[{"last_name":"Congiu","first_name":"Giuseppe","full_name":"Congiu, Giuseppe"},{"last_name":"Grawinkel","full_name":"Grawinkel, Matthias","first_name":"Matthias"},{"first_name":"Sai","full_name":"Narasimhamurthy, Sai","last_name":"Narasimhamurthy"},{"last_name":"Brinkmann","full_name":"Brinkmann, André","first_name":"André"}],"publisher":"IEEE","department":[{"_id":"27"}],"publication":"Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS)","status":"public","date_created":"2018-03-29T15:02:15Z","title":"One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services","user_id":"24135"},{"date_updated":"2023-09-26T13:41:08Z","doi":"10.1109/ReConFig.2012.6416773","language":[{"iso":"eng"}],"title":"Pragma based parallelization - Trading hardware efficiency for ease of use?","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"project":[{"_id":"1","name":"SFB 901","grant_number":"160364472"},{"_id":"14","grant_number":"160364472","name":"SFB 901 - Subprojekt C2"},{"name":"SFB 901 - Project Area C","_id":"4"},{"grant_number":"257906","name":"Engineering Proprioception in Computing Systems","_id":"31"}],"_id":"591","type":"conference","year":"2012","citation":{"mla":"Kenter, Tobias, et al. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416773.","bibtex":"@inproceedings{Kenter_Plessl_Schmitz_2012, title={Pragma based parallelization - Trading hardware efficiency for ease of use?}, DOI={10.1109/ReConFig.2012.6416773}, booktitle={Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Kenter, Tobias and Plessl, Christian and Schmitz, Henning}, year={2012}, pages={1–8} }","apa":"Kenter, T., Plessl, C., & Schmitz, H. (2012). Pragma based parallelization - Trading hardware efficiency for ease of use? Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2012.6416773","ama":"Kenter T, Plessl C, Schmitz H. Pragma based parallelization - Trading hardware efficiency for ease of use? In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8. doi:10.1109/ReConFig.2012.6416773","chicago":"Kenter, Tobias, Christian Plessl, and Henning Schmitz. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?” In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2012. https://doi.org/10.1109/ReConFig.2012.6416773.","ieee":"T. Kenter, C. Plessl, and H. Schmitz, “Pragma based parallelization - Trading hardware efficiency for ease of use?,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416773.","short":"T. Kenter, C. Plessl, H. Schmitz, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8."},"page":"1-8","abstract":[{"text":"One major obstacle for a wide spread FPGA usage in general-purpose computing is the development tool flow that requires much higher effort than for pure software solutions. Convey Computer promises a solution to this problem for their HC-1 platform, where the FPGAs are configured to run as a vector processor and the software source code can be annotated with pragmas that guide an automated vectorization process. We investigate this approach for a stereo matching algorithm that has abundant parallelism and a number of different computational patterns. We note that for this case study the automated vectorization in its current state doesn’t hold its productivity promise. However, we also show that using the Vector Personality can yield a significant speedups compared to CPU implementations in two of three investigated phases of the algorithm. Those speedups don’t match custom FPGA implementations, but can come with much reduced development effort.","lang":"eng"}],"ddc":["040"],"user_id":"15278","quality_controlled":"1","publisher":"IEEE","author":[{"id":"3145","last_name":"Kenter","full_name":"Kenter, Tobias","first_name":"Tobias"},{"full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian","id":"16153","last_name":"Plessl"},{"full_name":"Schmitz, Henning","first_name":"Henning","last_name":"Schmitz"}],"file_date_updated":"2018-03-15T08:33:18Z","publication":"Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)","file":[{"date_updated":"2018-03-15T08:33:18Z","content_type":"application/pdf","success":1,"relation":"main_file","file_size":371235,"file_id":"1257","creator":"florida","access_level":"closed","date_created":"2018-03-15T08:33:18Z","file_name":"591-ReConFig2012Kenter_Schmitz_Plessl.pdf"}],"status":"public","has_accepted_license":"1","date_created":"2017-10-17T12:42:47Z"},{"title":"Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux","user_id":"15278","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"keyword":["funding-enhance"],"publication":"Proc. Workshop on Computer Architecture and Operating System Co-design (CAOS)","author":[{"last_name":"Beisel","full_name":"Beisel, Tobias","first_name":"Tobias"},{"full_name":"Wiersema, Tobias","first_name":"Tobias","id":"3118","last_name":"Wiersema"},{"last_name":"Plessl","id":"16153","first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian"},{"full_name":"Brinkmann, André","first_name":"André","last_name":"Brinkmann"}],"quality_controlled":"1","project":[{"grant_number":"01|H11004A","name":"Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models","_id":"30"}],"date_created":"2018-04-03T09:18:33Z","status":"public","date_updated":"2023-09-26T13:40:17Z","_id":"2180","type":"conference","year":"2012","citation":{"ieee":"T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux,” 2012.","short":"T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.","bibtex":"@inproceedings{Beisel_Wiersema_Plessl_Brinkmann_2012, title={Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux}, booktitle={Proc. Workshop on Computer Architecture and Operating System Co-design (CAOS)}, author={Beisel, Tobias and Wiersema, Tobias and Plessl, Christian and Brinkmann, André}, year={2012} }","mla":"Beisel, Tobias, et al. “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux.” Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.","ama":"Beisel T, Wiersema T, Plessl C, Brinkmann A. Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. In: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS). ; 2012.","apa":"Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2012). Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS).","chicago":"Beisel, Tobias, Tobias Wiersema, Christian Plessl, and André Brinkmann. “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux.” In Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012."},"language":[{"iso":"eng"}]},{"year":"2012","citation":{"chicago":"Gesing, Sandra, Sonja Herres-Pawlis, Georg Birkenheuer, André Brinkmann, Richard Grunzke, Peter Kacsuk, Oliver Kohlbacher, et al. “The MoSGrid Community From National to International Scale.” In Proc. EGI Community Forum, 2012.","ama":"Gesing S, Herres-Pawlis S, Birkenheuer G, et al. The MoSGrid Community From National to International Scale. In: Proc. EGI Community Forum. ; 2012.","apa":"Gesing, S., Herres-Pawlis, S., Birkenheuer, G., Brinkmann, A., Grunzke, R., Kacsuk, P., … Steinke, T. (2012). The MoSGrid Community From National to International Scale. In Proc. EGI Community Forum.","mla":"Gesing, Sandra, et al. “The MoSGrid Community From National to International Scale.” Proc. EGI Community Forum, 2012.","bibtex":"@inproceedings{Gesing_Herres-Pawlis_Birkenheuer_Brinkmann_Grunzke_Kacsuk_Kohlbacher_Kozlovszky_Krüger_Müller-Pfefferkorn_et al._2012, title={The MoSGrid Community From National to International Scale}, booktitle={Proc. EGI Community Forum}, author={Gesing, Sandra and Herres-Pawlis, Sonja and Birkenheuer, Georg and Brinkmann, André and Grunzke, Richard and Kacsuk, Peter and Kohlbacher, Oliver and Kozlovszky, Miklos and Krüger, Jens and Müller-Pfefferkorn, Ralph and et al.}, year={2012} }","short":"S. Gesing, S. Herres-Pawlis, G. Birkenheuer, A. Brinkmann, R. Grunzke, P. Kacsuk, O. Kohlbacher, M. Kozlovszky, J. Krüger, R. Müller-Pfefferkorn, P. Schäfer, T. Steinke, in: Proc. EGI Community Forum, 2012.","ieee":"S. Gesing et al., “The MoSGrid Community From National to International Scale,” in Proc. EGI Community Forum, 2012."},"type":"conference","date_updated":"2022-01-06T06:55:11Z","_id":"2171","publication":"Proc. EGI Community Forum","department":[{"_id":"27"}],"author":[{"last_name":"Gesing","first_name":"Sandra","full_name":"Gesing, Sandra"},{"first_name":"Sonja","full_name":"Herres-Pawlis, Sonja","last_name":"Herres-Pawlis"},{"last_name":"Birkenheuer","first_name":"Georg","full_name":"Birkenheuer, Georg"},{"last_name":"Brinkmann","first_name":"André","full_name":"Brinkmann, André"},{"last_name":"Grunzke","full_name":"Grunzke, Richard","first_name":"Richard"},{"last_name":"Kacsuk","first_name":"Peter","full_name":"Kacsuk, Peter"},{"last_name":"Kohlbacher","first_name":"Oliver","full_name":"Kohlbacher, Oliver"},{"full_name":"Kozlovszky, Miklos","first_name":"Miklos","last_name":"Kozlovszky"},{"last_name":"Krüger","first_name":"Jens","full_name":"Krüger, Jens"},{"full_name":"Müller-Pfefferkorn, Ralph","first_name":"Ralph","last_name":"Müller-Pfefferkorn"},{"full_name":"Schäfer, Patrick","first_name":"Patrick","last_name":"Schäfer"},{"last_name":"Steinke","full_name":"Steinke, Thomas","first_name":"Thomas"}],"date_created":"2018-04-03T09:01:19Z","status":"public","user_id":"24135","title":"The MoSGrid Community From National to International Scale"},{"publication":"Proc. Parallel Data Storage Workshop (PDSW)","department":[{"_id":"27"}],"publisher":"IEEE","author":[{"last_name":"Grawinkel","first_name":"Matthias","full_name":"Grawinkel, Matthias"},{"last_name":"Süß","first_name":"Tim","full_name":"Süß, Tim"},{"last_name":"Best","first_name":"Georg","full_name":"Best, Georg"},{"last_name":"Popov","full_name":"Popov, Ivan","first_name":"Ivan"},{"last_name":"Brinkmann","first_name":"André","full_name":"Brinkmann, André"}],"date_created":"2018-03-29T14:44:24Z","status":"public","user_id":"24135","title":"Towards Dynamic Scripted pNFS Layouts","page":"13-17","type":"conference","citation":{"short":"M. Grawinkel, T. Süß, G. Best, I. Popov, A. Brinkmann, in: Proc. Parallel Data Storage Workshop (PDSW), IEEE, 2012, pp. 13–17.","ieee":"M. Grawinkel, T. Süß, G. Best, I. Popov, and A. Brinkmann, “Towards Dynamic Scripted pNFS Layouts,” in Proc. Parallel Data Storage Workshop (PDSW), 2012, pp. 13–17.","ama":"Grawinkel M, Süß T, Best G, Popov I, Brinkmann A. Towards Dynamic Scripted pNFS Layouts. In: Proc. Parallel Data Storage Workshop (PDSW). IEEE; 2012:13-17. doi:10.1109/SC.Companion.2012.13","apa":"Grawinkel, M., Süß, T., Best, G., Popov, I., & Brinkmann, A. (2012). Towards Dynamic Scripted pNFS Layouts. In Proc. Parallel Data Storage Workshop (PDSW) (pp. 13–17). IEEE. https://doi.org/10.1109/SC.Companion.2012.13","chicago":"Grawinkel, Matthias, Tim Süß, Georg Best, Ivan Popov, and André Brinkmann. “Towards Dynamic Scripted PNFS Layouts.” In Proc. Parallel Data Storage Workshop (PDSW), 13–17. IEEE, 2012. https://doi.org/10.1109/SC.Companion.2012.13.","bibtex":"@inproceedings{Grawinkel_Süß_Best_Popov_Brinkmann_2012, title={Towards Dynamic Scripted pNFS Layouts}, DOI={10.1109/SC.Companion.2012.13}, booktitle={Proc. Parallel Data Storage Workshop (PDSW)}, publisher={IEEE}, author={Grawinkel, Matthias and Süß, Tim and Best, Georg and Popov, Ivan and Brinkmann, André}, year={2012}, pages={13–17} }","mla":"Grawinkel, Matthias, et al. “Towards Dynamic Scripted PNFS Layouts.” Proc. Parallel Data Storage Workshop (PDSW), IEEE, 2012, pp. 13–17, doi:10.1109/SC.Companion.2012.13."},"year":"2012","_id":"2101","date_updated":"2022-01-06T06:54:42Z","doi":"10.1109/SC.Companion.2012.13"},{"status":"public","has_accepted_license":"1","date_created":"2017-10-17T12:42:42Z","file":[{"content_type":"application/pdf","date_updated":"2018-03-15T10:20:24Z","relation":"main_file","success":1,"file_size":288508,"file_id":"1275","creator":"florida","access_level":"closed","date_created":"2018-03-15T10:20:24Z","file_name":"567-ba-ca-12a.pdf"}],"publisher":"IEEE","author":[{"last_name":"Barrio","full_name":"Barrio, Pablo","first_name":"Pablo"},{"full_name":"Carreras, Carlos","first_name":"Carlos","last_name":"Carreras"},{"last_name":"Sierra","full_name":"Sierra, Roberto","first_name":"Roberto"},{"first_name":"Tobias","full_name":"Kenter, Tobias","last_name":"Kenter","id":"3145"},{"orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","first_name":"Christian","id":"16153","last_name":"Plessl"}],"quality_controlled":"1","file_date_updated":"2018-03-15T10:20:24Z","publication":"Proceedings of the International Conference on High Performance Computing and Simulation (HPCS)","user_id":"15278","ddc":["040"],"abstract":[{"text":"Heterogeneous machines are gaining momentum in the High Performance Computing field, due to the theoretical speedups and power consumption. In practice, while some applications meet the performance expectations, heterogeneous architectures still require a tremendous effort from the application developers. This work presents a code generation method to port codes into heterogeneous platforms, based on transformations of the control flow into function calls. The results show that the cost of the function-call mechanism is affordable for the tested HPC kernels. The complete toolchain, based on the LLVM compiler infrastructure, is fully automated once the sequential specification is provided.","lang":"eng"}],"year":"2012","type":"conference","citation":{"short":"P. Barrio, C. Carreras, R. Sierra, T. Kenter, C. Plessl, in: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–565.","ieee":"P. Barrio, C. Carreras, R. Sierra, T. Kenter, and C. Plessl, “Turning control flow graphs into function calls: Code generation for heterogeneous architectures,” in Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 2012, pp. 559–565, doi: 10.1109/HPCSim.2012.6266973.","apa":"Barrio, P., Carreras, C., Sierra, R., Kenter, T., & Plessl, C. (2012). Turning control flow graphs into function calls: Code generation for heterogeneous architectures. Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 559–565. https://doi.org/10.1109/HPCSim.2012.6266973","ama":"Barrio P, Carreras C, Sierra R, Kenter T, Plessl C. Turning control flow graphs into function calls: Code generation for heterogeneous architectures. In: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS). IEEE; 2012:559-565. doi:10.1109/HPCSim.2012.6266973","chicago":"Barrio, Pablo, Carlos Carreras, Roberto Sierra, Tobias Kenter, and Christian Plessl. “Turning Control Flow Graphs into Function Calls: Code Generation for Heterogeneous Architectures.” In Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 559–65. IEEE, 2012. https://doi.org/10.1109/HPCSim.2012.6266973.","mla":"Barrio, Pablo, et al. “Turning Control Flow Graphs into Function Calls: Code Generation for Heterogeneous Architectures.” Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–65, doi:10.1109/HPCSim.2012.6266973.","bibtex":"@inproceedings{Barrio_Carreras_Sierra_Kenter_Plessl_2012, title={Turning control flow graphs into function calls: Code generation for heterogeneous architectures}, DOI={10.1109/HPCSim.2012.6266973}, booktitle={Proceedings of the International Conference on High Performance Computing and Simulation (HPCS)}, publisher={IEEE}, author={Barrio, Pablo and Carreras, Carlos and Sierra, Roberto and Kenter, Tobias and Plessl, Christian}, year={2012}, pages={559–565} }"},"page":"559-565","_id":"567","project":[{"grant_number":"160364472","name":"SFB 901","_id":"1"},{"_id":"14","name":"SFB 901 - Subprojekt C2","grant_number":"160364472"},{"name":"SFB 901 - Project Area C","_id":"4"}],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"title":"Turning control flow graphs into function calls: Code generation for heterogeneous architectures","language":[{"iso":"eng"}],"doi":"10.1109/HPCSim.2012.6266973","date_updated":"2023-09-26T13:42:54Z"},{"page":"94-95","year":"2011","citation":{"ieee":"S. Gesing et al., “A Science Gateway for Molecular Simulations,” in Proc. EGI User Forum, 2011, pp. 94–95.","short":"S. Gesing, P. Kacsuk, M. Kozlovszky, G. Birkenheuer, D. Blunk, S. Breuers, A. Brinkmann, G. Fels, R. Grunzke, S. Herres-Pawlis, J. Krüger, L. Packschies, R. Müller-Pfefferkorn, P. Schäfer, T. Steinke, A. Szikszay Fabri, K.-D. Warzecha, M. Wewior, O. Kohlbacher, in: Proc. EGI User Forum, 2011, pp. 94–95.","bibtex":"@inproceedings{Gesing_Kacsuk_Kozlovszky_Birkenheuer_Blunk_Breuers_Brinkmann_Fels_Grunzke_Herres-Pawlis_et al._2011, title={A Science Gateway for Molecular Simulations}, booktitle={Proc. EGI User Forum}, author={Gesing, Sandra and Kacsuk, Peter and Kozlovszky, Miklos and Birkenheuer, Georg and Blunk, Dirk and Breuers, Sebastian and Brinkmann, André and Fels, Gregor and Grunzke, Richard and Herres-Pawlis, Sonja and et al.}, year={2011}, pages={94–95} }","mla":"Gesing, Sandra, et al. “A Science Gateway for Molecular Simulations.” Proc. EGI User Forum, 2011, pp. 94–95.","ama":"Gesing S, Kacsuk P, Kozlovszky M, et al. A Science Gateway for Molecular Simulations. In: Proc. EGI User Forum. ; 2011:94-95.","apa":"Gesing, S., Kacsuk, P., Kozlovszky, M., Birkenheuer, G., Blunk, D., Breuers, S., … Kohlbacher, O. (2011). A Science Gateway for Molecular Simulations. In Proc. EGI User Forum (pp. 94–95).","chicago":"Gesing, Sandra, Peter Kacsuk, Miklos Kozlovszky, Georg Birkenheuer, Dirk Blunk, Sebastian Breuers, André Brinkmann, et al. “A Science Gateway for Molecular Simulations.” In Proc. EGI User Forum, 94–95, 2011."},"type":"conference","date_updated":"2022-01-06T06:55:22Z","_id":"2199","publication":"Proc. EGI User Forum","department":[{"_id":"27"}],"author":[{"full_name":"Gesing, Sandra","first_name":"Sandra","last_name":"Gesing"},{"last_name":"Kacsuk","first_name":"Peter","full_name":"Kacsuk, Peter"},{"last_name":"Kozlovszky","full_name":"Kozlovszky, Miklos","first_name":"Miklos"},{"last_name":"Birkenheuer","first_name":"Georg","full_name":"Birkenheuer, Georg"},{"first_name":"Dirk","full_name":"Blunk, Dirk","last_name":"Blunk"},{"last_name":"Breuers","first_name":"Sebastian","full_name":"Breuers, Sebastian"},{"first_name":"André","full_name":"Brinkmann, André","last_name":"Brinkmann"},{"first_name":"Gregor","full_name":"Fels, Gregor","last_name":"Fels"},{"last_name":"Grunzke","full_name":"Grunzke, Richard","first_name":"Richard"},{"last_name":"Herres-Pawlis","full_name":"Herres-Pawlis, Sonja","first_name":"Sonja"},{"full_name":"Krüger, Jens","first_name":"Jens","last_name":"Krüger"},{"full_name":"Packschies, Lars","first_name":"Lars","last_name":"Packschies"},{"first_name":"Ralph","full_name":"Müller-Pfefferkorn, Ralph","last_name":"Müller-Pfefferkorn"},{"last_name":"Schäfer","full_name":"Schäfer, Patrick","first_name":"Patrick"},{"last_name":"Steinke","first_name":"Thomas","full_name":"Steinke, Thomas"},{"full_name":"Szikszay Fabri, Anna","first_name":"Anna","last_name":"Szikszay Fabri"},{"first_name":"Klaus-Dieter","full_name":"Warzecha, Klaus-Dieter","last_name":"Warzecha"},{"last_name":"Wewior","first_name":"Martin","full_name":"Wewior, Martin"},{"full_name":"Kohlbacher, Oliver","first_name":"Oliver","last_name":"Kohlbacher"}],"date_created":"2018-04-03T15:07:11Z","status":"public","title":"A Science Gateway for Molecular Simulations","user_id":"24135"},{"title":"An Energy-Aware SaaS Stack","user_id":"15274","abstract":[{"lang":"eng","text":"We present a multi-agent system on top of the IaaS layer consisting of a scheduler agent and multiple worker agents. Each job is controlled by an autonomous worker agent, which is equipped with application specific knowledge (e.g., performance functions) allowing it to estimate the type and number of necessary resources. During runtime, the worker agent monitors the job and adapts its resources to ensure the specified quality of service - even in noisy clouds where the job instances are influenced by other jobs. All worker agents interact with the scheduler agent, which takes care of limited resources and does a cost-aware scheduling by assigning jobs to times with low energy costs. The whole architecture is self-optimizing and able to use public or private clouds."}],"publication_status":"published","date_created":"2018-03-29T11:23:22Z","status":"public","department":[{"_id":"27"}],"publication":"Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS)","author":[{"last_name":"Niehörster","first_name":"Oliver","full_name":"Niehörster, Oliver"},{"id":"15274","last_name":"Keller","full_name":"Keller, Axel","first_name":"Axel"},{"last_name":"Brinkmann","full_name":"Brinkmann, André","first_name":"André"}],"doi":"10.1109/MASCOTS.2011.52","date_updated":"2022-01-06T06:54:10Z","_id":"1972","year":"2011","citation":{"ieee":"O. Niehörster, A. Keller, and A. Brinkmann, “An Energy-Aware SaaS Stack,” in Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011.","short":"O. Niehörster, A. Keller, A. Brinkmann, in: Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011.","mla":"Niehörster, Oliver, et al. “An Energy-Aware SaaS Stack.” Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011, doi:10.1109/MASCOTS.2011.52.","bibtex":"@inproceedings{Niehörster_Keller_Brinkmann_2011, title={An Energy-Aware SaaS Stack}, DOI={10.1109/MASCOTS.2011.52}, booktitle={Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS)}, author={Niehörster, Oliver and Keller, Axel and Brinkmann, André}, year={2011} }","ama":"Niehörster O, Keller A, Brinkmann A. An Energy-Aware SaaS Stack. In: Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS). ; 2011. doi:10.1109/MASCOTS.2011.52","apa":"Niehörster, O., Keller, A., & Brinkmann, A. (2011). An Energy-Aware SaaS Stack. In Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS). https://doi.org/10.1109/MASCOTS.2011.52","chicago":"Niehörster, Oliver, Axel Keller, and André Brinkmann. “An Energy-Aware SaaS Stack.” In Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011. https://doi.org/10.1109/MASCOTS.2011.52."},"type":"conference","language":[{"iso":"eng"}]},{"page":"138-145","year":"2011","type":"conference","citation":{"mla":"Niehörster, Oliver, and André Brinkmann. “Autonomic Resource Management Handling Delayed Configuration Effects.” Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), IEEE Computer Society, 2011, pp. 138–45, doi:10.1109/CloudCom.2011.28.","bibtex":"@inproceedings{Niehörster_Brinkmann_2011, place={Washington DC, USA}, title={Autonomic Resource Management Handling Delayed Configuration Effects}, DOI={10.1109/CloudCom.2011.28}, booktitle={Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom)}, publisher={IEEE Computer Society}, author={Niehörster, Oliver and Brinkmann, André}, year={2011}, pages={138–145} }","ama":"Niehörster O, Brinkmann A. Autonomic Resource Management Handling Delayed Configuration Effects. In: Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom). Washington DC, USA: IEEE Computer Society; 2011:138-145. doi:10.1109/CloudCom.2011.28","apa":"Niehörster, O., & Brinkmann, A. (2011). Autonomic Resource Management Handling Delayed Configuration Effects. In Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom) (pp. 138–145). Washington DC, USA: IEEE Computer Society. https://doi.org/10.1109/CloudCom.2011.28","chicago":"Niehörster, Oliver, and André Brinkmann. “Autonomic Resource Management Handling Delayed Configuration Effects.” In Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), 138–45. Washington DC, USA: IEEE Computer Society, 2011. https://doi.org/10.1109/CloudCom.2011.28.","ieee":"O. Niehörster and A. Brinkmann, “Autonomic Resource Management Handling Delayed Configuration Effects,” in Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), 2011, pp. 138–145.","short":"O. Niehörster, A. Brinkmann, in: Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), IEEE Computer Society, Washington DC, USA, 2011, pp. 138–145."},"_id":"2190","date_updated":"2022-01-06T06:55:19Z","doi":"10.1109/CloudCom.2011.28","department":[{"_id":"27"}],"publication":"Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom)","publisher":"IEEE Computer Society","author":[{"full_name":"Niehörster, Oliver","first_name":"Oliver","last_name":"Niehörster"},{"last_name":"Brinkmann","full_name":"Brinkmann, André","first_name":"André"}],"date_created":"2018-04-03T14:33:50Z","status":"public","place":"Washington DC, USA","title":"Autonomic Resource Management Handling Delayed Configuration Effects","user_id":"24135"},{"page":"157-164","citation":{"chicago":"Niehörster, Oliver, Jens Simon, André Brinkmann, and Alexaner Krieger. “Autonomic Resource Management with Support Vector Machines.” In Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID), 157–64. Washington, DC, USA: IEEE Computer Society, 2011. https://doi.org/10.1109/Grid.2011.28.","ama":"Niehörster O, Simon J, Brinkmann A, Krieger A. Autonomic Resource Management with Support Vector Machines. In: Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID). Washington, DC, USA: IEEE Computer Society; 2011:157-164. doi:10.1109/Grid.2011.28","apa":"Niehörster, O., Simon, J., Brinkmann, A., & Krieger, A. (2011). Autonomic Resource Management with Support Vector Machines. In Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID) (pp. 157–164). Washington, DC, USA: IEEE Computer Society. https://doi.org/10.1109/Grid.2011.28","bibtex":"@inproceedings{Niehörster_Simon_Brinkmann_Krieger_2011, place={Washington, DC, USA}, title={Autonomic Resource Management with Support Vector Machines}, DOI={10.1109/Grid.2011.28}, booktitle={Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID)}, publisher={IEEE Computer Society}, author={Niehörster, Oliver and Simon, Jens and Brinkmann, André and Krieger, Alexaner}, year={2011}, pages={157–164} }","mla":"Niehörster, Oliver, et al. “Autonomic Resource Management with Support Vector Machines.” Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID), IEEE Computer Society, 2011, pp. 157–64, doi:10.1109/Grid.2011.28.","short":"O. Niehörster, J. Simon, A. Brinkmann, A. Krieger, in: Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID), IEEE Computer Society, Washington, DC, USA, 2011, pp. 157–164.","ieee":"O. Niehörster, J. Simon, A. Brinkmann, and A. Krieger, “Autonomic Resource Management with Support Vector Machines,” in Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID), 2011, pp. 157–164."},"year":"2011","type":"conference","doi":"10.1109/Grid.2011.28","_id":"2203","date_updated":"2022-01-06T06:55:23Z","date_created":"2018-04-03T15:13:42Z","status":"public","publication_identifier":{"isbn":["978-0-7695-4572-1"]},"department":[{"_id":"27"}],"publication":"Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID)","author":[{"last_name":"Niehörster","first_name":"Oliver","full_name":"Niehörster, Oliver"},{"last_name":"Simon","id":"15273","first_name":"Jens","full_name":"Simon, Jens"},{"last_name":"Brinkmann","full_name":"Brinkmann, André","first_name":"André"},{"first_name":"Alexaner","full_name":"Krieger, Alexaner","last_name":"Krieger"}],"publisher":"IEEE Computer Society","user_id":"24135","title":"Autonomic Resource Management with Support Vector Machines","place":"Washington, DC, USA"},{"user_id":"15278","title":"Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler","publication":"Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"publisher":"IEEE Computer Society","quality_controlled":"1","author":[{"last_name":"Beisel","full_name":"Beisel, Tobias","first_name":"Tobias"},{"last_name":"Wiersema","id":"3118","first_name":"Tobias","full_name":"Wiersema, Tobias"},{"full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian","id":"16153","last_name":"Plessl"},{"first_name":"André","full_name":"Brinkmann, André","last_name":"Brinkmann"}],"project":[{"name":"Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models","grant_number":"01|H11004A","_id":"30"}],"date_created":"2018-04-03T14:37:14Z","status":"public","date_updated":"2023-09-26T13:43:48Z","_id":"2193","doi":"10.1109/ASAP.2011.6043273","language":[{"iso":"eng"}],"page":"223-226","type":"conference","year":"2011","citation":{"ieee":"T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2011, pp. 223–226, doi: 10.1109/ASAP.2011.6043273.","short":"T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011, pp. 223–226.","bibtex":"@inproceedings{Beisel_Wiersema_Plessl_Brinkmann_2011, title={Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler}, DOI={10.1109/ASAP.2011.6043273}, booktitle={Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)}, publisher={IEEE Computer Society}, author={Beisel, Tobias and Wiersema, Tobias and Plessl, Christian and Brinkmann, André}, year={2011}, pages={223–226} }","mla":"Beisel, Tobias, et al. “Cooperative Multitasking for Heterogeneous Accelerators in the Linux Completely Fair Scheduler.” Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011, pp. 223–26, doi:10.1109/ASAP.2011.6043273.","chicago":"Beisel, Tobias, Tobias Wiersema, Christian Plessl, and André Brinkmann. “Cooperative Multitasking for Heterogeneous Accelerators in the Linux Completely Fair Scheduler.” In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 223–26. IEEE Computer Society, 2011. https://doi.org/10.1109/ASAP.2011.6043273.","ama":"Beisel T, Wiersema T, Plessl C, Brinkmann A. Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society; 2011:223-226. doi:10.1109/ASAP.2011.6043273","apa":"Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2011). Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 223–226. https://doi.org/10.1109/ASAP.2011.6043273"}},{"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"publication":"Intel European Research and Innovation Conference","keyword":["funding-intel"],"author":[{"full_name":"Kenter, Tobias","first_name":"Tobias","id":"3145","last_name":"Kenter"},{"last_name":"Plessl","id":"16153","first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982"},{"last_name":"Platzner","id":"398","first_name":"Marco","full_name":"Platzner, Marco"},{"last_name":"Kauschke","full_name":"Kauschke, Michael","first_name":"Michael"}],"date_created":"2018-04-03T14:34:57Z","status":"public","user_id":"24135","title":"Estimation and Partitioning for CPU-Accelerator Architectures","year":"2011","citation":{"mla":"Kenter, Tobias, et al. “Estimation and Partitioning for CPU-Accelerator Architectures.” Intel European Research and Innovation Conference, 2011.","bibtex":"@inproceedings{Kenter_Plessl_Platzner_Kauschke_2011, title={Estimation and Partitioning for CPU-Accelerator Architectures}, booktitle={Intel European Research and Innovation Conference}, author={Kenter, Tobias and Plessl, Christian and Platzner, Marco and Kauschke, Michael}, year={2011} }","chicago":"Kenter, Tobias, Christian Plessl, Marco Platzner, and Michael Kauschke. “Estimation and Partitioning for CPU-Accelerator Architectures.” In Intel European Research and Innovation Conference, 2011.","apa":"Kenter, T., Plessl, C., Platzner, M., & Kauschke, M. (2011). Estimation and Partitioning for CPU-Accelerator Architectures. In Intel European Research and Innovation Conference.","ama":"Kenter T, Plessl C, Platzner M, Kauschke M. Estimation and Partitioning for CPU-Accelerator Architectures. In: Intel European Research and Innovation Conference. ; 2011.","ieee":"T. Kenter, C. Plessl, M. Platzner, and M. Kauschke, “Estimation and Partitioning for CPU-Accelerator Architectures,” in Intel European Research and Innovation Conference, 2011.","short":"T. Kenter, C. Plessl, M. Platzner, M. Kauschke, in: Intel European Research and Innovation Conference, 2011."},"type":"conference","_id":"2191","date_updated":"2022-01-06T06:55:19Z"},{"status":"public","date_created":"2018-04-03T15:01:31Z","author":[{"full_name":"Grawinkel, Matthias","first_name":"Matthias","last_name":"Grawinkel"},{"full_name":"Schäfer, Thorsten","first_name":"Thorsten","last_name":"Schäfer"},{"full_name":"Brinkmann, André","first_name":"André","last_name":"Brinkmann"},{"last_name":"Hagemeyer","full_name":"Hagemeyer, Jens","first_name":"Jens"},{"last_name":"Porrmann","full_name":"Porrmann, Mario","first_name":"Mario"}],"publisher":"IEEE Computer Society","publication":"Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS)","department":[{"_id":"27"}],"user_id":"24135","title":"Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability","citation":{"short":"M. Grawinkel, T. Schäfer, A. Brinkmann, J. Hagemeyer, M. Porrmann, in: Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), IEEE Computer Society, 2011, pp. 297–306.","ieee":"M. Grawinkel, T. Schäfer, A. Brinkmann, J. Hagemeyer, and M. Porrmann, “Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability,” in Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011, pp. 297–306.","chicago":"Grawinkel, Matthias, Thorsten Schäfer, André Brinkmann, Jens Hagemeyer, and Mario Porrmann. “Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability.” In Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 297–306. IEEE Computer Society, 2011. https://doi.org/10.1109/mascots.2011.13.","ama":"Grawinkel M, Schäfer T, Brinkmann A, Hagemeyer J, Porrmann M. Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability. In: Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS). IEEE Computer Society; 2011:297-306. doi:10.1109/mascots.2011.13","apa":"Grawinkel, M., Schäfer, T., Brinkmann, A., Hagemeyer, J., & Porrmann, M. (2011). Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability. In Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS) (pp. 297–306). IEEE Computer Society. https://doi.org/10.1109/mascots.2011.13","mla":"Grawinkel, Matthias, et al. “Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability.” Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), IEEE Computer Society, 2011, pp. 297–306, doi:10.1109/mascots.2011.13.","bibtex":"@inproceedings{Grawinkel_Schäfer_Brinkmann_Hagemeyer_Porrmann_2011, title={Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability}, DOI={10.1109/mascots.2011.13}, booktitle={Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS)}, publisher={IEEE Computer Society}, author={Grawinkel, Matthias and Schäfer, Thorsten and Brinkmann, André and Hagemeyer, Jens and Porrmann, Mario}, year={2011}, pages={297–306} }"},"type":"conference","year":"2011","page":"297-306","doi":"10.1109/mascots.2011.13","date_updated":"2022-01-06T06:55:21Z","_id":"2195"},{"_id":"2197","date_updated":"2022-01-06T06:55:21Z","year":"2011","citation":{"ieee":"S. Gesing et al., “Granular Security for a Science Gateway in Structural Bioinformatics,” in Proc. Int. Workshop on Scientific Gateways (IWSG), 2011.","short":"S. Gesing, R. Grunzke, Á. Balaskó, G. Birkenheuer, D. Blunk, S. Breuers, A. Brinkmann, G. Fels, S. Herres-Pawlis, P. Kacsuk, M. Kozlovszky, J. Krüger, L. Packschies, P. Schäfer, B. Schuller, J. Schuster, T. Steinke, A. Szikszay Fabri, M. Wewior, R. Müller-Pfefferkorn, O. Kohlbacher, in: Proc. Int. Workshop on Scientific Gateways (IWSG), Consorzio COMETA, 2011.","bibtex":"@inproceedings{Gesing_Grunzke_Balaskó_Birkenheuer_Blunk_Breuers_Brinkmann_Fels_Herres-Pawlis_Kacsuk_et al._2011, title={Granular Security for a Science Gateway in Structural Bioinformatics}, booktitle={Proc. Int. Workshop on Scientific Gateways (IWSG)}, publisher={Consorzio COMETA}, author={Gesing, Sandra and Grunzke, Richard and Balaskó, Ákos and Birkenheuer, Georg and Blunk, Dirk and Breuers, Sebastian and Brinkmann, André and Fels, Gregor and Herres-Pawlis, Sonja and Kacsuk, Peter and et al.}, year={2011} }","mla":"Gesing, Sandra, et al. “Granular Security for a Science Gateway in Structural Bioinformatics.” Proc. Int. Workshop on Scientific Gateways (IWSG), Consorzio COMETA, 2011.","apa":"Gesing, S., Grunzke, R., Balaskó, Á., Birkenheuer, G., Blunk, D., Breuers, S., … Kohlbacher, O. (2011). Granular Security for a Science Gateway in Structural Bioinformatics. In Proc. Int. Workshop on Scientific Gateways (IWSG). Consorzio COMETA.","ama":"Gesing S, Grunzke R, Balaskó Á, et al. Granular Security for a Science Gateway in Structural Bioinformatics. In: Proc. Int. Workshop on Scientific Gateways (IWSG). Consorzio COMETA; 2011.","chicago":"Gesing, Sandra, Richard Grunzke, Ákos Balaskó, Georg Birkenheuer, Dirk Blunk, Sebastian Breuers, André Brinkmann, et al. “Granular Security for a Science Gateway in Structural Bioinformatics.” In Proc. Int. Workshop on Scientific Gateways (IWSG). Consorzio COMETA, 2011."},"type":"conference","user_id":"24135","title":"Granular Security for a Science Gateway in Structural Bioinformatics","status":"public","date_created":"2018-04-03T15:04:04Z","publisher":"Consorzio COMETA","author":[{"last_name":"Gesing","first_name":"Sandra","full_name":"Gesing, Sandra"},{"last_name":"Grunzke","first_name":"Richard","full_name":"Grunzke, Richard"},{"first_name":"Ákos","full_name":"Balaskó, Ákos","last_name":"Balaskó"},{"last_name":"Birkenheuer","first_name":"Georg","full_name":"Birkenheuer, Georg"},{"last_name":"Blunk","first_name":"Dirk","full_name":"Blunk, Dirk"},{"last_name":"Breuers","first_name":"Sebastian","full_name":"Breuers, Sebastian"},{"first_name":"André","full_name":"Brinkmann, André","last_name":"Brinkmann"},{"first_name":"Gregor","full_name":"Fels, Gregor","last_name":"Fels"},{"last_name":"Herres-Pawlis","first_name":"Sonja","full_name":"Herres-Pawlis, Sonja"},{"full_name":"Kacsuk, Peter","first_name":"Peter","last_name":"Kacsuk"},{"full_name":"Kozlovszky, Miklos","first_name":"Miklos","last_name":"Kozlovszky"},{"last_name":"Krüger","full_name":"Krüger, Jens","first_name":"Jens"},{"last_name":"Packschies","first_name":"Lars","full_name":"Packschies, Lars"},{"first_name":"Patrick","full_name":"Schäfer, Patrick","last_name":"Schäfer"},{"last_name":"Schuller","first_name":"Bernd","full_name":"Schuller, Bernd"},{"last_name":"Schuster","full_name":"Schuster, Johannes","first_name":"Johannes"},{"last_name":"Steinke","full_name":"Steinke, Thomas","first_name":"Thomas"},{"last_name":"Szikszay Fabri","first_name":"Anna","full_name":"Szikszay Fabri, Anna"},{"first_name":"Martin","full_name":"Wewior, Martin","last_name":"Wewior"},{"full_name":"Müller-Pfefferkorn, Ralph","first_name":"Ralph","last_name":"Müller-Pfefferkorn"},{"first_name":"Oliver","full_name":"Kohlbacher, Oliver","last_name":"Kohlbacher"}],"department":[{"_id":"27"}],"publication":"Proc. Int. Workshop on Scientific Gateways (IWSG)"},{"page":"278-285","year":"2011","type":"conference","citation":{"apa":"Grad, M., & Plessl, C. (2011). Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture. Proc. Reconfigurable Architectures Workshop (RAW), 278–285. https://doi.org/10.1109/IPDPS.2011.153","ama":"Grad M, Plessl C. Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture. In: Proc. Reconfigurable Architectures Workshop (RAW). IEEE Computer Society; 2011:278-285. doi:10.1109/IPDPS.2011.153","chicago":"Grad, Mariusz, and Christian Plessl. “Just-in-Time Instruction Set Extension – Feasibility and Limitations for an FPGA-Based Reconfigurable ASIP Architecture.” In Proc. Reconfigurable Architectures Workshop (RAW), 278–85. IEEE Computer Society, 2011. https://doi.org/10.1109/IPDPS.2011.153.","mla":"Grad, Mariusz, and Christian Plessl. “Just-in-Time Instruction Set Extension – Feasibility and Limitations for an FPGA-Based Reconfigurable ASIP Architecture.” Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2011, pp. 278–85, doi:10.1109/IPDPS.2011.153.","bibtex":"@inproceedings{Grad_Plessl_2011, title={Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture}, DOI={10.1109/IPDPS.2011.153}, booktitle={Proc. Reconfigurable Architectures Workshop (RAW)}, publisher={IEEE Computer Society}, author={Grad, Mariusz and Plessl, Christian}, year={2011}, pages={278–285} }","short":"M. Grad, C. Plessl, in: Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2011, pp. 278–285.","ieee":"M. Grad and C. Plessl, “Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture,” in Proc. Reconfigurable Architectures Workshop (RAW), 2011, pp. 278–285, doi: 10.1109/IPDPS.2011.153."},"language":[{"iso":"eng"}],"date_updated":"2023-09-26T13:44:39Z","_id":"2198","doi":"10.1109/IPDPS.2011.153","publication":"Proc. Reconfigurable Architectures Workshop (RAW)","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"author":[{"first_name":"Mariusz","full_name":"Grad, Mariusz","last_name":"Grad"},{"last_name":"Plessl","id":"16153","first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982"}],"quality_controlled":"1","publisher":"IEEE Computer Society","date_created":"2018-04-03T15:05:52Z","status":"public","title":"Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture","user_id":"15278"},{"doi":"10.1109/ICPADS.2011.77","date_updated":"2022-01-06T06:55:18Z","_id":"2189","page":"380-387","citation":{"apa":"Grawinkel, M., Pargmann, M., Dömer, H., & Brinkmann, A. (2011). Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System. In Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS) (pp. 380–387). IEEE. https://doi.org/10.1109/ICPADS.2011.77","ama":"Grawinkel M, Pargmann M, Dömer H, Brinkmann A. Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System. In: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS). IEEE; 2011:380-387. doi:10.1109/ICPADS.2011.77","chicago":"Grawinkel, Matthias, Markus Pargmann, Hubert Dömer, and André Brinkmann. “Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System.” In Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), 380–87. IEEE, 2011. https://doi.org/10.1109/ICPADS.2011.77.","mla":"Grawinkel, Matthias, et al. “Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System.” Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), IEEE, 2011, pp. 380–87, doi:10.1109/ICPADS.2011.77.","bibtex":"@inproceedings{Grawinkel_Pargmann_Dömer_Brinkmann_2011, title={Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System}, DOI={10.1109/ICPADS.2011.77}, booktitle={Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS)}, publisher={IEEE}, author={Grawinkel, Matthias and Pargmann, Markus and Dömer, Hubert and Brinkmann, André}, year={2011}, pages={380–387} }","short":"M. Grawinkel, M. Pargmann, H. Dömer, A. Brinkmann, in: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), IEEE, 2011, pp. 380–387.","ieee":"M. Grawinkel, M. Pargmann, H. Dömer, and A. Brinkmann, “Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System,” in Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), 2011, pp. 380–387."},"type":"conference","year":"2011","user_id":"24135","title":"Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System","date_created":"2018-04-03T14:32:23Z","status":"public","publication":"Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS)","department":[{"_id":"27"}],"author":[{"first_name":"Matthias","full_name":"Grawinkel, Matthias","last_name":"Grawinkel"},{"full_name":"Pargmann, Markus","first_name":"Markus","last_name":"Pargmann"},{"last_name":"Dömer","full_name":"Dömer, Hubert","first_name":"Hubert"},{"full_name":"Brinkmann, André","first_name":"André","last_name":"Brinkmann"}],"publisher":"IEEE"},{"citation":{"bibtex":"@inproceedings{Happe_Agne_Plessl_2011, title={Measuring and Predicting Temperature Distributions on FPGAs at Run-Time}, DOI={10.1109/ReConFig.2011.59}, booktitle={Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Happe, Markus and Agne, Andreas and Plessl, Christian}, year={2011}, pages={55–60} }","mla":"Happe, Markus, et al. “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time.” Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2011, pp. 55–60, doi:10.1109/ReConFig.2011.59.","ama":"Happe M, Agne A, Plessl C. Measuring and Predicting Temperature Distributions on FPGAs at Run-Time. In: Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig). IEEE; 2011:55-60. doi:10.1109/ReConFig.2011.59","apa":"Happe, M., Agne, A., & Plessl, C. (2011). Measuring and Predicting Temperature Distributions on FPGAs at Run-Time. Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 55–60. https://doi.org/10.1109/ReConFig.2011.59","chicago":"Happe, Markus, Andreas Agne, and Christian Plessl. “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time.” In Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 55–60. IEEE, 2011. https://doi.org/10.1109/ReConFig.2011.59.","ieee":"M. Happe, A. Agne, and C. Plessl, “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time,” in Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2011, pp. 55–60, doi: 10.1109/ReConFig.2011.59.","short":"M. Happe, A. Agne, C. Plessl, in: Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2011, pp. 55–60."},"type":"conference","year":"2011","page":"55-60","_id":"656","file":[{"file_size":502244,"file_id":"1220","creator":"florida","date_updated":"2018-03-14T13:49:39Z","content_type":"application/pdf","relation":"main_file","success":1,"date_created":"2018-03-14T13:49:39Z","file_name":"656-2011_happe_reconfig.pdf","access_level":"closed"}],"quality_controlled":"1","publisher":"IEEE","author":[{"first_name":"Markus","full_name":"Happe, Markus","last_name":"Happe"},{"first_name":"Andreas","full_name":"Agne, Andreas","last_name":"Agne"},{"orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","first_name":"Christian","id":"16153","last_name":"Plessl"}],"publication":"Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","file_date_updated":"2018-03-14T13:49:39Z","has_accepted_license":"1","status":"public","date_created":"2017-10-17T12:42:59Z","abstract":[{"lang":"eng","text":"In the next decades, hybrid multi-cores will be the predominant architecture for reconfigurable FPGA-based systems. Temperature-aware thread mapping strategies are key for providing dependability in such systems. These strategies rely on measuring the temperature distribution and redicting the thermal behavior of the system when there are changes to the hardware and software running on the FPGA. While there are a number of tools that use thermal models to predict temperature distributions at design time, these tools lack the flexibility to autonomously adjust to changing FPGA configurations. To address this problem we propose a temperature-aware system that empowers FPGA-based reconfigurable multi-cores to autonomously predict the on-chip temperature distribution for pro-active thread remapping. Our system obtains temperature measurements through a self-calibrating grid of sensors and uses area constrained heat-generating circuits in order to generate spatial and temporal temperature gradients. The generated temperature variations are then used to learn the free parameters of the system's thermal model. The system thus acquires an understanding of its own thermal characteristics. We implemented an FPGA system containing a net of 144 temperature sensors on a Xilinx Virtex-6 LX240T FPGA that is aware of its thermal model. Finally, we show that the temperature predictions vary less than 0.72 degree C on average compared to the measured temperature distributions at run-time."}],"user_id":"15278","ddc":["040"],"language":[{"iso":"eng"}],"date_updated":"2023-09-26T13:46:08Z","doi":"10.1109/ReConFig.2011.59","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"project":[{"_id":"1","name":"SFB 901","grant_number":"160364472"},{"_id":"14","grant_number":"160364472","name":"SFB 901 - Subprojekt C2"},{"name":"SFB 901 - Project Area C","_id":"4"},{"_id":"31","name":"Engineering Proprioception in Computing Systems","grant_number":"257906"}],"title":"Measuring and Predicting Temperature Distributions on FPGAs at Run-Time"},{"status":"public","date_created":"2018-04-04T09:34:24Z","volume":829,"author":[{"first_name":"Georg","full_name":"Birkenheuer, Georg","last_name":"Birkenheuer"},{"last_name":"Blunk","first_name":"Dirk","full_name":"Blunk, Dirk"},{"full_name":"Breuers, Sebastian","first_name":"Sebastian","last_name":"Breuers"},{"last_name":"Brinkmann","first_name":"André","full_name":"Brinkmann, André"},{"first_name":"Gregor","full_name":"Fels, Gregor","last_name":"Fels"},{"first_name":"Sandra","full_name":"Gesing, Sandra","last_name":"Gesing"},{"last_name":"Grunzke","full_name":"Grunzke, Richard","first_name":"Richard"},{"first_name":"Sonja","full_name":"Herres-Pawlis, Sonja","last_name":"Herres-Pawlis"},{"first_name":"Oliver","full_name":"Kohlbacher, Oliver","last_name":"Kohlbacher"},{"first_name":"Jens","full_name":"Krüger, Jens","last_name":"Krüger"},{"first_name":"Ulrich","full_name":"Lang, Ulrich","last_name":"Lang"},{"full_name":"Packschies, Lars","first_name":"Lars","last_name":"Packschies"},{"last_name":"Müller-Pfefferkorn","full_name":"Müller-Pfefferkorn, Ralph","first_name":"Ralph"},{"last_name":"Schäfer","full_name":"Schäfer, Patrick","first_name":"Patrick"},{"last_name":"Schuster","first_name":"Johannes","full_name":"Schuster, Johannes"},{"full_name":"Steinke, Thomas","first_name":"Thomas","last_name":"Steinke"},{"last_name":"Warzecha","full_name":"Warzecha, Klaus-Dieter","first_name":"Klaus-Dieter"},{"last_name":"Wewior","first_name":"Martin","full_name":"Wewior, Martin"}],"publication":"Proc. of Grid Workflow Workshop (GWW)","department":[{"_id":"27"}],"user_id":"24135","title":"MoSGrid: Progress of Workflow driven Chemical Simulations","citation":{"apa":"Birkenheuer, G., Blunk, D., Breuers, S., Brinkmann, A., Fels, G., Gesing, S., … Wewior, M. (2011). MoSGrid: Progress of Workflow driven Chemical Simulations. In Proc. of Grid Workflow Workshop (GWW) (Vol. 829).","ama":"Birkenheuer G, Blunk D, Breuers S, et al. MoSGrid: Progress of Workflow driven Chemical Simulations. In: Proc. of Grid Workflow Workshop (GWW). Vol 829. CEUR Workshop Proceedings. ; 2011.","chicago":"Birkenheuer, Georg, Dirk Blunk, Sebastian Breuers, André Brinkmann, Gregor Fels, Sandra Gesing, Richard Grunzke, et al. “MoSGrid: Progress of Workflow Driven Chemical Simulations.” In Proc. of Grid Workflow Workshop (GWW), Vol. 829. CEUR Workshop Proceedings, 2011.","bibtex":"@inproceedings{Birkenheuer_Blunk_Breuers_Brinkmann_Fels_Gesing_Grunzke_Herres-Pawlis_Kohlbacher_Krüger_et al._2011, series={CEUR Workshop Proceedings}, title={MoSGrid: Progress of Workflow driven Chemical Simulations}, volume={829}, booktitle={Proc. of Grid Workflow Workshop (GWW)}, author={Birkenheuer, Georg and Blunk, Dirk and Breuers, Sebastian and Brinkmann, André and Fels, Gregor and Gesing, Sandra and Grunzke, Richard and Herres-Pawlis, Sonja and Kohlbacher, Oliver and Krüger, Jens and et al.}, year={2011}, collection={CEUR Workshop Proceedings} }","mla":"Birkenheuer, Georg, et al. “MoSGrid: Progress of Workflow Driven Chemical Simulations.” Proc. of Grid Workflow Workshop (GWW), vol. 829, 2011.","short":"G. Birkenheuer, D. Blunk, S. Breuers, A. Brinkmann, G. Fels, S. Gesing, R. Grunzke, S. Herres-Pawlis, O. Kohlbacher, J. Krüger, U. Lang, L. Packschies, R. Müller-Pfefferkorn, P. Schäfer, J. Schuster, T. Steinke, K.-D. Warzecha, M. Wewior, in: Proc. of Grid Workflow Workshop (GWW), 2011.","ieee":"G. Birkenheuer et al., “MoSGrid: Progress of Workflow driven Chemical Simulations,” in Proc. of Grid Workflow Workshop (GWW), 2011, vol. 829."},"type":"conference","year":"2011","series_title":"CEUR Workshop Proceedings","_id":"2205","intvolume":" 829","date_updated":"2022-01-06T06:55:23Z"},{"place":"Berlin / Heidelberg","user_id":"24135","title":"Parallel Monte-Carlo Tree Search for HPC Systems","publisher":"Springer","author":[{"full_name":"Graf, Tobias","first_name":"Tobias","last_name":"Graf"},{"first_name":"Ulf","full_name":"Lorenz, Ulf","last_name":"Lorenz"},{"first_name":"Marco","full_name":"Platzner, Marco","last_name":"Platzner","id":"398"},{"first_name":"Lars","full_name":"Schaefers, Lars","last_name":"Schaefers"}],"publication":"Proc. European Conf. on Parallel Processing (Euro-Par)","department":[{"_id":"27"},{"_id":"78"}],"status":"public","date_created":"2018-04-03T15:14:56Z","volume":6853,"_id":"2204","intvolume":" 6853","date_updated":"2022-01-06T06:55:23Z","doi":"10.1007/978-3-642-23397-5_36","series_title":"Lecture Notes in Computer Science (LNCS)","citation":{"short":"T. Graf, U. Lorenz, M. Platzner, L. Schaefers, in: Proc. European Conf. on Parallel Processing (Euro-Par), Springer, Berlin / Heidelberg, 2011.","ieee":"T. Graf, U. Lorenz, M. Platzner, and L. Schaefers, “Parallel Monte-Carlo Tree Search for HPC Systems,” in Proc. European Conf. on Parallel Processing (Euro-Par), 2011, vol. 6853.","ama":"Graf T, Lorenz U, Platzner M, Schaefers L. Parallel Monte-Carlo Tree Search for HPC Systems. In: Proc. European Conf. on Parallel Processing (Euro-Par). Vol 6853. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer; 2011. doi:10.1007/978-3-642-23397-5_36","apa":"Graf, T., Lorenz, U., Platzner, M., & Schaefers, L. (2011). Parallel Monte-Carlo Tree Search for HPC Systems. In Proc. European Conf. on Parallel Processing (Euro-Par) (Vol. 6853). Berlin / Heidelberg: Springer. https://doi.org/10.1007/978-3-642-23397-5_36","chicago":"Graf, Tobias, Ulf Lorenz, Marco Platzner, and Lars Schaefers. “Parallel Monte-Carlo Tree Search for HPC Systems.” In Proc. European Conf. on Parallel Processing (Euro-Par), Vol. 6853. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer, 2011. https://doi.org/10.1007/978-3-642-23397-5_36.","mla":"Graf, Tobias, et al. “Parallel Monte-Carlo Tree Search for HPC Systems.” Proc. European Conf. on Parallel Processing (Euro-Par), vol. 6853, Springer, 2011, doi:10.1007/978-3-642-23397-5_36.","bibtex":"@inproceedings{Graf_Lorenz_Platzner_Schaefers_2011, place={Berlin / Heidelberg}, series={Lecture Notes in Computer Science (LNCS)}, title={Parallel Monte-Carlo Tree Search for HPC Systems}, volume={6853}, DOI={10.1007/978-3-642-23397-5_36}, booktitle={Proc. European Conf. on Parallel Processing (Euro-Par)}, publisher={Springer}, author={Graf, Tobias and Lorenz, Ulf and Platzner, Marco and Schaefers, Lars}, year={2011}, collection={Lecture Notes in Computer Science (LNCS)} }"},"year":"2011","type":"conference"},{"page":"177-180","type":"conference","year":"2011","citation":{"ieee":"T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures,” in Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 2011, pp. 177–180, doi: 10.1145/1950413.1950448.","short":"T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), ACM, New York, NY, USA, 2011, pp. 177–180.","bibtex":"@inproceedings{Kenter_Platzner_Plessl_Kauschke_2011, place={New York, NY, USA}, title={Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures}, DOI={10.1145/1950413.1950448}, booktitle={Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA)}, publisher={ACM}, author={Kenter, Tobias and Platzner, Marco and Plessl, Christian and Kauschke, Michael}, year={2011}, pages={177–180} }","mla":"Kenter, Tobias, et al. “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures.” Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), ACM, 2011, pp. 177–80, doi:10.1145/1950413.1950448.","chicago":"Kenter, Tobias, Marco Platzner, Christian Plessl, and Michael Kauschke. “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures.” In Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 177–80. New York, NY, USA: ACM, 2011. https://doi.org/10.1145/1950413.1950448.","apa":"Kenter, T., Platzner, M., Plessl, C., & Kauschke, M. (2011). Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures. Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 177–180. https://doi.org/10.1145/1950413.1950448","ama":"Kenter T, Platzner M, Plessl C, Kauschke M. Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures. In: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA). ACM; 2011:177-180. doi:10.1145/1950413.1950448"},"language":[{"iso":"eng"}],"doi":"10.1145/1950413.1950448","_id":"2200","date_updated":"2023-09-26T13:45:04Z","publication_identifier":{"isbn":["978-1-4503-0554-9"]},"date_created":"2018-04-03T15:08:13Z","status":"public","publication":"Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA)","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"keyword":["design space exploration","LLVM","partitioning","performance","estimation","funding-intel"],"quality_controlled":"1","author":[{"last_name":"Kenter","id":"3145","first_name":"Tobias","full_name":"Kenter, Tobias"},{"first_name":"Marco","full_name":"Platzner, Marco","last_name":"Platzner","id":"398"},{"first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","last_name":"Plessl","id":"16153"},{"full_name":"Kauschke, Michael","first_name":"Michael","last_name":"Kauschke"}],"publisher":"ACM","title":"Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures","user_id":"15278","place":"New York, NY, USA"},{"_id":"2188","date_updated":"2022-01-06T06:55:18Z","doi":"10.1109/HiPC.2011.6152745","page":"1-10","citation":{"ieee":"A. Miranda, S. Effert, Y. Kang, E. Miller, A. Brinkmann, and T. Cortes, “Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems,” in Proc. Int. Conf. on High Performance Computing (HIPC), 2011, pp. 1–10.","short":"A. Miranda, S. Effert, Y. Kang, E. Miller, A. Brinkmann, T. Cortes, in: Proc. Int. Conf. on High Performance Computing (HIPC), IEEE Computer Society, Washington, DC, 2011, pp. 1–10.","mla":"Miranda, Alberto, et al. “Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems.” Proc. Int. Conf. on High Performance Computing (HIPC), IEEE Computer Society, 2011, pp. 1–10, doi:10.1109/HiPC.2011.6152745.","bibtex":"@inproceedings{Miranda_Effert_Kang_Miller_Brinkmann_Cortes_2011, place={Washington, DC}, title={Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems}, DOI={10.1109/HiPC.2011.6152745}, booktitle={Proc. Int. Conf. on High Performance Computing (HIPC)}, publisher={IEEE Computer Society}, author={Miranda, Alberto and Effert, Sascha and Kang, Yangwook and Miller, Ethan and Brinkmann, André and Cortes, Toni}, year={2011}, pages={1–10} }","apa":"Miranda, A., Effert, S., Kang, Y., Miller, E., Brinkmann, A., & Cortes, T. (2011). Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems. In Proc. Int. Conf. on High Performance Computing (HIPC) (pp. 1–10). Washington, DC: IEEE Computer Society. https://doi.org/10.1109/HiPC.2011.6152745","ama":"Miranda A, Effert S, Kang Y, Miller E, Brinkmann A, Cortes T. Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems. In: Proc. Int. Conf. on High Performance Computing (HIPC). Washington, DC: IEEE Computer Society; 2011:1-10. doi:10.1109/HiPC.2011.6152745","chicago":"Miranda, Alberto, Sascha Effert, Yangwook Kang, Ethan Miller, André Brinkmann, and Toni Cortes. “Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems.” In Proc. Int. Conf. on High Performance Computing (HIPC), 1–10. Washington, DC: IEEE Computer Society, 2011. https://doi.org/10.1109/HiPC.2011.6152745."},"year":"2011","type":"conference","place":"Washington, DC","user_id":"24135","title":"Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems","department":[{"_id":"27"}],"publication":"Proc. Int. Conf. on High Performance Computing (HIPC)","publisher":"IEEE Computer Society","author":[{"full_name":"Miranda, Alberto","first_name":"Alberto","last_name":"Miranda"},{"first_name":"Sascha","full_name":"Effert, Sascha","last_name":"Effert"},{"first_name":"Yangwook","full_name":"Kang, Yangwook","last_name":"Kang"},{"first_name":"Ethan","full_name":"Miller, Ethan","last_name":"Miller"},{"last_name":"Brinkmann","first_name":"André","full_name":"Brinkmann, André"},{"last_name":"Cortes","full_name":"Cortes, Toni","first_name":"Toni"}],"date_created":"2018-04-03T14:30:39Z","status":"public"},{"title":"Request Load Balancing for Highly Skewed Traffic in P2P Networks","user_id":"24135","status":"public","date_created":"2018-04-03T15:03:17Z","publisher":"IEEE","author":[{"first_name":"André","full_name":"Brinkmann, André","last_name":"Brinkmann"},{"last_name":"Gao","first_name":"Yan","full_name":"Gao, Yan"},{"first_name":"Miroslaw","full_name":"Korzeniowski, Miroslaw","last_name":"Korzeniowski"},{"first_name":"Dirk","full_name":"Meister, Dirk","last_name":"Meister"}],"publication":"Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS)","department":[{"_id":"27"}],"doi":"10.1109/NAS.2011.25","date_updated":"2022-01-06T06:55:21Z","_id":"2196","year":"2011","citation":{"ieee":"A. Brinkmann, Y. Gao, M. Korzeniowski, and D. Meister, “Request Load Balancing for Highly Skewed Traffic in P2P Networks,” in Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), 2011, pp. 53–62.","short":"A. Brinkmann, Y. Gao, M. Korzeniowski, D. Meister, in: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), IEEE, 2011, pp. 53–62.","bibtex":"@inproceedings{Brinkmann_Gao_Korzeniowski_Meister_2011, title={Request Load Balancing for Highly Skewed Traffic in P2P Networks}, DOI={10.1109/NAS.2011.25}, booktitle={Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS)}, publisher={IEEE}, author={Brinkmann, André and Gao, Yan and Korzeniowski, Miroslaw and Meister, Dirk}, year={2011}, pages={53–62} }","mla":"Brinkmann, André, et al. “Request Load Balancing for Highly Skewed Traffic in P2P Networks.” Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), IEEE, 2011, pp. 53–62, doi:10.1109/NAS.2011.25.","chicago":"Brinkmann, André, Yan Gao, Miroslaw Korzeniowski, and Dirk Meister. “Request Load Balancing for Highly Skewed Traffic in P2P Networks.” In Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), 53–62. IEEE, 2011. https://doi.org/10.1109/NAS.2011.25.","apa":"Brinkmann, A., Gao, Y., Korzeniowski, M., & Meister, D. (2011). Request Load Balancing for Highly Skewed Traffic in P2P Networks. In Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS) (pp. 53–62). IEEE. https://doi.org/10.1109/NAS.2011.25","ama":"Brinkmann A, Gao Y, Korzeniowski M, Meister D. Request Load Balancing for Highly Skewed Traffic in P2P Networks. In: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS). IEEE; 2011:53-62. doi:10.1109/NAS.2011.25"},"type":"conference","page":"53-62"},{"abstract":[{"text":"Infrastructure as a Service providers use virtualization to abstract their hardware and to create a dynamic data center. Virtualization enables the consolidation of virtual machines as well as the migration of them to other hosts during runtime. Each provider has its own strategy to efficiently operate a data center. We present a rule based mapping algorithm for VMs, which is able to automatically adapt the mapping between VMs and physical hosts. It offers an interface where policies can be defined and combined in a generic way. The algorithm performs the initial mapping at request time as well as a remapping during runtime. It deals with policy and infrastructure changes. We extended the open source IaaS solution Eucalyptus and we evaluated it with typical policies: maximizing the compute performance and VM locality to achieve a high performance and minimizing energy consumption. The evaluation was done on state-of-the-art servers in our own data center and by simulations using a workload of the Parallel Workload Archive. The results show that our algorithm performs well in dynamic data centers environments.","lang":"eng"}],"user_id":"15274","title":"Rule Based Mapping of Virtual Machines in Clouds","author":[{"first_name":"Christoph","full_name":"Kleineweber, Christoph","last_name":"Kleineweber"},{"first_name":"Axel","full_name":"Keller, Axel","last_name":"Keller","id":"15274"},{"full_name":"Niehörster, Oliver","first_name":"Oliver","last_name":"Niehörster"},{"last_name":"Brinkmann","first_name":"André","full_name":"Brinkmann, André"}],"publication":"Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP)","department":[{"_id":"27"}],"status":"public","date_created":"2018-03-29T11:21:05Z","publication_status":"published","_id":"1968","date_updated":"2022-01-06T06:54:10Z","doi":"10.1109/PDP.2011.69","language":[{"iso":"eng"}],"type":"conference","year":"2011","citation":{"bibtex":"@inproceedings{Kleineweber_Keller_Niehörster_Brinkmann_2011, title={Rule Based Mapping of Virtual Machines in Clouds}, DOI={10.1109/PDP.2011.69}, booktitle={Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP)}, author={Kleineweber, Christoph and Keller, Axel and Niehörster, Oliver and Brinkmann, André}, year={2011} }","mla":"Kleineweber, Christoph, et al. “Rule Based Mapping of Virtual Machines in Clouds.” Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011, doi:10.1109/PDP.2011.69.","ama":"Kleineweber C, Keller A, Niehörster O, Brinkmann A. Rule Based Mapping of Virtual Machines in Clouds. In: Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP). ; 2011. doi:10.1109/PDP.2011.69","apa":"Kleineweber, C., Keller, A., Niehörster, O., & Brinkmann, A. (2011). Rule Based Mapping of Virtual Machines in Clouds. In Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP). https://doi.org/10.1109/PDP.2011.69","chicago":"Kleineweber, Christoph, Axel Keller, Oliver Niehörster, and André Brinkmann. “Rule Based Mapping of Virtual Machines in Clouds.” In Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011. https://doi.org/10.1109/PDP.2011.69.","ieee":"C. Kleineweber, A. Keller, O. Niehörster, and A. Brinkmann, “Rule Based Mapping of Virtual Machines in Clouds,” in Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011.","short":"C. Kleineweber, A. Keller, O. Niehörster, A. Brinkmann, in: Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011."}},{"title":"Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend","user_id":"15278","date_created":"2018-04-03T14:55:57Z","project":[{"name":"Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models","grant_number":"01|H11004A","_id":"30"}],"status":"public","department":[{"_id":"27"},{"_id":"518"},{"_id":"15"},{"_id":"78"}],"keyword":["tet_topic_hpc"],"publication":"Symp. on Application Accelerators in High Performance Computing (SAAHPC)","quality_controlled":"1","author":[{"last_name":"Meyer","first_name":"Björn","full_name":"Meyer, Björn"},{"first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","id":"16153"},{"orcid":"0000-0001-7059-9862","full_name":"Förstner, Jens","first_name":"Jens","id":"158","last_name":"Förstner"}],"publisher":"IEEE Computer Society","doi":"10.1109/SAAHPC.2011.12","date_updated":"2023-09-26T13:44:11Z","_id":"2194","page":"60-63","type":"conference","year":"2011","citation":{"mla":"Meyer, Björn, et al. “Transformation of Scientific Algorithms to Parallel Computing Code: Subdomain Support in a MPI-Multi-GPU Backend.” Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63, doi:10.1109/SAAHPC.2011.12.","bibtex":"@inproceedings{Meyer_Plessl_Förstner_2011, title={Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend}, DOI={10.1109/SAAHPC.2011.12}, booktitle={Symp. on Application Accelerators in High Performance Computing (SAAHPC)}, publisher={IEEE Computer Society}, author={Meyer, Björn and Plessl, Christian and Förstner, Jens}, year={2011}, pages={60–63} }","apa":"Meyer, B., Plessl, C., & Förstner, J. (2011). Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. Symp. on Application Accelerators in High Performance Computing (SAAHPC), 60–63. https://doi.org/10.1109/SAAHPC.2011.12","ama":"Meyer B, Plessl C, Förstner J. Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. In: Symp. on Application Accelerators in High Performance Computing (SAAHPC). IEEE Computer Society; 2011:60-63. doi:10.1109/SAAHPC.2011.12","chicago":"Meyer, Björn, Christian Plessl, and Jens Förstner. “Transformation of Scientific Algorithms to Parallel Computing Code: Subdomain Support in a MPI-Multi-GPU Backend.” In Symp. on Application Accelerators in High Performance Computing (SAAHPC), 60–63. IEEE Computer Society, 2011. https://doi.org/10.1109/SAAHPC.2011.12.","ieee":"B. Meyer, C. Plessl, and J. Förstner, “Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend,” in Symp. on Application Accelerators in High Performance Computing (SAAHPC), 2011, pp. 60–63, doi: 10.1109/SAAHPC.2011.12.","short":"B. Meyer, C. Plessl, J. Förstner, in: Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63."},"language":[{"iso":"eng"}]},{"title":"An Open Source Circuit Library with Benchmarking Facilities","user_id":"15278","author":[{"last_name":"Grad","full_name":"Grad, Mariusz","first_name":"Mariusz"},{"orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","first_name":"Christian","id":"16153","last_name":"Plessl"}],"quality_controlled":"1","publisher":"CSREA Press","publication":"Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"publication_identifier":{"isbn":["1-60132-140-6"]},"status":"public","date_created":"2018-04-05T16:28:38Z","date_updated":"2023-09-26T13:48:59Z","_id":"2224","year":"2010","type":"conference","citation":{"bibtex":"@inproceedings{Grad_Plessl_2010, title={An Open Source Circuit Library with Benchmarking Facilities}, booktitle={Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)}, publisher={CSREA Press}, author={Grad, Mariusz and Plessl, Christian}, year={2010}, pages={144–150} }","mla":"Grad, Mariusz, and Christian Plessl. “An Open Source Circuit Library with Benchmarking Facilities.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 144–50.","chicago":"Grad, Mariusz, and Christian Plessl. “An Open Source Circuit Library with Benchmarking Facilities.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 144–50. CSREA Press, 2010.","apa":"Grad, M., & Plessl, C. (2010). An Open Source Circuit Library with Benchmarking Facilities. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 144–150.","ama":"Grad M, Plessl C. An Open Source Circuit Library with Benchmarking Facilities. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:144-150.","ieee":"M. Grad and C. Plessl, “An Open Source Circuit Library with Benchmarking Facilities,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 144–150.","short":"M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 144–150."},"page":"144-150","language":[{"iso":"eng"}]},{"doi":"10.1145/1810479.1810500","_id":"2229","date_updated":"2022-01-06T06:55:30Z","type":"conference","year":"2010","citation":{"mla":"Berenbrink, Petra, et al. “Balls into Bins with Related Random Choices.” Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA), ACM, 2010, pp. 100–05, doi:10.1145/1810479.1810500.","bibtex":"@inproceedings{Berenbrink_Brinkmann_Friedetzky_Nagel_2010, place={New York}, title={Balls into Bins with Related Random Choices}, DOI={10.1145/1810479.1810500}, booktitle={Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA)}, publisher={ACM}, author={Berenbrink, Petra and Brinkmann, André and Friedetzky, Tom and Nagel, Lars}, year={2010}, pages={100–105} }","apa":"Berenbrink, P., Brinkmann, A., Friedetzky, T., & Nagel, L. (2010). Balls into Bins with Related Random Choices. In Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA) (pp. 100–105). New York: ACM. https://doi.org/10.1145/1810479.1810500","ama":"Berenbrink P, Brinkmann A, Friedetzky T, Nagel L. Balls into Bins with Related Random Choices. In: Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA). New York: ACM; 2010:100-105. doi:10.1145/1810479.1810500","chicago":"Berenbrink, Petra, André Brinkmann, Tom Friedetzky, and Lars Nagel. “Balls into Bins with Related Random Choices.” In Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA), 100–105. New York: ACM, 2010. https://doi.org/10.1145/1810479.1810500.","ieee":"P. Berenbrink, A. Brinkmann, T. Friedetzky, and L. Nagel, “Balls into Bins with Related Random Choices,” in Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA), 2010, pp. 100–105.","short":"P. Berenbrink, A. Brinkmann, T. Friedetzky, L. Nagel, in: Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA), ACM, New York, 2010, pp. 100–105."},"page":"100-105","user_id":"24135","title":"Balls into Bins with Related Random Choices","place":"New York","status":"public","date_created":"2018-04-05T16:45:55Z","author":[{"last_name":"Berenbrink","full_name":"Berenbrink, Petra","first_name":"Petra"},{"full_name":"Brinkmann, André","first_name":"André","last_name":"Brinkmann"},{"last_name":"Friedetzky","full_name":"Friedetzky, Tom","first_name":"Tom"},{"first_name":"Lars","full_name":"Nagel, Lars","last_name":"Nagel"}],"publisher":"ACM","department":[{"_id":"27"}],"publication":"Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA)"},{"user_id":"24135","title":"Balls into Non-uniform Bins","publisher":"IEEE","author":[{"full_name":"Berenbrink, Petra","first_name":"Petra","last_name":"Berenbrink"},{"first_name":"André","full_name":"Brinkmann, André","last_name":"Brinkmann"},{"first_name":"Tom","full_name":"Friedetzky, Tom","last_name":"Friedetzky"},{"last_name":"Nagel","full_name":"Nagel, Lars","first_name":"Lars"}],"department":[{"_id":"27"}],"publication":"Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS)","status":"public","date_created":"2018-04-05T16:50:03Z","_id":"2232","date_updated":"2022-01-06T06:55:31Z","doi":"10.1109/IPDPS.2010.5470355","year":"2010","type":"conference","citation":{"ieee":"P. Berenbrink, A. Brinkmann, T. Friedetzky, and L. Nagel, “Balls into Non-uniform Bins,” in Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS), 2010, pp. 1–10.","short":"P. Berenbrink, A. Brinkmann, T. Friedetzky, L. Nagel, in: Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS), IEEE, 2010, pp. 1–10.","bibtex":"@inproceedings{Berenbrink_Brinkmann_Friedetzky_Nagel_2010, title={Balls into Non-uniform Bins}, DOI={10.1109/IPDPS.2010.5470355}, booktitle={Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS)}, publisher={IEEE}, author={Berenbrink, Petra and Brinkmann, André and Friedetzky, Tom and Nagel, Lars}, year={2010}, pages={1–10} }","mla":"Berenbrink, Petra, et al. “Balls into Non-Uniform Bins.” Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS), IEEE, 2010, pp. 1–10, doi:10.1109/IPDPS.2010.5470355.","ama":"Berenbrink P, Brinkmann A, Friedetzky T, Nagel L. Balls into Non-uniform Bins. In: Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS). IEEE; 2010:1-10. doi:10.1109/IPDPS.2010.5470355","apa":"Berenbrink, P., Brinkmann, A., Friedetzky, T., & Nagel, L. (2010). Balls into Non-uniform Bins. In Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS) (pp. 1–10). IEEE. https://doi.org/10.1109/IPDPS.2010.5470355","chicago":"Berenbrink, Petra, André Brinkmann, Tom Friedetzky, and Lars Nagel. “Balls into Non-Uniform Bins.” In Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS), 1–10. IEEE, 2010. https://doi.org/10.1109/IPDPS.2010.5470355."},"page":"1-10"},{"_id":"2220","date_updated":"2023-09-26T13:47:33Z","language":[{"iso":"eng"}],"page":"165","type":"conference","citation":{"bibtex":"@inproceedings{Andrews_Plessl_2010, title={Configurable Processor Architectures: History and Trends}, booktitle={Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)}, publisher={CSREA Press}, author={Andrews, David and Plessl, Christian}, year={2010}, pages={165} }","mla":"Andrews, David, and Christian Plessl. “Configurable Processor Architectures: History and Trends.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165.","ama":"Andrews D, Plessl C. Configurable Processor Architectures: History and Trends. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:165.","apa":"Andrews, D., & Plessl, C. (2010). Configurable Processor Architectures: History and Trends. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 165.","chicago":"Andrews, David, and Christian Plessl. “Configurable Processor Architectures: History and Trends.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 165. CSREA Press, 2010.","ieee":"D. Andrews and C. Plessl, “Configurable Processor Architectures: History and Trends,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, p. 165.","short":"D. Andrews, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165."},"year":"2010","user_id":"15278","title":"Configurable Processor Architectures: History and Trends","date_created":"2018-04-05T14:57:07Z","status":"public","publication_identifier":{"isbn":["1-60132-140-6"]},"publication":"Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"quality_controlled":"1","publisher":"CSREA Press","author":[{"first_name":"David","full_name":"Andrews, David","last_name":"Andrews"},{"first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","last_name":"Plessl","id":"16153"}]},{"place":"Washington, DC","user_id":"24135","title":"dedupv1: Improving Deduplication Throughput using Solid State Drives (SSD)","publication":"Proc. Symp. on Mass Storage Systems and Technologies (MSST)","department":[{"_id":"27"}],"author":[{"first_name":"Dirk","full_name":"Meister, Dirk","last_name":"Meister"},{"first_name":"André","full_name":"Brinkmann, André","last_name":"Brinkmann"}],"publisher":"IEEE Computer Society","date_created":"2018-04-05T16:47:23Z","status":"public","date_updated":"2022-01-06T06:55:30Z","_id":"2230","doi":"10.1109/MSST.2010.5496992","page":"1-6","year":"2010","citation":{"bibtex":"@inproceedings{Meister_Brinkmann_2010, place={Washington, DC}, title={dedupv1: Improving Deduplication Throughput using Solid State Drives (SSD)}, DOI={10.1109/MSST.2010.5496992}, booktitle={Proc. Symp. on Mass Storage Systems and Technologies (MSST)}, publisher={IEEE Computer Society}, author={Meister, Dirk and Brinkmann, André}, year={2010}, pages={1–6} }","mla":"Meister, Dirk, and André Brinkmann. “Dedupv1: Improving Deduplication Throughput Using Solid State Drives (SSD).” Proc. Symp. on Mass Storage Systems and Technologies (MSST), IEEE Computer Society, 2010, pp. 1–6, doi:10.1109/MSST.2010.5496992.","chicago":"Meister, Dirk, and André Brinkmann. “Dedupv1: Improving Deduplication Throughput Using Solid State Drives (SSD).” In Proc. Symp. on Mass Storage Systems and Technologies (MSST), 1–6. Washington, DC: IEEE Computer Society, 2010. https://doi.org/10.1109/MSST.2010.5496992.","apa":"Meister, D., & Brinkmann, A. (2010). dedupv1: Improving Deduplication Throughput using Solid State Drives (SSD). In Proc. Symp. on Mass Storage Systems and Technologies (MSST) (pp. 1–6). Washington, DC: IEEE Computer Society. https://doi.org/10.1109/MSST.2010.5496992","ama":"Meister D, Brinkmann A. dedupv1: Improving Deduplication Throughput using Solid State Drives (SSD). In: Proc. Symp. on Mass Storage Systems and Technologies (MSST). Washington, DC: IEEE Computer Society; 2010:1-6. doi:10.1109/MSST.2010.5496992","ieee":"D. Meister and A. Brinkmann, “dedupv1: Improving Deduplication Throughput using Solid State Drives (SSD),” in Proc. Symp. on Mass Storage Systems and Technologies (MSST), 2010, pp. 1–6.","short":"D. Meister, A. Brinkmann, in: Proc. Symp. on Mass Storage Systems and Technologies (MSST), IEEE Computer Society, Washington, DC, 2010, pp. 1–6."},"type":"conference"},{"status":"public","date_created":"2018-04-05T17:05:44Z","publication_identifier":{"issn":["1552-5244"]},"author":[{"last_name":"Niehörster","first_name":"Oliver","full_name":"Niehörster, Oliver"},{"last_name":"Brinkmann","full_name":"Brinkmann, André","first_name":"André"},{"first_name":"Gregor","full_name":"Fels, Gregor","last_name":"Fels"},{"full_name":"Krüger, Jens","first_name":"Jens","last_name":"Krüger"},{"first_name":"Jens","full_name":"Simon, Jens","last_name":"Simon","id":"15273"}],"publisher":"IEEE","department":[{"_id":"27"}],"publication":"Proc. Int. Conf. on Cluster Computing (CLUSTER)","user_id":"24135","title":"Enforcing SLAs in Scientific Clouds","year":"2010","citation":{"short":"O. Niehörster, A. Brinkmann, G. Fels, J. Krüger, J. Simon, in: Proc. Int. Conf. on Cluster Computing (CLUSTER), IEEE, 2010, pp. 178–187.","ieee":"O. Niehörster, A. Brinkmann, G. Fels, J. Krüger, and J. Simon, “Enforcing SLAs in Scientific Clouds,” in Proc. Int. Conf. on Cluster Computing (CLUSTER), 2010, pp. 178–187.","chicago":"Niehörster, Oliver, André Brinkmann, Gregor Fels, Jens Krüger, and Jens Simon. “Enforcing SLAs in Scientific Clouds.” In Proc. Int. Conf. on Cluster Computing (CLUSTER), 178–87. IEEE, 2010. https://doi.org/10.1109/CLUSTER.2010.42.","apa":"Niehörster, O., Brinkmann, A., Fels, G., Krüger, J., & Simon, J. (2010). Enforcing SLAs in Scientific Clouds. In Proc. Int. Conf. on Cluster Computing (CLUSTER) (pp. 178–187). IEEE. https://doi.org/10.1109/CLUSTER.2010.42","ama":"Niehörster O, Brinkmann A, Fels G, Krüger J, Simon J. Enforcing SLAs in Scientific Clouds. In: Proc. Int. Conf. on Cluster Computing (CLUSTER). IEEE; 2010:178-187. doi:10.1109/CLUSTER.2010.42","mla":"Niehörster, Oliver, et al. “Enforcing SLAs in Scientific Clouds.” Proc. Int. Conf. on Cluster Computing (CLUSTER), IEEE, 2010, pp. 178–87, doi:10.1109/CLUSTER.2010.42.","bibtex":"@inproceedings{Niehörster_Brinkmann_Fels_Krüger_Simon_2010, title={Enforcing SLAs in Scientific Clouds}, DOI={10.1109/CLUSTER.2010.42}, booktitle={Proc. Int. Conf. on Cluster Computing (CLUSTER)}, publisher={IEEE}, author={Niehörster, Oliver and Brinkmann, André and Fels, Gregor and Krüger, Jens and Simon, Jens}, year={2010}, pages={178–187} }"},"type":"conference","page":"178-187","doi":"10.1109/CLUSTER.2010.42","_id":"2237","date_updated":"2022-01-06T06:55:32Z"},{"date_created":"2018-04-05T17:03:41Z","status":"public","department":[{"_id":"27"}],"publication":"Proc. of Grid Workflow Workshop (GWW)","author":[{"full_name":"Birkenheuer, Georg","first_name":"Georg","last_name":"Birkenheuer"},{"first_name":"Sebastian","full_name":"Breuers, Sebastian","last_name":"Breuers"},{"last_name":"Brinkmann","full_name":"Brinkmann, André","first_name":"André"},{"last_name":"Blunk","full_name":"Blunk, Dirk","first_name":"Dirk"},{"full_name":"Fels, Gregor","first_name":"Gregor","last_name":"Fels"},{"last_name":"Gesing","full_name":"Gesing, Sandra","first_name":"Sandra"},{"last_name":"Herres-Pawlis","full_name":"Herres-Pawlis, Sonja","first_name":"Sonja"},{"last_name":"Kohlbacher","full_name":"Kohlbacher, Oliver","first_name":"Oliver"},{"last_name":"Krüger","full_name":"Krüger, Jens","first_name":"Jens"},{"first_name":"Lars","full_name":"Packschies, Lars","last_name":"Packschies"}],"publisher":"Gesellschaft für Informatik (GI)","user_id":"24135","title":"Grid-Workflows in Molecular Science","page":"177-184","year":"2010","type":"conference","citation":{"mla":"Birkenheuer, Georg, et al. “Grid-Workflows in Molecular Science.” Proc. of Grid Workflow Workshop (GWW), Gesellschaft für Informatik (GI), 2010, pp. 177–84.","bibtex":"@inproceedings{Birkenheuer_Breuers_Brinkmann_Blunk_Fels_Gesing_Herres-Pawlis_Kohlbacher_Krüger_Packschies_2010, series={Lecture Notes in Informatics}, title={Grid-Workflows in Molecular Science}, booktitle={Proc. of Grid Workflow Workshop (GWW)}, publisher={Gesellschaft für Informatik (GI)}, author={Birkenheuer, Georg and Breuers, Sebastian and Brinkmann, André and Blunk, Dirk and Fels, Gregor and Gesing, Sandra and Herres-Pawlis, Sonja and Kohlbacher, Oliver and Krüger, Jens and Packschies, Lars}, year={2010}, pages={177–184}, collection={Lecture Notes in Informatics} }","chicago":"Birkenheuer, Georg, Sebastian Breuers, André Brinkmann, Dirk Blunk, Gregor Fels, Sandra Gesing, Sonja Herres-Pawlis, Oliver Kohlbacher, Jens Krüger, and Lars Packschies. “Grid-Workflows in Molecular Science.” In Proc. of Grid Workflow Workshop (GWW), 177–84. Lecture Notes in Informatics. Gesellschaft für Informatik (GI), 2010.","apa":"Birkenheuer, G., Breuers, S., Brinkmann, A., Blunk, D., Fels, G., Gesing, S., … Packschies, L. (2010). Grid-Workflows in Molecular Science. In Proc. of Grid Workflow Workshop (GWW) (pp. 177–184). Gesellschaft für Informatik (GI).","ama":"Birkenheuer G, Breuers S, Brinkmann A, et al. Grid-Workflows in Molecular Science. In: Proc. of Grid Workflow Workshop (GWW). Lecture Notes in Informatics. Gesellschaft für Informatik (GI); 2010:177-184.","ieee":"G. Birkenheuer et al., “Grid-Workflows in Molecular Science,” in Proc. of Grid Workflow Workshop (GWW), 2010, pp. 177–184.","short":"G. Birkenheuer, S. Breuers, A. Brinkmann, D. Blunk, G. Fels, S. Gesing, S. Herres-Pawlis, O. Kohlbacher, J. Krüger, L. Packschies, in: Proc. of Grid Workflow Workshop (GWW), Gesellschaft für Informatik (GI), 2010, pp. 177–184."},"series_title":"Lecture Notes in Informatics","_id":"2236","date_updated":"2022-01-06T06:55:31Z"},{"title":"hashFS: Applying Hashing to Optimized File Systems for Small File Reads","user_id":"24135","department":[{"_id":"27"}],"publication":"Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI)","author":[{"first_name":"Paul Hermann","full_name":"Lensing, Paul Hermann","last_name":"Lensing"},{"full_name":"Meister, Dirk","first_name":"Dirk","last_name":"Meister"},{"first_name":"André","full_name":"Brinkmann, André","last_name":"Brinkmann"}],"publisher":"IEEE","date_created":"2018-04-05T16:48:01Z","status":"public","_id":"2231","date_updated":"2022-01-06T06:55:31Z","doi":"10.1109/SNAPI.2010.12","page":"33-42","citation":{"short":"P.H. Lensing, D. Meister, A. Brinkmann, in: Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI), IEEE, 2010, pp. 33–42.","ieee":"P. H. Lensing, D. Meister, and A. Brinkmann, “hashFS: Applying Hashing to Optimized File Systems for Small File Reads,” in Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI), 2010, pp. 33–42.","chicago":"Lensing, Paul Hermann, Dirk Meister, and André Brinkmann. “HashFS: Applying Hashing to Optimized File Systems for Small File Reads.” In Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI), 33–42. IEEE, 2010. https://doi.org/10.1109/SNAPI.2010.12.","ama":"Lensing PH, Meister D, Brinkmann A. hashFS: Applying Hashing to Optimized File Systems for Small File Reads. In: Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI). IEEE; 2010:33-42. doi:10.1109/SNAPI.2010.12","apa":"Lensing, P. H., Meister, D., & Brinkmann, A. (2010). hashFS: Applying Hashing to Optimized File Systems for Small File Reads. In Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI) (pp. 33–42). IEEE. https://doi.org/10.1109/SNAPI.2010.12","mla":"Lensing, Paul Hermann, et al. “HashFS: Applying Hashing to Optimized File Systems for Small File Reads.” Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI), IEEE, 2010, pp. 33–42, doi:10.1109/SNAPI.2010.12.","bibtex":"@inproceedings{Lensing_Meister_Brinkmann_2010, title={hashFS: Applying Hashing to Optimized File Systems for Small File Reads}, DOI={10.1109/SNAPI.2010.12}, booktitle={Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI)}, publisher={IEEE}, author={Lensing, Paul Hermann and Meister, Dirk and Brinkmann, André}, year={2010}, pages={33–42} }"},"type":"conference","year":"2010"},{"date_created":"2018-04-05T16:52:36Z","status":"public","department":[{"_id":"27"}],"publication":"Proc. Design, Automation and Test in Europe Conf. (DATE)","publisher":"EDA Consortium","author":[{"last_name":"Bolte","first_name":"Matthias","full_name":"Bolte, Matthias"},{"first_name":"Michael","full_name":"Sievers, Michael","last_name":"Sievers"},{"last_name":"Birkenheuer","full_name":"Birkenheuer, Georg","first_name":"Georg"},{"last_name":"Niehörster","full_name":"Niehörster, Oliver","first_name":"Oliver"},{"last_name":"Brinkmann","first_name":"André","full_name":"Brinkmann, André"}],"title":"Non-intrusive Virtualization Management Using libvirt","user_id":"24135","citation":{"ieee":"M. Bolte, M. Sievers, G. Birkenheuer, O. Niehörster, and A. Brinkmann, “Non-intrusive Virtualization Management Using libvirt,” in Proc. Design, Automation and Test in Europe Conf. (DATE), 2010.","short":"M. Bolte, M. Sievers, G. Birkenheuer, O. Niehörster, A. Brinkmann, in: Proc. Design, Automation and Test in Europe Conf. (DATE), EDA Consortium, 2010.","bibtex":"@inproceedings{Bolte_Sievers_Birkenheuer_Niehörster_Brinkmann_2010, title={Non-intrusive Virtualization Management Using libvirt}, booktitle={Proc. Design, Automation and Test in Europe Conf. (DATE)}, publisher={EDA Consortium}, author={Bolte, Matthias and Sievers, Michael and Birkenheuer, Georg and Niehörster, Oliver and Brinkmann, André}, year={2010} }","mla":"Bolte, Matthias, et al. “Non-Intrusive Virtualization Management Using Libvirt.” Proc. Design, Automation and Test in Europe Conf. (DATE), EDA Consortium, 2010.","chicago":"Bolte, Matthias, Michael Sievers, Georg Birkenheuer, Oliver Niehörster, and André Brinkmann. “Non-Intrusive Virtualization Management Using Libvirt.” In Proc. Design, Automation and Test in Europe Conf. (DATE). EDA Consortium, 2010.","ama":"Bolte M, Sievers M, Birkenheuer G, Niehörster O, Brinkmann A. Non-intrusive Virtualization Management Using libvirt. In: Proc. Design, Automation and Test in Europe Conf. (DATE). EDA Consortium; 2010.","apa":"Bolte, M., Sievers, M., Birkenheuer, G., Niehörster, O., & Brinkmann, A. (2010). Non-intrusive Virtualization Management Using libvirt. In Proc. Design, Automation and Test in Europe Conf. (DATE). EDA Consortium."},"year":"2010","type":"conference","_id":"2234","date_updated":"2022-01-06T06:55:31Z"},{"date_created":"2018-04-05T16:43:04Z","status":"public","editor":[{"last_name":"Hammami","full_name":"Hammami, Omar","first_name":"Omar"},{"last_name":"Larrabee","full_name":"Larrabee, Sandra","first_name":"Sandra"}],"publication":"Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA)","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"author":[{"id":"3145","last_name":"Kenter","full_name":"Kenter, Tobias","first_name":"Tobias"},{"id":"398","last_name":"Platzner","full_name":"Platzner, Marco","first_name":"Marco"},{"first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","id":"16153"},{"full_name":"Kauschke, Michael","first_name":"Michael","last_name":"Kauschke"}],"quality_controlled":"1","user_id":"15278","title":"Performance Estimation for the Exploration of CPU-Accelerator Architectures","language":[{"iso":"eng"}],"citation":{"apa":"Kenter, T., Platzner, M., Plessl, C., & Kauschke, M. (2010). Performance Estimation for the Exploration of CPU-Accelerator Architectures. In O. Hammami & S. Larrabee (Eds.), Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA).","ama":"Kenter T, Platzner M, Plessl C, Kauschke M. Performance Estimation for the Exploration of CPU-Accelerator Architectures. In: Hammami O, Larrabee S, eds. Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA). ; 2010.","chicago":"Kenter, Tobias, Marco Platzner, Christian Plessl, and Michael Kauschke. “Performance Estimation for the Exploration of CPU-Accelerator Architectures.” In Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), edited by Omar Hammami and Sandra Larrabee, 2010.","mla":"Kenter, Tobias, et al. “Performance Estimation for the Exploration of CPU-Accelerator Architectures.” Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), edited by Omar Hammami and Sandra Larrabee, 2010.","bibtex":"@inproceedings{Kenter_Platzner_Plessl_Kauschke_2010, title={Performance Estimation for the Exploration of CPU-Accelerator Architectures}, booktitle={Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA)}, author={Kenter, Tobias and Platzner, Marco and Plessl, Christian and Kauschke, Michael}, editor={Hammami, Omar and Larrabee, Sandra}, year={2010} }","short":"T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: O. Hammami, S. Larrabee (Eds.), Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), 2010.","ieee":"T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation for the Exploration of CPU-Accelerator Architectures,” in Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), 2010."},"year":"2010","type":"conference","date_updated":"2023-09-26T13:50:04Z","_id":"2228"},{"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"publication":"Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig)","publisher":"IEEE Computer Society","quality_controlled":"1","author":[{"last_name":"Grad","first_name":"Mariusz","full_name":"Grad, Mariusz"},{"first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","last_name":"Plessl","id":"16153"}],"date_created":"2018-04-05T14:48:51Z","status":"public","place":"Los Alamitos, CA, USA","title":"Pruning the Design Space for Just-In-Time Processor Customization","user_id":"15278","page":"67-72","citation":{"mla":"Grad, Mariusz, and Christian Plessl. “Pruning the Design Space for Just-In-Time Processor Customization.” Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, 2010, pp. 67–72, doi:10.1109/ReConFig.2010.19.","bibtex":"@inproceedings{Grad_Plessl_2010, place={Los Alamitos, CA, USA}, title={Pruning the Design Space for Just-In-Time Processor Customization}, DOI={10.1109/ReConFig.2010.19}, booktitle={Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE Computer Society}, author={Grad, Mariusz and Plessl, Christian}, year={2010}, pages={67–72} }","chicago":"Grad, Mariusz, and Christian Plessl. “Pruning the Design Space for Just-In-Time Processor Customization.” In Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 67–72. Los Alamitos, CA, USA: IEEE Computer Society, 2010. https://doi.org/10.1109/ReConFig.2010.19.","ama":"Grad M, Plessl C. Pruning the Design Space for Just-In-Time Processor Customization. In: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig). IEEE Computer Society; 2010:67-72. doi:10.1109/ReConFig.2010.19","apa":"Grad, M., & Plessl, C. (2010). Pruning the Design Space for Just-In-Time Processor Customization. Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 67–72. https://doi.org/10.1109/ReConFig.2010.19","ieee":"M. Grad and C. Plessl, “Pruning the Design Space for Just-In-Time Processor Customization,” in Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 2010, pp. 67–72, doi: 10.1109/ReConFig.2010.19.","short":"M. Grad, C. Plessl, in: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, Los Alamitos, CA, USA, 2010, pp. 67–72."},"type":"conference","year":"2010","language":[{"iso":"eng"}],"_id":"2216","date_updated":"2023-09-26T13:47:11Z","doi":"10.1109/ReConFig.2010.19"},{"title":"Reconfigurable Nodes for Future Networks","user_id":"15278","publication_identifier":{"isbn":["978-1-4244-8864-3"]},"status":"public","date_created":"2018-04-04T09:36:16Z","quality_controlled":"1","author":[{"full_name":"Keller, Ariane","first_name":"Ariane","last_name":"Keller"},{"last_name":"Plattner","full_name":"Plattner, Bernhard","first_name":"Bernhard"},{"first_name":"Enno","full_name":"Lübbers, Enno","last_name":"Lübbers"},{"id":"398","last_name":"Platzner","full_name":"Platzner, Marco","first_name":"Marco"},{"id":"16153","last_name":"Plessl","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","first_name":"Christian"}],"publisher":"IEEE","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"publication":"Proc. IEEE Globecom Workshop on Network of the Future (FutureNet)","doi":"10.1109/GLOCOMW.2010.5700341","_id":"2206","date_updated":"2023-09-26T13:51:00Z","citation":{"ama":"Keller A, Plattner B, Lübbers E, Platzner M, Plessl C. Reconfigurable Nodes for Future Networks. In: Proc. IEEE Globecom Workshop on Network of the Future (FutureNet). IEEE; 2010:372-376. doi:10.1109/GLOCOMW.2010.5700341","apa":"Keller, A., Plattner, B., Lübbers, E., Platzner, M., & Plessl, C. (2010). Reconfigurable Nodes for Future Networks. Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 372–376. https://doi.org/10.1109/GLOCOMW.2010.5700341","chicago":"Keller, Ariane, Bernhard Plattner, Enno Lübbers, Marco Platzner, and Christian Plessl. “Reconfigurable Nodes for Future Networks.” In Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 372–76. IEEE, 2010. https://doi.org/10.1109/GLOCOMW.2010.5700341.","mla":"Keller, Ariane, et al. “Reconfigurable Nodes for Future Networks.” Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), IEEE, 2010, pp. 372–76, doi:10.1109/GLOCOMW.2010.5700341.","bibtex":"@inproceedings{Keller_Plattner_Lübbers_Platzner_Plessl_2010, title={Reconfigurable Nodes for Future Networks}, DOI={10.1109/GLOCOMW.2010.5700341}, booktitle={Proc. IEEE Globecom Workshop on Network of the Future (FutureNet)}, publisher={IEEE}, author={Keller, Ariane and Plattner, Bernhard and Lübbers, Enno and Platzner, Marco and Plessl, Christian}, year={2010}, pages={372–376} }","short":"A. Keller, B. Plattner, E. Lübbers, M. Platzner, C. Plessl, in: Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), IEEE, 2010, pp. 372–376.","ieee":"A. Keller, B. Plattner, E. Lübbers, M. Platzner, and C. Plessl, “Reconfigurable Nodes for Future Networks,” in Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 2010, pp. 372–376, doi: 10.1109/GLOCOMW.2010.5700341."},"year":"2010","type":"conference","page":"372-376","language":[{"iso":"eng"}]},{"title":"Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors","user_id":"24135","publisher":"IEEE","author":[{"last_name":"Gao","first_name":"Yan","full_name":"Gao, Yan"},{"last_name":"Meister","full_name":"Meister, Dirk","first_name":"Dirk"},{"last_name":"Brinkmann","full_name":"Brinkmann, André","first_name":"André"}],"publication":"Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS)","department":[{"_id":"27"}],"status":"public","date_created":"2018-04-05T16:37:26Z","_id":"2225","date_updated":"2022-01-06T06:55:29Z","doi":"10.1109/NAS.2010.11","year":"2010","citation":{"apa":"Gao, Y., Meister, D., & Brinkmann, A. (2010). Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors. In Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS) (pp. 126–134). IEEE. https://doi.org/10.1109/NAS.2010.11","ama":"Gao Y, Meister D, Brinkmann A. Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors. In: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS). IEEE; 2010:126-134. doi:10.1109/NAS.2010.11","chicago":"Gao, Yan, Dirk Meister, and André Brinkmann. “Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors.” In Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), 126–34. IEEE, 2010. https://doi.org/10.1109/NAS.2010.11.","mla":"Gao, Yan, et al. “Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors.” Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), IEEE, 2010, pp. 126–34, doi:10.1109/NAS.2010.11.","bibtex":"@inproceedings{Gao_Meister_Brinkmann_2010, title={Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors}, DOI={10.1109/NAS.2010.11}, booktitle={Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS)}, publisher={IEEE}, author={Gao, Yan and Meister, Dirk and Brinkmann, André}, year={2010}, pages={126–134} }","short":"Y. Gao, D. Meister, A. Brinkmann, in: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), IEEE, 2010, pp. 126–134.","ieee":"Y. Gao, D. Meister, and A. Brinkmann, “Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors,” in Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), 2010, pp. 126–134."},"type":"conference","page":"126-134"},{"user_id":"24135","title":"Risk Aware Overbooking for Commercial Grids","author":[{"last_name":"Birkenheuer","full_name":"Birkenheuer, Georg","first_name":"Georg"},{"last_name":"Brinkmann","full_name":"Brinkmann, Andre","first_name":"Andre"},{"full_name":"Karl, Holger","first_name":"Holger","id":"126","last_name":"Karl"}],"department":[{"_id":"75"},{"_id":"27"}],"publication":"Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers","status":"public","date_created":"2017-11-27T10:22:26Z","date_updated":"2022-01-06T07:03:50Z","_id":"809","doi":"10.1007/978-3-642-16505-4_4","citation":{"bibtex":"@inproceedings{Birkenheuer_Brinkmann_Karl_2010, title={Risk Aware Overbooking for Commercial Grids}, DOI={10.1007/978-3-642-16505-4_4}, booktitle={Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers}, author={Birkenheuer, Georg and Brinkmann, Andre and Karl, Holger}, year={2010}, pages={51–76} }","mla":"Birkenheuer, Georg, et al. “Risk Aware Overbooking for Commercial Grids.” Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers, 2010, pp. 51–76, doi:10.1007/978-3-642-16505-4_4.","chicago":"Birkenheuer, Georg, Andre Brinkmann, and Holger Karl. “Risk Aware Overbooking for Commercial Grids.” In Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers, 51–76, 2010. https://doi.org/10.1007/978-3-642-16505-4_4.","ama":"Birkenheuer G, Brinkmann A, Karl H. Risk Aware Overbooking for Commercial Grids. In: Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers. ; 2010:51-76. doi:10.1007/978-3-642-16505-4_4","apa":"Birkenheuer, G., Brinkmann, A., & Karl, H. (2010). Risk Aware Overbooking for Commercial Grids. In Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers (pp. 51–76). https://doi.org/10.1007/978-3-642-16505-4_4","ieee":"G. Birkenheuer, A. Brinkmann, and H. Karl, “Risk Aware Overbooking for Commercial Grids,” in Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers, 2010, pp. 51–76.","short":"G. Birkenheuer, A. Brinkmann, H. Karl, in: Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers, 2010, pp. 51–76."},"year":"2010","type":"conference","page":"51-76"},{"language":[{"iso":"eng"}],"page":"245-248","type":"conference","year":"2010","citation":{"bibtex":"@inproceedings{Woehrle_Plessl_Thiele_2010, title={Rupeas: Ruby Powered Event Analysis DSL}, DOI={10.1109/INSS.2010.5572211}, booktitle={Proc. Int. Conf. Networked Sensing Systems (INSS)}, publisher={IEEE}, author={Woehrle, Matthias and Plessl, Christian and Thiele, Lothar}, year={2010}, pages={245–248} }","mla":"Woehrle, Matthias, et al. “Rupeas: Ruby Powered Event Analysis DSL.” Proc. Int. Conf. Networked Sensing Systems (INSS), IEEE, 2010, pp. 245–48, doi:10.1109/INSS.2010.5572211.","apa":"Woehrle, M., Plessl, C., & Thiele, L. (2010). Rupeas: Ruby Powered Event Analysis DSL. Proc. Int. Conf. Networked Sensing Systems (INSS), 245–248. https://doi.org/10.1109/INSS.2010.5572211","ama":"Woehrle M, Plessl C, Thiele L. Rupeas: Ruby Powered Event Analysis DSL. In: Proc. Int. Conf. Networked Sensing Systems (INSS). IEEE; 2010:245-248. doi:10.1109/INSS.2010.5572211","chicago":"Woehrle, Matthias, Christian Plessl, and Lothar Thiele. “Rupeas: Ruby Powered Event Analysis DSL.” In Proc. Int. Conf. Networked Sensing Systems (INSS), 245–48. IEEE, 2010. https://doi.org/10.1109/INSS.2010.5572211.","ieee":"M. Woehrle, C. Plessl, and L. Thiele, “Rupeas: Ruby Powered Event Analysis DSL,” in Proc. Int. Conf. Networked Sensing Systems (INSS), 2010, pp. 245–248, doi: 10.1109/INSS.2010.5572211.","short":"M. Woehrle, C. Plessl, L. Thiele, in: Proc. Int. Conf. Networked Sensing Systems (INSS), IEEE, 2010, pp. 245–248."},"doi":"10.1109/INSS.2010.5572211","date_updated":"2023-09-26T13:49:38Z","_id":"2227","date_created":"2018-04-05T16:41:02Z","status":"public","publication_identifier":{"isbn":["978-1-4244-7911-5"]},"department":[{"_id":"27"},{"_id":"518"}],"publication":"Proc. Int. Conf. Networked Sensing Systems (INSS)","publisher":"IEEE","quality_controlled":"1","author":[{"last_name":"Woehrle","first_name":"Matthias","full_name":"Woehrle, Matthias"},{"full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian","id":"16153","last_name":"Plessl"},{"last_name":"Thiele","first_name":"Lothar","full_name":"Thiele, Lothar"}],"user_id":"15278","title":"Rupeas: Ruby Powered Event Analysis DSL","extern":"1"},{"type":"conference","year":"2010","citation":{"ieee":"M. Bienkowski, A. Brinkmann, M. Klonowski, and M. Korzeniowski, “SkewCCC+: A Heterogeneous Distributed Hash Table,” in Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis), 2010, vol. 6490.","short":"M. Bienkowski, A. Brinkmann, M. Klonowski, M. Korzeniowski, in: Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis), Springer, Berlin / Heidelberg, 2010.","mla":"Bienkowski, Marcin, et al. “SkewCCC+: A Heterogeneous Distributed Hash Table.” Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis), vol. 6490, Springer, 2010, doi:10.1007/978-3-642-17653-1_18.","bibtex":"@inproceedings{Bienkowski_Brinkmann_Klonowski_Korzeniowski_2010, place={Berlin / Heidelberg}, series={Lecture Notes in Computer Science (LNCS)}, title={SkewCCC+: A Heterogeneous Distributed Hash Table}, volume={6490}, DOI={10.1007/978-3-642-17653-1_18}, booktitle={Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis)}, publisher={Springer}, author={Bienkowski, Marcin and Brinkmann, André and Klonowski, Marek and Korzeniowski, Miroslaw}, year={2010}, collection={Lecture Notes in Computer Science (LNCS)} }","apa":"Bienkowski, M., Brinkmann, A., Klonowski, M., & Korzeniowski, M. (2010). SkewCCC+: A Heterogeneous Distributed Hash Table. In Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis) (Vol. 6490). Berlin / Heidelberg: Springer. https://doi.org/10.1007/978-3-642-17653-1_18","ama":"Bienkowski M, Brinkmann A, Klonowski M, Korzeniowski M. SkewCCC+: A Heterogeneous Distributed Hash Table. In: Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis). Vol 6490. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer; 2010. doi:10.1007/978-3-642-17653-1_18","chicago":"Bienkowski, Marcin, André Brinkmann, Marek Klonowski, and Miroslaw Korzeniowski. “SkewCCC+: A Heterogeneous Distributed Hash Table.” In Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis), Vol. 6490. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer, 2010. https://doi.org/10.1007/978-3-642-17653-1_18."},"series_title":"Lecture Notes in Computer Science (LNCS)","doi":"10.1007/978-3-642-17653-1_18","intvolume":" 6490","_id":"2217","date_updated":"2022-01-06T06:55:28Z","date_created":"2018-04-05T14:49:51Z","status":"public","volume":6490,"department":[{"_id":"27"}],"publication":"Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis)","publisher":"Springer","author":[{"last_name":"Bienkowski","full_name":"Bienkowski, Marcin","first_name":"Marcin"},{"first_name":"André","full_name":"Brinkmann, André","last_name":"Brinkmann"},{"last_name":"Klonowski","full_name":"Klonowski, Marek","first_name":"Marek"},{"full_name":"Korzeniowski, Miroslaw","first_name":"Miroslaw","last_name":"Korzeniowski"}],"user_id":"24135","title":"SkewCCC+: A Heterogeneous Distributed Hash Table","place":"Berlin / Heidelberg"},{"date_updated":"2022-01-06T06:55:28Z","_id":"2218","page":"39-43","citation":{"chicago":"Wewior, Martin, Lars Packschies, Dirk Blunk, Daniel Wickeroth, Klaus-Dieter Warzecha, Sonja Herres-Pawlis, Sandra Gesing, et al. “The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations.” In Proc. Int. Workshop on Scientific Gateways (IWSG), 39–43. Consorzio COMETA, 2010.","ama":"Wewior M, Packschies L, Blunk D, et al. The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations. In: Proc. Int. Workshop on Scientific Gateways (IWSG). Consorzio COMETA; 2010:39-43.","apa":"Wewior, M., Packschies, L., Blunk, D., Wickeroth, D., Warzecha, K.-D., Herres-Pawlis, S., … Lang, U. (2010). The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations. In Proc. Int. Workshop on Scientific Gateways (IWSG) (pp. 39–43). Consorzio COMETA.","bibtex":"@inproceedings{Wewior_Packschies_Blunk_Wickeroth_Warzecha_Herres-Pawlis_Gesing_Breuers_Krüger_Birkenheuer_et al._2010, title={The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations}, booktitle={Proc. Int. Workshop on Scientific Gateways (IWSG)}, publisher={Consorzio COMETA}, author={Wewior, Martin and Packschies, Lars and Blunk, Dirk and Wickeroth, Daniel and Warzecha, Klaus-Dieter and Herres-Pawlis, Sonja and Gesing, Sandra and Breuers, Sebastian and Krüger, Jens and Birkenheuer, Georg and et al.}, year={2010}, pages={39–43} }","mla":"Wewior, Martin, et al. “The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations.” Proc. Int. Workshop on Scientific Gateways (IWSG), Consorzio COMETA, 2010, pp. 39–43.","short":"M. Wewior, L. Packschies, D. Blunk, D. Wickeroth, K.-D. Warzecha, S. Herres-Pawlis, S. Gesing, S. Breuers, J. Krüger, G. Birkenheuer, U. Lang, in: Proc. Int. Workshop on Scientific Gateways (IWSG), Consorzio COMETA, 2010, pp. 39–43.","ieee":"M. Wewior et al., “The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations,” in Proc. Int. Workshop on Scientific Gateways (IWSG), 2010, pp. 39–43."},"type":"conference","year":"2010","title":"The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations","user_id":"24135","department":[{"_id":"27"}],"publication":"Proc. Int. Workshop on Scientific Gateways (IWSG)","author":[{"first_name":"Martin","full_name":"Wewior, Martin","last_name":"Wewior"},{"last_name":"Packschies","first_name":"Lars","full_name":"Packschies, Lars"},{"last_name":"Blunk","full_name":"Blunk, Dirk","first_name":"Dirk"},{"last_name":"Wickeroth","full_name":"Wickeroth, Daniel","first_name":"Daniel"},{"full_name":"Warzecha, Klaus-Dieter","first_name":"Klaus-Dieter","last_name":"Warzecha"},{"full_name":"Herres-Pawlis, Sonja","first_name":"Sonja","last_name":"Herres-Pawlis"},{"first_name":"Sandra","full_name":"Gesing, Sandra","last_name":"Gesing"},{"full_name":"Breuers, Sebastian","first_name":"Sebastian","last_name":"Breuers"},{"last_name":"Krüger","full_name":"Krüger, Jens","first_name":"Jens"},{"first_name":"Georg","full_name":"Birkenheuer, Georg","last_name":"Birkenheuer"},{"full_name":"Lang, Ulrich","first_name":"Ulrich","last_name":"Lang"}],"publisher":"Consorzio COMETA","date_created":"2018-04-05T14:53:40Z","status":"public"},{"title":"Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware","user_id":"15278","publication_identifier":{"isbn":["1-60132-140-6"]},"date_created":"2018-04-05T16:27:13Z","status":"public","publication":"Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"quality_controlled":"1","publisher":"CSREA Press","author":[{"last_name":"Lübbers","first_name":"Enno","full_name":"Lübbers, Enno"},{"last_name":"Platzner","id":"398","first_name":"Marco","full_name":"Platzner, Marco"},{"last_name":"Plessl","id":"16153","first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian"},{"first_name":"Ariane","full_name":"Keller, Ariane","last_name":"Keller"},{"full_name":"Plattner, Bernhard","first_name":"Bernhard","last_name":"Plattner"}],"_id":"2223","date_updated":"2023-09-26T13:48:32Z","page":"225-231","year":"2010","citation":{"short":"E. Lübbers, M. Platzner, C. Plessl, A. Keller, B. Plattner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 225–231.","ieee":"E. Lübbers, M. Platzner, C. Plessl, A. Keller, and B. Plattner, “Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 225–231.","chicago":"Lübbers, Enno, Marco Platzner, Christian Plessl, Ariane Keller, and Bernhard Plattner. “Towards Adaptive Networking for Embedded Devices Based on Reconfigurable Hardware.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 225–31. CSREA Press, 2010.","apa":"Lübbers, E., Platzner, M., Plessl, C., Keller, A., & Plattner, B. (2010). Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 225–231.","ama":"Lübbers E, Platzner M, Plessl C, Keller A, Plattner B. Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:225-231.","bibtex":"@inproceedings{Lübbers_Platzner_Plessl_Keller_Plattner_2010, title={Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware}, booktitle={Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)}, publisher={CSREA Press}, author={Lübbers, Enno and Platzner, Marco and Plessl, Christian and Keller, Ariane and Plattner, Bernhard}, year={2010}, pages={225–231} }","mla":"Lübbers, Enno, et al. “Towards Adaptive Networking for Embedded Devices Based on Reconfigurable Hardware.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 225–31."},"type":"conference","language":[{"iso":"eng"}]},{"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"publication":"Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)","quality_controlled":"1","author":[{"first_name":"Tobias","full_name":"Beisel, Tobias","last_name":"Beisel"},{"first_name":"Manuel","full_name":"Niekamp, Manuel","last_name":"Niekamp"},{"id":"16153","last_name":"Plessl","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","first_name":"Christian"}],"publisher":"IEEE Computer Society","publication_identifier":{"isbn":["978-1-4244-6965-9"]},"date_created":"2018-04-05T16:39:34Z","status":"public","title":"Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators","user_id":"15278","page":"65-72","citation":{"short":"T. Beisel, M. Niekamp, C. Plessl, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2010, pp. 65–72.","ieee":"T. Beisel, M. Niekamp, and C. Plessl, “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2010, pp. 65–72, doi: 10.1109/ASAP.2010.5540798.","chicago":"Beisel, Tobias, Manuel Niekamp, and Christian Plessl. “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators.” In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 65–72. IEEE Computer Society, 2010. https://doi.org/10.1109/ASAP.2010.5540798.","apa":"Beisel, T., Niekamp, M., & Plessl, C. (2010). Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators. Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 65–72. https://doi.org/10.1109/ASAP.2010.5540798","ama":"Beisel T, Niekamp M, Plessl C. Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators. In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society; 2010:65-72. doi:10.1109/ASAP.2010.5540798","mla":"Beisel, Tobias, et al. “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators.” Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2010, pp. 65–72, doi:10.1109/ASAP.2010.5540798.","bibtex":"@inproceedings{Beisel_Niekamp_Plessl_2010, title={Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators}, DOI={10.1109/ASAP.2010.5540798}, booktitle={Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)}, publisher={IEEE Computer Society}, author={Beisel, Tobias and Niekamp, Manuel and Plessl, Christian}, year={2010}, pages={65–72} }"},"year":"2010","type":"conference","language":[{"iso":"eng"}],"date_updated":"2023-09-26T13:49:21Z","_id":"2226","doi":"10.1109/ASAP.2010.5540798"},{"_id":"2219","date_updated":"2022-01-06T06:55:28Z","page":"44-48","citation":{"ieee":"S. Gesing et al., “Workflow Interoperability in a Grid Portal for Molecular Simulations,” in Proc. Int. Workshop on Scientific Gateways (IWSG), 2010, pp. 44–48.","short":"S. Gesing, I. Marton, G. Birkenheuer, B. Schuller, R. Grunzke, J. Krüger, S. Breuers, D. Blunk, G. Fels, L. Packschies, A. Brinkmann, O. Kohlbacher, M. Kozlovszky, in: Proc. Int. Workshop on Scientific Gateways (IWSG), Consorzio COMETA, 2010, pp. 44–48.","bibtex":"@inproceedings{Gesing_Marton_Birkenheuer_Schuller_Grunzke_Krüger_Breuers_Blunk_Fels_Packschies_et al._2010, title={Workflow Interoperability in a Grid Portal for Molecular Simulations}, booktitle={Proc. Int. Workshop on Scientific Gateways (IWSG)}, publisher={Consorzio COMETA}, author={Gesing, Sandra and Marton, Istvan and Birkenheuer, Georg and Schuller, Bernd and Grunzke, Richard and Krüger, Jens and Breuers, Sebastian and Blunk, Dirk and Fels, Gregor and Packschies, Lars and et al.}, year={2010}, pages={44–48} }","mla":"Gesing, Sandra, et al. “Workflow Interoperability in a Grid Portal for Molecular Simulations.” Proc. Int. Workshop on Scientific Gateways (IWSG), Consorzio COMETA, 2010, pp. 44–48.","apa":"Gesing, S., Marton, I., Birkenheuer, G., Schuller, B., Grunzke, R., Krüger, J., … Kozlovszky, M. (2010). Workflow Interoperability in a Grid Portal for Molecular Simulations. In Proc. Int. Workshop on Scientific Gateways (IWSG) (pp. 44–48). Consorzio COMETA.","ama":"Gesing S, Marton I, Birkenheuer G, et al. Workflow Interoperability in a Grid Portal for Molecular Simulations. In: Proc. Int. Workshop on Scientific Gateways (IWSG). Consorzio COMETA; 2010:44-48.","chicago":"Gesing, Sandra, Istvan Marton, Georg Birkenheuer, Bernd Schuller, Richard Grunzke, Jens Krüger, Sebastian Breuers, et al. “Workflow Interoperability in a Grid Portal for Molecular Simulations.” In Proc. Int. Workshop on Scientific Gateways (IWSG), 44–48. Consorzio COMETA, 2010."},"type":"conference","year":"2010","user_id":"24135","title":"Workflow Interoperability in a Grid Portal for Molecular Simulations","department":[{"_id":"27"}],"publication":"Proc. Int. Workshop on Scientific Gateways (IWSG)","publisher":"Consorzio COMETA","author":[{"last_name":"Gesing","full_name":"Gesing, Sandra","first_name":"Sandra"},{"first_name":"Istvan","full_name":"Marton, Istvan","last_name":"Marton"},{"last_name":"Birkenheuer","full_name":"Birkenheuer, Georg","first_name":"Georg"},{"last_name":"Schuller","first_name":"Bernd","full_name":"Schuller, Bernd"},{"last_name":"Grunzke","full_name":"Grunzke, Richard","first_name":"Richard"},{"last_name":"Krüger","full_name":"Krüger, Jens","first_name":"Jens"},{"last_name":"Breuers","full_name":"Breuers, Sebastian","first_name":"Sebastian"},{"full_name":"Blunk, Dirk","first_name":"Dirk","last_name":"Blunk"},{"last_name":"Fels","full_name":"Fels, Gregor","first_name":"Gregor"},{"last_name":"Packschies","full_name":"Packschies, Lars","first_name":"Lars"},{"last_name":"Brinkmann","full_name":"Brinkmann, André","first_name":"André"},{"last_name":"Kohlbacher","first_name":"Oliver","full_name":"Kohlbacher, Oliver"},{"full_name":"Kozlovszky, Miklos","first_name":"Miklos","last_name":"Kozlovszky"}],"date_created":"2018-04-05T14:55:48Z","status":"public"},{"publication_identifier":{"issn":["1946-1488"],"isbn":["978-1-4244-3892-1"]},"status":"public","date_created":"2018-04-06T15:15:47Z","quality_controlled":"1","author":[{"first_name":"Tobias","full_name":"Schumacher, Tobias","last_name":"Schumacher"},{"last_name":"Plessl","id":"16153","first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982"},{"id":"398","last_name":"Platzner","full_name":"Platzner, Marco","first_name":"Marco"}],"publisher":"IEEE","publication":"Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"keyword":["IMORC","NOC","KNN","accelerator"],"title":"An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure","user_id":"15278","year":"2009","type":"conference","citation":{"chicago":"Schumacher, Tobias, Christian Plessl, and Marco Platzner. “An Accelerator for K-Th Nearest Neighbor Thinning Based on the IMORC Infrastructure.” In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 338–44. IEEE, 2009.","ama":"Schumacher T, Plessl C, Platzner M. An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure. In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE; 2009:338-344.","apa":"Schumacher, T., Plessl, C., & Platzner, M. (2009). An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure. Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 338–344.","mla":"Schumacher, Tobias, et al. “An Accelerator for K-Th Nearest Neighbor Thinning Based on the IMORC Infrastructure.” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–44.","bibtex":"@inproceedings{Schumacher_Plessl_Platzner_2009, title={An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure}, booktitle={Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)}, publisher={IEEE}, author={Schumacher, Tobias and Plessl, Christian and Platzner, Marco}, year={2009}, pages={338–344} }","short":"T. Schumacher, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–344.","ieee":"T. Schumacher, C. Plessl, and M. Platzner, “An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2009, pp. 338–344."},"page":"338-344","language":[{"iso":"eng"}],"_id":"2261","date_updated":"2023-09-26T13:52:52Z"},{"series_title":"Lecture Notes in Computer Science (LNCS)","year":"2009","citation":{"mla":"Höing, Andre, et al. “An Orchestration as a Service Infrastructure Using Grid Technologies and WS-BPEL.” Proc. Int. Conf. on Service Oriented Computing (ICSOC), vol. 5900, Springer, 2009, pp. 301–15, doi:0.1007/978-3-642-10383-4_20.","bibtex":"@inproceedings{Höing_Scherp_Gudenkauf_Meister_Brinkmann_2009, place={Berlin / Heidelberg}, series={Lecture Notes in Computer Science (LNCS)}, title={An Orchestration as a Service Infrastructure using Grid Technologies and WS-BPEL}, volume={5900}, DOI={0.1007/978-3-642-10383-4_20}, booktitle={Proc. Int. Conf. on Service Oriented Computing (ICSOC)}, publisher={Springer}, author={Höing, Andre and Scherp, Guido and Gudenkauf, Stefan and Meister, Dirk and Brinkmann, André}, year={2009}, pages={301–315}, collection={Lecture Notes in Computer Science (LNCS)} }","chicago":"Höing, Andre, Guido Scherp, Stefan Gudenkauf, Dirk Meister, and André Brinkmann. “An Orchestration as a Service Infrastructure Using Grid Technologies and WS-BPEL.” In Proc. Int. Conf. on Service Oriented Computing (ICSOC), 5900:301–15. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer, 2009. https://doi.org/0.1007/978-3-642-10383-4_20.","apa":"Höing, A., Scherp, G., Gudenkauf, S., Meister, D., & Brinkmann, A. (2009). An Orchestration as a Service Infrastructure using Grid Technologies and WS-BPEL. In Proc. Int. Conf. on Service Oriented Computing (ICSOC) (Vol. 5900, pp. 301–315). Berlin / Heidelberg: Springer. https://doi.org/0.1007/978-3-642-10383-4_20","ama":"Höing A, Scherp G, Gudenkauf S, Meister D, Brinkmann A. An Orchestration as a Service Infrastructure using Grid Technologies and WS-BPEL. In: Proc. Int. Conf. on Service Oriented Computing (ICSOC). Vol 5900. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer; 2009:301-315. doi:0.1007/978-3-642-10383-4_20","ieee":"A. Höing, G. Scherp, S. Gudenkauf, D. Meister, and A. Brinkmann, “An Orchestration as a Service Infrastructure using Grid Technologies and WS-BPEL,” in Proc. Int. Conf. on Service Oriented Computing (ICSOC), 2009, vol. 5900, pp. 301–315.","short":"A. Höing, G. Scherp, S. Gudenkauf, D. Meister, A. Brinkmann, in: Proc. Int. Conf. on Service Oriented Computing (ICSOC), Springer, Berlin / Heidelberg, 2009, pp. 301–315."},"type":"conference","page":"301-315","date_updated":"2022-01-06T06:55:32Z","_id":"2239","intvolume":" 5900","doi":"0.1007/978-3-642-10383-4_20","publisher":"Springer","author":[{"full_name":"Höing, Andre","first_name":"Andre","last_name":"Höing"},{"full_name":"Scherp, Guido","first_name":"Guido","last_name":"Scherp"},{"last_name":"Gudenkauf","first_name":"Stefan","full_name":"Gudenkauf, Stefan"},{"last_name":"Meister","first_name":"Dirk","full_name":"Meister, Dirk"},{"full_name":"Brinkmann, André","first_name":"André","last_name":"Brinkmann"}],"department":[{"_id":"27"}],"publication":"Proc. Int. Conf. on Service Oriented Computing (ICSOC)","status":"public","date_created":"2018-04-05T17:14:00Z","volume":5900,"place":"Berlin / Heidelberg","user_id":"24135","title":"An Orchestration as a Service Infrastructure using Grid Technologies and WS-BPEL"},{"publication_identifier":{"isbn":["978-0-7695-3917-1"]},"date_created":"2018-04-05T17:11:28Z","status":"public","publication":"Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig)","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"keyword":["IMORC","graphics"],"quality_controlled":"1","author":[{"last_name":"Schumacher","full_name":"Schumacher, Tobias","first_name":"Tobias"},{"last_name":"Süß","full_name":"Süß, Tim","first_name":"Tim"},{"first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","id":"16153"},{"last_name":"Platzner","id":"398","first_name":"Marco","full_name":"Platzner, Marco"}],"publisher":"IEEE Computer Society","title":"Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000","user_id":"15278","place":"Los Alamitos, CA, USA","page":"119-124","type":"conference","citation":{"chicago":"Schumacher, Tobias, Tim Süß, Christian Plessl, and Marco Platzner. “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000.” In Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 119–24. Los Alamitos, CA, USA: IEEE Computer Society, 2009. https://doi.org/10.1109/ReConFig.2009.32.","apa":"Schumacher, T., Süß, T., Plessl, C., & Platzner, M. (2009). Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000. Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 119–124. https://doi.org/10.1109/ReConFig.2009.32","ama":"Schumacher T, Süß T, Plessl C, Platzner M. Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000. In: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig). IEEE Computer Society; 2009:119-124. doi:10.1109/ReConFig.2009.32","mla":"Schumacher, Tobias, et al. “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000.” Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, 2009, pp. 119–24, doi:10.1109/ReConFig.2009.32.","bibtex":"@inproceedings{Schumacher_Süß_Plessl_Platzner_2009, place={Los Alamitos, CA, USA}, title={Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000}, DOI={10.1109/ReConFig.2009.32}, booktitle={Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE Computer Society}, author={Schumacher, Tobias and Süß, Tim and Plessl, Christian and Platzner, Marco}, year={2009}, pages={119–124} }","short":"T. Schumacher, T. Süß, C. Plessl, M. Platzner, in: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 119–124.","ieee":"T. Schumacher, T. Süß, C. Plessl, and M. Platzner, “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000,” in Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 2009, pp. 119–124, doi: 10.1109/ReConFig.2009.32."},"year":"2009","language":[{"iso":"eng"}],"doi":"10.1109/ReConFig.2009.32","date_updated":"2023-09-26T13:52:32Z","_id":"2238"},{"title":"Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!","user_id":"24135","department":[{"_id":"27"}],"publication":"Proc. Cracow Grid Workshop (CGW)","author":[{"first_name":"Georg","full_name":"Birkenheuer, Georg","last_name":"Birkenheuer"},{"first_name":"Arthur","full_name":"Carlson, Arthur","last_name":"Carlson"},{"first_name":"Alexander","full_name":"Fölling, Alexander","last_name":"Fölling"},{"last_name":"Högqvist","first_name":"Mikael","full_name":"Högqvist, Mikael"},{"last_name":"Hoheisel","full_name":"Hoheisel, Andreas","first_name":"Andreas"},{"first_name":"Alexander","full_name":"Papaspyrou, Alexander","last_name":"Papaspyrou"},{"last_name":"Rieger","full_name":"Rieger, Klaus","first_name":"Klaus"},{"last_name":"Schott","full_name":"Schott, Bernhard","first_name":"Bernhard"},{"full_name":"Ziegler, Wolfgang","first_name":"Wolfgang","last_name":"Ziegler"}],"publication_identifier":{"isbn":["978-83-61433-01-9"]},"date_created":"2018-04-06T15:14:46Z","status":"public","_id":"2260","date_updated":"2022-01-06T06:55:37Z","page":"96-103","type":"conference","year":"2009","citation":{"chicago":"Birkenheuer, Georg, Arthur Carlson, Alexander Fölling, Mikael Högqvist, Andreas Hoheisel, Alexander Papaspyrou, Klaus Rieger, Bernhard Schott, and Wolfgang Ziegler. “Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!” In Proc. Cracow Grid Workshop (CGW), 96–103, 2009.","ama":"Birkenheuer G, Carlson A, Fölling A, et al. Connecting Communities on the Meta-Scheduling Level: The DGSI Approach! In: Proc. Cracow Grid Workshop (CGW). ; 2009:96-103.","apa":"Birkenheuer, G., Carlson, A., Fölling, A., Högqvist, M., Hoheisel, A., Papaspyrou, A., … Ziegler, W. (2009). Connecting Communities on the Meta-Scheduling Level: The DGSI Approach! In Proc. Cracow Grid Workshop (CGW) (pp. 96–103).","mla":"Birkenheuer, Georg, et al. “Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!” Proc. Cracow Grid Workshop (CGW), 2009, pp. 96–103.","bibtex":"@inproceedings{Birkenheuer_Carlson_Fölling_Högqvist_Hoheisel_Papaspyrou_Rieger_Schott_Ziegler_2009, title={Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!}, booktitle={Proc. Cracow Grid Workshop (CGW)}, author={Birkenheuer, Georg and Carlson, Arthur and Fölling, Alexander and Högqvist, Mikael and Hoheisel, Andreas and Papaspyrou, Alexander and Rieger, Klaus and Schott, Bernhard and Ziegler, Wolfgang}, year={2009}, pages={96–103} }","short":"G. Birkenheuer, A. Carlson, A. Fölling, M. Högqvist, A. Hoheisel, A. Papaspyrou, K. Rieger, B. Schott, W. Ziegler, in: Proc. Cracow Grid Workshop (CGW), 2009, pp. 96–103.","ieee":"G. Birkenheuer et al., “Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!,” in Proc. Cracow Grid Workshop (CGW), 2009, pp. 96–103."}},{"year":"2009","citation":{"ieee":"P. Kaufmann, C. Plessl, and M. Platzner, “EvoCaches: Application-specific Adaptation of Cache Mapping,” in Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2009, pp. 11–18.","short":"P. Kaufmann, C. Plessl, M. Platzner, in: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 11–18.","mla":"Kaufmann, Paul, et al. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, 2009, pp. 11–18.","bibtex":"@inproceedings{Kaufmann_Plessl_Platzner_2009, place={Los Alamitos, CA, USA}, title={EvoCaches: Application-specific Adaptation of Cache Mapping}, booktitle={Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS)}, publisher={IEEE Computer Society}, author={Kaufmann, Paul and Plessl, Christian and Platzner, Marco}, year={2009}, pages={11–18} }","apa":"Kaufmann, P., Plessl, C., & Platzner, M. (2009). EvoCaches: Application-specific Adaptation of Cache Mapping. Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 11–18.","ama":"Kaufmann P, Plessl C, Platzner M. EvoCaches: Application-specific Adaptation of Cache Mapping. In: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS). IEEE Computer Society; 2009:11-18.","chicago":"Kaufmann, Paul, Christian Plessl, and Marco Platzner. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” In Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 11–18. Los Alamitos, CA, USA: IEEE Computer Society, 2009."},"type":"conference","page":"11-18","language":[{"iso":"eng"}],"_id":"2262","date_updated":"2023-09-26T13:53:11Z","status":"public","date_created":"2018-04-06T15:18:24Z","author":[{"last_name":"Kaufmann","first_name":"Paul","full_name":"Kaufmann, Paul"},{"full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian","id":"16153","last_name":"Plessl"},{"full_name":"Platzner, Marco","first_name":"Marco","id":"398","last_name":"Platzner"}],"publisher":"IEEE Computer Society","quality_controlled":"1","publication":"Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS)","keyword":["EvoCache","evolvable hardware","computer architecture"],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"title":"EvoCaches: Application-specific Adaptation of Cache Mapping","user_id":"15278","place":"Los Alamitos, CA, USA","abstract":[{"lang":"eng","text":"In this work we present EvoCache, a novel approach for implementing application-specific caches. The key innovation of EvoCache is to make the function that maps memory addresses from the CPU address space to cache indices programmable. We support arbitrary Boolean mapping functions that are implemented within a small reconfigurable logic fabric. For finding suitable cache mapping functions we rely on techniques from the evolvable hardware domain and utilize an evolutionary optimization procedure. We evaluate the use of EvoCache in an embedded processor for two specific applications (JPEG and BZIP2 compression) with respect to execution time, cache miss rate and energy consumption. We show that the evolvable hardware approach for optimizing the cache functions not only significantly improves the cache performance for the training data used during optimization, but that the evolved mapping functions generalize very well. Compared to a conventional cache architecture, EvoCache applied to test data achieves a reduction in execution time of up to 14.31% for JPEG (10.98% for BZIP2), and in energy consumption by 16.43% for JPEG (10.70% for BZIP2). We also discuss the integration of EvoCache into the operating system and show that the area and delay overheads introduced by EvoCache are acceptable. "}]},{"language":[{"iso":"eng"}],"date_updated":"2023-09-26T13:51:44Z","doi":"10.1109/FCCM.2009.25","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"publication_identifier":{"isbn":["978-1-4244-4450-2"]},"title":"IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing","page":"275-278","type":"conference","citation":{"ieee":"T. Schumacher, C. Plessl, and M. Platzner, “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing,” in Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2009, pp. 275–278, doi: 10.1109/FCCM.2009.25.","short":"T. Schumacher, C. Plessl, M. Platzner, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–278.","mla":"Schumacher, Tobias, et al. “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.” Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–78, doi:10.1109/FCCM.2009.25.","bibtex":"@inproceedings{Schumacher_Plessl_Platzner_2009, title={IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing}, DOI={10.1109/FCCM.2009.25}, booktitle={Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM)}, publisher={IEEE Computer Society}, author={Schumacher, Tobias and Plessl, Christian and Platzner, Marco}, year={2009}, pages={275–278} }","chicago":"Schumacher, Tobias, Christian Plessl, and Marco Platzner. “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.” In Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 275–78. IEEE Computer Society, 2009. https://doi.org/10.1109/FCCM.2009.25.","apa":"Schumacher, T., Plessl, C., & Platzner, M. (2009). IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 275–278. https://doi.org/10.1109/FCCM.2009.25","ama":"Schumacher T, Plessl C, Platzner M. IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. In: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM). IEEE Computer Society; 2009:275-278. doi:10.1109/FCCM.2009.25"},"year":"2009","_id":"2350","keyword":["IMORC","interconnect","performance"],"publication":"Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM)","publisher":"IEEE Computer Society","author":[{"last_name":"Schumacher","first_name":"Tobias","full_name":"Schumacher, Tobias"},{"id":"16153","last_name":"Plessl","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian"},{"first_name":"Marco","full_name":"Platzner, Marco","last_name":"Platzner","id":"398"}],"quality_controlled":"1","date_created":"2018-04-16T15:05:52Z","status":"public","abstract":[{"lang":"eng","text":"Mapping applications that consist of a collection of cores to FPGA accelerators and optimizing their performance is a challenging task in high performance reconfigurable computing. We present IMORC, an architectural template and highly versatile on-chip interconnect. IMORC links provide asynchronous FIFOs and bitwidth conversion which allows for flexibly composing accelerators from cores running at full speed within their own clock domains, thus facilitating the re-use of cores and portability. Further, IMORC inserts performance counters for monitoring runtime data. In this paper, we first introduce the IMORC architectural template and the on-chip interconnect, and then demonstrate IMORC on the example of accelerating the k-th nearest neighbor thinning problem on an XD1000 reconfigurable computing system. Using IMORC's monitoring infrastructure, we gain insights into the data-dependent behavior of the application which, in turn, allow for optimizing the accelerator. "}],"user_id":"15278"}]