TY - CONF AU - Beisel, Tobias AU - Niekamp, Manuel AU - Plessl, Christian ID - 2226 SN - 978-1-4244-6965-9 T2 - Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP) TI - Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators ER - TY - CONF AU - Keller, Ariane AU - Plattner, Bernhard AU - Lübbers, Enno AU - Platzner, Marco AU - Plessl, Christian ID - 2206 SN - 978-1-4244-8864-3 T2 - Proc. IEEE Globecom Workshop on Network of the Future (FutureNet) TI - Reconfigurable Nodes for Future Networks ER - TY - CONF AU - Woehrle, Matthias AU - Plessl, Christian AU - Thiele, Lothar ID - 2227 SN - 978-1-4244-7911-5 T2 - Proc. Int. Conf. Networked Sensing Systems (INSS) TI - Rupeas: Ruby Powered Event Analysis DSL ER - TY - CONF AU - Kenter, Tobias AU - Platzner, Marco AU - Plessl, Christian AU - Kauschke, Michael ED - Hammami, Omar ED - Larrabee, Sandra ID - 2228 T2 - Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA) TI - Performance Estimation for the Exploration of CPU-Accelerator Architectures ER - TY - CONF AU - Höing, Andre AU - Scherp, Guido AU - Gudenkauf, Stefan AU - Meister, Dirk AU - Brinkmann, André ID - 2239 T2 - Proc. Int. Conf. on Service Oriented Computing (ICSOC) TI - An Orchestration as a Service Infrastructure using Grid Technologies and WS-BPEL VL - 5900 ER - TY - CONF AU - Niehörster, Oliver AU - Birkenheuer, Georg AU - Brinkmann, André AU - Blunk, Dirk AU - Elsässer, Brigitta AU - Herres-Pawlis, Sonja AU - Krüger, Jens AU - Niehörster, Julia AU - Packschies, Lars AU - Fels, Gregor ID - 2240 SN - 978-83-61433-01-9 T2 - Proc. Cracow Grid Workshop (CGW) TI - Providing Scientific Software as a Service in Consideration of Service Level Agreements ER - TY - CONF AU - Birkenheuer, Georg AU - Carlson, Arthur AU - Fölling, Alexander AU - Högqvist, Mikael AU - Hoheisel, Andreas AU - Papaspyrou, Alexander AU - Rieger, Klaus AU - Schott, Bernhard AU - Ziegler, Wolfgang ID - 2260 SN - 978-83-61433-01-9 T2 - Proc. Cracow Grid Workshop (CGW) TI - Connecting Communities on the Meta-Scheduling Level: The DGSI Approach! ER - TY - CONF AU - Meister, Dirk AU - Brinkmann, André ID - 2264 T2 - Proc. of the Israeli Experimental Systems Conference (SYSTOR) TI - Multi-Level Comparison of Data Deduplication in a Backup Scenario ER - TY - CONF AU - Birkenheuer, Georg AU - Brinkmann, Andre AU - Karl, Holger ID - 818 T2 - Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers TI - The Gain of Overbooking ER - TY - CONF AB - Mapping applications that consist of a collection of cores to FPGA accelerators and optimizing their performance is a challenging task in high performance reconfigurable computing. We present IMORC, an architectural template and highly versatile on-chip interconnect. IMORC links provide asynchronous FIFOs and bitwidth conversion which allows for flexibly composing accelerators from cores running at full speed within their own clock domains, thus facilitating the re-use of cores and portability. Further, IMORC inserts performance counters for monitoring runtime data. In this paper, we first introduce the IMORC architectural template and the on-chip interconnect, and then demonstrate IMORC on the example of accelerating the k-th nearest neighbor thinning problem on an XD1000 reconfigurable computing system. Using IMORC's monitoring infrastructure, we gain insights into the data-dependent behavior of the application which, in turn, allow for optimizing the accelerator. AU - Schumacher, Tobias AU - Plessl, Christian AU - Platzner, Marco ID - 2350 KW - IMORC KW - interconnect KW - performance SN - 978-1-4244-4450-2 T2 - Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM) TI - IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing ER -