--- _id: '1773' author: - first_name: Jörn full_name: Schumacher, Jörn last_name: Schumacher - first_name: J. full_name: T. Anderson, J. last_name: T. Anderson - first_name: A. full_name: Borga, A. last_name: Borga - first_name: H. full_name: Boterenbrood, H. last_name: Boterenbrood - first_name: H. full_name: Chen, H. last_name: Chen - first_name: K. full_name: Chen, K. last_name: Chen - first_name: G. full_name: Drake, G. last_name: Drake - first_name: D. full_name: Francis, D. last_name: Francis - first_name: B. full_name: Gorini, B. last_name: Gorini - first_name: F. full_name: Lanni, F. last_name: Lanni - first_name: Giovanna full_name: Lehmann-Miotto, Giovanna last_name: Lehmann-Miotto - first_name: L. full_name: Levinson, L. last_name: Levinson - first_name: J. full_name: Narevicius, J. last_name: Narevicius - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: A. full_name: Roich, A. last_name: Roich - first_name: S. full_name: Ryu, S. last_name: Ryu - first_name: F. full_name: P. Schreuder, F. last_name: P. Schreuder - first_name: Wainer full_name: Vandelli, Wainer last_name: Vandelli - first_name: J. full_name: Vermeulen, J. last_name: Vermeulen - first_name: J. full_name: Zhang, J. last_name: Zhang citation: ama: 'Schumacher J, T. Anderson J, Borga A, et al. Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm. In: Proc. Int. Conf. on Distributed Event-Based Systems (DEBS). ACM; 2015. doi:10.1145/2675743.2771824' apa: Schumacher, J., T. Anderson, J., Borga, A., Boterenbrood, H., Chen, H., Chen, K., Drake, G., Francis, D., Gorini, B., Lanni, F., Lehmann-Miotto, G., Levinson, L., Narevicius, J., Plessl, C., Roich, A., Ryu, S., P. Schreuder, F., Vandelli, W., Vermeulen, J., & Zhang, J. (2015). Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm. Proc. Int. Conf. on Distributed Event-Based Systems (DEBS). https://doi.org/10.1145/2675743.2771824 bibtex: '@inproceedings{Schumacher_T. Anderson_Borga_Boterenbrood_Chen_Chen_Drake_Francis_Gorini_Lanni_et al._2015, title={Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm}, DOI={10.1145/2675743.2771824}, booktitle={Proc. Int. Conf. on Distributed Event-Based Systems (DEBS)}, publisher={ACM}, author={Schumacher, Jörn and T. Anderson, J. and Borga, A. and Boterenbrood, H. and Chen, H. and Chen, K. and Drake, G. and Francis, D. and Gorini, B. and Lanni, F. and et al.}, year={2015} }' chicago: Schumacher, Jörn, J. T. Anderson, A. Borga, H. Boterenbrood, H. Chen, K. Chen, G. Drake, et al. “Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm.” In Proc. Int. Conf. on Distributed Event-Based Systems (DEBS). ACM, 2015. https://doi.org/10.1145/2675743.2771824. ieee: 'J. Schumacher et al., “Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm,” 2015, doi: 10.1145/2675743.2771824.' mla: Schumacher, Jörn, et al. “Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm.” Proc. Int. Conf. on Distributed Event-Based Systems (DEBS), ACM, 2015, doi:10.1145/2675743.2771824. short: 'J. Schumacher, J. T. Anderson, A. Borga, H. Boterenbrood, H. Chen, K. Chen, G. Drake, D. Francis, B. Gorini, F. Lanni, G. Lehmann-Miotto, L. Levinson, J. Narevicius, C. Plessl, A. Roich, S. Ryu, F. P. Schreuder, W. Vandelli, J. Vermeulen, J. Zhang, in: Proc. Int. Conf. on Distributed Event-Based Systems (DEBS), ACM, 2015.' date_created: 2018-03-23T14:09:33Z date_updated: 2023-09-26T13:31:01Z department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1145/2675743.2771824 language: - iso: eng publication: Proc. Int. Conf. on Distributed Event-Based Systems (DEBS) publisher: ACM quality_controlled: '1' status: public title: Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm type: conference user_id: '15278' year: '2015' ... --- _id: '238' abstract: - lang: eng text: In this paper, we study how binary applications can be transparently accelerated with novel heterogeneous computing resources without requiring any manual porting or developer-provided hints. Our work is based on Binary Acceleration At Runtime (BAAR), our previously introduced binary acceleration mechanism that uses the LLVM Compiler Infrastructure. BAAR is designed as a client-server architecture. The client runs the program to be accelerated in an environment, which allows program analysis and profiling and identifies and extracts suitable program parts to be offloaded. The server compiles and optimizes these offloaded program parts for the accelerator and offers access to these functions to the client with a remote procedure call (RPC) interface. Our previous work proved the feasibility of our approach, but also showed that communication time and overheads limit the granularity of functions that can be meaningfully offloaded. In this work, we motivate the importance of a lightweight, high-performance communication between server and client and present a communication mechanism based on the Message Passing Interface (MPI). We evaluate our approach by using an Intel Xeon Phi 5110P as the acceleration target and show that the communication overhead can be reduced from 40% to 10%, thus enabling even small hotspots to benefit from offloading to an accelerator. author: - first_name: Marvin full_name: Damschen, Marvin last_name: Damschen - first_name: Heinrich full_name: Riebler, Heinrich id: '8961' last_name: Riebler - first_name: Gavin Francis full_name: Vaz, Gavin Francis id: '30332' last_name: Vaz - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Damschen M, Riebler H, Vaz GF, Plessl C. Transparent offloading of computational hotspots from binary code to Xeon Phi. In: Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE). EDA Consortium / IEEE; 2015:1078-1083. doi:10.7873/DATE.2015.1124' apa: Damschen, M., Riebler, H., Vaz, G. F., & Plessl, C. (2015). Transparent offloading of computational hotspots from binary code to Xeon Phi. Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 1078–1083. https://doi.org/10.7873/DATE.2015.1124 bibtex: '@inproceedings{Damschen_Riebler_Vaz_Plessl_2015, title={Transparent offloading of computational hotspots from binary code to Xeon Phi}, DOI={10.7873/DATE.2015.1124}, booktitle={Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE)}, publisher={EDA Consortium / IEEE}, author={Damschen, Marvin and Riebler, Heinrich and Vaz, Gavin Francis and Plessl, Christian}, year={2015}, pages={1078–1083} }' chicago: Damschen, Marvin, Heinrich Riebler, Gavin Francis Vaz, and Christian Plessl. “Transparent Offloading of Computational Hotspots from Binary Code to Xeon Phi.” In Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 1078–83. EDA Consortium / IEEE, 2015. https://doi.org/10.7873/DATE.2015.1124. ieee: 'M. Damschen, H. Riebler, G. F. Vaz, and C. Plessl, “Transparent offloading of computational hotspots from binary code to Xeon Phi,” in Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 2015, pp. 1078–1083, doi: 10.7873/DATE.2015.1124.' mla: Damschen, Marvin, et al. “Transparent Offloading of Computational Hotspots from Binary Code to Xeon Phi.” Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), EDA Consortium / IEEE, 2015, pp. 1078–83, doi:10.7873/DATE.2015.1124. short: 'M. Damschen, H. Riebler, G.F. Vaz, C. Plessl, in: Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), EDA Consortium / IEEE, 2015, pp. 1078–1083.' date_created: 2017-10-17T12:41:38Z date_updated: 2023-09-26T13:31:44Z ddc: - '040' department: - _id: '27' - _id: '518' - _id: '78' doi: 10.7873/DATE.2015.1124 file: - access_level: closed content_type: application/pdf creator: florida date_created: 2018-03-21T10:29:49Z date_updated: 2018-03-21T10:29:49Z file_id: '1500' file_name: 238-plessl15_date.pdf file_size: 380552 relation: main_file success: 1 file_date_updated: 2018-03-21T10:29:49Z has_accepted_license: '1' language: - iso: eng page: 1078-1083 project: - _id: '1' grant_number: '160364472' name: SFB 901 - _id: '14' grant_number: '160364472' name: SFB 901 - Subprojekt C2 - _id: '4' name: SFB 901 - Project Area C - _id: '34' grant_number: '610996' name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures publication: Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE) publisher: EDA Consortium / IEEE quality_controlled: '1' status: public title: Transparent offloading of computational hotspots from binary code to Xeon Phi type: conference user_id: '15278' year: '2015' ... --- _id: '439' abstract: - lang: eng text: Reconfigurable architectures provide an opportunityto accelerate a wide range of applications, frequentlyby exploiting data-parallelism, where the same operations arehomogeneously executed on a (large) set of data. However, whenthe sequential code is executed on a host CPU and only dataparallelloops are executed on an FPGA coprocessor, a sufficientlylarge number of loop iterations (trip counts) is required, such thatthe control- and data-transfer overheads to the coprocessor canbe amortized. However, the trip count of large data-parallel loopsis frequently not known at compile time, but only at runtime justbefore entering a loop. Therefore, we propose to generate codeboth for the CPU and the coprocessor, and to defer the decisionwhere to execute the appropriate code to the runtime of theapplication when the trip count of the loop can be determinedjust at runtime. We demonstrate how an LLVM compiler basedtoolflow can automatically insert appropriate decision blocks intothe application code. Analyzing popular benchmark suites, weshow that this kind of runtime decisions is often applicable. Thepractical feasibility of our approach is demonstrated by a toolflowthat automatically identifies loops suitable for vectorization andgenerates code for the FPGA coprocessor of a Convey HC-1. Thetoolflow adds decisions based on a comparison of the runtimecomputedtrip counts to thresholds for specific loops and alsoincludes support to move just the required data to the coprocessor.We evaluate the integrated toolflow with characteristic loopsexecuted on different input data sizes. author: - first_name: Gavin Francis full_name: Vaz, Gavin Francis id: '30332' last_name: Vaz - first_name: Heinrich full_name: Riebler, Heinrich id: '8961' last_name: Riebler - first_name: Tobias full_name: Kenter, Tobias id: '3145' last_name: Kenter - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Vaz GF, Riebler H, Kenter T, Plessl C. Deferring Accelerator Offloading Decisions to Application Runtime. In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2014:1-8. doi:10.1109/ReConFig.2014.7032509' apa: Vaz, G. F., Riebler, H., Kenter, T., & Plessl, C. (2014). Deferring Accelerator Offloading Decisions to Application Runtime. Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2014.7032509 bibtex: '@inproceedings{Vaz_Riebler_Kenter_Plessl_2014, title={Deferring Accelerator Offloading Decisions to Application Runtime}, DOI={10.1109/ReConFig.2014.7032509}, booktitle={Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Vaz, Gavin Francis and Riebler, Heinrich and Kenter, Tobias and Plessl, Christian}, year={2014}, pages={1–8} }' chicago: Vaz, Gavin Francis, Heinrich Riebler, Tobias Kenter, and Christian Plessl. “Deferring Accelerator Offloading Decisions to Application Runtime.” In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2014. https://doi.org/10.1109/ReConFig.2014.7032509. ieee: 'G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Deferring Accelerator Offloading Decisions to Application Runtime,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032509.' mla: Vaz, Gavin Francis, et al. “Deferring Accelerator Offloading Decisions to Application Runtime.” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8, doi:10.1109/ReConFig.2014.7032509. short: 'G.F. Vaz, H. Riebler, T. Kenter, C. Plessl, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.' date_created: 2017-10-17T12:42:17Z date_updated: 2023-09-26T13:37:02Z ddc: - '040' department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/ReConFig.2014.7032509 file: - access_level: closed content_type: application/pdf creator: florida date_created: 2018-03-16T11:29:52Z date_updated: 2018-03-16T11:29:52Z file_id: '1353' file_name: 439-plessl14a_reconfig.pdf file_size: 557362 relation: main_file success: 1 file_date_updated: 2018-03-16T11:29:52Z has_accepted_license: '1' language: - iso: eng page: 1-8 project: - _id: '1' grant_number: '160364472' name: SFB 901 - _id: '14' grant_number: '160364472' name: SFB 901 - Subprojekt C2 - _id: '4' name: SFB 901 - Project Area C - _id: '34' grant_number: '610996' name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures publication: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) publisher: IEEE quality_controlled: '1' status: public title: Deferring Accelerator Offloading Decisions to Application Runtime type: conference user_id: '15278' year: '2014' ... --- _id: '406' abstract: - lang: eng text: Stereo-matching algorithms recently received a lot of attention from the FPGA acceleration community. Presented solutions range from simple, very resource efficient systems with modest matching quality for small embedded systems to sophisticated algorithms with several processing steps, implemented on big FPGAs. In order to achieve high throughput, most implementations strongly focus on pipelining and data reuse between different computation steps. This approach leads to high efficiency, but limits the supported computation patterns and due the high integration of the implementation, adaptions to the algorithm are difficult. In this work, we present a stereo-matching implementation, that starts by offloading individual kernels from the CPU to the FPGA. Between subsequent compute steps on the FPGA, data is stored off-chip in on-board memory of the FPGA accelerator card. This enables us to accelerate the AD-census algorithm with cross-based aggregation and scanline optimization for the first time without algorithmic changes and for up to full HD image dimensions. Analyzing throughput and bandwidth requirements, we outline some trade-offs that are involved with this approach, compared to tighter integration of more kernel loops into one design. author: - first_name: Tobias full_name: Kenter, Tobias id: '3145' last_name: Kenter - first_name: Henning full_name: Schmitz, Henning last_name: Schmitz - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Kenter T, Schmitz H, Plessl C. Kernel-Centric Acceleration of High Accuracy Stereo-Matching. In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2014:1-8. doi:10.1109/ReConFig.2014.7032535' apa: Kenter, T., Schmitz, H., & Plessl, C. (2014). Kernel-Centric Acceleration of High Accuracy Stereo-Matching. Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2014.7032535 bibtex: '@inproceedings{Kenter_Schmitz_Plessl_2014, title={Kernel-Centric Acceleration of High Accuracy Stereo-Matching}, DOI={10.1109/ReConFig.2014.7032535}, booktitle={Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Kenter, Tobias and Schmitz, Henning and Plessl, Christian}, year={2014}, pages={1–8} }' chicago: Kenter, Tobias, Henning Schmitz, and Christian Plessl. “Kernel-Centric Acceleration of High Accuracy Stereo-Matching.” In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2014. https://doi.org/10.1109/ReConFig.2014.7032535. ieee: 'T. Kenter, H. Schmitz, and C. Plessl, “Kernel-Centric Acceleration of High Accuracy Stereo-Matching,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032535.' mla: Kenter, Tobias, et al. “Kernel-Centric Acceleration of High Accuracy Stereo-Matching.” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8, doi:10.1109/ReConFig.2014.7032535. short: 'T. Kenter, H. Schmitz, C. Plessl, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.' date_created: 2017-10-17T12:42:11Z date_updated: 2023-09-26T13:36:40Z ddc: - '040' department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/ReConFig.2014.7032535 file: - access_level: closed content_type: application/pdf creator: florida date_created: 2018-03-16T11:37:42Z date_updated: 2018-03-16T11:37:42Z file_id: '1366' file_name: 406-ReConFig14.pdf file_size: 932852 relation: main_file success: 1 file_date_updated: 2018-03-16T11:37:42Z has_accepted_license: '1' language: - iso: eng page: 1-8 project: - _id: '1' grant_number: '160364472' name: SFB 901 - _id: '14' grant_number: '160364472' name: SFB 901 - Subprojekt C2 - _id: '4' name: SFB 901 - Project Area C - _id: '34' grant_number: '610996' name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures publication: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) publisher: IEEE quality_controlled: '1' status: public title: Kernel-Centric Acceleration of High Accuracy Stereo-Matching type: conference user_id: '15278' year: '2014' ... --- _id: '1781' abstract: - lang: eng text: In light of an increasing awareness of environmental challenges, extensive research is underway to develop new light-weight materials. A problem arising with these materials is their increased response to vibration. This can be solved using a new composite material that contains embedded hollow spheres that are partially filled with particles. Progress on the adaptation of molecular dynamics towards a particle-based numerical simulation of this material is reported. This includes the treatment of specific boundary conditions and the adaption of the force computation. First results are presented that showcase the damping properties of such particle-filled spheres in a bouncing experiment. author: - first_name: Tobias full_name: Steinle, Tobias last_name: Steinle - first_name: Jadran full_name: Vrabec, Jadran last_name: Vrabec - first_name: Andrea full_name: Walther, Andrea last_name: Walther citation: ama: 'Steinle T, Vrabec J, Walther A. Numerical Simulation of the Damping Behavior of Particle-Filled Hollow Spheres. In: Bock HG, Hoang XP, Rannacher R, Schlöder JP, eds. Proc. Modeling, Simulation and Optimization of Complex Processes (HPSC). Springer International Publishing; 2014:233-243. doi:10.1007/978-3-319-09063-4_19' apa: Steinle, T., Vrabec, J., & Walther, A. (2014). Numerical Simulation of the Damping Behavior of Particle-Filled Hollow Spheres. In H. G. Bock, X. P. Hoang, R. Rannacher, & J. P. Schlöder (Eds.), Proc. Modeling, Simulation and Optimization of Complex Processes (HPSC) (pp. 233–243). Springer International Publishing. https://doi.org/10.1007/978-3-319-09063-4_19 bibtex: '@inproceedings{Steinle_Vrabec_Walther_2014, title={Numerical Simulation of the Damping Behavior of Particle-Filled Hollow Spheres}, DOI={10.1007/978-3-319-09063-4_19}, booktitle={Proc. Modeling, Simulation and Optimization of Complex Processes (HPSC)}, publisher={Springer International Publishing}, author={Steinle, Tobias and Vrabec, Jadran and Walther, Andrea}, editor={Bock, Hans Georg and Hoang, Xuan Phu and Rannacher, Rolf and Schlöder, Johannes P.Editors}, year={2014}, pages={233–243} }' chicago: Steinle, Tobias, Jadran Vrabec, and Andrea Walther. “Numerical Simulation of the Damping Behavior of Particle-Filled Hollow Spheres.” In Proc. Modeling, Simulation and Optimization of Complex Processes (HPSC), edited by Hans Georg Bock, Xuan Phu Hoang, Rolf Rannacher, and Johannes P. Schlöder, 233–43. Springer International Publishing, 2014. https://doi.org/10.1007/978-3-319-09063-4_19. ieee: T. Steinle, J. Vrabec, and A. Walther, “Numerical Simulation of the Damping Behavior of Particle-Filled Hollow Spheres,” in Proc. Modeling, Simulation and Optimization of Complex Processes (HPSC), 2014, pp. 233–243. mla: Steinle, Tobias, et al. “Numerical Simulation of the Damping Behavior of Particle-Filled Hollow Spheres.” Proc. Modeling, Simulation and Optimization of Complex Processes (HPSC), edited by Hans Georg Bock et al., Springer International Publishing, 2014, pp. 233–43, doi:10.1007/978-3-319-09063-4_19. short: 'T. Steinle, J. Vrabec, A. Walther, in: H.G. Bock, X.P. Hoang, R. Rannacher, J.P. Schlöder (Eds.), Proc. Modeling, Simulation and Optimization of Complex Processes (HPSC), Springer International Publishing, 2014, pp. 233–243.' date_created: 2018-03-26T13:47:16Z date_updated: 2022-01-06T06:53:20Z department: - _id: '27' - _id: '104' - _id: '155' doi: 10.1007/978-3-319-09063-4_19 editor: - first_name: Hans Georg full_name: Bock, Hans Georg last_name: Bock - first_name: Xuan Phu full_name: Hoang, Xuan Phu last_name: Hoang - first_name: Rolf full_name: Rannacher, Rolf last_name: Rannacher - first_name: Johannes P. full_name: Schlöder, Johannes P. last_name: Schlöder page: 233-243 publication: Proc. Modeling, Simulation and Optimization of Complex Processes (HPSC) publication_identifier: isbn: - 978-3-319-09063-4 publisher: Springer International Publishing status: public title: Numerical Simulation of the Damping Behavior of Particle-Filled Hollow Spheres type: conference user_id: '24135' year: '2014' ... --- _id: '1782' author: - first_name: Tobias full_name: Graf, Tobias last_name: Graf - first_name: Lars full_name: Schaefers, Lars last_name: Schaefers - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Graf T, Schaefers L, Platzner M. On Semeai Detection in Monte-Carlo Go. In: Proc. Conf. on Computers and Games (CG). Lecture Notes in Computer Science. Switzerland: Springer; 2014:14-25. doi:10.1007/978-3-319-09165-5_2' apa: 'Graf, T., Schaefers, L., & Platzner, M. (2014). On Semeai Detection in Monte-Carlo Go. In Proc. Conf. on Computers and Games (CG) (pp. 14–25). Switzerland: Springer. https://doi.org/10.1007/978-3-319-09165-5_2' bibtex: '@inproceedings{Graf_Schaefers_Platzner_2014, place={Switzerland}, series={Lecture Notes in Computer Science}, title={On Semeai Detection in Monte-Carlo Go}, DOI={10.1007/978-3-319-09165-5_2}, number={8427}, booktitle={Proc. Conf. on Computers and Games (CG)}, publisher={Springer}, author={Graf, Tobias and Schaefers, Lars and Platzner, Marco}, year={2014}, pages={14–25}, collection={Lecture Notes in Computer Science} }' chicago: 'Graf, Tobias, Lars Schaefers, and Marco Platzner. “On Semeai Detection in Monte-Carlo Go.” In Proc. Conf. on Computers and Games (CG), 14–25. Lecture Notes in Computer Science. Switzerland: Springer, 2014. https://doi.org/10.1007/978-3-319-09165-5_2.' ieee: T. Graf, L. Schaefers, and M. Platzner, “On Semeai Detection in Monte-Carlo Go,” in Proc. Conf. on Computers and Games (CG), 2014, no. 8427, pp. 14–25. mla: Graf, Tobias, et al. “On Semeai Detection in Monte-Carlo Go.” Proc. Conf. on Computers and Games (CG), no. 8427, Springer, 2014, pp. 14–25, doi:10.1007/978-3-319-09165-5_2. short: 'T. Graf, L. Schaefers, M. Platzner, in: Proc. Conf. on Computers and Games (CG), Springer, Switzerland, 2014, pp. 14–25.' date_created: 2018-03-26T13:50:37Z date_updated: 2022-01-06T06:53:20Z department: - _id: '27' - _id: '78' doi: 10.1007/978-3-319-09165-5_2 issue: '8427' page: 14-25 place: Switzerland publication: Proc. Conf. on Computers and Games (CG) publisher: Springer series_title: Lecture Notes in Computer Science status: public title: On Semeai Detection in Monte-Carlo Go type: conference user_id: '24135' year: '2014' ... --- _id: '388' abstract: - lang: eng text: In order to leverage the use of reconfigurable architectures in general-purpose computing, quick and automated methods to find suitable accelerator designs are required. We tackle this challenge in both regards. In order to avoid long synthesis times, we target a vector copro- cessor, implemented on the FPGAs of a Convey HC-1. Previous studies showed that existing tools were not able to accelerate a real-world application with low effort. We present a toolflow to automatically identify suitable loops for vectorization, generate a corresponding hardware/software bipartition, and generate coprocessor code. Where applicable, we leverage outer-loop vectorization. We evaluate our tools with a set of characteristic loops, systematically analyzing different dependency and data layout properties. author: - first_name: Tobias full_name: Kenter, Tobias id: '3145' last_name: Kenter - first_name: Gavin Francis full_name: Vaz, Gavin Francis id: '30332' last_name: Vaz - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Kenter T, Vaz GF, Plessl C. Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. In: Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC). Vol 8405. Lecture Notes in Computer Science (LNCS). Springer International Publishing; 2014:144-155. doi:10.1007/978-3-319-05960-0_13' apa: 'Kenter, T., Vaz, G. F., & Plessl, C. (2014). Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 8405, 144–155. https://doi.org/10.1007/978-3-319-05960-0_13' bibtex: '@inproceedings{Kenter_Vaz_Plessl_2014, place={Cham}, series={Lecture Notes in Computer Science (LNCS)}, title={Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer}, volume={8405}, DOI={10.1007/978-3-319-05960-0_13}, booktitle={Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC)}, publisher={Springer International Publishing}, author={Kenter, Tobias and Vaz, Gavin Francis and Plessl, Christian}, year={2014}, pages={144–155}, collection={Lecture Notes in Computer Science (LNCS)} }' chicago: 'Kenter, Tobias, Gavin Francis Vaz, and Christian Plessl. “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer.” In Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 8405:144–55. Lecture Notes in Computer Science (LNCS). Cham: Springer International Publishing, 2014. https://doi.org/10.1007/978-3-319-05960-0_13.' ieee: 'T. Kenter, G. F. Vaz, and C. Plessl, “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer,” in Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 2014, vol. 8405, pp. 144–155, doi: 10.1007/978-3-319-05960-0_13.' mla: 'Kenter, Tobias, et al. “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer.” Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), vol. 8405, Springer International Publishing, 2014, pp. 144–55, doi:10.1007/978-3-319-05960-0_13.' short: 'T. Kenter, G.F. Vaz, C. Plessl, in: Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), Springer International Publishing, Cham, 2014, pp. 144–155.' date_created: 2017-10-17T12:42:07Z date_updated: 2023-09-26T13:34:08Z ddc: - '040' department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1007/978-3-319-05960-0_13 file: - access_level: closed content_type: application/pdf creator: florida date_created: 2018-03-20T07:02:02Z date_updated: 2018-03-20T07:02:02Z file_id: '1387' file_name: 388-plessl14_arc.pdf file_size: 330193 relation: main_file success: 1 file_date_updated: 2018-03-20T07:02:02Z has_accepted_license: '1' intvolume: ' 8405' language: - iso: eng page: 144-155 place: Cham project: - _id: '1' grant_number: '160364472' name: SFB 901 - _id: '14' grant_number: '160364472' name: SFB 901 - Subprojekt C2 - _id: '4' name: SFB 901 - Project Area C - _id: '34' grant_number: '610996' name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures publication: 'Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC)' publisher: Springer International Publishing quality_controlled: '1' series_title: Lecture Notes in Computer Science (LNCS) status: public title: Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer type: conference user_id: '15278' volume: 8405 year: '2014' ... --- _id: '377' abstract: - lang: eng text: In this paper, we study how AES key schedules can be reconstructed from decayed memory. This operation is a crucial and time consuming operation when trying to break encryption systems with cold-boot attacks. In software, the reconstruction of the AES master key can be performed using a recursive, branch-and-bound tree-search algorithm that exploits redundancies in the key schedule for constraining the search space. In this work, we investigate how this branch-and-bound algorithm can be accelerated with FPGAs. We translated the recursive search procedure to a state machine with an explicit stack for each recursion level and create optimized datapaths to accelerate in particular the processing of the most frequently accessed tree levels. We support two different decay models, of which especially the more realistic non-idealized asymmetric decay model causes very high runtimes in software. Our implementation on a Maxeler dataflow computing system outperforms a software implementation for this model by up to 27x, which makes cold-boot attacks against AES practical even for high error rates. author: - first_name: Heinrich full_name: Riebler, Heinrich id: '8961' last_name: Riebler - first_name: Tobias full_name: Kenter, Tobias id: '3145' last_name: Kenter - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Christoph full_name: Sorge, Christoph last_name: Sorge citation: ama: 'Riebler H, Kenter T, Plessl C, Sorge C. Reconstructing AES Key Schedules from Decayed Memory with FPGAs. In: Proceedings of Field-Programmable Custom Computing Machines (FCCM). IEEE; 2014:222-229. doi:10.1109/FCCM.2014.67' apa: Riebler, H., Kenter, T., Plessl, C., & Sorge, C. (2014). Reconstructing AES Key Schedules from Decayed Memory with FPGAs. Proceedings of Field-Programmable Custom Computing Machines (FCCM), 222–229. https://doi.org/10.1109/FCCM.2014.67 bibtex: '@inproceedings{Riebler_Kenter_Plessl_Sorge_2014, title={Reconstructing AES Key Schedules from Decayed Memory with FPGAs}, DOI={10.1109/FCCM.2014.67}, booktitle={Proceedings of Field-Programmable Custom Computing Machines (FCCM)}, publisher={IEEE}, author={Riebler, Heinrich and Kenter, Tobias and Plessl, Christian and Sorge, Christoph}, year={2014}, pages={222–229} }' chicago: Riebler, Heinrich, Tobias Kenter, Christian Plessl, and Christoph Sorge. “Reconstructing AES Key Schedules from Decayed Memory with FPGAs.” In Proceedings of Field-Programmable Custom Computing Machines (FCCM), 222–29. IEEE, 2014. https://doi.org/10.1109/FCCM.2014.67. ieee: 'H. Riebler, T. Kenter, C. Plessl, and C. Sorge, “Reconstructing AES Key Schedules from Decayed Memory with FPGAs,” in Proceedings of Field-Programmable Custom Computing Machines (FCCM), 2014, pp. 222–229, doi: 10.1109/FCCM.2014.67.' mla: Riebler, Heinrich, et al. “Reconstructing AES Key Schedules from Decayed Memory with FPGAs.” Proceedings of Field-Programmable Custom Computing Machines (FCCM), IEEE, 2014, pp. 222–29, doi:10.1109/FCCM.2014.67. short: 'H. Riebler, T. Kenter, C. Plessl, C. Sorge, in: Proceedings of Field-Programmable Custom Computing Machines (FCCM), IEEE, 2014, pp. 222–229.' date_created: 2017-10-17T12:42:05Z date_updated: 2023-09-26T13:33:50Z ddc: - '040' department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/FCCM.2014.67 file: - access_level: closed content_type: application/pdf creator: florida date_created: 2018-03-20T07:14:20Z date_updated: 2018-03-20T07:14:20Z file_id: '1397' file_name: 377-FCCM14.pdf file_size: 1003907 relation: main_file success: 1 file_date_updated: 2018-03-20T07:14:20Z has_accepted_license: '1' keyword: - coldboot language: - iso: eng page: 222-229 project: - _id: '1' grant_number: '160364472' name: SFB 901 - _id: '14' grant_number: '160364472' name: SFB 901 - Subprojekt C2 - _id: '4' name: SFB 901 - Project Area C - _id: '34' grant_number: '610996' name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures publication: Proceedings of Field-Programmable Custom Computing Machines (FCCM) publisher: IEEE quality_controlled: '1' status: public title: Reconstructing AES Key Schedules from Decayed Memory with FPGAs type: conference user_id: '15278' year: '2014' ... --- _id: '1778' author: - first_name: Gianluca full_name: C. Durelli, Gianluca last_name: C. Durelli - first_name: Marcello full_name: Pogliani, Marcello last_name: Pogliani - first_name: Antonio full_name: Miele, Antonio last_name: Miele - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Heinrich full_name: Riebler, Heinrich id: '8961' last_name: Riebler - first_name: Gavin Francis full_name: Vaz, Gavin Francis id: '30332' last_name: Vaz - first_name: Marco full_name: D. Santambrogio, Marco last_name: D. Santambrogio - first_name: Cristiana full_name: Bolchini, Cristiana last_name: Bolchini citation: ama: 'C. Durelli G, Pogliani M, Miele A, et al. Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach. In: Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA). IEEE; 2014:142-149. doi:10.1109/ISPA.2014.27' apa: 'C. Durelli, G., Pogliani, M., Miele, A., Plessl, C., Riebler, H., Vaz, G. F., D. Santambrogio, M., & Bolchini, C. (2014). Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach. Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 142–149. https://doi.org/10.1109/ISPA.2014.27' bibtex: '@inproceedings{C. Durelli_Pogliani_Miele_Plessl_Riebler_Vaz_D. Santambrogio_Bolchini_2014, title={Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach}, DOI={10.1109/ISPA.2014.27}, booktitle={Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA)}, publisher={IEEE}, author={C. Durelli, Gianluca and Pogliani, Marcello and Miele, Antonio and Plessl, Christian and Riebler, Heinrich and Vaz, Gavin Francis and D. Santambrogio, Marco and Bolchini, Cristiana}, year={2014}, pages={142–149} }' chicago: 'C. Durelli, Gianluca, Marcello Pogliani, Antonio Miele, Christian Plessl, Heinrich Riebler, Gavin Francis Vaz, Marco D. Santambrogio, and Cristiana Bolchini. “Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach.” In Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 142–49. IEEE, 2014. https://doi.org/10.1109/ISPA.2014.27.' ieee: 'G. C. Durelli et al., “Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach,” in Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 2014, pp. 142–149, doi: 10.1109/ISPA.2014.27.' mla: 'C. Durelli, Gianluca, et al. “Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach.” Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), IEEE, 2014, pp. 142–49, doi:10.1109/ISPA.2014.27.' short: 'G. C. Durelli, M. Pogliani, A. Miele, C. Plessl, H. Riebler, G.F. Vaz, M. D. Santambrogio, C. Bolchini, in: Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), IEEE, 2014, pp. 142–149.' date_created: 2018-03-26T13:40:14Z date_updated: 2023-09-26T13:35:40Z department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/ISPA.2014.27 language: - iso: eng page: 142-149 project: - _id: '34' grant_number: '610996' name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures publication: Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA) publisher: IEEE quality_controlled: '1' status: public title: 'Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach' type: conference user_id: '15278' year: '2014' ... --- _id: '1780' author: - first_name: Gianluca full_name: C. Durelli, Gianluca last_name: C. Durelli - first_name: Marcello full_name: Copolla, Marcello last_name: Copolla - first_name: Karim full_name: Djafarian, Karim last_name: Djafarian - first_name: George full_name: Koranaros, George last_name: Koranaros - first_name: Antonio full_name: Miele, Antonio last_name: Miele - first_name: Michele full_name: Paolino, Michele last_name: Paolino - first_name: Oliver full_name: Pell, Oliver last_name: Pell - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Marco full_name: D. Santambrogio, Marco last_name: D. Santambrogio - first_name: Cristiana full_name: Bolchini, Cristiana last_name: Bolchini citation: ama: 'C. Durelli G, Copolla M, Djafarian K, et al. SAVE: Towards efficient resource management in heterogeneous system architectures. In: Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC). Springer; 2014. doi:10.1007/978-3-319-05960-0_38' apa: 'C. Durelli, G., Copolla, M., Djafarian, K., Koranaros, G., Miele, A., Paolino, M., Pell, O., Plessl, C., D. Santambrogio, M., & Bolchini, C. (2014). SAVE: Towards efficient resource management in heterogeneous system architectures. Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC). https://doi.org/10.1007/978-3-319-05960-0_38' bibtex: '@inproceedings{C. Durelli_Copolla_Djafarian_Koranaros_Miele_Paolino_Pell_Plessl_D. Santambrogio_Bolchini_2014, title={SAVE: Towards efficient resource management in heterogeneous system architectures}, DOI={10.1007/978-3-319-05960-0_38}, booktitle={Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC)}, publisher={Springer}, author={C. Durelli, Gianluca and Copolla, Marcello and Djafarian, Karim and Koranaros, George and Miele, Antonio and Paolino, Michele and Pell, Oliver and Plessl, Christian and D. Santambrogio, Marco and Bolchini, Cristiana}, year={2014} }' chicago: 'C. Durelli, Gianluca, Marcello Copolla, Karim Djafarian, George Koranaros, Antonio Miele, Michele Paolino, Oliver Pell, Christian Plessl, Marco D. Santambrogio, and Cristiana Bolchini. “SAVE: Towards Efficient Resource Management in Heterogeneous System Architectures.” In Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC). Springer, 2014. https://doi.org/10.1007/978-3-319-05960-0_38.' ieee: 'G. C. Durelli et al., “SAVE: Towards efficient resource management in heterogeneous system architectures,” 2014, doi: 10.1007/978-3-319-05960-0_38.' mla: 'C. Durelli, Gianluca, et al. “SAVE: Towards Efficient Resource Management in Heterogeneous System Architectures.” Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC), Springer, 2014, doi:10.1007/978-3-319-05960-0_38.' short: 'G. C. Durelli, M. Copolla, K. Djafarian, G. Koranaros, A. Miele, M. Paolino, O. Pell, C. Plessl, M. D. Santambrogio, C. Bolchini, in: Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC), Springer, 2014.' date_created: 2018-03-26T13:45:35Z date_updated: 2023-09-26T13:36:20Z department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1007/978-3-319-05960-0_38 language: - iso: eng project: - _id: '34' grant_number: '610996' name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures publication: 'Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC)' publisher: Springer quality_controlled: '1' status: public title: 'SAVE: Towards efficient resource management in heterogeneous system architectures' type: conference user_id: '15278' year: '2014' ... --- _id: '1788' author: - first_name: Petra full_name: Berenbrink, Petra last_name: Berenbrink - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Tom full_name: Friedetzky, Tom last_name: Friedetzky - first_name: Dirk full_name: Meister, Dirk last_name: Meister - first_name: Lars full_name: Nagel, Lars last_name: Nagel citation: ama: 'Berenbrink P, Brinkmann A, Friedetzky T, Meister D, Nagel L. Distributing Storage in Cloud Environments. In: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW). IEEE; 2013. doi:10.1109/IPDPSW.2013.148' apa: Berenbrink, P., Brinkmann, A., Friedetzky, T., Meister, D., & Nagel, L. (2013). Distributing Storage in Cloud Environments. In Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW). IEEE. https://doi.org/10.1109/IPDPSW.2013.148 bibtex: '@inproceedings{Berenbrink_Brinkmann_Friedetzky_Meister_Nagel_2013, title={Distributing Storage in Cloud Environments}, DOI={10.1109/IPDPSW.2013.148}, booktitle={Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)}, publisher={IEEE}, author={Berenbrink, Petra and Brinkmann, André and Friedetzky, Tom and Meister, Dirk and Nagel, Lars}, year={2013} }' chicago: Berenbrink, Petra, André Brinkmann, Tom Friedetzky, Dirk Meister, and Lars Nagel. “Distributing Storage in Cloud Environments.” In Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW). IEEE, 2013. https://doi.org/10.1109/IPDPSW.2013.148. ieee: P. Berenbrink, A. Brinkmann, T. Friedetzky, D. Meister, and L. Nagel, “Distributing Storage in Cloud Environments,” in Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), 2013. mla: Berenbrink, Petra, et al. “Distributing Storage in Cloud Environments.” Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE, 2013, doi:10.1109/IPDPSW.2013.148. short: 'P. Berenbrink, A. Brinkmann, T. Friedetzky, D. Meister, L. Nagel, in: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE, 2013.' date_created: 2018-03-26T14:52:56Z date_updated: 2022-01-06T06:53:22Z department: - _id: '27' doi: 10.1109/IPDPSW.2013.148 publication: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW) publisher: IEEE status: public title: Distributing Storage in Cloud Environments type: conference user_id: '24135' year: '2013' ... --- _id: '1793' author: - first_name: Dirk full_name: Meister, Dirk last_name: Meister - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Tim full_name: Süß, Tim last_name: Süß citation: ama: 'Meister D, Brinkmann A, Süß T. File Recipe Compression in Data Deduplication Systems. In: Proc. USENIX Conference on File and Storage Technologies (FAST). USENIX Association; 2013:175-182.' apa: Meister, D., Brinkmann, A., & Süß, T. (2013). File Recipe Compression in Data Deduplication Systems. In Proc. USENIX Conference on File and Storage Technologies (FAST) (pp. 175–182). USENIX Association. bibtex: '@inproceedings{Meister_Brinkmann_Süß_2013, title={File Recipe Compression in Data Deduplication Systems}, booktitle={Proc. USENIX Conference on File and Storage Technologies (FAST)}, publisher={USENIX Association}, author={Meister, Dirk and Brinkmann, André and Süß, Tim}, year={2013}, pages={175–182} }' chicago: Meister, Dirk, André Brinkmann, and Tim Süß. “File Recipe Compression in Data Deduplication Systems.” In Proc. USENIX Conference on File and Storage Technologies (FAST), 175–82. USENIX Association, 2013. ieee: D. Meister, A. Brinkmann, and T. Süß, “File Recipe Compression in Data Deduplication Systems,” in Proc. USENIX Conference on File and Storage Technologies (FAST), 2013, pp. 175–182. mla: Meister, Dirk, et al. “File Recipe Compression in Data Deduplication Systems.” Proc. USENIX Conference on File and Storage Technologies (FAST), USENIX Association, 2013, pp. 175–82. short: 'D. Meister, A. Brinkmann, T. Süß, in: Proc. USENIX Conference on File and Storage Technologies (FAST), USENIX Association, 2013, pp. 175–182.' date_created: 2018-03-26T15:16:03Z date_updated: 2022-01-06T06:53:23Z department: - _id: '27' page: 175-182 publication: Proc. USENIX Conference on File and Storage Technologies (FAST) publisher: USENIX Association status: public title: File Recipe Compression in Data Deduplication Systems type: conference user_id: '24135' year: '2013' ... --- _id: '1786' author: - first_name: Server full_name: Kasap, Server last_name: Kasap - first_name: Soydan full_name: Redif, Soydan last_name: Redif citation: ama: 'Kasap S, Redif S. FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm. In: Proc. IEEE Signal Processing and Communications Conf. (SUI). IEEE; 2013. doi:10.1109/SIU.2013.6531530' apa: Kasap, S., & Redif, S. (2013). FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm. In Proc. IEEE Signal Processing and Communications Conf. (SUI). IEEE. https://doi.org/10.1109/SIU.2013.6531530 bibtex: '@inproceedings{Kasap_Redif_2013, title={FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm}, DOI={10.1109/SIU.2013.6531530}, booktitle={Proc. IEEE Signal Processing and Communications Conf. (SUI)}, publisher={IEEE}, author={Kasap, Server and Redif, Soydan}, year={2013} }' chicago: Kasap, Server, and Soydan Redif. “FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm.” In Proc. IEEE Signal Processing and Communications Conf. (SUI). IEEE, 2013. https://doi.org/10.1109/SIU.2013.6531530. ieee: S. Kasap and S. Redif, “FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm,” in Proc. IEEE Signal Processing and Communications Conf. (SUI), 2013. mla: Kasap, Server, and Soydan Redif. “FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm.” Proc. IEEE Signal Processing and Communications Conf. (SUI), IEEE, 2013, doi:10.1109/SIU.2013.6531530. short: 'S. Kasap, S. Redif, in: Proc. IEEE Signal Processing and Communications Conf. (SUI), IEEE, 2013.' date_created: 2018-03-26T14:48:53Z date_updated: 2022-01-06T06:53:20Z department: - _id: '27' - _id: '78' doi: 10.1109/SIU.2013.6531530 publication: Proc. IEEE Signal Processing and Communications Conf. (SUI) publisher: IEEE status: public title: FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm type: conference user_id: '24135' year: '2013' ... --- _id: '528' abstract: - lang: eng text: Cold-boot attacks exploit the fact that DRAM contents are not immediately lost when a PC is powered off. Instead the contents decay rather slowly, in particular if the DRAM chips are cooled to low temperatures. This effect opens an attack vector on cryptographic applications that keep decrypted keys in DRAM. An attacker with access to the target computer can reboot it or remove the RAM modules and quickly copy the RAM contents to non-volatile memory. By exploiting the known cryptographic structure of the cipher and layout of the key data in memory, in our application an AES key schedule with redundancy, the resulting memory image can be searched for sections that could correspond to decayed cryptographic keys; then, the attacker can attempt to reconstruct the original key. However, the runtime of these algorithms grows rapidly with increasing memory image size, error rate and complexity of the bit error model, which limits the practicability of the approach.In this work, we study how the algorithm for key search can be accelerated with custom computing machines. We present an FPGA-based architecture on a Maxeler dataflow computing system that outperforms a software implementation up to 205x, which significantly improves the practicability of cold-attacks against AES. author: - first_name: Heinrich full_name: Riebler, Heinrich id: '8961' last_name: Riebler - first_name: Tobias full_name: Kenter, Tobias id: '3145' last_name: Kenter - first_name: Christoph full_name: Sorge, Christoph last_name: Sorge - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Riebler H, Kenter T, Sorge C, Plessl C. FPGA-accelerated Key Search for Cold-Boot Attacks against AES. In: Proceedings of the International Conference on Field-Programmable Technology (FPT). IEEE; 2013:386-389. doi:10.1109/FPT.2013.6718394' apa: Riebler, H., Kenter, T., Sorge, C., & Plessl, C. (2013). FPGA-accelerated Key Search for Cold-Boot Attacks against AES. Proceedings of the International Conference on Field-Programmable Technology (FPT), 386–389. https://doi.org/10.1109/FPT.2013.6718394 bibtex: '@inproceedings{Riebler_Kenter_Sorge_Plessl_2013, title={FPGA-accelerated Key Search for Cold-Boot Attacks against AES}, DOI={10.1109/FPT.2013.6718394}, booktitle={Proceedings of the International Conference on Field-Programmable Technology (FPT)}, publisher={IEEE}, author={Riebler, Heinrich and Kenter, Tobias and Sorge, Christoph and Plessl, Christian}, year={2013}, pages={386–389} }' chicago: Riebler, Heinrich, Tobias Kenter, Christoph Sorge, and Christian Plessl. “FPGA-Accelerated Key Search for Cold-Boot Attacks against AES.” In Proceedings of the International Conference on Field-Programmable Technology (FPT), 386–89. IEEE, 2013. https://doi.org/10.1109/FPT.2013.6718394. ieee: 'H. Riebler, T. Kenter, C. Sorge, and C. Plessl, “FPGA-accelerated Key Search for Cold-Boot Attacks against AES,” in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2013, pp. 386–389, doi: 10.1109/FPT.2013.6718394.' mla: Riebler, Heinrich, et al. “FPGA-Accelerated Key Search for Cold-Boot Attacks against AES.” Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2013, pp. 386–89, doi:10.1109/FPT.2013.6718394. short: 'H. Riebler, T. Kenter, C. Sorge, C. Plessl, in: Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2013, pp. 386–389.' date_created: 2017-10-17T12:42:35Z date_updated: 2023-09-26T13:37:35Z ddc: - '040' department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/FPT.2013.6718394 file: - access_level: closed content_type: application/pdf creator: florida date_created: 2018-03-15T10:36:08Z date_updated: 2018-03-15T10:36:08Z file_id: '1294' file_name: 528-plessl13_fpt.pdf file_size: 822680 relation: main_file success: 1 file_date_updated: 2018-03-15T10:36:08Z has_accepted_license: '1' keyword: - coldboot language: - iso: eng page: 386-389 project: - _id: '1' grant_number: '160364472' name: SFB 901 - _id: '14' grant_number: '160364472' name: SFB 901 - Subprojekt C2 - _id: '13' name: SFB 901 - Subproject C1 - _id: '4' name: SFB 901 - Project Area C - _id: '34' grant_number: '610996' name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures publication: Proceedings of the International Conference on Field-Programmable Technology (FPT) publisher: IEEE quality_controlled: '1' status: public title: FPGA-accelerated Key Search for Cold-Boot Attacks against AES type: conference user_id: '15278' year: '2013' ... --- _id: '1784' author: - first_name: Jürgen full_name: Kaiser, Jürgen last_name: Kaiser - first_name: Dirk full_name: Meister, Dirk last_name: Meister - first_name: Viktor full_name: Gottfried, Viktor last_name: Gottfried - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Kaiser J, Meister D, Gottfried V, Brinkmann A. MCD: Overcoming the Data Download Bottleneck in Data Centers. In: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS). Washington DC, USA: IEEE Computer Society; 2013:88-97. doi:10.1109/NAS.2013.18' apa: 'Kaiser, J., Meister, D., Gottfried, V., & Brinkmann, A. (2013). MCD: Overcoming the Data Download Bottleneck in Data Centers. In Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS) (pp. 88–97). Washington DC, USA: IEEE Computer Society. https://doi.org/10.1109/NAS.2013.18' bibtex: '@inproceedings{Kaiser_Meister_Gottfried_Brinkmann_2013, place={Washington DC, USA}, title={MCD: Overcoming the Data Download Bottleneck in Data Centers}, DOI={10.1109/NAS.2013.18}, booktitle={Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS)}, publisher={IEEE Computer Society}, author={Kaiser, Jürgen and Meister, Dirk and Gottfried, Viktor and Brinkmann, André}, year={2013}, pages={88–97} }' chicago: 'Kaiser, Jürgen, Dirk Meister, Viktor Gottfried, and André Brinkmann. “MCD: Overcoming the Data Download Bottleneck in Data Centers.” In Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), 88–97. Washington DC, USA: IEEE Computer Society, 2013. https://doi.org/10.1109/NAS.2013.18.' ieee: 'J. Kaiser, D. Meister, V. Gottfried, and A. Brinkmann, “MCD: Overcoming the Data Download Bottleneck in Data Centers,” in Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), 2013, pp. 88–97.' mla: 'Kaiser, Jürgen, et al. “MCD: Overcoming the Data Download Bottleneck in Data Centers.” Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), IEEE Computer Society, 2013, pp. 88–97, doi:10.1109/NAS.2013.18.' short: 'J. Kaiser, D. Meister, V. Gottfried, A. Brinkmann, in: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), IEEE Computer Society, Washington DC, USA, 2013, pp. 88–97.' date_created: 2018-03-26T14:43:38Z date_updated: 2022-01-06T06:53:20Z department: - _id: '27' doi: 10.1109/NAS.2013.18 page: 88-97 place: Washington DC, USA publication: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS) publisher: IEEE Computer Society status: public title: 'MCD: Overcoming the Data Download Bottleneck in Data Centers' type: conference user_id: '24135' year: '2013' ... --- _id: '505' abstract: - lang: eng text: In this paper we introduce “On-The-Fly Computing”, our vision of future IT services that will be provided by assembling modular software components available on world-wide markets. After suitable components have been found, they are automatically integrated, configured and brought to execution in an On-The-Fly Compute Center. We envision that these future compute centers will continue to leverage three current trends in large scale computing which are an increasing amount of parallel processing, a trend to use heterogeneous computing resources, and—in the light of rising energy cost—energy-efficiency as a primary goal in the design and operation of computing systems. In this paper, we point out three research challenges and our current work in these areas. author: - first_name: Markus full_name: Happe, Markus last_name: Happe - first_name: Peter full_name: Kling, Peter last_name: Kling - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner - first_name: Friedhelm full_name: Meyer auf der Heide, Friedhelm id: '15523' last_name: Meyer auf der Heide citation: ama: 'Happe M, Kling P, Plessl C, Platzner M, Meyer auf der Heide F. On-The-Fly Computing: A Novel Paradigm for Individualized IT Services. In: Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS). IEEE; 2013. doi:10.1109/ISORC.2013.6913232' apa: 'Happe, M., Kling, P., Plessl, C., Platzner, M., & Meyer auf der Heide, F. (2013). On-The-Fly Computing: A Novel Paradigm for Individualized IT Services. Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS). https://doi.org/10.1109/ISORC.2013.6913232' bibtex: '@inproceedings{Happe_Kling_Plessl_Platzner_Meyer auf der Heide_2013, title={On-The-Fly Computing: A Novel Paradigm for Individualized IT Services}, DOI={10.1109/ISORC.2013.6913232}, booktitle={Proceedings of the 9th IEEE Workshop on Software Technology for Future embedded and Ubiquitous Systems (SEUS)}, publisher={IEEE}, author={Happe, Markus and Kling, Peter and Plessl, Christian and Platzner, Marco and Meyer auf der Heide, Friedhelm}, year={2013} }' chicago: 'Happe, Markus, Peter Kling, Christian Plessl, Marco Platzner, and Friedhelm Meyer auf der Heide. “On-The-Fly Computing: A Novel Paradigm for Individualized IT Services.” In Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS). IEEE, 2013. https://doi.org/10.1109/ISORC.2013.6913232.' ieee: 'M. Happe, P. Kling, C. Plessl, M. Platzner, and F. Meyer auf der Heide, “On-The-Fly Computing: A Novel Paradigm for Individualized IT Services,” 2013, doi: 10.1109/ISORC.2013.6913232.' mla: 'Happe, Markus, et al. “On-The-Fly Computing: A Novel Paradigm for Individualized IT Services.” Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS), IEEE, 2013, doi:10.1109/ISORC.2013.6913232.' short: 'M. Happe, P. Kling, C. Plessl, M. Platzner, F. Meyer auf der Heide, in: Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS), IEEE, 2013.' date_created: 2017-10-17T12:42:30Z date_updated: 2023-09-26T13:38:20Z ddc: - '040' department: - _id: '63' - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/ISORC.2013.6913232 file: - access_level: closed content_type: application/pdf creator: florida date_created: 2018-03-15T13:38:56Z date_updated: 2018-03-15T13:38:56Z file_id: '1308' file_name: 505-Plessl13_seus.pdf file_size: 1040834 relation: main_file success: 1 file_date_updated: 2018-03-15T13:38:56Z has_accepted_license: '1' language: - iso: eng project: - _id: '1' grant_number: '160364472' name: SFB 901 - _id: '14' grant_number: '160364472' name: SFB 901 - Subprojekt C2 - _id: '4' name: SFB 901 - Project Area C publication: Proceedings of the 9th IEEE Workshop on Software Technology for Future embedded and Ubiquitous Systems (SEUS) publisher: IEEE quality_controlled: '1' status: public title: 'On-The-Fly Computing: A Novel Paradigm for Individualized IT Services' type: conference user_id: '15278' year: '2013' ... --- _id: '1787' author: - first_name: Tim full_name: Suess, Tim last_name: Suess - first_name: Andrew full_name: Schoenrock, Andrew last_name: Schoenrock - first_name: Sebastian full_name: Meisner, Sebastian last_name: Meisner - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Suess T, Schoenrock A, Meisner S, Plessl C. Parallel Macro Pipelining on the Intel SCC Many-Core Computer. In: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW). IEEE Computer Society; 2013:64-73. doi:10.1109/IPDPSW.2013.136' apa: Suess, T., Schoenrock, A., Meisner, S., & Plessl, C. (2013). Parallel Macro Pipelining on the Intel SCC Many-Core Computer. Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), 64–73. https://doi.org/10.1109/IPDPSW.2013.136 bibtex: '@inproceedings{Suess_Schoenrock_Meisner_Plessl_2013, place={Washington, DC, USA}, title={Parallel Macro Pipelining on the Intel SCC Many-Core Computer}, DOI={10.1109/IPDPSW.2013.136}, booktitle={Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)}, publisher={IEEE Computer Society}, author={Suess, Tim and Schoenrock, Andrew and Meisner, Sebastian and Plessl, Christian}, year={2013}, pages={64–73} }' chicago: 'Suess, Tim, Andrew Schoenrock, Sebastian Meisner, and Christian Plessl. “Parallel Macro Pipelining on the Intel SCC Many-Core Computer.” In Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), 64–73. Washington, DC, USA: IEEE Computer Society, 2013. https://doi.org/10.1109/IPDPSW.2013.136.' ieee: 'T. Suess, A. Schoenrock, S. Meisner, and C. Plessl, “Parallel Macro Pipelining on the Intel SCC Many-Core Computer,” in Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), 2013, pp. 64–73, doi: 10.1109/IPDPSW.2013.136.' mla: Suess, Tim, et al. “Parallel Macro Pipelining on the Intel SCC Many-Core Computer.” Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE Computer Society, 2013, pp. 64–73, doi:10.1109/IPDPSW.2013.136. short: 'T. Suess, A. Schoenrock, S. Meisner, C. Plessl, in: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE Computer Society, Washington, DC, USA, 2013, pp. 64–73.' date_created: 2018-03-26T14:51:05Z date_updated: 2023-09-26T13:38:05Z department: - _id: '27' - _id: '518' - _id: '78' - _id: '63' doi: 10.1109/IPDPSW.2013.136 language: - iso: eng page: 64-73 place: Washington, DC, USA project: - _id: '30' grant_number: 01|H11004A name: Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models publication: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW) publication_identifier: isbn: - 978-0-7695-4979-8 publisher: IEEE Computer Society quality_controlled: '1' status: public title: Parallel Macro Pipelining on the Intel SCC Many-Core Computer type: conference user_id: '15278' year: '2013' ... --- _id: '2107' author: - first_name: Richard full_name: Grunzke, Richard last_name: Grunzke - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: Dirk full_name: Blunk, Dirk last_name: Blunk - first_name: Sebastian full_name: Breuers, Sebastian last_name: Breuers - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Sandra full_name: Gesing, Sandra last_name: Gesing - first_name: Sonja full_name: Herres-Pawlis, Sonja last_name: Herres-Pawlis - first_name: Oliver full_name: Kohlbacher, Oliver last_name: Kohlbacher - first_name: Jens full_name: Krüger, Jens last_name: Krüger - first_name: Martin full_name: Kruse, Martin last_name: Kruse - first_name: Ralph full_name: Müller-Pfefferkorn, Ralph last_name: Müller-Pfefferkorn - first_name: Patrick full_name: Schäfer, Patrick last_name: Schäfer - first_name: Bernd full_name: Schuller, Bernd last_name: Schuller - first_name: Thomas full_name: Steinke, Thomas last_name: Steinke - first_name: Andreas full_name: Zink, Andreas last_name: Zink citation: ama: 'Grunzke R, Birkenheuer G, Blunk D, et al. A Data Driven Science Gateway for Computational Workflows. In: Proc. UNICORE Summit. ; 2012.' apa: Grunzke, R., Birkenheuer, G., Blunk, D., Breuers, S., Brinkmann, A., Gesing, S., … Zink, A. (2012). A Data Driven Science Gateway for Computational Workflows. In Proc. UNICORE Summit. bibtex: '@inproceedings{Grunzke_Birkenheuer_Blunk_Breuers_Brinkmann_Gesing_Herres-Pawlis_Kohlbacher_Krüger_Kruse_et al._2012, title={A Data Driven Science Gateway for Computational Workflows}, booktitle={Proc. UNICORE Summit}, author={Grunzke, Richard and Birkenheuer, Georg and Blunk, Dirk and Breuers, Sebastian and Brinkmann, André and Gesing, Sandra and Herres-Pawlis, Sonja and Kohlbacher, Oliver and Krüger, Jens and Kruse, Martin and et al.}, year={2012} }' chicago: Grunzke, Richard, Georg Birkenheuer, Dirk Blunk, Sebastian Breuers, André Brinkmann, Sandra Gesing, Sonja Herres-Pawlis, et al. “A Data Driven Science Gateway for Computational Workflows.” In Proc. UNICORE Summit, 2012. ieee: R. Grunzke et al., “A Data Driven Science Gateway for Computational Workflows,” in Proc. UNICORE Summit, 2012. mla: Grunzke, Richard, et al. “A Data Driven Science Gateway for Computational Workflows.” Proc. UNICORE Summit, 2012. short: 'R. Grunzke, G. Birkenheuer, D. Blunk, S. Breuers, A. Brinkmann, S. Gesing, S. Herres-Pawlis, O. Kohlbacher, J. Krüger, M. Kruse, R. Müller-Pfefferkorn, P. Schäfer, B. Schuller, T. Steinke, A. Zink, in: Proc. UNICORE Summit, 2012.' date_created: 2018-03-29T15:06:46Z date_updated: 2022-01-06T06:54:44Z department: - _id: '27' - _id: '518' publication: Proc. UNICORE Summit status: public title: A Data Driven Science Gateway for Computational Workflows type: conference user_id: '24135' year: '2012' ... --- _id: '2178' author: - first_name: Sandra full_name: Gesing, Sandra last_name: Gesing - first_name: Sonja full_name: Herres-Pawlis, Sonja last_name: Herres-Pawlis - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Richard full_name: Grunzke, Richard last_name: Grunzke - first_name: Peter full_name: Kacsuk, Peter last_name: Kacsuk - first_name: Oliver full_name: Kohlbacher, Oliver last_name: Kohlbacher - first_name: Miklos full_name: Kozlovszky, Miklos last_name: Kozlovszky - first_name: Jens full_name: Krüger, Jens last_name: Krüger - first_name: Ralph full_name: Müller-Pfefferkorn, Ralph last_name: Müller-Pfefferkorn - first_name: Patrick full_name: Schäfer, Patrick last_name: Schäfer - first_name: Thomas full_name: Steinke, Thomas last_name: Steinke citation: ama: 'Gesing S, Herres-Pawlis S, Birkenheuer G, et al. A Science Gateway Getting Ready for Serving the International Molecular Simulation Community. In: Proceedings of Science. Vol PoS(EGICF12-EMITC2)050. ; 2012.' apa: Gesing, S., Herres-Pawlis, S., Birkenheuer, G., Brinkmann, A., Grunzke, R., Kacsuk, P., … Steinke, T. (2012). A Science Gateway Getting Ready for Serving the International Molecular Simulation Community. In Proceedings of Science (Vol. PoS(EGICF12-EMITC2)050). bibtex: '@inproceedings{Gesing_Herres-Pawlis_Birkenheuer_Brinkmann_Grunzke_Kacsuk_Kohlbacher_Kozlovszky_Krüger_Müller-Pfefferkorn_et al._2012, title={A Science Gateway Getting Ready for Serving the International Molecular Simulation Community}, volume={PoS(EGICF12-EMITC2)050}, booktitle={Proceedings of Science}, author={Gesing, Sandra and Herres-Pawlis, Sonja and Birkenheuer, Georg and Brinkmann, André and Grunzke, Richard and Kacsuk, Peter and Kohlbacher, Oliver and Kozlovszky, Miklos and Krüger, Jens and Müller-Pfefferkorn, Ralph and et al.}, year={2012} }' chicago: Gesing, Sandra, Sonja Herres-Pawlis, Georg Birkenheuer, André Brinkmann, Richard Grunzke, Peter Kacsuk, Oliver Kohlbacher, et al. “A Science Gateway Getting Ready for Serving the International Molecular Simulation Community.” In Proceedings of Science, Vol. PoS(EGICF12-EMITC2)050, 2012. ieee: S. Gesing et al., “A Science Gateway Getting Ready for Serving the International Molecular Simulation Community,” in Proceedings of Science, 2012, vol. PoS(EGICF12-EMITC2)050. mla: Gesing, Sandra, et al. “A Science Gateway Getting Ready for Serving the International Molecular Simulation Community.” Proceedings of Science, vol. PoS(EGICF12-EMITC2)050, 2012. short: 'S. Gesing, S. Herres-Pawlis, G. Birkenheuer, A. Brinkmann, R. Grunzke, P. Kacsuk, O. Kohlbacher, M. Kozlovszky, J. Krüger, R. Müller-Pfefferkorn, P. Schäfer, T. Steinke, in: Proceedings of Science, 2012.' date_created: 2018-04-03T09:15:35Z date_updated: 2022-01-06T06:55:13Z department: - _id: '27' publication: Proceedings of Science status: public title: A Science Gateway Getting Ready for Serving the International Molecular Simulation Community type: conference user_id: '24135' volume: PoS(EGICF12-EMITC2)050 year: '2012' ... --- _id: '2099' author: - first_name: Dirk full_name: Meister, Dirk last_name: Meister - first_name: Jürgen full_name: Kaiser, Jürgen last_name: Kaiser - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Michael full_name: Kuhn, Michael last_name: Kuhn - first_name: Julian full_name: Kunkel, Julian last_name: Kunkel - first_name: Toni full_name: Cortes, Toni last_name: Cortes citation: ama: 'Meister D, Kaiser J, Brinkmann A, Kuhn M, Kunkel J, Cortes T. A Study on Data Deduplication in HPC Storage Systems. In: Proc. Int. Conf. on Supercomputing (SC). Los Alamitos, CA, USA: IEEE Computer Society; 2012:7:1-7:11. doi:10.1109/SC.2012.14' apa: 'Meister, D., Kaiser, J., Brinkmann, A., Kuhn, M., Kunkel, J., & Cortes, T. (2012). A Study on Data Deduplication in HPC Storage Systems. In Proc. Int. Conf. on Supercomputing (SC) (pp. 7:1-7:11). Los Alamitos, CA, USA: IEEE Computer Society. https://doi.org/10.1109/SC.2012.14' bibtex: '@inproceedings{Meister_Kaiser_Brinkmann_Kuhn_Kunkel_Cortes_2012, place={Los Alamitos, CA, USA}, title={A Study on Data Deduplication in HPC Storage Systems}, DOI={10.1109/SC.2012.14}, booktitle={Proc. Int. Conf. on Supercomputing (SC)}, publisher={IEEE Computer Society}, author={Meister, Dirk and Kaiser, Jürgen and Brinkmann, André and Kuhn, Michael and Kunkel, Julian and Cortes, Toni}, year={2012}, pages={7:1-7:11} }' chicago: 'Meister, Dirk, Jürgen Kaiser, André Brinkmann, Michael Kuhn, Julian Kunkel, and Toni Cortes. “A Study on Data Deduplication in HPC Storage Systems.” In Proc. Int. Conf. on Supercomputing (SC), 7:1-7:11. Los Alamitos, CA, USA: IEEE Computer Society, 2012. https://doi.org/10.1109/SC.2012.14.' ieee: D. Meister, J. Kaiser, A. Brinkmann, M. Kuhn, J. Kunkel, and T. Cortes, “A Study on Data Deduplication in HPC Storage Systems,” in Proc. Int. Conf. on Supercomputing (SC), 2012, pp. 7:1-7:11. mla: Meister, Dirk, et al. “A Study on Data Deduplication in HPC Storage Systems.” Proc. Int. Conf. on Supercomputing (SC), IEEE Computer Society, 2012, pp. 7:1-7:11, doi:10.1109/SC.2012.14. short: 'D. Meister, J. Kaiser, A. Brinkmann, M. Kuhn, J. Kunkel, T. Cortes, in: Proc. Int. Conf. on Supercomputing (SC), IEEE Computer Society, Los Alamitos, CA, USA, 2012, pp. 7:1-7:11.' date_created: 2018-03-29T14:41:55Z date_updated: 2022-01-06T06:54:42Z department: - _id: '27' doi: 10.1109/SC.2012.14 page: 7:1-7:11 place: Los Alamitos, CA, USA publication: Proc. Int. Conf. on Supercomputing (SC) publisher: IEEE Computer Society status: public title: A Study on Data Deduplication in HPC Storage Systems type: conference user_id: '24135' year: '2012' ... --- _id: '2103' author: - first_name: Martin full_name: Wistuba, Martin last_name: Wistuba - first_name: Lars full_name: Schaefers, Lars last_name: Schaefers - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Wistuba M, Schaefers L, Platzner M. Comparison of Bayesian Move Prediction Systems for Computer Go. In: Proc. IEEE Conf. on Computational Intelligence and Games (CIG). IEEE; 2012:91-99. doi:10.1109/CIG.2012.6374143' apa: Wistuba, M., Schaefers, L., & Platzner, M. (2012). Comparison of Bayesian Move Prediction Systems for Computer Go. In Proc. IEEE Conf. on Computational Intelligence and Games (CIG) (pp. 91–99). IEEE. https://doi.org/10.1109/CIG.2012.6374143 bibtex: '@inproceedings{Wistuba_Schaefers_Platzner_2012, title={Comparison of Bayesian Move Prediction Systems for Computer Go}, DOI={10.1109/CIG.2012.6374143}, booktitle={Proc. IEEE Conf. on Computational Intelligence and Games (CIG)}, publisher={IEEE}, author={Wistuba, Martin and Schaefers, Lars and Platzner, Marco}, year={2012}, pages={91–99} }' chicago: Wistuba, Martin, Lars Schaefers, and Marco Platzner. “Comparison of Bayesian Move Prediction Systems for Computer Go.” In Proc. IEEE Conf. on Computational Intelligence and Games (CIG), 91–99. IEEE, 2012. https://doi.org/10.1109/CIG.2012.6374143. ieee: M. Wistuba, L. Schaefers, and M. Platzner, “Comparison of Bayesian Move Prediction Systems for Computer Go,” in Proc. IEEE Conf. on Computational Intelligence and Games (CIG), 2012, pp. 91–99. mla: Wistuba, Martin, et al. “Comparison of Bayesian Move Prediction Systems for Computer Go.” Proc. IEEE Conf. on Computational Intelligence and Games (CIG), IEEE, 2012, pp. 91–99, doi:10.1109/CIG.2012.6374143. short: 'M. Wistuba, L. Schaefers, M. Platzner, in: Proc. IEEE Conf. on Computational Intelligence and Games (CIG), IEEE, 2012, pp. 91–99.' date_created: 2018-03-29T14:59:35Z date_updated: 2022-01-06T06:54:42Z department: - _id: '27' - _id: '78' doi: 10.1109/CIG.2012.6374143 page: 91-99 publication: Proc. IEEE Conf. on Computational Intelligence and Games (CIG) publisher: IEEE status: public title: Comparison of Bayesian Move Prediction Systems for Computer Go type: conference user_id: '24135' year: '2012' ... --- _id: '2106' abstract: - lang: eng text: "Although the benefits of FPGAs for accelerating scientific codes are widely acknowledged, the use of FPGA accelerators in scientific computing is not widespread because reaping these benefits requires knowledge of hardware design methods and tools that is typically not available with domain scientists. A promising but hardly investigated approach is to develop tool flows that keep the common languages for scientific code (C,C++, and Fortran) and allow the developer to augment the source code with OpenMPlike directives for instructing the compiler which parts of the application shall be offloaded the FPGA accelerator.\r\nIn this work we study whether the promise of effective FPGA acceleration with an OpenMP-like programming effort\r\ncan actually be held. Our target system is the Convey HC-1 reconfigurable computer for which an OpenMP-like\r\nprogramming environment exists. As case study we use an application from computational nanophotonics. Our results\r\nshow that a developer without previous FPGA experience could create an FPGA-accelerated application that is competitive to an optimized OpenMP-parallelized CPU version running on a two socket quad-core server. Finally, we discuss our experiences with this tool flow and the Convey HC-1 from a productivity and economic point of view." author: - first_name: Björn full_name: Meyer, Björn last_name: Meyer - first_name: Jörn full_name: Schumacher, Jörn last_name: Schumacher - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Jens full_name: Förstner, Jens id: '158' last_name: Förstner orcid: 0000-0001-7059-9862 citation: ama: 'Meyer B, Schumacher J, Plessl C, Förstner J. Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE; 2012:189-196. doi:10.1109/FPL.2012.6339370' apa: Meyer, B., Schumacher, J., Plessl, C., & Förstner, J. (2012). Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 189–196. https://doi.org/10.1109/FPL.2012.6339370 bibtex: '@inproceedings{Meyer_Schumacher_Plessl_Förstner_2012, title={Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?}, DOI={10.1109/FPL.2012.6339370}, booktitle={Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)}, publisher={IEEE}, author={Meyer, Björn and Schumacher, Jörn and Plessl, Christian and Förstner, Jens}, year={2012}, pages={189–196} }' chicago: Meyer, Björn, Jörn Schumacher, Christian Plessl, and Jens Förstner. “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?” In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 189–96. IEEE, 2012. https://doi.org/10.1109/FPL.2012.6339370. ieee: 'B. Meyer, J. Schumacher, C. Plessl, and J. Förstner, “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2012, pp. 189–196, doi: 10.1109/FPL.2012.6339370.' mla: Meyer, Björn, et al. “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 189–96, doi:10.1109/FPL.2012.6339370. short: 'B. Meyer, J. Schumacher, C. Plessl, J. Förstner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 189–196.' conference: name: 22nd International Conference on Field Programmable Logic and Applicaitons (FPL) date_created: 2018-03-29T15:04:25Z date_updated: 2023-09-26T13:39:13Z ddc: - '000' department: - _id: '27' - _id: '518' - _id: '15' - _id: '78' doi: 10.1109/FPL.2012.6339370 file: - access_level: closed content_type: application/pdf creator: fossie date_created: 2019-02-13T09:04:46Z date_updated: 2019-02-13T09:04:46Z file_id: '7638' file_name: 2012-11 Meyer,Schumacher,Plessl,Förstner_Convey vector personalities-FPGA acceleratin with an openmp-like programming effort.pdf file_size: 2148787 relation: main_file success: 1 file_date_updated: 2019-02-13T09:04:46Z has_accepted_license: '1' keyword: - funding-upb-forschungspreis - funding-maxup - tet_topic_hpc language: - iso: eng page: 189-196 publication: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL) publisher: IEEE quality_controlled: '1' status: public title: Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? type: conference user_id: '15278' year: '2012' ... --- _id: '1789' author: - first_name: Jürgen full_name: Kaiser, Jürgen last_name: Kaiser - first_name: Dirk full_name: Meister, Dirk last_name: Meister - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Sascha full_name: Effert, Sascha last_name: Effert citation: ama: 'Kaiser J, Meister D, Brinkmann A, Effert S. Design of an exact data deduplication cluster. In: Proc. Symp. on Mass Storage Systems and Technologies (MSST). IEEE; 2012:1-12. doi:10.1109/MSST.2012.6232380' apa: Kaiser, J., Meister, D., Brinkmann, A., & Effert, S. (2012). Design of an exact data deduplication cluster. In Proc. Symp. on Mass Storage Systems and Technologies (MSST) (pp. 1–12). IEEE. https://doi.org/10.1109/MSST.2012.6232380 bibtex: '@inproceedings{Kaiser_Meister_Brinkmann_Effert_2012, title={Design of an exact data deduplication cluster}, DOI={10.1109/MSST.2012.6232380}, booktitle={Proc. Symp. on Mass Storage Systems and Technologies (MSST)}, publisher={IEEE}, author={Kaiser, Jürgen and Meister, Dirk and Brinkmann, André and Effert, Sascha}, year={2012}, pages={1–12} }' chicago: Kaiser, Jürgen, Dirk Meister, André Brinkmann, and Sascha Effert. “Design of an Exact Data Deduplication Cluster.” In Proc. Symp. on Mass Storage Systems and Technologies (MSST), 1–12. IEEE, 2012. https://doi.org/10.1109/MSST.2012.6232380. ieee: J. Kaiser, D. Meister, A. Brinkmann, and S. Effert, “Design of an exact data deduplication cluster,” in Proc. Symp. on Mass Storage Systems and Technologies (MSST), 2012, pp. 1–12. mla: Kaiser, Jürgen, et al. “Design of an Exact Data Deduplication Cluster.” Proc. Symp. on Mass Storage Systems and Technologies (MSST), IEEE, 2012, pp. 1–12, doi:10.1109/MSST.2012.6232380. short: 'J. Kaiser, D. Meister, A. Brinkmann, S. Effert, in: Proc. Symp. on Mass Storage Systems and Technologies (MSST), IEEE, 2012, pp. 1–12.' date_created: 2018-03-26T15:12:01Z date_updated: 2022-01-06T06:53:22Z department: - _id: '27' doi: 10.1109/MSST.2012.6232380 page: 1-12 publication: Proc. Symp. on Mass Storage Systems and Technologies (MSST) publisher: IEEE status: public title: Design of an exact data deduplication cluster type: conference user_id: '24135' year: '2012' ... --- _id: '615' abstract: - lang: eng text: Due to the continuously shrinking device structures and increasing densities of FPGAs, thermal aspects have become the new focus for many research projects over the last years. Most researchers rely on temperature simulations to evaluate their novel thermal management techniques. However, the accuracy of the simulations is to some extent questionable and they require a high computational effort if a detailed thermal model is used.For experimental evaluation of real-world temperature management methods, often synthetic heat sources are employed. Therefore, in this paper we investigated the question if we can create significant rises in temperature on modern FPGAs to enable future evaluation of thermal management techniques based on experiments in contrast to simulations. Therefore, we have developed eight different heat-generating cores that use different subsets of the FPGA resources. Our experimental results show that, according to the built-in thermal diode of our Xilinx Virtex-5 FPGA, we can increase the chip temperature by 134 degree C in less than 12 minutes by only utilizing about 21% of the slices. author: - first_name: Markus full_name: Happe, Markus last_name: Happe - first_name: Hendrik full_name: Hangmann, Hendrik last_name: Hangmann - first_name: Andreas full_name: Agne, Andreas last_name: Agne - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Happe M, Hangmann H, Agne A, Plessl C. Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. In: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8. doi:10.1109/ReConFig.2012.6416745' apa: Happe, M., Hangmann, H., Agne, A., & Plessl, C. (2012). Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2012.6416745 bibtex: '@inproceedings{Happe_Hangmann_Agne_Plessl_2012, title={Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators}, DOI={10.1109/ReConFig.2012.6416745}, booktitle={Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Happe, Markus and Hangmann, Hendrik and Agne, Andreas and Plessl, Christian}, year={2012}, pages={1–8} }' chicago: Happe, Markus, Hendrik Hangmann, Andreas Agne, and Christian Plessl. “Eight Ways to Put Your FPGA on Fire – A Systematic Study of Heat Generators.” In Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2012. https://doi.org/10.1109/ReConFig.2012.6416745. ieee: 'M. Happe, H. Hangmann, A. Agne, and C. Plessl, “Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators,” in Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416745.' mla: Happe, Markus, et al. “Eight Ways to Put Your FPGA on Fire – A Systematic Study of Heat Generators.” Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416745. short: 'M. Happe, H. Hangmann, A. Agne, C. Plessl, in: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.' date_created: 2017-10-17T12:42:51Z date_updated: 2023-09-26T13:42:26Z ddc: - '040' department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/ReConFig.2012.6416745 file: - access_level: closed content_type: application/pdf creator: florida date_created: 2018-03-15T06:48:32Z date_updated: 2018-03-15T06:48:32Z file_id: '1246' file_name: 615-ReConFig12_01.pdf file_size: 730144 relation: main_file success: 1 file_date_updated: 2018-03-15T06:48:32Z has_accepted_license: '1' language: - iso: eng page: 1-8 project: - _id: '1' grant_number: '160364472' name: SFB 901 - _id: '14' grant_number: '160364472' name: SFB 901 - Subprojekt C2 - _id: '4' name: SFB 901 - Project Area C - _id: '31' grant_number: '257906' name: Engineering Proprioception in Computing Systems publication: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig) publisher: IEEE quality_controlled: '1' status: public title: Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators type: conference user_id: '15278' year: '2012' ... --- _id: '2098' author: - first_name: Jürgen full_name: Kaiser, Jürgen last_name: Kaiser - first_name: Dirk full_name: Meister, Dirk last_name: Meister - first_name: Tim full_name: Hartung, Tim last_name: Hartung - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Kaiser J, Meister D, Hartung T, Brinkmann A. ESB: Ext2 Split Block Device. In: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS). IEEE; 2012:181-188. doi:10.1109/ICPADS.2012.34' apa: 'Kaiser, J., Meister, D., Hartung, T., & Brinkmann, A. (2012). ESB: Ext2 Split Block Device. In Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS) (pp. 181–188). IEEE. https://doi.org/10.1109/ICPADS.2012.34' bibtex: '@inproceedings{Kaiser_Meister_Hartung_Brinkmann_2012, title={ESB: Ext2 Split Block Device}, DOI={10.1109/ICPADS.2012.34}, booktitle={Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS)}, publisher={IEEE}, author={Kaiser, Jürgen and Meister, Dirk and Hartung, Tim and Brinkmann, André}, year={2012}, pages={181–188} }' chicago: 'Kaiser, Jürgen, Dirk Meister, Tim Hartung, and André Brinkmann. “ESB: Ext2 Split Block Device.” In Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), 181–88. IEEE, 2012. https://doi.org/10.1109/ICPADS.2012.34.' ieee: 'J. Kaiser, D. Meister, T. Hartung, and A. Brinkmann, “ESB: Ext2 Split Block Device,” in Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), 2012, pp. 181–188.' mla: 'Kaiser, Jürgen, et al. “ESB: Ext2 Split Block Device.” Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), IEEE, 2012, pp. 181–88, doi:10.1109/ICPADS.2012.34.' short: 'J. Kaiser, D. Meister, T. Hartung, A. Brinkmann, in: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), IEEE, 2012, pp. 181–188.' date_created: 2018-03-29T14:40:04Z date_updated: 2022-01-06T06:54:42Z department: - _id: '27' doi: 10.1109/ICPADS.2012.34 page: 181-188 publication: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS) publisher: IEEE status: public title: 'ESB: Ext2 Split Block Device' type: conference user_id: '24135' year: '2012' ... --- _id: '612' abstract: - lang: eng text: While numerous publications have presented ring oscillator designs for temperature measurements a detailed study of the ring oscillator's design space is still missing. In this work, we introduce metrics for comparing the performance and area efficiency of ring oscillators and a methodology for determining these metrics. As a result, we present a systematic study of the design space for ring oscillators for a Xilinx Virtex-5 platform FPGA. author: - first_name: Christoph full_name: Rüthing, Christoph last_name: Rüthing - first_name: Markus full_name: Happe, Markus last_name: Happe - first_name: Andreas full_name: Agne, Andreas last_name: Agne - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Rüthing C, Happe M, Agne A, Plessl C. Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs. In: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2012:559-562. doi:10.1109/FPL.2012.6339370' apa: Rüthing, C., Happe, M., Agne, A., & Plessl, C. (2012). Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs. Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 559–562. https://doi.org/10.1109/FPL.2012.6339370 bibtex: '@inproceedings{Rüthing_Happe_Agne_Plessl_2012, title={Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs}, DOI={10.1109/FPL.2012.6339370}, booktitle={Proceedings of the International Conference on Field Programmable Logic and Applications (FPL)}, publisher={IEEE}, author={Rüthing, Christoph and Happe, Markus and Agne, Andreas and Plessl, Christian}, year={2012}, pages={559–562} }' chicago: Rüthing, Christoph, Markus Happe, Andreas Agne, and Christian Plessl. “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs.” In Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 559–62. IEEE, 2012. https://doi.org/10.1109/FPL.2012.6339370. ieee: 'C. Rüthing, M. Happe, A. Agne, and C. Plessl, “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs,” in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 2012, pp. 559–562, doi: 10.1109/FPL.2012.6339370.' mla: Rüthing, Christoph, et al. “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs.” Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–62, doi:10.1109/FPL.2012.6339370. short: 'C. Rüthing, M. Happe, A. Agne, C. Plessl, in: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–562.' date_created: 2017-10-17T12:42:51Z date_updated: 2023-09-26T13:42:03Z ddc: - '040' department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/FPL.2012.6339370 file: - access_level: closed content_type: application/pdf creator: florida date_created: 2018-03-15T06:49:03Z date_updated: 2018-03-15T06:49:03Z file_id: '1247' file_name: 612-ruething_fpl12.pdf file_size: 202923 relation: main_file success: 1 file_date_updated: 2018-03-15T06:49:03Z has_accepted_license: '1' language: - iso: eng page: 559-562 project: - _id: '1' grant_number: '160364472' name: SFB 901 - _id: '14' grant_number: '160364472' name: SFB 901 - Subprojekt C2 - _id: '4' name: SFB 901 - Project Area C - _id: '31' grant_number: '257906' name: Engineering Proprioception in Computing Systems publication: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL) publisher: IEEE quality_controlled: '1' status: public title: Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs type: conference user_id: '15278' year: '2012' ... --- _id: '2100' author: - first_name: Server full_name: Kasap, Server last_name: Kasap - first_name: Soydan full_name: Redif, Soydan last_name: Redif citation: ama: 'Kasap S, Redif S. FPGA implementation of a second-order convolutive blind signal separation algorithm. In: Int. Architecture and Engineering Symp. (ARCHENG). ; 2012.' apa: Kasap, S., & Redif, S. (2012). FPGA implementation of a second-order convolutive blind signal separation algorithm. In Int. Architecture and Engineering Symp. (ARCHENG). bibtex: '@inproceedings{Kasap_Redif_2012, title={FPGA implementation of a second-order convolutive blind signal separation algorithm}, booktitle={Int. Architecture and Engineering Symp. (ARCHENG)}, author={Kasap, Server and Redif, Soydan}, year={2012} }' chicago: Kasap, Server, and Soydan Redif. “FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm.” In Int. Architecture and Engineering Symp. (ARCHENG), 2012. ieee: S. Kasap and S. Redif, “FPGA implementation of a second-order convolutive blind signal separation algorithm,” in Int. Architecture and Engineering Symp. (ARCHENG), 2012. mla: Kasap, Server, and Soydan Redif. “FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm.” Int. Architecture and Engineering Symp. (ARCHENG), 2012. short: 'S. Kasap, S. Redif, in: Int. Architecture and Engineering Symp. (ARCHENG), 2012.' date_created: 2018-03-29T14:43:18Z date_updated: 2022-01-06T06:54:42Z department: - _id: '27' - _id: '78' publication: Int. Architecture and Engineering Symp. (ARCHENG) status: public title: FPGA implementation of a second-order convolutive blind signal separation algorithm type: conference user_id: '24135' year: '2012' ... --- _id: '2097' author: - first_name: Server full_name: Kasap, Server last_name: Kasap - first_name: Soydan full_name: Redif, Soydan last_name: Redif citation: ama: 'Kasap S, Redif S. FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm. In: Proc. Int. Conf. on Field Programmable Technology (ICFPT). IEEE Computer Society; 2012:135-140. doi:10.1109/FPT.2012.6412125' apa: Kasap, S., & Redif, S. (2012). FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm. In Proc. Int. Conf. on Field Programmable Technology (ICFPT) (pp. 135–140). IEEE Computer Society. https://doi.org/10.1109/FPT.2012.6412125 bibtex: '@inproceedings{Kasap_Redif_2012, title={FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm}, DOI={10.1109/FPT.2012.6412125}, booktitle={Proc. Int. Conf. on Field Programmable Technology (ICFPT)}, publisher={IEEE Computer Society}, author={Kasap, Server and Redif, Soydan}, year={2012}, pages={135–140} }' chicago: Kasap, Server, and Soydan Redif. “FPGA-Based Design and Implementation of an Approximate Polynomial Matrix EVD Algorithm.” In Proc. Int. Conf. on Field Programmable Technology (ICFPT), 135–40. IEEE Computer Society, 2012. https://doi.org/10.1109/FPT.2012.6412125. ieee: S. Kasap and S. Redif, “FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm,” in Proc. Int. Conf. on Field Programmable Technology (ICFPT), 2012, pp. 135–140. mla: Kasap, Server, and Soydan Redif. “FPGA-Based Design and Implementation of an Approximate Polynomial Matrix EVD Algorithm.” Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2012, pp. 135–40, doi:10.1109/FPT.2012.6412125. short: 'S. Kasap, S. Redif, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2012, pp. 135–140.' date_created: 2018-03-29T14:34:48Z date_updated: 2022-01-06T06:54:42Z department: - _id: '27' - _id: '78' doi: 10.1109/FPT.2012.6412125 page: 135-140 publication: Proc. Int. Conf. on Field Programmable Technology (ICFPT) publisher: IEEE Computer Society status: public title: FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm type: conference user_id: '24135' year: '2012' ... --- _id: '2104' author: - first_name: Tobias full_name: Schlemmer, Tobias last_name: Schlemmer - first_name: Richard full_name: Grunzke, Richard last_name: Grunzke - first_name: Sandra full_name: Gesing, Sandra last_name: Gesing - first_name: Jens full_name: Krüger, Jens last_name: Krüger - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: Ralph full_name: Müller-Pfefferkorn, Ralph last_name: Müller-Pfefferkorn - first_name: Oliver full_name: Kohlbacher, Oliver last_name: Kohlbacher citation: ama: 'Schlemmer T, Grunzke R, Gesing S, et al. Generic User Management for Science Gateways via Virtual Organizations. In: Proc. EGI Technical Forum. ; 2012.' apa: Schlemmer, T., Grunzke, R., Gesing, S., Krüger, J., Birkenheuer, G., Müller-Pfefferkorn, R., & Kohlbacher, O. (2012). Generic User Management for Science Gateways via Virtual Organizations. In Proc. EGI Technical Forum. bibtex: '@inproceedings{Schlemmer_Grunzke_Gesing_Krüger_Birkenheuer_Müller-Pfefferkorn_Kohlbacher_2012, title={Generic User Management for Science Gateways via Virtual Organizations}, booktitle={Proc. EGI Technical Forum}, author={Schlemmer, Tobias and Grunzke, Richard and Gesing, Sandra and Krüger, Jens and Birkenheuer, Georg and Müller-Pfefferkorn, Ralph and Kohlbacher, Oliver}, year={2012} }' chicago: Schlemmer, Tobias, Richard Grunzke, Sandra Gesing, Jens Krüger, Georg Birkenheuer, Ralph Müller-Pfefferkorn, and Oliver Kohlbacher. “Generic User Management for Science Gateways via Virtual Organizations.” In Proc. EGI Technical Forum, 2012. ieee: T. Schlemmer et al., “Generic User Management for Science Gateways via Virtual Organizations,” in Proc. EGI Technical Forum, 2012. mla: Schlemmer, Tobias, et al. “Generic User Management for Science Gateways via Virtual Organizations.” Proc. EGI Technical Forum, 2012. short: 'T. Schlemmer, R. Grunzke, S. Gesing, J. Krüger, G. Birkenheuer, R. Müller-Pfefferkorn, O. Kohlbacher, in: Proc. EGI Technical Forum, 2012.' date_created: 2018-03-29T15:00:48Z date_updated: 2022-01-06T06:54:42Z department: - _id: '27' publication: Proc. EGI Technical Forum status: public title: Generic User Management for Science Gateways via Virtual Organizations type: conference user_id: '24135' year: '2012' ... --- _id: '609' abstract: - lang: eng text: Today's design and operation principles and methods do not scale well with future reconfigurable computing systems due to an increased complexity in system architectures and applications, run-time dynamics and corresponding requirements. Hence, novel design and operation principles and methods are needed that possibly break drastically with the static ones we have built into our systems and the fixed abstraction layers we have cherished over the last decades. Thus, we propose a HW/SW platform that collects and maintains information about its state and progress which enables the system to reason about its behavior (self-awareness) and utilizes its knowledge to effectively and autonomously adapt its behavior to changing requirements (self-expression).To enable self-awareness, our compute nodes collect information using a variety of sensors, i.e. performance counters and thermal diodes, and use internal self-awareness models that process these information. For self-awareness, on-line learning is crucial such that the node learns and continuously updates its models at run-time to react to changing conditions. To enable self-expression, we break with the classic design-time abstraction layers of hardware, operating system and software. In contrast, our system is able to vertically migrate functionalities between the layers at run-time to exploit trade-offs between abstraction and optimization.This paper presents a heterogeneous multi-core architecture, that enables self-awareness and self-expression, an operating system for our proposed hardware/software platform and a novel self-expression method. author: - first_name: Markus full_name: Happe, Markus last_name: Happe - first_name: Andreas full_name: Agne, Andreas last_name: Agne - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Happe M, Agne A, Plessl C, Platzner M. Hardware/Software Platform for Self-aware Compute Nodes. In: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS). ; 2012:8-9.' apa: Happe, M., Agne, A., Plessl, C., & Platzner, M. (2012). Hardware/Software Platform for Self-aware Compute Nodes. Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 8–9. bibtex: '@inproceedings{Happe_Agne_Plessl_Platzner_2012, title={Hardware/Software Platform for Self-aware Compute Nodes}, booktitle={Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS)}, author={Happe, Markus and Agne, Andreas and Plessl, Christian and Platzner, Marco}, year={2012}, pages={8–9} }' chicago: Happe, Markus, Andreas Agne, Christian Plessl, and Marco Platzner. “Hardware/Software Platform for Self-Aware Compute Nodes.” In Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 8–9, 2012. ieee: M. Happe, A. Agne, C. Plessl, and M. Platzner, “Hardware/Software Platform for Self-aware Compute Nodes,” in Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9. mla: Happe, Markus, et al. “Hardware/Software Platform for Self-Aware Compute Nodes.” Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9. short: 'M. Happe, A. Agne, C. Plessl, M. Platzner, in: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.' date_created: 2017-10-17T12:42:50Z date_updated: 2023-09-26T13:41:36Z ddc: - '040' department: - _id: '27' - _id: '518' - _id: '78' file: - access_level: closed content_type: application/pdf creator: florida date_created: 2018-03-15T08:14:17Z date_updated: 2018-03-15T08:14:17Z file_id: '1249' file_name: 609-happe12_fpl_awareness.pdf file_size: 146789 relation: main_file success: 1 file_date_updated: 2018-03-15T08:14:17Z has_accepted_license: '1' language: - iso: eng page: 8-9 project: - _id: '1' grant_number: '160364472' name: SFB 901 - _id: '14' grant_number: '160364472' name: SFB 901 - Subprojekt C2 - _id: '4' name: SFB 901 - Project Area C - _id: '31' grant_number: '257906' name: Engineering Proprioception in Computing Systems publication: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS) quality_controlled: '1' status: public title: Hardware/Software Platform for Self-aware Compute Nodes type: conference user_id: '15278' year: '2012' ... --- _id: '2105' author: - first_name: Giuseppe full_name: Congiu, Giuseppe last_name: Congiu - first_name: Matthias full_name: Grawinkel, Matthias last_name: Grawinkel - first_name: Sai full_name: Narasimhamurthy, Sai last_name: Narasimhamurthy - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Congiu G, Grawinkel M, Narasimhamurthy S, Brinkmann A. One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services. In: Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS). IEEE; 2012:16-24. doi:10.1109/ClusterW.2012.16' apa: 'Congiu, G., Grawinkel, M., Narasimhamurthy, S., & Brinkmann, A. (2012). One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services. In Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS) (pp. 16–24). IEEE. https://doi.org/10.1109/ClusterW.2012.16' bibtex: '@inproceedings{Congiu_Grawinkel_Narasimhamurthy_Brinkmann_2012, title={One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services}, DOI={10.1109/ClusterW.2012.16}, booktitle={Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS)}, publisher={IEEE}, author={Congiu, Giuseppe and Grawinkel, Matthias and Narasimhamurthy, Sai and Brinkmann, André}, year={2012}, pages={16–24} }' chicago: 'Congiu, Giuseppe, Matthias Grawinkel, Sai Narasimhamurthy, and André Brinkmann. “One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services.” In Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS), 16–24. IEEE, 2012. https://doi.org/10.1109/ClusterW.2012.16.' ieee: 'G. Congiu, M. Grawinkel, S. Narasimhamurthy, and A. Brinkmann, “One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services,” in Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS), 2012, pp. 16–24.' mla: 'Congiu, Giuseppe, et al. “One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services.” Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS), IEEE, 2012, pp. 16–24, doi:10.1109/ClusterW.2012.16.' short: 'G. Congiu, M. Grawinkel, S. Narasimhamurthy, A. Brinkmann, in: Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS), IEEE, 2012, pp. 16–24.' date_created: 2018-03-29T15:02:15Z date_updated: 2022-01-06T06:54:42Z department: - _id: '27' doi: 10.1109/ClusterW.2012.16 page: 16-24 publication: Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS) publisher: IEEE status: public title: 'One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services' type: conference user_id: '24135' year: '2012' ... --- _id: '591' abstract: - lang: eng text: One major obstacle for a wide spread FPGA usage in general-purpose computing is the development tool flow that requires much higher effort than for pure software solutions. Convey Computer promises a solution to this problem for their HC-1 platform, where the FPGAs are configured to run as a vector processor and the software source code can be annotated with pragmas that guide an automated vectorization process. We investigate this approach for a stereo matching algorithm that has abundant parallelism and a number of different computational patterns. We note that for this case study the automated vectorization in its current state doesn’t hold its productivity promise. However, we also show that using the Vector Personality can yield a significant speedups compared to CPU implementations in two of three investigated phases of the algorithm. Those speedups don’t match custom FPGA implementations, but can come with much reduced development effort. author: - first_name: Tobias full_name: Kenter, Tobias id: '3145' last_name: Kenter - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Henning full_name: Schmitz, Henning last_name: Schmitz citation: ama: 'Kenter T, Plessl C, Schmitz H. Pragma based parallelization - Trading hardware efficiency for ease of use? In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8. doi:10.1109/ReConFig.2012.6416773' apa: Kenter, T., Plessl, C., & Schmitz, H. (2012). Pragma based parallelization - Trading hardware efficiency for ease of use? Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2012.6416773 bibtex: '@inproceedings{Kenter_Plessl_Schmitz_2012, title={Pragma based parallelization - Trading hardware efficiency for ease of use?}, DOI={10.1109/ReConFig.2012.6416773}, booktitle={Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Kenter, Tobias and Plessl, Christian and Schmitz, Henning}, year={2012}, pages={1–8} }' chicago: Kenter, Tobias, Christian Plessl, and Henning Schmitz. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?” In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2012. https://doi.org/10.1109/ReConFig.2012.6416773. ieee: 'T. Kenter, C. Plessl, and H. Schmitz, “Pragma based parallelization - Trading hardware efficiency for ease of use?,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416773.' mla: Kenter, Tobias, et al. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416773. short: 'T. Kenter, C. Plessl, H. Schmitz, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.' date_created: 2017-10-17T12:42:47Z date_updated: 2023-09-26T13:41:08Z ddc: - '040' department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/ReConFig.2012.6416773 file: - access_level: closed content_type: application/pdf creator: florida date_created: 2018-03-15T08:33:18Z date_updated: 2018-03-15T08:33:18Z file_id: '1257' file_name: 591-ReConFig2012Kenter_Schmitz_Plessl.pdf file_size: 371235 relation: main_file success: 1 file_date_updated: 2018-03-15T08:33:18Z has_accepted_license: '1' language: - iso: eng page: 1-8 project: - _id: '1' grant_number: '160364472' name: SFB 901 - _id: '14' grant_number: '160364472' name: SFB 901 - Subprojekt C2 - _id: '4' name: SFB 901 - Project Area C - _id: '31' grant_number: '257906' name: Engineering Proprioception in Computing Systems publication: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) publisher: IEEE quality_controlled: '1' status: public title: Pragma based parallelization - Trading hardware efficiency for ease of use? type: conference user_id: '15278' year: '2012' ... --- _id: '2180' author: - first_name: Tobias full_name: Beisel, Tobias last_name: Beisel - first_name: Tobias full_name: Wiersema, Tobias id: '3118' last_name: Wiersema - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Beisel T, Wiersema T, Plessl C, Brinkmann A. Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. In: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS). ; 2012.' apa: Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2012). Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS). bibtex: '@inproceedings{Beisel_Wiersema_Plessl_Brinkmann_2012, title={Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux}, booktitle={Proc. Workshop on Computer Architecture and Operating System Co-design (CAOS)}, author={Beisel, Tobias and Wiersema, Tobias and Plessl, Christian and Brinkmann, André}, year={2012} }' chicago: Beisel, Tobias, Tobias Wiersema, Christian Plessl, and André Brinkmann. “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux.” In Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012. ieee: T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux,” 2012. mla: Beisel, Tobias, et al. “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux.” Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012. short: 'T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.' date_created: 2018-04-03T09:18:33Z date_updated: 2023-09-26T13:40:17Z department: - _id: '27' - _id: '518' - _id: '78' keyword: - funding-enhance language: - iso: eng project: - _id: '30' grant_number: 01|H11004A name: Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models publication: Proc. Workshop on Computer Architecture and Operating System Co-design (CAOS) quality_controlled: '1' status: public title: Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux type: conference user_id: '15278' year: '2012' ... --- _id: '2171' author: - first_name: Sandra full_name: Gesing, Sandra last_name: Gesing - first_name: Sonja full_name: Herres-Pawlis, Sonja last_name: Herres-Pawlis - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Richard full_name: Grunzke, Richard last_name: Grunzke - first_name: Peter full_name: Kacsuk, Peter last_name: Kacsuk - first_name: Oliver full_name: Kohlbacher, Oliver last_name: Kohlbacher - first_name: Miklos full_name: Kozlovszky, Miklos last_name: Kozlovszky - first_name: Jens full_name: Krüger, Jens last_name: Krüger - first_name: Ralph full_name: Müller-Pfefferkorn, Ralph last_name: Müller-Pfefferkorn - first_name: Patrick full_name: Schäfer, Patrick last_name: Schäfer - first_name: Thomas full_name: Steinke, Thomas last_name: Steinke citation: ama: 'Gesing S, Herres-Pawlis S, Birkenheuer G, et al. The MoSGrid Community From National to International Scale. In: Proc. EGI Community Forum. ; 2012.' apa: Gesing, S., Herres-Pawlis, S., Birkenheuer, G., Brinkmann, A., Grunzke, R., Kacsuk, P., … Steinke, T. (2012). The MoSGrid Community From National to International Scale. In Proc. EGI Community Forum. bibtex: '@inproceedings{Gesing_Herres-Pawlis_Birkenheuer_Brinkmann_Grunzke_Kacsuk_Kohlbacher_Kozlovszky_Krüger_Müller-Pfefferkorn_et al._2012, title={The MoSGrid Community From National to International Scale}, booktitle={Proc. EGI Community Forum}, author={Gesing, Sandra and Herres-Pawlis, Sonja and Birkenheuer, Georg and Brinkmann, André and Grunzke, Richard and Kacsuk, Peter and Kohlbacher, Oliver and Kozlovszky, Miklos and Krüger, Jens and Müller-Pfefferkorn, Ralph and et al.}, year={2012} }' chicago: Gesing, Sandra, Sonja Herres-Pawlis, Georg Birkenheuer, André Brinkmann, Richard Grunzke, Peter Kacsuk, Oliver Kohlbacher, et al. “The MoSGrid Community From National to International Scale.” In Proc. EGI Community Forum, 2012. ieee: S. Gesing et al., “The MoSGrid Community From National to International Scale,” in Proc. EGI Community Forum, 2012. mla: Gesing, Sandra, et al. “The MoSGrid Community From National to International Scale.” Proc. EGI Community Forum, 2012. short: 'S. Gesing, S. Herres-Pawlis, G. Birkenheuer, A. Brinkmann, R. Grunzke, P. Kacsuk, O. Kohlbacher, M. Kozlovszky, J. Krüger, R. Müller-Pfefferkorn, P. Schäfer, T. Steinke, in: Proc. EGI Community Forum, 2012.' date_created: 2018-04-03T09:01:19Z date_updated: 2022-01-06T06:55:11Z department: - _id: '27' publication: Proc. EGI Community Forum status: public title: The MoSGrid Community From National to International Scale type: conference user_id: '24135' year: '2012' ... --- _id: '2101' author: - first_name: Matthias full_name: Grawinkel, Matthias last_name: Grawinkel - first_name: Tim full_name: Süß, Tim last_name: Süß - first_name: Georg full_name: Best, Georg last_name: Best - first_name: Ivan full_name: Popov, Ivan last_name: Popov - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Grawinkel M, Süß T, Best G, Popov I, Brinkmann A. Towards Dynamic Scripted pNFS Layouts. In: Proc. Parallel Data Storage Workshop (PDSW). IEEE; 2012:13-17. doi:10.1109/SC.Companion.2012.13' apa: Grawinkel, M., Süß, T., Best, G., Popov, I., & Brinkmann, A. (2012). Towards Dynamic Scripted pNFS Layouts. In Proc. Parallel Data Storage Workshop (PDSW) (pp. 13–17). IEEE. https://doi.org/10.1109/SC.Companion.2012.13 bibtex: '@inproceedings{Grawinkel_Süß_Best_Popov_Brinkmann_2012, title={Towards Dynamic Scripted pNFS Layouts}, DOI={10.1109/SC.Companion.2012.13}, booktitle={Proc. Parallel Data Storage Workshop (PDSW)}, publisher={IEEE}, author={Grawinkel, Matthias and Süß, Tim and Best, Georg and Popov, Ivan and Brinkmann, André}, year={2012}, pages={13–17} }' chicago: Grawinkel, Matthias, Tim Süß, Georg Best, Ivan Popov, and André Brinkmann. “Towards Dynamic Scripted PNFS Layouts.” In Proc. Parallel Data Storage Workshop (PDSW), 13–17. IEEE, 2012. https://doi.org/10.1109/SC.Companion.2012.13. ieee: M. Grawinkel, T. Süß, G. Best, I. Popov, and A. Brinkmann, “Towards Dynamic Scripted pNFS Layouts,” in Proc. Parallel Data Storage Workshop (PDSW), 2012, pp. 13–17. mla: Grawinkel, Matthias, et al. “Towards Dynamic Scripted PNFS Layouts.” Proc. Parallel Data Storage Workshop (PDSW), IEEE, 2012, pp. 13–17, doi:10.1109/SC.Companion.2012.13. short: 'M. Grawinkel, T. Süß, G. Best, I. Popov, A. Brinkmann, in: Proc. Parallel Data Storage Workshop (PDSW), IEEE, 2012, pp. 13–17.' date_created: 2018-03-29T14:44:24Z date_updated: 2022-01-06T06:54:42Z department: - _id: '27' doi: 10.1109/SC.Companion.2012.13 page: 13-17 publication: Proc. Parallel Data Storage Workshop (PDSW) publisher: IEEE status: public title: Towards Dynamic Scripted pNFS Layouts type: conference user_id: '24135' year: '2012' ... --- _id: '567' abstract: - lang: eng text: Heterogeneous machines are gaining momentum in the High Performance Computing field, due to the theoretical speedups and power consumption. In practice, while some applications meet the performance expectations, heterogeneous architectures still require a tremendous effort from the application developers. This work presents a code generation method to port codes into heterogeneous platforms, based on transformations of the control flow into function calls. The results show that the cost of the function-call mechanism is affordable for the tested HPC kernels. The complete toolchain, based on the LLVM compiler infrastructure, is fully automated once the sequential specification is provided. author: - first_name: Pablo full_name: Barrio, Pablo last_name: Barrio - first_name: Carlos full_name: Carreras, Carlos last_name: Carreras - first_name: Roberto full_name: Sierra, Roberto last_name: Sierra - first_name: Tobias full_name: Kenter, Tobias id: '3145' last_name: Kenter - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Barrio P, Carreras C, Sierra R, Kenter T, Plessl C. Turning control flow graphs into function calls: Code generation for heterogeneous architectures. In: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS). IEEE; 2012:559-565. doi:10.1109/HPCSim.2012.6266973' apa: 'Barrio, P., Carreras, C., Sierra, R., Kenter, T., & Plessl, C. (2012). Turning control flow graphs into function calls: Code generation for heterogeneous architectures. Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 559–565. https://doi.org/10.1109/HPCSim.2012.6266973' bibtex: '@inproceedings{Barrio_Carreras_Sierra_Kenter_Plessl_2012, title={Turning control flow graphs into function calls: Code generation for heterogeneous architectures}, DOI={10.1109/HPCSim.2012.6266973}, booktitle={Proceedings of the International Conference on High Performance Computing and Simulation (HPCS)}, publisher={IEEE}, author={Barrio, Pablo and Carreras, Carlos and Sierra, Roberto and Kenter, Tobias and Plessl, Christian}, year={2012}, pages={559–565} }' chicago: 'Barrio, Pablo, Carlos Carreras, Roberto Sierra, Tobias Kenter, and Christian Plessl. “Turning Control Flow Graphs into Function Calls: Code Generation for Heterogeneous Architectures.” In Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 559–65. IEEE, 2012. https://doi.org/10.1109/HPCSim.2012.6266973.' ieee: 'P. Barrio, C. Carreras, R. Sierra, T. Kenter, and C. Plessl, “Turning control flow graphs into function calls: Code generation for heterogeneous architectures,” in Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 2012, pp. 559–565, doi: 10.1109/HPCSim.2012.6266973.' mla: 'Barrio, Pablo, et al. “Turning Control Flow Graphs into Function Calls: Code Generation for Heterogeneous Architectures.” Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–65, doi:10.1109/HPCSim.2012.6266973.' short: 'P. Barrio, C. Carreras, R. Sierra, T. Kenter, C. Plessl, in: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–565.' date_created: 2017-10-17T12:42:42Z date_updated: 2023-09-26T13:42:54Z ddc: - '040' department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/HPCSim.2012.6266973 file: - access_level: closed content_type: application/pdf creator: florida date_created: 2018-03-15T10:20:24Z date_updated: 2018-03-15T10:20:24Z file_id: '1275' file_name: 567-ba-ca-12a.pdf file_size: 288508 relation: main_file success: 1 file_date_updated: 2018-03-15T10:20:24Z has_accepted_license: '1' language: - iso: eng page: 559-565 project: - _id: '1' grant_number: '160364472' name: SFB 901 - _id: '14' grant_number: '160364472' name: SFB 901 - Subprojekt C2 - _id: '4' name: SFB 901 - Project Area C publication: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS) publisher: IEEE quality_controlled: '1' status: public title: 'Turning control flow graphs into function calls: Code generation for heterogeneous architectures' type: conference user_id: '15278' year: '2012' ... --- _id: '2199' author: - first_name: Sandra full_name: Gesing, Sandra last_name: Gesing - first_name: Peter full_name: Kacsuk, Peter last_name: Kacsuk - first_name: Miklos full_name: Kozlovszky, Miklos last_name: Kozlovszky - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: Dirk full_name: Blunk, Dirk last_name: Blunk - first_name: Sebastian full_name: Breuers, Sebastian last_name: Breuers - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Gregor full_name: Fels, Gregor last_name: Fels - first_name: Richard full_name: Grunzke, Richard last_name: Grunzke - first_name: Sonja full_name: Herres-Pawlis, Sonja last_name: Herres-Pawlis - first_name: Jens full_name: Krüger, Jens last_name: Krüger - first_name: Lars full_name: Packschies, Lars last_name: Packschies - first_name: Ralph full_name: Müller-Pfefferkorn, Ralph last_name: Müller-Pfefferkorn - first_name: Patrick full_name: Schäfer, Patrick last_name: Schäfer - first_name: Thomas full_name: Steinke, Thomas last_name: Steinke - first_name: Anna full_name: Szikszay Fabri, Anna last_name: Szikszay Fabri - first_name: Klaus-Dieter full_name: Warzecha, Klaus-Dieter last_name: Warzecha - first_name: Martin full_name: Wewior, Martin last_name: Wewior - first_name: Oliver full_name: Kohlbacher, Oliver last_name: Kohlbacher citation: ama: 'Gesing S, Kacsuk P, Kozlovszky M, et al. A Science Gateway for Molecular Simulations. In: Proc. EGI User Forum. ; 2011:94-95.' apa: Gesing, S., Kacsuk, P., Kozlovszky, M., Birkenheuer, G., Blunk, D., Breuers, S., … Kohlbacher, O. (2011). A Science Gateway for Molecular Simulations. In Proc. EGI User Forum (pp. 94–95). bibtex: '@inproceedings{Gesing_Kacsuk_Kozlovszky_Birkenheuer_Blunk_Breuers_Brinkmann_Fels_Grunzke_Herres-Pawlis_et al._2011, title={A Science Gateway for Molecular Simulations}, booktitle={Proc. EGI User Forum}, author={Gesing, Sandra and Kacsuk, Peter and Kozlovszky, Miklos and Birkenheuer, Georg and Blunk, Dirk and Breuers, Sebastian and Brinkmann, André and Fels, Gregor and Grunzke, Richard and Herres-Pawlis, Sonja and et al.}, year={2011}, pages={94–95} }' chicago: Gesing, Sandra, Peter Kacsuk, Miklos Kozlovszky, Georg Birkenheuer, Dirk Blunk, Sebastian Breuers, André Brinkmann, et al. “A Science Gateway for Molecular Simulations.” In Proc. EGI User Forum, 94–95, 2011. ieee: S. Gesing et al., “A Science Gateway for Molecular Simulations,” in Proc. EGI User Forum, 2011, pp. 94–95. mla: Gesing, Sandra, et al. “A Science Gateway for Molecular Simulations.” Proc. EGI User Forum, 2011, pp. 94–95. short: 'S. Gesing, P. Kacsuk, M. Kozlovszky, G. Birkenheuer, D. Blunk, S. Breuers, A. Brinkmann, G. Fels, R. Grunzke, S. Herres-Pawlis, J. Krüger, L. Packschies, R. Müller-Pfefferkorn, P. Schäfer, T. Steinke, A. Szikszay Fabri, K.-D. Warzecha, M. Wewior, O. Kohlbacher, in: Proc. EGI User Forum, 2011, pp. 94–95.' date_created: 2018-04-03T15:07:11Z date_updated: 2022-01-06T06:55:22Z department: - _id: '27' page: 94-95 publication: Proc. EGI User Forum status: public title: A Science Gateway for Molecular Simulations type: conference user_id: '24135' year: '2011' ... --- _id: '1972' abstract: - lang: eng text: We present a multi-agent system on top of the IaaS layer consisting of a scheduler agent and multiple worker agents. Each job is controlled by an autonomous worker agent, which is equipped with application specific knowledge (e.g., performance functions) allowing it to estimate the type and number of necessary resources. During runtime, the worker agent monitors the job and adapts its resources to ensure the specified quality of service - even in noisy clouds where the job instances are influenced by other jobs. All worker agents interact with the scheduler agent, which takes care of limited resources and does a cost-aware scheduling by assigning jobs to times with low energy costs. The whole architecture is self-optimizing and able to use public or private clouds. author: - first_name: Oliver full_name: Niehörster, Oliver last_name: Niehörster - first_name: Axel full_name: Keller, Axel id: '15274' last_name: Keller - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Niehörster O, Keller A, Brinkmann A. An Energy-Aware SaaS Stack. In: Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS). ; 2011. doi:10.1109/MASCOTS.2011.52' apa: Niehörster, O., Keller, A., & Brinkmann, A. (2011). An Energy-Aware SaaS Stack. In Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS). https://doi.org/10.1109/MASCOTS.2011.52 bibtex: '@inproceedings{Niehörster_Keller_Brinkmann_2011, title={An Energy-Aware SaaS Stack}, DOI={10.1109/MASCOTS.2011.52}, booktitle={Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS)}, author={Niehörster, Oliver and Keller, Axel and Brinkmann, André}, year={2011} }' chicago: Niehörster, Oliver, Axel Keller, and André Brinkmann. “An Energy-Aware SaaS Stack.” In Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011. https://doi.org/10.1109/MASCOTS.2011.52. ieee: O. Niehörster, A. Keller, and A. Brinkmann, “An Energy-Aware SaaS Stack,” in Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011. mla: Niehörster, Oliver, et al. “An Energy-Aware SaaS Stack.” Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011, doi:10.1109/MASCOTS.2011.52. short: 'O. Niehörster, A. Keller, A. Brinkmann, in: Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011.' date_created: 2018-03-29T11:23:22Z date_updated: 2022-01-06T06:54:10Z department: - _id: '27' doi: 10.1109/MASCOTS.2011.52 language: - iso: eng publication: Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS) publication_status: published status: public title: An Energy-Aware SaaS Stack type: conference user_id: '15274' year: '2011' ... --- _id: '2190' author: - first_name: Oliver full_name: Niehörster, Oliver last_name: Niehörster - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Niehörster O, Brinkmann A. Autonomic Resource Management Handling Delayed Configuration Effects. In: Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom). Washington DC, USA: IEEE Computer Society; 2011:138-145. doi:10.1109/CloudCom.2011.28' apa: 'Niehörster, O., & Brinkmann, A. (2011). Autonomic Resource Management Handling Delayed Configuration Effects. In Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom) (pp. 138–145). Washington DC, USA: IEEE Computer Society. https://doi.org/10.1109/CloudCom.2011.28' bibtex: '@inproceedings{Niehörster_Brinkmann_2011, place={Washington DC, USA}, title={Autonomic Resource Management Handling Delayed Configuration Effects}, DOI={10.1109/CloudCom.2011.28}, booktitle={Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom)}, publisher={IEEE Computer Society}, author={Niehörster, Oliver and Brinkmann, André}, year={2011}, pages={138–145} }' chicago: 'Niehörster, Oliver, and André Brinkmann. “Autonomic Resource Management Handling Delayed Configuration Effects.” In Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), 138–45. Washington DC, USA: IEEE Computer Society, 2011. https://doi.org/10.1109/CloudCom.2011.28.' ieee: O. Niehörster and A. Brinkmann, “Autonomic Resource Management Handling Delayed Configuration Effects,” in Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), 2011, pp. 138–145. mla: Niehörster, Oliver, and André Brinkmann. “Autonomic Resource Management Handling Delayed Configuration Effects.” Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), IEEE Computer Society, 2011, pp. 138–45, doi:10.1109/CloudCom.2011.28. short: 'O. Niehörster, A. Brinkmann, in: Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), IEEE Computer Society, Washington DC, USA, 2011, pp. 138–145.' date_created: 2018-04-03T14:33:50Z date_updated: 2022-01-06T06:55:19Z department: - _id: '27' doi: 10.1109/CloudCom.2011.28 page: 138-145 place: Washington DC, USA publication: Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom) publisher: IEEE Computer Society status: public title: Autonomic Resource Management Handling Delayed Configuration Effects type: conference user_id: '24135' year: '2011' ... --- _id: '2203' author: - first_name: Oliver full_name: Niehörster, Oliver last_name: Niehörster - first_name: Jens full_name: Simon, Jens id: '15273' last_name: Simon - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Alexaner full_name: Krieger, Alexaner last_name: Krieger citation: ama: 'Niehörster O, Simon J, Brinkmann A, Krieger A. Autonomic Resource Management with Support Vector Machines. In: Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID). Washington, DC, USA: IEEE Computer Society; 2011:157-164. doi:10.1109/Grid.2011.28' apa: 'Niehörster, O., Simon, J., Brinkmann, A., & Krieger, A. (2011). Autonomic Resource Management with Support Vector Machines. In Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID) (pp. 157–164). Washington, DC, USA: IEEE Computer Society. https://doi.org/10.1109/Grid.2011.28' bibtex: '@inproceedings{Niehörster_Simon_Brinkmann_Krieger_2011, place={Washington, DC, USA}, title={Autonomic Resource Management with Support Vector Machines}, DOI={10.1109/Grid.2011.28}, booktitle={Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID)}, publisher={IEEE Computer Society}, author={Niehörster, Oliver and Simon, Jens and Brinkmann, André and Krieger, Alexaner}, year={2011}, pages={157–164} }' chicago: 'Niehörster, Oliver, Jens Simon, André Brinkmann, and Alexaner Krieger. “Autonomic Resource Management with Support Vector Machines.” In Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID), 157–64. Washington, DC, USA: IEEE Computer Society, 2011. https://doi.org/10.1109/Grid.2011.28.' ieee: O. Niehörster, J. Simon, A. Brinkmann, and A. Krieger, “Autonomic Resource Management with Support Vector Machines,” in Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID), 2011, pp. 157–164. mla: Niehörster, Oliver, et al. “Autonomic Resource Management with Support Vector Machines.” Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID), IEEE Computer Society, 2011, pp. 157–64, doi:10.1109/Grid.2011.28. short: 'O. Niehörster, J. Simon, A. Brinkmann, A. Krieger, in: Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID), IEEE Computer Society, Washington, DC, USA, 2011, pp. 157–164.' date_created: 2018-04-03T15:13:42Z date_updated: 2022-01-06T06:55:23Z department: - _id: '27' doi: 10.1109/Grid.2011.28 page: 157-164 place: Washington, DC, USA publication: Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID) publication_identifier: isbn: - 978-0-7695-4572-1 publisher: IEEE Computer Society status: public title: Autonomic Resource Management with Support Vector Machines type: conference user_id: '24135' year: '2011' ... --- _id: '2193' author: - first_name: Tobias full_name: Beisel, Tobias last_name: Beisel - first_name: Tobias full_name: Wiersema, Tobias id: '3118' last_name: Wiersema - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Beisel T, Wiersema T, Plessl C, Brinkmann A. Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society; 2011:223-226. doi:10.1109/ASAP.2011.6043273' apa: Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2011). Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 223–226. https://doi.org/10.1109/ASAP.2011.6043273 bibtex: '@inproceedings{Beisel_Wiersema_Plessl_Brinkmann_2011, title={Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler}, DOI={10.1109/ASAP.2011.6043273}, booktitle={Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)}, publisher={IEEE Computer Society}, author={Beisel, Tobias and Wiersema, Tobias and Plessl, Christian and Brinkmann, André}, year={2011}, pages={223–226} }' chicago: Beisel, Tobias, Tobias Wiersema, Christian Plessl, and André Brinkmann. “Cooperative Multitasking for Heterogeneous Accelerators in the Linux Completely Fair Scheduler.” In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 223–26. IEEE Computer Society, 2011. https://doi.org/10.1109/ASAP.2011.6043273. ieee: 'T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2011, pp. 223–226, doi: 10.1109/ASAP.2011.6043273.' mla: Beisel, Tobias, et al. “Cooperative Multitasking for Heterogeneous Accelerators in the Linux Completely Fair Scheduler.” Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011, pp. 223–26, doi:10.1109/ASAP.2011.6043273. short: 'T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011, pp. 223–226.' date_created: 2018-04-03T14:37:14Z date_updated: 2023-09-26T13:43:48Z department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/ASAP.2011.6043273 language: - iso: eng page: 223-226 project: - _id: '30' grant_number: 01|H11004A name: Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models publication: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP) publisher: IEEE Computer Society quality_controlled: '1' status: public title: Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler type: conference user_id: '15278' year: '2011' ... --- _id: '2191' author: - first_name: Tobias full_name: Kenter, Tobias id: '3145' last_name: Kenter - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner - first_name: Michael full_name: Kauschke, Michael last_name: Kauschke citation: ama: 'Kenter T, Plessl C, Platzner M, Kauschke M. Estimation and Partitioning for CPU-Accelerator Architectures. In: Intel European Research and Innovation Conference. ; 2011.' apa: Kenter, T., Plessl, C., Platzner, M., & Kauschke, M. (2011). Estimation and Partitioning for CPU-Accelerator Architectures. In Intel European Research and Innovation Conference. bibtex: '@inproceedings{Kenter_Plessl_Platzner_Kauschke_2011, title={Estimation and Partitioning for CPU-Accelerator Architectures}, booktitle={Intel European Research and Innovation Conference}, author={Kenter, Tobias and Plessl, Christian and Platzner, Marco and Kauschke, Michael}, year={2011} }' chicago: Kenter, Tobias, Christian Plessl, Marco Platzner, and Michael Kauschke. “Estimation and Partitioning for CPU-Accelerator Architectures.” In Intel European Research and Innovation Conference, 2011. ieee: T. Kenter, C. Plessl, M. Platzner, and M. Kauschke, “Estimation and Partitioning for CPU-Accelerator Architectures,” in Intel European Research and Innovation Conference, 2011. mla: Kenter, Tobias, et al. “Estimation and Partitioning for CPU-Accelerator Architectures.” Intel European Research and Innovation Conference, 2011. short: 'T. Kenter, C. Plessl, M. Platzner, M. Kauschke, in: Intel European Research and Innovation Conference, 2011.' date_created: 2018-04-03T14:34:57Z date_updated: 2022-01-06T06:55:19Z department: - _id: '27' - _id: '518' - _id: '78' keyword: - funding-intel publication: Intel European Research and Innovation Conference status: public title: Estimation and Partitioning for CPU-Accelerator Architectures type: conference user_id: '24135' year: '2011' ... --- _id: '2195' author: - first_name: Matthias full_name: Grawinkel, Matthias last_name: Grawinkel - first_name: Thorsten full_name: Schäfer, Thorsten last_name: Schäfer - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Jens full_name: Hagemeyer, Jens last_name: Hagemeyer - first_name: Mario full_name: Porrmann, Mario last_name: Porrmann citation: ama: 'Grawinkel M, Schäfer T, Brinkmann A, Hagemeyer J, Porrmann M. Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability. In: Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS). IEEE Computer Society; 2011:297-306. doi:10.1109/mascots.2011.13' apa: Grawinkel, M., Schäfer, T., Brinkmann, A., Hagemeyer, J., & Porrmann, M. (2011). Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability. In Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS) (pp. 297–306). IEEE Computer Society. https://doi.org/10.1109/mascots.2011.13 bibtex: '@inproceedings{Grawinkel_Schäfer_Brinkmann_Hagemeyer_Porrmann_2011, title={Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability}, DOI={10.1109/mascots.2011.13}, booktitle={Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS)}, publisher={IEEE Computer Society}, author={Grawinkel, Matthias and Schäfer, Thorsten and Brinkmann, André and Hagemeyer, Jens and Porrmann, Mario}, year={2011}, pages={297–306} }' chicago: Grawinkel, Matthias, Thorsten Schäfer, André Brinkmann, Jens Hagemeyer, and Mario Porrmann. “Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability.” In Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 297–306. IEEE Computer Society, 2011. https://doi.org/10.1109/mascots.2011.13. ieee: M. Grawinkel, T. Schäfer, A. Brinkmann, J. Hagemeyer, and M. Porrmann, “Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability,” in Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011, pp. 297–306. mla: Grawinkel, Matthias, et al. “Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability.” Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), IEEE Computer Society, 2011, pp. 297–306, doi:10.1109/mascots.2011.13. short: 'M. Grawinkel, T. Schäfer, A. Brinkmann, J. Hagemeyer, M. Porrmann, in: Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), IEEE Computer Society, 2011, pp. 297–306.' date_created: 2018-04-03T15:01:31Z date_updated: 2022-01-06T06:55:21Z department: - _id: '27' doi: 10.1109/mascots.2011.13 page: 297-306 publication: Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS) publisher: IEEE Computer Society status: public title: Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability type: conference user_id: '24135' year: '2011' ... --- _id: '2197' author: - first_name: Sandra full_name: Gesing, Sandra last_name: Gesing - first_name: Richard full_name: Grunzke, Richard last_name: Grunzke - first_name: Ákos full_name: Balaskó, Ákos last_name: Balaskó - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: Dirk full_name: Blunk, Dirk last_name: Blunk - first_name: Sebastian full_name: Breuers, Sebastian last_name: Breuers - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Gregor full_name: Fels, Gregor last_name: Fels - first_name: Sonja full_name: Herres-Pawlis, Sonja last_name: Herres-Pawlis - first_name: Peter full_name: Kacsuk, Peter last_name: Kacsuk - first_name: Miklos full_name: Kozlovszky, Miklos last_name: Kozlovszky - first_name: Jens full_name: Krüger, Jens last_name: Krüger - first_name: Lars full_name: Packschies, Lars last_name: Packschies - first_name: Patrick full_name: Schäfer, Patrick last_name: Schäfer - first_name: Bernd full_name: Schuller, Bernd last_name: Schuller - first_name: Johannes full_name: Schuster, Johannes last_name: Schuster - first_name: Thomas full_name: Steinke, Thomas last_name: Steinke - first_name: Anna full_name: Szikszay Fabri, Anna last_name: Szikszay Fabri - first_name: Martin full_name: Wewior, Martin last_name: Wewior - first_name: Ralph full_name: Müller-Pfefferkorn, Ralph last_name: Müller-Pfefferkorn - first_name: Oliver full_name: Kohlbacher, Oliver last_name: Kohlbacher citation: ama: 'Gesing S, Grunzke R, Balaskó Á, et al. Granular Security for a Science Gateway in Structural Bioinformatics. In: Proc. Int. Workshop on Scientific Gateways (IWSG). Consorzio COMETA; 2011.' apa: Gesing, S., Grunzke, R., Balaskó, Á., Birkenheuer, G., Blunk, D., Breuers, S., … Kohlbacher, O. (2011). Granular Security for a Science Gateway in Structural Bioinformatics. In Proc. Int. Workshop on Scientific Gateways (IWSG). Consorzio COMETA. bibtex: '@inproceedings{Gesing_Grunzke_Balaskó_Birkenheuer_Blunk_Breuers_Brinkmann_Fels_Herres-Pawlis_Kacsuk_et al._2011, title={Granular Security for a Science Gateway in Structural Bioinformatics}, booktitle={Proc. Int. Workshop on Scientific Gateways (IWSG)}, publisher={Consorzio COMETA}, author={Gesing, Sandra and Grunzke, Richard and Balaskó, Ákos and Birkenheuer, Georg and Blunk, Dirk and Breuers, Sebastian and Brinkmann, André and Fels, Gregor and Herres-Pawlis, Sonja and Kacsuk, Peter and et al.}, year={2011} }' chicago: Gesing, Sandra, Richard Grunzke, Ákos Balaskó, Georg Birkenheuer, Dirk Blunk, Sebastian Breuers, André Brinkmann, et al. “Granular Security for a Science Gateway in Structural Bioinformatics.” In Proc. Int. Workshop on Scientific Gateways (IWSG). Consorzio COMETA, 2011. ieee: S. Gesing et al., “Granular Security for a Science Gateway in Structural Bioinformatics,” in Proc. Int. Workshop on Scientific Gateways (IWSG), 2011. mla: Gesing, Sandra, et al. “Granular Security for a Science Gateway in Structural Bioinformatics.” Proc. Int. Workshop on Scientific Gateways (IWSG), Consorzio COMETA, 2011. short: 'S. Gesing, R. Grunzke, Á. Balaskó, G. Birkenheuer, D. Blunk, S. Breuers, A. Brinkmann, G. Fels, S. Herres-Pawlis, P. Kacsuk, M. Kozlovszky, J. Krüger, L. Packschies, P. Schäfer, B. Schuller, J. Schuster, T. Steinke, A. Szikszay Fabri, M. Wewior, R. Müller-Pfefferkorn, O. Kohlbacher, in: Proc. Int. Workshop on Scientific Gateways (IWSG), Consorzio COMETA, 2011.' date_created: 2018-04-03T15:04:04Z date_updated: 2022-01-06T06:55:21Z department: - _id: '27' publication: Proc. Int. Workshop on Scientific Gateways (IWSG) publisher: Consorzio COMETA status: public title: Granular Security for a Science Gateway in Structural Bioinformatics type: conference user_id: '24135' year: '2011' ... --- _id: '2198' author: - first_name: Mariusz full_name: Grad, Mariusz last_name: Grad - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Grad M, Plessl C. Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture. In: Proc. Reconfigurable Architectures Workshop (RAW). IEEE Computer Society; 2011:278-285. doi:10.1109/IPDPS.2011.153' apa: Grad, M., & Plessl, C. (2011). Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture. Proc. Reconfigurable Architectures Workshop (RAW), 278–285. https://doi.org/10.1109/IPDPS.2011.153 bibtex: '@inproceedings{Grad_Plessl_2011, title={Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture}, DOI={10.1109/IPDPS.2011.153}, booktitle={Proc. Reconfigurable Architectures Workshop (RAW)}, publisher={IEEE Computer Society}, author={Grad, Mariusz and Plessl, Christian}, year={2011}, pages={278–285} }' chicago: Grad, Mariusz, and Christian Plessl. “Just-in-Time Instruction Set Extension – Feasibility and Limitations for an FPGA-Based Reconfigurable ASIP Architecture.” In Proc. Reconfigurable Architectures Workshop (RAW), 278–85. IEEE Computer Society, 2011. https://doi.org/10.1109/IPDPS.2011.153. ieee: 'M. Grad and C. Plessl, “Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture,” in Proc. Reconfigurable Architectures Workshop (RAW), 2011, pp. 278–285, doi: 10.1109/IPDPS.2011.153.' mla: Grad, Mariusz, and Christian Plessl. “Just-in-Time Instruction Set Extension – Feasibility and Limitations for an FPGA-Based Reconfigurable ASIP Architecture.” Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2011, pp. 278–85, doi:10.1109/IPDPS.2011.153. short: 'M. Grad, C. Plessl, in: Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2011, pp. 278–285.' date_created: 2018-04-03T15:05:52Z date_updated: 2023-09-26T13:44:39Z department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/IPDPS.2011.153 language: - iso: eng page: 278-285 publication: Proc. Reconfigurable Architectures Workshop (RAW) publisher: IEEE Computer Society quality_controlled: '1' status: public title: Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture type: conference user_id: '15278' year: '2011' ... --- _id: '2189' author: - first_name: Matthias full_name: Grawinkel, Matthias last_name: Grawinkel - first_name: Markus full_name: Pargmann, Markus last_name: Pargmann - first_name: Hubert full_name: Dömer, Hubert last_name: Dömer - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Grawinkel M, Pargmann M, Dömer H, Brinkmann A. Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System. In: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS). IEEE; 2011:380-387. doi:10.1109/ICPADS.2011.77' apa: 'Grawinkel, M., Pargmann, M., Dömer, H., & Brinkmann, A. (2011). Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System. In Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS) (pp. 380–387). IEEE. https://doi.org/10.1109/ICPADS.2011.77' bibtex: '@inproceedings{Grawinkel_Pargmann_Dömer_Brinkmann_2011, title={Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System}, DOI={10.1109/ICPADS.2011.77}, booktitle={Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS)}, publisher={IEEE}, author={Grawinkel, Matthias and Pargmann, Markus and Dömer, Hubert and Brinkmann, André}, year={2011}, pages={380–387} }' chicago: 'Grawinkel, Matthias, Markus Pargmann, Hubert Dömer, and André Brinkmann. “Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System.” In Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), 380–87. IEEE, 2011. https://doi.org/10.1109/ICPADS.2011.77.' ieee: 'M. Grawinkel, M. Pargmann, H. Dömer, and A. Brinkmann, “Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System,” in Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), 2011, pp. 380–387.' mla: 'Grawinkel, Matthias, et al. “Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System.” Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), IEEE, 2011, pp. 380–87, doi:10.1109/ICPADS.2011.77.' short: 'M. Grawinkel, M. Pargmann, H. Dömer, A. Brinkmann, in: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), IEEE, 2011, pp. 380–387.' date_created: 2018-04-03T14:32:23Z date_updated: 2022-01-06T06:55:18Z department: - _id: '27' doi: 10.1109/ICPADS.2011.77 page: 380-387 publication: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS) publisher: IEEE status: public title: 'Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System' type: conference user_id: '24135' year: '2011' ... --- _id: '656' abstract: - lang: eng text: In the next decades, hybrid multi-cores will be the predominant architecture for reconfigurable FPGA-based systems. Temperature-aware thread mapping strategies are key for providing dependability in such systems. These strategies rely on measuring the temperature distribution and redicting the thermal behavior of the system when there are changes to the hardware and software running on the FPGA. While there are a number of tools that use thermal models to predict temperature distributions at design time, these tools lack the flexibility to autonomously adjust to changing FPGA configurations. To address this problem we propose a temperature-aware system that empowers FPGA-based reconfigurable multi-cores to autonomously predict the on-chip temperature distribution for pro-active thread remapping. Our system obtains temperature measurements through a self-calibrating grid of sensors and uses area constrained heat-generating circuits in order to generate spatial and temporal temperature gradients. The generated temperature variations are then used to learn the free parameters of the system's thermal model. The system thus acquires an understanding of its own thermal characteristics. We implemented an FPGA system containing a net of 144 temperature sensors on a Xilinx Virtex-6 LX240T FPGA that is aware of its thermal model. Finally, we show that the temperature predictions vary less than 0.72 degree C on average compared to the measured temperature distributions at run-time. author: - first_name: Markus full_name: Happe, Markus last_name: Happe - first_name: Andreas full_name: Agne, Andreas last_name: Agne - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Happe M, Agne A, Plessl C. Measuring and Predicting Temperature Distributions on FPGAs at Run-Time. In: Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig). IEEE; 2011:55-60. doi:10.1109/ReConFig.2011.59' apa: Happe, M., Agne, A., & Plessl, C. (2011). Measuring and Predicting Temperature Distributions on FPGAs at Run-Time. Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 55–60. https://doi.org/10.1109/ReConFig.2011.59 bibtex: '@inproceedings{Happe_Agne_Plessl_2011, title={Measuring and Predicting Temperature Distributions on FPGAs at Run-Time}, DOI={10.1109/ReConFig.2011.59}, booktitle={Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Happe, Markus and Agne, Andreas and Plessl, Christian}, year={2011}, pages={55–60} }' chicago: Happe, Markus, Andreas Agne, and Christian Plessl. “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time.” In Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 55–60. IEEE, 2011. https://doi.org/10.1109/ReConFig.2011.59. ieee: 'M. Happe, A. Agne, and C. Plessl, “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time,” in Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2011, pp. 55–60, doi: 10.1109/ReConFig.2011.59.' mla: Happe, Markus, et al. “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time.” Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2011, pp. 55–60, doi:10.1109/ReConFig.2011.59. short: 'M. Happe, A. Agne, C. Plessl, in: Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2011, pp. 55–60.' date_created: 2017-10-17T12:42:59Z date_updated: 2023-09-26T13:46:08Z ddc: - '040' department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/ReConFig.2011.59 file: - access_level: closed content_type: application/pdf creator: florida date_created: 2018-03-14T13:49:39Z date_updated: 2018-03-14T13:49:39Z file_id: '1220' file_name: 656-2011_happe_reconfig.pdf file_size: 502244 relation: main_file success: 1 file_date_updated: 2018-03-14T13:49:39Z has_accepted_license: '1' language: - iso: eng page: 55-60 project: - _id: '1' grant_number: '160364472' name: SFB 901 - _id: '14' grant_number: '160364472' name: SFB 901 - Subprojekt C2 - _id: '4' name: SFB 901 - Project Area C - _id: '31' grant_number: '257906' name: Engineering Proprioception in Computing Systems publication: Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig) publisher: IEEE quality_controlled: '1' status: public title: Measuring and Predicting Temperature Distributions on FPGAs at Run-Time type: conference user_id: '15278' year: '2011' ... --- _id: '2205' author: - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: Dirk full_name: Blunk, Dirk last_name: Blunk - first_name: Sebastian full_name: Breuers, Sebastian last_name: Breuers - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Gregor full_name: Fels, Gregor last_name: Fels - first_name: Sandra full_name: Gesing, Sandra last_name: Gesing - first_name: Richard full_name: Grunzke, Richard last_name: Grunzke - first_name: Sonja full_name: Herres-Pawlis, Sonja last_name: Herres-Pawlis - first_name: Oliver full_name: Kohlbacher, Oliver last_name: Kohlbacher - first_name: Jens full_name: Krüger, Jens last_name: Krüger - first_name: Ulrich full_name: Lang, Ulrich last_name: Lang - first_name: Lars full_name: Packschies, Lars last_name: Packschies - first_name: Ralph full_name: Müller-Pfefferkorn, Ralph last_name: Müller-Pfefferkorn - first_name: Patrick full_name: Schäfer, Patrick last_name: Schäfer - first_name: Johannes full_name: Schuster, Johannes last_name: Schuster - first_name: Thomas full_name: Steinke, Thomas last_name: Steinke - first_name: Klaus-Dieter full_name: Warzecha, Klaus-Dieter last_name: Warzecha - first_name: Martin full_name: Wewior, Martin last_name: Wewior citation: ama: 'Birkenheuer G, Blunk D, Breuers S, et al. MoSGrid: Progress of Workflow driven Chemical Simulations. In: Proc. of Grid Workflow Workshop (GWW). Vol 829. CEUR Workshop Proceedings. ; 2011.' apa: 'Birkenheuer, G., Blunk, D., Breuers, S., Brinkmann, A., Fels, G., Gesing, S., … Wewior, M. (2011). MoSGrid: Progress of Workflow driven Chemical Simulations. In Proc. of Grid Workflow Workshop (GWW) (Vol. 829).' bibtex: '@inproceedings{Birkenheuer_Blunk_Breuers_Brinkmann_Fels_Gesing_Grunzke_Herres-Pawlis_Kohlbacher_Krüger_et al._2011, series={CEUR Workshop Proceedings}, title={MoSGrid: Progress of Workflow driven Chemical Simulations}, volume={829}, booktitle={Proc. of Grid Workflow Workshop (GWW)}, author={Birkenheuer, Georg and Blunk, Dirk and Breuers, Sebastian and Brinkmann, André and Fels, Gregor and Gesing, Sandra and Grunzke, Richard and Herres-Pawlis, Sonja and Kohlbacher, Oliver and Krüger, Jens and et al.}, year={2011}, collection={CEUR Workshop Proceedings} }' chicago: 'Birkenheuer, Georg, Dirk Blunk, Sebastian Breuers, André Brinkmann, Gregor Fels, Sandra Gesing, Richard Grunzke, et al. “MoSGrid: Progress of Workflow Driven Chemical Simulations.” In Proc. of Grid Workflow Workshop (GWW), Vol. 829. CEUR Workshop Proceedings, 2011.' ieee: 'G. Birkenheuer et al., “MoSGrid: Progress of Workflow driven Chemical Simulations,” in Proc. of Grid Workflow Workshop (GWW), 2011, vol. 829.' mla: 'Birkenheuer, Georg, et al. “MoSGrid: Progress of Workflow Driven Chemical Simulations.” Proc. of Grid Workflow Workshop (GWW), vol. 829, 2011.' short: 'G. Birkenheuer, D. Blunk, S. Breuers, A. Brinkmann, G. Fels, S. Gesing, R. Grunzke, S. Herres-Pawlis, O. Kohlbacher, J. Krüger, U. Lang, L. Packschies, R. Müller-Pfefferkorn, P. Schäfer, J. Schuster, T. Steinke, K.-D. Warzecha, M. Wewior, in: Proc. of Grid Workflow Workshop (GWW), 2011.' date_created: 2018-04-04T09:34:24Z date_updated: 2022-01-06T06:55:23Z department: - _id: '27' intvolume: ' 829' publication: Proc. of Grid Workflow Workshop (GWW) series_title: CEUR Workshop Proceedings status: public title: 'MoSGrid: Progress of Workflow driven Chemical Simulations' type: conference user_id: '24135' volume: 829 year: '2011' ... --- _id: '2204' author: - first_name: Tobias full_name: Graf, Tobias last_name: Graf - first_name: Ulf full_name: Lorenz, Ulf last_name: Lorenz - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner - first_name: Lars full_name: Schaefers, Lars last_name: Schaefers citation: ama: 'Graf T, Lorenz U, Platzner M, Schaefers L. Parallel Monte-Carlo Tree Search for HPC Systems. In: Proc. European Conf. on Parallel Processing (Euro-Par). Vol 6853. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer; 2011. doi:10.1007/978-3-642-23397-5_36' apa: 'Graf, T., Lorenz, U., Platzner, M., & Schaefers, L. (2011). Parallel Monte-Carlo Tree Search for HPC Systems. In Proc. European Conf. on Parallel Processing (Euro-Par) (Vol. 6853). Berlin / Heidelberg: Springer. https://doi.org/10.1007/978-3-642-23397-5_36' bibtex: '@inproceedings{Graf_Lorenz_Platzner_Schaefers_2011, place={Berlin / Heidelberg}, series={Lecture Notes in Computer Science (LNCS)}, title={Parallel Monte-Carlo Tree Search for HPC Systems}, volume={6853}, DOI={10.1007/978-3-642-23397-5_36}, booktitle={Proc. European Conf. on Parallel Processing (Euro-Par)}, publisher={Springer}, author={Graf, Tobias and Lorenz, Ulf and Platzner, Marco and Schaefers, Lars}, year={2011}, collection={Lecture Notes in Computer Science (LNCS)} }' chicago: 'Graf, Tobias, Ulf Lorenz, Marco Platzner, and Lars Schaefers. “Parallel Monte-Carlo Tree Search for HPC Systems.” In Proc. European Conf. on Parallel Processing (Euro-Par), Vol. 6853. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer, 2011. https://doi.org/10.1007/978-3-642-23397-5_36.' ieee: T. Graf, U. Lorenz, M. Platzner, and L. Schaefers, “Parallel Monte-Carlo Tree Search for HPC Systems,” in Proc. European Conf. on Parallel Processing (Euro-Par), 2011, vol. 6853. mla: Graf, Tobias, et al. “Parallel Monte-Carlo Tree Search for HPC Systems.” Proc. European Conf. on Parallel Processing (Euro-Par), vol. 6853, Springer, 2011, doi:10.1007/978-3-642-23397-5_36. short: 'T. Graf, U. Lorenz, M. Platzner, L. Schaefers, in: Proc. European Conf. on Parallel Processing (Euro-Par), Springer, Berlin / Heidelberg, 2011.' date_created: 2018-04-03T15:14:56Z date_updated: 2022-01-06T06:55:23Z department: - _id: '27' - _id: '78' doi: 10.1007/978-3-642-23397-5_36 intvolume: ' 6853' place: Berlin / Heidelberg publication: Proc. European Conf. on Parallel Processing (Euro-Par) publisher: Springer series_title: Lecture Notes in Computer Science (LNCS) status: public title: Parallel Monte-Carlo Tree Search for HPC Systems type: conference user_id: '24135' volume: 6853 year: '2011' ... --- _id: '2200' author: - first_name: Tobias full_name: Kenter, Tobias id: '3145' last_name: Kenter - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Michael full_name: Kauschke, Michael last_name: Kauschke citation: ama: 'Kenter T, Platzner M, Plessl C, Kauschke M. Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures. In: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA). ACM; 2011:177-180. doi:10.1145/1950413.1950448' apa: Kenter, T., Platzner, M., Plessl, C., & Kauschke, M. (2011). Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures. Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 177–180. https://doi.org/10.1145/1950413.1950448 bibtex: '@inproceedings{Kenter_Platzner_Plessl_Kauschke_2011, place={New York, NY, USA}, title={Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures}, DOI={10.1145/1950413.1950448}, booktitle={Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA)}, publisher={ACM}, author={Kenter, Tobias and Platzner, Marco and Plessl, Christian and Kauschke, Michael}, year={2011}, pages={177–180} }' chicago: 'Kenter, Tobias, Marco Platzner, Christian Plessl, and Michael Kauschke. “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures.” In Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 177–80. New York, NY, USA: ACM, 2011. https://doi.org/10.1145/1950413.1950448.' ieee: 'T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures,” in Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 2011, pp. 177–180, doi: 10.1145/1950413.1950448.' mla: Kenter, Tobias, et al. “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures.” Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), ACM, 2011, pp. 177–80, doi:10.1145/1950413.1950448. short: 'T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), ACM, New York, NY, USA, 2011, pp. 177–180.' date_created: 2018-04-03T15:08:13Z date_updated: 2023-09-26T13:45:04Z department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1145/1950413.1950448 keyword: - design space exploration - LLVM - partitioning - performance - estimation - funding-intel language: - iso: eng page: 177-180 place: New York, NY, USA publication: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA) publication_identifier: isbn: - 978-1-4503-0554-9 publisher: ACM quality_controlled: '1' status: public title: Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures type: conference user_id: '15278' year: '2011' ... --- _id: '2188' author: - first_name: Alberto full_name: Miranda, Alberto last_name: Miranda - first_name: Sascha full_name: Effert, Sascha last_name: Effert - first_name: Yangwook full_name: Kang, Yangwook last_name: Kang - first_name: Ethan full_name: Miller, Ethan last_name: Miller - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Toni full_name: Cortes, Toni last_name: Cortes citation: ama: 'Miranda A, Effert S, Kang Y, Miller E, Brinkmann A, Cortes T. Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems. In: Proc. Int. Conf. on High Performance Computing (HIPC). Washington, DC: IEEE Computer Society; 2011:1-10. doi:10.1109/HiPC.2011.6152745' apa: 'Miranda, A., Effert, S., Kang, Y., Miller, E., Brinkmann, A., & Cortes, T. (2011). Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems. In Proc. Int. Conf. on High Performance Computing (HIPC) (pp. 1–10). Washington, DC: IEEE Computer Society. https://doi.org/10.1109/HiPC.2011.6152745' bibtex: '@inproceedings{Miranda_Effert_Kang_Miller_Brinkmann_Cortes_2011, place={Washington, DC}, title={Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems}, DOI={10.1109/HiPC.2011.6152745}, booktitle={Proc. Int. Conf. on High Performance Computing (HIPC)}, publisher={IEEE Computer Society}, author={Miranda, Alberto and Effert, Sascha and Kang, Yangwook and Miller, Ethan and Brinkmann, André and Cortes, Toni}, year={2011}, pages={1–10} }' chicago: 'Miranda, Alberto, Sascha Effert, Yangwook Kang, Ethan Miller, André Brinkmann, and Toni Cortes. “Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems.” In Proc. Int. Conf. on High Performance Computing (HIPC), 1–10. Washington, DC: IEEE Computer Society, 2011. https://doi.org/10.1109/HiPC.2011.6152745.' ieee: A. Miranda, S. Effert, Y. Kang, E. Miller, A. Brinkmann, and T. Cortes, “Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems,” in Proc. Int. Conf. on High Performance Computing (HIPC), 2011, pp. 1–10. mla: Miranda, Alberto, et al. “Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems.” Proc. Int. Conf. on High Performance Computing (HIPC), IEEE Computer Society, 2011, pp. 1–10, doi:10.1109/HiPC.2011.6152745. short: 'A. Miranda, S. Effert, Y. Kang, E. Miller, A. Brinkmann, T. Cortes, in: Proc. Int. Conf. on High Performance Computing (HIPC), IEEE Computer Society, Washington, DC, 2011, pp. 1–10.' date_created: 2018-04-03T14:30:39Z date_updated: 2022-01-06T06:55:18Z department: - _id: '27' doi: 10.1109/HiPC.2011.6152745 page: 1-10 place: Washington, DC publication: Proc. Int. Conf. on High Performance Computing (HIPC) publisher: IEEE Computer Society status: public title: Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems type: conference user_id: '24135' year: '2011' ... --- _id: '2196' author: - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Yan full_name: Gao, Yan last_name: Gao - first_name: Miroslaw full_name: Korzeniowski, Miroslaw last_name: Korzeniowski - first_name: Dirk full_name: Meister, Dirk last_name: Meister citation: ama: 'Brinkmann A, Gao Y, Korzeniowski M, Meister D. Request Load Balancing for Highly Skewed Traffic in P2P Networks. In: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS). IEEE; 2011:53-62. doi:10.1109/NAS.2011.25' apa: Brinkmann, A., Gao, Y., Korzeniowski, M., & Meister, D. (2011). Request Load Balancing for Highly Skewed Traffic in P2P Networks. In Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS) (pp. 53–62). IEEE. https://doi.org/10.1109/NAS.2011.25 bibtex: '@inproceedings{Brinkmann_Gao_Korzeniowski_Meister_2011, title={Request Load Balancing for Highly Skewed Traffic in P2P Networks}, DOI={10.1109/NAS.2011.25}, booktitle={Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS)}, publisher={IEEE}, author={Brinkmann, André and Gao, Yan and Korzeniowski, Miroslaw and Meister, Dirk}, year={2011}, pages={53–62} }' chicago: Brinkmann, André, Yan Gao, Miroslaw Korzeniowski, and Dirk Meister. “Request Load Balancing for Highly Skewed Traffic in P2P Networks.” In Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), 53–62. IEEE, 2011. https://doi.org/10.1109/NAS.2011.25. ieee: A. Brinkmann, Y. Gao, M. Korzeniowski, and D. Meister, “Request Load Balancing for Highly Skewed Traffic in P2P Networks,” in Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), 2011, pp. 53–62. mla: Brinkmann, André, et al. “Request Load Balancing for Highly Skewed Traffic in P2P Networks.” Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), IEEE, 2011, pp. 53–62, doi:10.1109/NAS.2011.25. short: 'A. Brinkmann, Y. Gao, M. Korzeniowski, D. Meister, in: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), IEEE, 2011, pp. 53–62.' date_created: 2018-04-03T15:03:17Z date_updated: 2022-01-06T06:55:21Z department: - _id: '27' doi: 10.1109/NAS.2011.25 page: 53-62 publication: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS) publisher: IEEE status: public title: Request Load Balancing for Highly Skewed Traffic in P2P Networks type: conference user_id: '24135' year: '2011' ... --- _id: '1968' abstract: - lang: eng text: 'Infrastructure as a Service providers use virtualization to abstract their hardware and to create a dynamic data center. Virtualization enables the consolidation of virtual machines as well as the migration of them to other hosts during runtime. Each provider has its own strategy to efficiently operate a data center. We present a rule based mapping algorithm for VMs, which is able to automatically adapt the mapping between VMs and physical hosts. It offers an interface where policies can be defined and combined in a generic way. The algorithm performs the initial mapping at request time as well as a remapping during runtime. It deals with policy and infrastructure changes. We extended the open source IaaS solution Eucalyptus and we evaluated it with typical policies: maximizing the compute performance and VM locality to achieve a high performance and minimizing energy consumption. The evaluation was done on state-of-the-art servers in our own data center and by simulations using a workload of the Parallel Workload Archive. The results show that our algorithm performs well in dynamic data centers environments.' author: - first_name: Christoph full_name: Kleineweber, Christoph last_name: Kleineweber - first_name: Axel full_name: Keller, Axel id: '15274' last_name: Keller - first_name: Oliver full_name: Niehörster, Oliver last_name: Niehörster - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Kleineweber C, Keller A, Niehörster O, Brinkmann A. Rule Based Mapping of Virtual Machines in Clouds. In: Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP). ; 2011. doi:10.1109/PDP.2011.69' apa: Kleineweber, C., Keller, A., Niehörster, O., & Brinkmann, A. (2011). Rule Based Mapping of Virtual Machines in Clouds. In Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP). https://doi.org/10.1109/PDP.2011.69 bibtex: '@inproceedings{Kleineweber_Keller_Niehörster_Brinkmann_2011, title={Rule Based Mapping of Virtual Machines in Clouds}, DOI={10.1109/PDP.2011.69}, booktitle={Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP)}, author={Kleineweber, Christoph and Keller, Axel and Niehörster, Oliver and Brinkmann, André}, year={2011} }' chicago: Kleineweber, Christoph, Axel Keller, Oliver Niehörster, and André Brinkmann. “Rule Based Mapping of Virtual Machines in Clouds.” In Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011. https://doi.org/10.1109/PDP.2011.69. ieee: C. Kleineweber, A. Keller, O. Niehörster, and A. Brinkmann, “Rule Based Mapping of Virtual Machines in Clouds,” in Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011. mla: Kleineweber, Christoph, et al. “Rule Based Mapping of Virtual Machines in Clouds.” Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011, doi:10.1109/PDP.2011.69. short: 'C. Kleineweber, A. Keller, O. Niehörster, A. Brinkmann, in: Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011.' date_created: 2018-03-29T11:21:05Z date_updated: 2022-01-06T06:54:10Z department: - _id: '27' doi: 10.1109/PDP.2011.69 language: - iso: eng publication: Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP) publication_status: published status: public title: Rule Based Mapping of Virtual Machines in Clouds type: conference user_id: '15274' year: '2011' ... --- _id: '2194' author: - first_name: Björn full_name: Meyer, Björn last_name: Meyer - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Jens full_name: Förstner, Jens id: '158' last_name: Förstner orcid: 0000-0001-7059-9862 citation: ama: 'Meyer B, Plessl C, Förstner J. Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. In: Symp. on Application Accelerators in High Performance Computing (SAAHPC). IEEE Computer Society; 2011:60-63. doi:10.1109/SAAHPC.2011.12' apa: 'Meyer, B., Plessl, C., & Förstner, J. (2011). Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. Symp. on Application Accelerators in High Performance Computing (SAAHPC), 60–63. https://doi.org/10.1109/SAAHPC.2011.12' bibtex: '@inproceedings{Meyer_Plessl_Förstner_2011, title={Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend}, DOI={10.1109/SAAHPC.2011.12}, booktitle={Symp. on Application Accelerators in High Performance Computing (SAAHPC)}, publisher={IEEE Computer Society}, author={Meyer, Björn and Plessl, Christian and Förstner, Jens}, year={2011}, pages={60–63} }' chicago: 'Meyer, Björn, Christian Plessl, and Jens Förstner. “Transformation of Scientific Algorithms to Parallel Computing Code: Subdomain Support in a MPI-Multi-GPU Backend.” In Symp. on Application Accelerators in High Performance Computing (SAAHPC), 60–63. IEEE Computer Society, 2011. https://doi.org/10.1109/SAAHPC.2011.12.' ieee: 'B. Meyer, C. Plessl, and J. Förstner, “Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend,” in Symp. on Application Accelerators in High Performance Computing (SAAHPC), 2011, pp. 60–63, doi: 10.1109/SAAHPC.2011.12.' mla: 'Meyer, Björn, et al. “Transformation of Scientific Algorithms to Parallel Computing Code: Subdomain Support in a MPI-Multi-GPU Backend.” Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63, doi:10.1109/SAAHPC.2011.12.' short: 'B. Meyer, C. Plessl, J. Förstner, in: Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63.' date_created: 2018-04-03T14:55:57Z date_updated: 2023-09-26T13:44:11Z department: - _id: '27' - _id: '518' - _id: '15' - _id: '78' doi: 10.1109/SAAHPC.2011.12 keyword: - tet_topic_hpc language: - iso: eng page: 60-63 project: - _id: '30' grant_number: 01|H11004A name: Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models publication: Symp. on Application Accelerators in High Performance Computing (SAAHPC) publisher: IEEE Computer Society quality_controlled: '1' status: public title: 'Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend' type: conference user_id: '15278' year: '2011' ... --- _id: '2224' author: - first_name: Mariusz full_name: Grad, Mariusz last_name: Grad - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Grad M, Plessl C. An Open Source Circuit Library with Benchmarking Facilities. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:144-150.' apa: Grad, M., & Plessl, C. (2010). An Open Source Circuit Library with Benchmarking Facilities. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 144–150. bibtex: '@inproceedings{Grad_Plessl_2010, title={An Open Source Circuit Library with Benchmarking Facilities}, booktitle={Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)}, publisher={CSREA Press}, author={Grad, Mariusz and Plessl, Christian}, year={2010}, pages={144–150} }' chicago: Grad, Mariusz, and Christian Plessl. “An Open Source Circuit Library with Benchmarking Facilities.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 144–50. CSREA Press, 2010. ieee: M. Grad and C. Plessl, “An Open Source Circuit Library with Benchmarking Facilities,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 144–150. mla: Grad, Mariusz, and Christian Plessl. “An Open Source Circuit Library with Benchmarking Facilities.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 144–50. short: 'M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 144–150.' date_created: 2018-04-05T16:28:38Z date_updated: 2023-09-26T13:48:59Z department: - _id: '27' - _id: '518' - _id: '78' language: - iso: eng page: 144-150 publication: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) publication_identifier: isbn: - 1-60132-140-6 publisher: CSREA Press quality_controlled: '1' status: public title: An Open Source Circuit Library with Benchmarking Facilities type: conference user_id: '15278' year: '2010' ... --- _id: '2229' author: - first_name: Petra full_name: Berenbrink, Petra last_name: Berenbrink - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Tom full_name: Friedetzky, Tom last_name: Friedetzky - first_name: Lars full_name: Nagel, Lars last_name: Nagel citation: ama: 'Berenbrink P, Brinkmann A, Friedetzky T, Nagel L. Balls into Bins with Related Random Choices. In: Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA). New York: ACM; 2010:100-105. doi:10.1145/1810479.1810500' apa: 'Berenbrink, P., Brinkmann, A., Friedetzky, T., & Nagel, L. (2010). Balls into Bins with Related Random Choices. In Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA) (pp. 100–105). New York: ACM. https://doi.org/10.1145/1810479.1810500' bibtex: '@inproceedings{Berenbrink_Brinkmann_Friedetzky_Nagel_2010, place={New York}, title={Balls into Bins with Related Random Choices}, DOI={10.1145/1810479.1810500}, booktitle={Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA)}, publisher={ACM}, author={Berenbrink, Petra and Brinkmann, André and Friedetzky, Tom and Nagel, Lars}, year={2010}, pages={100–105} }' chicago: 'Berenbrink, Petra, André Brinkmann, Tom Friedetzky, and Lars Nagel. “Balls into Bins with Related Random Choices.” In Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA), 100–105. New York: ACM, 2010. https://doi.org/10.1145/1810479.1810500.' ieee: P. Berenbrink, A. Brinkmann, T. Friedetzky, and L. Nagel, “Balls into Bins with Related Random Choices,” in Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA), 2010, pp. 100–105. mla: Berenbrink, Petra, et al. “Balls into Bins with Related Random Choices.” Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA), ACM, 2010, pp. 100–05, doi:10.1145/1810479.1810500. short: 'P. Berenbrink, A. Brinkmann, T. Friedetzky, L. Nagel, in: Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA), ACM, New York, 2010, pp. 100–105.' date_created: 2018-04-05T16:45:55Z date_updated: 2022-01-06T06:55:30Z department: - _id: '27' doi: 10.1145/1810479.1810500 page: 100-105 place: New York publication: Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA) publisher: ACM status: public title: Balls into Bins with Related Random Choices type: conference user_id: '24135' year: '2010' ... --- _id: '2232' author: - first_name: Petra full_name: Berenbrink, Petra last_name: Berenbrink - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Tom full_name: Friedetzky, Tom last_name: Friedetzky - first_name: Lars full_name: Nagel, Lars last_name: Nagel citation: ama: 'Berenbrink P, Brinkmann A, Friedetzky T, Nagel L. Balls into Non-uniform Bins. In: Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS). IEEE; 2010:1-10. doi:10.1109/IPDPS.2010.5470355' apa: Berenbrink, P., Brinkmann, A., Friedetzky, T., & Nagel, L. (2010). Balls into Non-uniform Bins. In Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS) (pp. 1–10). IEEE. https://doi.org/10.1109/IPDPS.2010.5470355 bibtex: '@inproceedings{Berenbrink_Brinkmann_Friedetzky_Nagel_2010, title={Balls into Non-uniform Bins}, DOI={10.1109/IPDPS.2010.5470355}, booktitle={Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS)}, publisher={IEEE}, author={Berenbrink, Petra and Brinkmann, André and Friedetzky, Tom and Nagel, Lars}, year={2010}, pages={1–10} }' chicago: Berenbrink, Petra, André Brinkmann, Tom Friedetzky, and Lars Nagel. “Balls into Non-Uniform Bins.” In Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS), 1–10. IEEE, 2010. https://doi.org/10.1109/IPDPS.2010.5470355. ieee: P. Berenbrink, A. Brinkmann, T. Friedetzky, and L. Nagel, “Balls into Non-uniform Bins,” in Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS), 2010, pp. 1–10. mla: Berenbrink, Petra, et al. “Balls into Non-Uniform Bins.” Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS), IEEE, 2010, pp. 1–10, doi:10.1109/IPDPS.2010.5470355. short: 'P. Berenbrink, A. Brinkmann, T. Friedetzky, L. Nagel, in: Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS), IEEE, 2010, pp. 1–10.' date_created: 2018-04-05T16:50:03Z date_updated: 2022-01-06T06:55:31Z department: - _id: '27' doi: 10.1109/IPDPS.2010.5470355 page: 1-10 publication: Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS) publisher: IEEE status: public title: Balls into Non-uniform Bins type: conference user_id: '24135' year: '2010' ... --- _id: '2220' author: - first_name: David full_name: Andrews, David last_name: Andrews - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Andrews D, Plessl C. Configurable Processor Architectures: History and Trends. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:165.' apa: 'Andrews, D., & Plessl, C. (2010). Configurable Processor Architectures: History and Trends. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 165.' bibtex: '@inproceedings{Andrews_Plessl_2010, title={Configurable Processor Architectures: History and Trends}, booktitle={Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)}, publisher={CSREA Press}, author={Andrews, David and Plessl, Christian}, year={2010}, pages={165} }' chicago: 'Andrews, David, and Christian Plessl. “Configurable Processor Architectures: History and Trends.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 165. CSREA Press, 2010.' ieee: 'D. Andrews and C. Plessl, “Configurable Processor Architectures: History and Trends,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, p. 165.' mla: 'Andrews, David, and Christian Plessl. “Configurable Processor Architectures: History and Trends.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165.' short: 'D. Andrews, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165.' date_created: 2018-04-05T14:57:07Z date_updated: 2023-09-26T13:47:33Z department: - _id: '27' - _id: '518' - _id: '78' language: - iso: eng page: '165' publication: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) publication_identifier: isbn: - 1-60132-140-6 publisher: CSREA Press quality_controlled: '1' status: public title: 'Configurable Processor Architectures: History and Trends' type: conference user_id: '15278' year: '2010' ... --- _id: '2230' author: - first_name: Dirk full_name: Meister, Dirk last_name: Meister - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Meister D, Brinkmann A. dedupv1: Improving Deduplication Throughput using Solid State Drives (SSD). In: Proc. Symp. on Mass Storage Systems and Technologies (MSST). Washington, DC: IEEE Computer Society; 2010:1-6. doi:10.1109/MSST.2010.5496992' apa: 'Meister, D., & Brinkmann, A. (2010). dedupv1: Improving Deduplication Throughput using Solid State Drives (SSD). In Proc. Symp. on Mass Storage Systems and Technologies (MSST) (pp. 1–6). Washington, DC: IEEE Computer Society. https://doi.org/10.1109/MSST.2010.5496992' bibtex: '@inproceedings{Meister_Brinkmann_2010, place={Washington, DC}, title={dedupv1: Improving Deduplication Throughput using Solid State Drives (SSD)}, DOI={10.1109/MSST.2010.5496992}, booktitle={Proc. Symp. on Mass Storage Systems and Technologies (MSST)}, publisher={IEEE Computer Society}, author={Meister, Dirk and Brinkmann, André}, year={2010}, pages={1–6} }' chicago: 'Meister, Dirk, and André Brinkmann. “Dedupv1: Improving Deduplication Throughput Using Solid State Drives (SSD).” In Proc. Symp. on Mass Storage Systems and Technologies (MSST), 1–6. Washington, DC: IEEE Computer Society, 2010. https://doi.org/10.1109/MSST.2010.5496992.' ieee: 'D. Meister and A. Brinkmann, “dedupv1: Improving Deduplication Throughput using Solid State Drives (SSD),” in Proc. Symp. on Mass Storage Systems and Technologies (MSST), 2010, pp. 1–6.' mla: 'Meister, Dirk, and André Brinkmann. “Dedupv1: Improving Deduplication Throughput Using Solid State Drives (SSD).” Proc. Symp. on Mass Storage Systems and Technologies (MSST), IEEE Computer Society, 2010, pp. 1–6, doi:10.1109/MSST.2010.5496992.' short: 'D. Meister, A. Brinkmann, in: Proc. Symp. on Mass Storage Systems and Technologies (MSST), IEEE Computer Society, Washington, DC, 2010, pp. 1–6.' date_created: 2018-04-05T16:47:23Z date_updated: 2022-01-06T06:55:30Z department: - _id: '27' doi: 10.1109/MSST.2010.5496992 page: 1-6 place: Washington, DC publication: Proc. Symp. on Mass Storage Systems and Technologies (MSST) publisher: IEEE Computer Society status: public title: 'dedupv1: Improving Deduplication Throughput using Solid State Drives (SSD)' type: conference user_id: '24135' year: '2010' ... --- _id: '2237' author: - first_name: Oliver full_name: Niehörster, Oliver last_name: Niehörster - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Gregor full_name: Fels, Gregor last_name: Fels - first_name: Jens full_name: Krüger, Jens last_name: Krüger - first_name: Jens full_name: Simon, Jens id: '15273' last_name: Simon citation: ama: 'Niehörster O, Brinkmann A, Fels G, Krüger J, Simon J. Enforcing SLAs in Scientific Clouds. In: Proc. Int. Conf. on Cluster Computing (CLUSTER). IEEE; 2010:178-187. doi:10.1109/CLUSTER.2010.42' apa: Niehörster, O., Brinkmann, A., Fels, G., Krüger, J., & Simon, J. (2010). Enforcing SLAs in Scientific Clouds. In Proc. Int. Conf. on Cluster Computing (CLUSTER) (pp. 178–187). IEEE. https://doi.org/10.1109/CLUSTER.2010.42 bibtex: '@inproceedings{Niehörster_Brinkmann_Fels_Krüger_Simon_2010, title={Enforcing SLAs in Scientific Clouds}, DOI={10.1109/CLUSTER.2010.42}, booktitle={Proc. Int. Conf. on Cluster Computing (CLUSTER)}, publisher={IEEE}, author={Niehörster, Oliver and Brinkmann, André and Fels, Gregor and Krüger, Jens and Simon, Jens}, year={2010}, pages={178–187} }' chicago: Niehörster, Oliver, André Brinkmann, Gregor Fels, Jens Krüger, and Jens Simon. “Enforcing SLAs in Scientific Clouds.” In Proc. Int. Conf. on Cluster Computing (CLUSTER), 178–87. IEEE, 2010. https://doi.org/10.1109/CLUSTER.2010.42. ieee: O. Niehörster, A. Brinkmann, G. Fels, J. Krüger, and J. Simon, “Enforcing SLAs in Scientific Clouds,” in Proc. Int. Conf. on Cluster Computing (CLUSTER), 2010, pp. 178–187. mla: Niehörster, Oliver, et al. “Enforcing SLAs in Scientific Clouds.” Proc. Int. Conf. on Cluster Computing (CLUSTER), IEEE, 2010, pp. 178–87, doi:10.1109/CLUSTER.2010.42. short: 'O. Niehörster, A. Brinkmann, G. Fels, J. Krüger, J. Simon, in: Proc. Int. Conf. on Cluster Computing (CLUSTER), IEEE, 2010, pp. 178–187.' date_created: 2018-04-05T17:05:44Z date_updated: 2022-01-06T06:55:32Z department: - _id: '27' doi: 10.1109/CLUSTER.2010.42 page: 178-187 publication: Proc. Int. Conf. on Cluster Computing (CLUSTER) publication_identifier: issn: - 1552-5244 publisher: IEEE status: public title: Enforcing SLAs in Scientific Clouds type: conference user_id: '24135' year: '2010' ... --- _id: '2236' author: - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: Sebastian full_name: Breuers, Sebastian last_name: Breuers - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Dirk full_name: Blunk, Dirk last_name: Blunk - first_name: Gregor full_name: Fels, Gregor last_name: Fels - first_name: Sandra full_name: Gesing, Sandra last_name: Gesing - first_name: Sonja full_name: Herres-Pawlis, Sonja last_name: Herres-Pawlis - first_name: Oliver full_name: Kohlbacher, Oliver last_name: Kohlbacher - first_name: Jens full_name: Krüger, Jens last_name: Krüger - first_name: Lars full_name: Packschies, Lars last_name: Packschies citation: ama: 'Birkenheuer G, Breuers S, Brinkmann A, et al. Grid-Workflows in Molecular Science. In: Proc. of Grid Workflow Workshop (GWW). Lecture Notes in Informatics. Gesellschaft für Informatik (GI); 2010:177-184.' apa: Birkenheuer, G., Breuers, S., Brinkmann, A., Blunk, D., Fels, G., Gesing, S., … Packschies, L. (2010). Grid-Workflows in Molecular Science. In Proc. of Grid Workflow Workshop (GWW) (pp. 177–184). Gesellschaft für Informatik (GI). bibtex: '@inproceedings{Birkenheuer_Breuers_Brinkmann_Blunk_Fels_Gesing_Herres-Pawlis_Kohlbacher_Krüger_Packschies_2010, series={Lecture Notes in Informatics}, title={Grid-Workflows in Molecular Science}, booktitle={Proc. of Grid Workflow Workshop (GWW)}, publisher={Gesellschaft für Informatik (GI)}, author={Birkenheuer, Georg and Breuers, Sebastian and Brinkmann, André and Blunk, Dirk and Fels, Gregor and Gesing, Sandra and Herres-Pawlis, Sonja and Kohlbacher, Oliver and Krüger, Jens and Packschies, Lars}, year={2010}, pages={177–184}, collection={Lecture Notes in Informatics} }' chicago: Birkenheuer, Georg, Sebastian Breuers, André Brinkmann, Dirk Blunk, Gregor Fels, Sandra Gesing, Sonja Herres-Pawlis, Oliver Kohlbacher, Jens Krüger, and Lars Packschies. “Grid-Workflows in Molecular Science.” In Proc. of Grid Workflow Workshop (GWW), 177–84. Lecture Notes in Informatics. Gesellschaft für Informatik (GI), 2010. ieee: G. Birkenheuer et al., “Grid-Workflows in Molecular Science,” in Proc. of Grid Workflow Workshop (GWW), 2010, pp. 177–184. mla: Birkenheuer, Georg, et al. “Grid-Workflows in Molecular Science.” Proc. of Grid Workflow Workshop (GWW), Gesellschaft für Informatik (GI), 2010, pp. 177–84. short: 'G. Birkenheuer, S. Breuers, A. Brinkmann, D. Blunk, G. Fels, S. Gesing, S. Herres-Pawlis, O. Kohlbacher, J. Krüger, L. Packschies, in: Proc. of Grid Workflow Workshop (GWW), Gesellschaft für Informatik (GI), 2010, pp. 177–184.' date_created: 2018-04-05T17:03:41Z date_updated: 2022-01-06T06:55:31Z department: - _id: '27' page: 177-184 publication: Proc. of Grid Workflow Workshop (GWW) publisher: Gesellschaft für Informatik (GI) series_title: Lecture Notes in Informatics status: public title: Grid-Workflows in Molecular Science type: conference user_id: '24135' year: '2010' ... --- _id: '2231' author: - first_name: Paul Hermann full_name: Lensing, Paul Hermann last_name: Lensing - first_name: Dirk full_name: Meister, Dirk last_name: Meister - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Lensing PH, Meister D, Brinkmann A. hashFS: Applying Hashing to Optimized File Systems for Small File Reads. In: Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI). IEEE; 2010:33-42. doi:10.1109/SNAPI.2010.12' apa: 'Lensing, P. H., Meister, D., & Brinkmann, A. (2010). hashFS: Applying Hashing to Optimized File Systems for Small File Reads. In Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI) (pp. 33–42). IEEE. https://doi.org/10.1109/SNAPI.2010.12' bibtex: '@inproceedings{Lensing_Meister_Brinkmann_2010, title={hashFS: Applying Hashing to Optimized File Systems for Small File Reads}, DOI={10.1109/SNAPI.2010.12}, booktitle={Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI)}, publisher={IEEE}, author={Lensing, Paul Hermann and Meister, Dirk and Brinkmann, André}, year={2010}, pages={33–42} }' chicago: 'Lensing, Paul Hermann, Dirk Meister, and André Brinkmann. “HashFS: Applying Hashing to Optimized File Systems for Small File Reads.” In Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI), 33–42. IEEE, 2010. https://doi.org/10.1109/SNAPI.2010.12.' ieee: 'P. H. Lensing, D. Meister, and A. Brinkmann, “hashFS: Applying Hashing to Optimized File Systems for Small File Reads,” in Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI), 2010, pp. 33–42.' mla: 'Lensing, Paul Hermann, et al. “HashFS: Applying Hashing to Optimized File Systems for Small File Reads.” Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI), IEEE, 2010, pp. 33–42, doi:10.1109/SNAPI.2010.12.' short: 'P.H. Lensing, D. Meister, A. Brinkmann, in: Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI), IEEE, 2010, pp. 33–42.' date_created: 2018-04-05T16:48:01Z date_updated: 2022-01-06T06:55:31Z department: - _id: '27' doi: 10.1109/SNAPI.2010.12 page: 33-42 publication: Proc. Int. Worksh. on Storage Network Architecture and Parallel I/Os (SNAPI) publisher: IEEE status: public title: 'hashFS: Applying Hashing to Optimized File Systems for Small File Reads' type: conference user_id: '24135' year: '2010' ... --- _id: '2234' author: - first_name: Matthias full_name: Bolte, Matthias last_name: Bolte - first_name: Michael full_name: Sievers, Michael last_name: Sievers - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: Oliver full_name: Niehörster, Oliver last_name: Niehörster - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Bolte M, Sievers M, Birkenheuer G, Niehörster O, Brinkmann A. Non-intrusive Virtualization Management Using libvirt. In: Proc. Design, Automation and Test in Europe Conf. (DATE). EDA Consortium; 2010.' apa: Bolte, M., Sievers, M., Birkenheuer, G., Niehörster, O., & Brinkmann, A. (2010). Non-intrusive Virtualization Management Using libvirt. In Proc. Design, Automation and Test in Europe Conf. (DATE). EDA Consortium. bibtex: '@inproceedings{Bolte_Sievers_Birkenheuer_Niehörster_Brinkmann_2010, title={Non-intrusive Virtualization Management Using libvirt}, booktitle={Proc. Design, Automation and Test in Europe Conf. (DATE)}, publisher={EDA Consortium}, author={Bolte, Matthias and Sievers, Michael and Birkenheuer, Georg and Niehörster, Oliver and Brinkmann, André}, year={2010} }' chicago: Bolte, Matthias, Michael Sievers, Georg Birkenheuer, Oliver Niehörster, and André Brinkmann. “Non-Intrusive Virtualization Management Using Libvirt.” In Proc. Design, Automation and Test in Europe Conf. (DATE). EDA Consortium, 2010. ieee: M. Bolte, M. Sievers, G. Birkenheuer, O. Niehörster, and A. Brinkmann, “Non-intrusive Virtualization Management Using libvirt,” in Proc. Design, Automation and Test in Europe Conf. (DATE), 2010. mla: Bolte, Matthias, et al. “Non-Intrusive Virtualization Management Using Libvirt.” Proc. Design, Automation and Test in Europe Conf. (DATE), EDA Consortium, 2010. short: 'M. Bolte, M. Sievers, G. Birkenheuer, O. Niehörster, A. Brinkmann, in: Proc. Design, Automation and Test in Europe Conf. (DATE), EDA Consortium, 2010.' date_created: 2018-04-05T16:52:36Z date_updated: 2022-01-06T06:55:31Z department: - _id: '27' publication: Proc. Design, Automation and Test in Europe Conf. (DATE) publisher: EDA Consortium status: public title: Non-intrusive Virtualization Management Using libvirt type: conference user_id: '24135' year: '2010' ... --- _id: '2228' author: - first_name: Tobias full_name: Kenter, Tobias id: '3145' last_name: Kenter - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Michael full_name: Kauschke, Michael last_name: Kauschke citation: ama: 'Kenter T, Platzner M, Plessl C, Kauschke M. Performance Estimation for the Exploration of CPU-Accelerator Architectures. In: Hammami O, Larrabee S, eds. Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA). ; 2010.' apa: Kenter, T., Platzner, M., Plessl, C., & Kauschke, M. (2010). Performance Estimation for the Exploration of CPU-Accelerator Architectures. In O. Hammami & S. Larrabee (Eds.), Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA). bibtex: '@inproceedings{Kenter_Platzner_Plessl_Kauschke_2010, title={Performance Estimation for the Exploration of CPU-Accelerator Architectures}, booktitle={Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA)}, author={Kenter, Tobias and Platzner, Marco and Plessl, Christian and Kauschke, Michael}, editor={Hammami, Omar and Larrabee, Sandra}, year={2010} }' chicago: Kenter, Tobias, Marco Platzner, Christian Plessl, and Michael Kauschke. “Performance Estimation for the Exploration of CPU-Accelerator Architectures.” In Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), edited by Omar Hammami and Sandra Larrabee, 2010. ieee: T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation for the Exploration of CPU-Accelerator Architectures,” in Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), 2010. mla: Kenter, Tobias, et al. “Performance Estimation for the Exploration of CPU-Accelerator Architectures.” Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), edited by Omar Hammami and Sandra Larrabee, 2010. short: 'T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: O. Hammami, S. Larrabee (Eds.), Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), 2010.' date_created: 2018-04-05T16:43:04Z date_updated: 2023-09-26T13:50:04Z department: - _id: '27' - _id: '518' - _id: '78' editor: - first_name: Omar full_name: Hammami, Omar last_name: Hammami - first_name: Sandra full_name: Larrabee, Sandra last_name: Larrabee language: - iso: eng publication: Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA) quality_controlled: '1' status: public title: Performance Estimation for the Exploration of CPU-Accelerator Architectures type: conference user_id: '15278' year: '2010' ... --- _id: '2216' author: - first_name: Mariusz full_name: Grad, Mariusz last_name: Grad - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Grad M, Plessl C. Pruning the Design Space for Just-In-Time Processor Customization. In: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig). IEEE Computer Society; 2010:67-72. doi:10.1109/ReConFig.2010.19' apa: Grad, M., & Plessl, C. (2010). Pruning the Design Space for Just-In-Time Processor Customization. Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 67–72. https://doi.org/10.1109/ReConFig.2010.19 bibtex: '@inproceedings{Grad_Plessl_2010, place={Los Alamitos, CA, USA}, title={Pruning the Design Space for Just-In-Time Processor Customization}, DOI={10.1109/ReConFig.2010.19}, booktitle={Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE Computer Society}, author={Grad, Mariusz and Plessl, Christian}, year={2010}, pages={67–72} }' chicago: 'Grad, Mariusz, and Christian Plessl. “Pruning the Design Space for Just-In-Time Processor Customization.” In Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 67–72. Los Alamitos, CA, USA: IEEE Computer Society, 2010. https://doi.org/10.1109/ReConFig.2010.19.' ieee: 'M. Grad and C. Plessl, “Pruning the Design Space for Just-In-Time Processor Customization,” in Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 2010, pp. 67–72, doi: 10.1109/ReConFig.2010.19.' mla: Grad, Mariusz, and Christian Plessl. “Pruning the Design Space for Just-In-Time Processor Customization.” Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, 2010, pp. 67–72, doi:10.1109/ReConFig.2010.19. short: 'M. Grad, C. Plessl, in: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, Los Alamitos, CA, USA, 2010, pp. 67–72.' date_created: 2018-04-05T14:48:51Z date_updated: 2023-09-26T13:47:11Z department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/ReConFig.2010.19 language: - iso: eng page: 67-72 place: Los Alamitos, CA, USA publication: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig) publisher: IEEE Computer Society quality_controlled: '1' status: public title: Pruning the Design Space for Just-In-Time Processor Customization type: conference user_id: '15278' year: '2010' ... --- _id: '2206' author: - first_name: Ariane full_name: Keller, Ariane last_name: Keller - first_name: Bernhard full_name: Plattner, Bernhard last_name: Plattner - first_name: Enno full_name: Lübbers, Enno last_name: Lübbers - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Keller A, Plattner B, Lübbers E, Platzner M, Plessl C. Reconfigurable Nodes for Future Networks. In: Proc. IEEE Globecom Workshop on Network of the Future (FutureNet). IEEE; 2010:372-376. doi:10.1109/GLOCOMW.2010.5700341' apa: Keller, A., Plattner, B., Lübbers, E., Platzner, M., & Plessl, C. (2010). Reconfigurable Nodes for Future Networks. Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 372–376. https://doi.org/10.1109/GLOCOMW.2010.5700341 bibtex: '@inproceedings{Keller_Plattner_Lübbers_Platzner_Plessl_2010, title={Reconfigurable Nodes for Future Networks}, DOI={10.1109/GLOCOMW.2010.5700341}, booktitle={Proc. IEEE Globecom Workshop on Network of the Future (FutureNet)}, publisher={IEEE}, author={Keller, Ariane and Plattner, Bernhard and Lübbers, Enno and Platzner, Marco and Plessl, Christian}, year={2010}, pages={372–376} }' chicago: Keller, Ariane, Bernhard Plattner, Enno Lübbers, Marco Platzner, and Christian Plessl. “Reconfigurable Nodes for Future Networks.” In Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 372–76. IEEE, 2010. https://doi.org/10.1109/GLOCOMW.2010.5700341. ieee: 'A. Keller, B. Plattner, E. Lübbers, M. Platzner, and C. Plessl, “Reconfigurable Nodes for Future Networks,” in Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 2010, pp. 372–376, doi: 10.1109/GLOCOMW.2010.5700341.' mla: Keller, Ariane, et al. “Reconfigurable Nodes for Future Networks.” Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), IEEE, 2010, pp. 372–76, doi:10.1109/GLOCOMW.2010.5700341. short: 'A. Keller, B. Plattner, E. Lübbers, M. Platzner, C. Plessl, in: Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), IEEE, 2010, pp. 372–376.' date_created: 2018-04-04T09:36:16Z date_updated: 2023-09-26T13:51:00Z department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/GLOCOMW.2010.5700341 language: - iso: eng page: 372-376 publication: Proc. IEEE Globecom Workshop on Network of the Future (FutureNet) publication_identifier: isbn: - 978-1-4244-8864-3 publisher: IEEE quality_controlled: '1' status: public title: Reconfigurable Nodes for Future Networks type: conference user_id: '15278' year: '2010' ... --- _id: '2225' author: - first_name: Yan full_name: Gao, Yan last_name: Gao - first_name: Dirk full_name: Meister, Dirk last_name: Meister - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Gao Y, Meister D, Brinkmann A. Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors. In: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS). IEEE; 2010:126-134. doi:10.1109/NAS.2010.11' apa: Gao, Y., Meister, D., & Brinkmann, A. (2010). Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors. In Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS) (pp. 126–134). IEEE. https://doi.org/10.1109/NAS.2010.11 bibtex: '@inproceedings{Gao_Meister_Brinkmann_2010, title={Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors}, DOI={10.1109/NAS.2010.11}, booktitle={Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS)}, publisher={IEEE}, author={Gao, Yan and Meister, Dirk and Brinkmann, André}, year={2010}, pages={126–134} }' chicago: Gao, Yan, Dirk Meister, and André Brinkmann. “Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors.” In Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), 126–34. IEEE, 2010. https://doi.org/10.1109/NAS.2010.11. ieee: Y. Gao, D. Meister, and A. Brinkmann, “Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors,” in Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), 2010, pp. 126–134. mla: Gao, Yan, et al. “Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors.” Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), IEEE, 2010, pp. 126–34, doi:10.1109/NAS.2010.11. short: 'Y. Gao, D. Meister, A. Brinkmann, in: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), IEEE, 2010, pp. 126–134.' date_created: 2018-04-05T16:37:26Z date_updated: 2022-01-06T06:55:29Z department: - _id: '27' doi: 10.1109/NAS.2010.11 page: 126-134 publication: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS) publisher: IEEE status: public title: Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors type: conference user_id: '24135' year: '2010' ... --- _id: '809' author: - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: Andre full_name: Brinkmann, Andre last_name: Brinkmann - first_name: Holger full_name: Karl, Holger id: '126' last_name: Karl citation: ama: 'Birkenheuer G, Brinkmann A, Karl H. Risk Aware Overbooking for Commercial Grids. In: Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers. ; 2010:51-76. doi:10.1007/978-3-642-16505-4_4' apa: Birkenheuer, G., Brinkmann, A., & Karl, H. (2010). Risk Aware Overbooking for Commercial Grids. In Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers (pp. 51–76). https://doi.org/10.1007/978-3-642-16505-4_4 bibtex: '@inproceedings{Birkenheuer_Brinkmann_Karl_2010, title={Risk Aware Overbooking for Commercial Grids}, DOI={10.1007/978-3-642-16505-4_4}, booktitle={Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers}, author={Birkenheuer, Georg and Brinkmann, Andre and Karl, Holger}, year={2010}, pages={51–76} }' chicago: Birkenheuer, Georg, Andre Brinkmann, and Holger Karl. “Risk Aware Overbooking for Commercial Grids.” In Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers, 51–76, 2010. https://doi.org/10.1007/978-3-642-16505-4_4. ieee: G. Birkenheuer, A. Brinkmann, and H. Karl, “Risk Aware Overbooking for Commercial Grids,” in Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers, 2010, pp. 51–76. mla: Birkenheuer, Georg, et al. “Risk Aware Overbooking for Commercial Grids.” Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers, 2010, pp. 51–76, doi:10.1007/978-3-642-16505-4_4. short: 'G. Birkenheuer, A. Brinkmann, H. Karl, in: Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers, 2010, pp. 51–76.' date_created: 2017-11-27T10:22:26Z date_updated: 2022-01-06T07:03:50Z department: - _id: '75' - _id: '27' doi: 10.1007/978-3-642-16505-4_4 page: 51-76 publication: Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers status: public title: Risk Aware Overbooking for Commercial Grids type: conference user_id: '24135' year: '2010' ... --- _id: '2227' author: - first_name: Matthias full_name: Woehrle, Matthias last_name: Woehrle - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Lothar full_name: Thiele, Lothar last_name: Thiele citation: ama: 'Woehrle M, Plessl C, Thiele L. Rupeas: Ruby Powered Event Analysis DSL. In: Proc. Int. Conf. Networked Sensing Systems (INSS). IEEE; 2010:245-248. doi:10.1109/INSS.2010.5572211' apa: 'Woehrle, M., Plessl, C., & Thiele, L. (2010). Rupeas: Ruby Powered Event Analysis DSL. Proc. Int. Conf. Networked Sensing Systems (INSS), 245–248. https://doi.org/10.1109/INSS.2010.5572211' bibtex: '@inproceedings{Woehrle_Plessl_Thiele_2010, title={Rupeas: Ruby Powered Event Analysis DSL}, DOI={10.1109/INSS.2010.5572211}, booktitle={Proc. Int. Conf. Networked Sensing Systems (INSS)}, publisher={IEEE}, author={Woehrle, Matthias and Plessl, Christian and Thiele, Lothar}, year={2010}, pages={245–248} }' chicago: 'Woehrle, Matthias, Christian Plessl, and Lothar Thiele. “Rupeas: Ruby Powered Event Analysis DSL.” In Proc. Int. Conf. Networked Sensing Systems (INSS), 245–48. IEEE, 2010. https://doi.org/10.1109/INSS.2010.5572211.' ieee: 'M. Woehrle, C. Plessl, and L. Thiele, “Rupeas: Ruby Powered Event Analysis DSL,” in Proc. Int. Conf. Networked Sensing Systems (INSS), 2010, pp. 245–248, doi: 10.1109/INSS.2010.5572211.' mla: 'Woehrle, Matthias, et al. “Rupeas: Ruby Powered Event Analysis DSL.” Proc. Int. Conf. Networked Sensing Systems (INSS), IEEE, 2010, pp. 245–48, doi:10.1109/INSS.2010.5572211.' short: 'M. Woehrle, C. Plessl, L. Thiele, in: Proc. Int. Conf. Networked Sensing Systems (INSS), IEEE, 2010, pp. 245–248.' date_created: 2018-04-05T16:41:02Z date_updated: 2023-09-26T13:49:38Z department: - _id: '27' - _id: '518' doi: 10.1109/INSS.2010.5572211 extern: '1' language: - iso: eng page: 245-248 publication: Proc. Int. Conf. Networked Sensing Systems (INSS) publication_identifier: isbn: - 978-1-4244-7911-5 publisher: IEEE quality_controlled: '1' status: public title: 'Rupeas: Ruby Powered Event Analysis DSL' type: conference user_id: '15278' year: '2010' ... --- _id: '2217' author: - first_name: Marcin full_name: Bienkowski, Marcin last_name: Bienkowski - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Marek full_name: Klonowski, Marek last_name: Klonowski - first_name: Miroslaw full_name: Korzeniowski, Miroslaw last_name: Korzeniowski citation: ama: 'Bienkowski M, Brinkmann A, Klonowski M, Korzeniowski M. SkewCCC+: A Heterogeneous Distributed Hash Table. In: Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis). Vol 6490. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer; 2010. doi:10.1007/978-3-642-17653-1_18' apa: 'Bienkowski, M., Brinkmann, A., Klonowski, M., & Korzeniowski, M. (2010). SkewCCC+: A Heterogeneous Distributed Hash Table. In Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis) (Vol. 6490). Berlin / Heidelberg: Springer. https://doi.org/10.1007/978-3-642-17653-1_18' bibtex: '@inproceedings{Bienkowski_Brinkmann_Klonowski_Korzeniowski_2010, place={Berlin / Heidelberg}, series={Lecture Notes in Computer Science (LNCS)}, title={SkewCCC+: A Heterogeneous Distributed Hash Table}, volume={6490}, DOI={10.1007/978-3-642-17653-1_18}, booktitle={Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis)}, publisher={Springer}, author={Bienkowski, Marcin and Brinkmann, André and Klonowski, Marek and Korzeniowski, Miroslaw}, year={2010}, collection={Lecture Notes in Computer Science (LNCS)} }' chicago: 'Bienkowski, Marcin, André Brinkmann, Marek Klonowski, and Miroslaw Korzeniowski. “SkewCCC+: A Heterogeneous Distributed Hash Table.” In Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis), Vol. 6490. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer, 2010. https://doi.org/10.1007/978-3-642-17653-1_18.' ieee: 'M. Bienkowski, A. Brinkmann, M. Klonowski, and M. Korzeniowski, “SkewCCC+: A Heterogeneous Distributed Hash Table,” in Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis), 2010, vol. 6490.' mla: 'Bienkowski, Marcin, et al. “SkewCCC+: A Heterogeneous Distributed Hash Table.” Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis), vol. 6490, Springer, 2010, doi:10.1007/978-3-642-17653-1_18.' short: 'M. Bienkowski, A. Brinkmann, M. Klonowski, M. Korzeniowski, in: Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis), Springer, Berlin / Heidelberg, 2010.' date_created: 2018-04-05T14:49:51Z date_updated: 2022-01-06T06:55:28Z department: - _id: '27' doi: 10.1007/978-3-642-17653-1_18 intvolume: ' 6490' place: Berlin / Heidelberg publication: Proceedings of the 14th International Conference On Principles Of Distributed Systems (Opodis) publisher: Springer series_title: Lecture Notes in Computer Science (LNCS) status: public title: 'SkewCCC+: A Heterogeneous Distributed Hash Table' type: conference user_id: '24135' volume: 6490 year: '2010' ... --- _id: '2218' author: - first_name: Martin full_name: Wewior, Martin last_name: Wewior - first_name: Lars full_name: Packschies, Lars last_name: Packschies - first_name: Dirk full_name: Blunk, Dirk last_name: Blunk - first_name: Daniel full_name: Wickeroth, Daniel last_name: Wickeroth - first_name: Klaus-Dieter full_name: Warzecha, Klaus-Dieter last_name: Warzecha - first_name: Sonja full_name: Herres-Pawlis, Sonja last_name: Herres-Pawlis - first_name: Sandra full_name: Gesing, Sandra last_name: Gesing - first_name: Sebastian full_name: Breuers, Sebastian last_name: Breuers - first_name: Jens full_name: Krüger, Jens last_name: Krüger - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: Ulrich full_name: Lang, Ulrich last_name: Lang citation: ama: 'Wewior M, Packschies L, Blunk D, et al. The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations. In: Proc. Int. Workshop on Scientific Gateways (IWSG). Consorzio COMETA; 2010:39-43.' apa: Wewior, M., Packschies, L., Blunk, D., Wickeroth, D., Warzecha, K.-D., Herres-Pawlis, S., … Lang, U. (2010). The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations. In Proc. Int. Workshop on Scientific Gateways (IWSG) (pp. 39–43). Consorzio COMETA. bibtex: '@inproceedings{Wewior_Packschies_Blunk_Wickeroth_Warzecha_Herres-Pawlis_Gesing_Breuers_Krüger_Birkenheuer_et al._2010, title={The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations}, booktitle={Proc. Int. Workshop on Scientific Gateways (IWSG)}, publisher={Consorzio COMETA}, author={Wewior, Martin and Packschies, Lars and Blunk, Dirk and Wickeroth, Daniel and Warzecha, Klaus-Dieter and Herres-Pawlis, Sonja and Gesing, Sandra and Breuers, Sebastian and Krüger, Jens and Birkenheuer, Georg and et al.}, year={2010}, pages={39–43} }' chicago: Wewior, Martin, Lars Packschies, Dirk Blunk, Daniel Wickeroth, Klaus-Dieter Warzecha, Sonja Herres-Pawlis, Sandra Gesing, et al. “The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations.” In Proc. Int. Workshop on Scientific Gateways (IWSG), 39–43. Consorzio COMETA, 2010. ieee: M. Wewior et al., “The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations,” in Proc. Int. Workshop on Scientific Gateways (IWSG), 2010, pp. 39–43. mla: Wewior, Martin, et al. “The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations.” Proc. Int. Workshop on Scientific Gateways (IWSG), Consorzio COMETA, 2010, pp. 39–43. short: 'M. Wewior, L. Packschies, D. Blunk, D. Wickeroth, K.-D. Warzecha, S. Herres-Pawlis, S. Gesing, S. Breuers, J. Krüger, G. Birkenheuer, U. Lang, in: Proc. Int. Workshop on Scientific Gateways (IWSG), Consorzio COMETA, 2010, pp. 39–43.' date_created: 2018-04-05T14:53:40Z date_updated: 2022-01-06T06:55:28Z department: - _id: '27' page: 39-43 publication: Proc. Int. Workshop on Scientific Gateways (IWSG) publisher: Consorzio COMETA status: public title: The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations type: conference user_id: '24135' year: '2010' ... --- _id: '2223' author: - first_name: Enno full_name: Lübbers, Enno last_name: Lübbers - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Ariane full_name: Keller, Ariane last_name: Keller - first_name: Bernhard full_name: Plattner, Bernhard last_name: Plattner citation: ama: 'Lübbers E, Platzner M, Plessl C, Keller A, Plattner B. Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:225-231.' apa: Lübbers, E., Platzner, M., Plessl, C., Keller, A., & Plattner, B. (2010). Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 225–231. bibtex: '@inproceedings{Lübbers_Platzner_Plessl_Keller_Plattner_2010, title={Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware}, booktitle={Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)}, publisher={CSREA Press}, author={Lübbers, Enno and Platzner, Marco and Plessl, Christian and Keller, Ariane and Plattner, Bernhard}, year={2010}, pages={225–231} }' chicago: Lübbers, Enno, Marco Platzner, Christian Plessl, Ariane Keller, and Bernhard Plattner. “Towards Adaptive Networking for Embedded Devices Based on Reconfigurable Hardware.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 225–31. CSREA Press, 2010. ieee: E. Lübbers, M. Platzner, C. Plessl, A. Keller, and B. Plattner, “Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 225–231. mla: Lübbers, Enno, et al. “Towards Adaptive Networking for Embedded Devices Based on Reconfigurable Hardware.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 225–31. short: 'E. Lübbers, M. Platzner, C. Plessl, A. Keller, B. Plattner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 225–231.' date_created: 2018-04-05T16:27:13Z date_updated: 2023-09-26T13:48:32Z department: - _id: '27' - _id: '518' - _id: '78' language: - iso: eng page: 225-231 publication: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) publication_identifier: isbn: - 1-60132-140-6 publisher: CSREA Press quality_controlled: '1' status: public title: Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware type: conference user_id: '15278' year: '2010' ... --- _id: '2226' author: - first_name: Tobias full_name: Beisel, Tobias last_name: Beisel - first_name: Manuel full_name: Niekamp, Manuel last_name: Niekamp - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Beisel T, Niekamp M, Plessl C. Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators. In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society; 2010:65-72. doi:10.1109/ASAP.2010.5540798' apa: Beisel, T., Niekamp, M., & Plessl, C. (2010). Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators. Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 65–72. https://doi.org/10.1109/ASAP.2010.5540798 bibtex: '@inproceedings{Beisel_Niekamp_Plessl_2010, title={Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators}, DOI={10.1109/ASAP.2010.5540798}, booktitle={Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)}, publisher={IEEE Computer Society}, author={Beisel, Tobias and Niekamp, Manuel and Plessl, Christian}, year={2010}, pages={65–72} }' chicago: Beisel, Tobias, Manuel Niekamp, and Christian Plessl. “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators.” In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 65–72. IEEE Computer Society, 2010. https://doi.org/10.1109/ASAP.2010.5540798. ieee: 'T. Beisel, M. Niekamp, and C. Plessl, “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2010, pp. 65–72, doi: 10.1109/ASAP.2010.5540798.' mla: Beisel, Tobias, et al. “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators.” Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2010, pp. 65–72, doi:10.1109/ASAP.2010.5540798. short: 'T. Beisel, M. Niekamp, C. Plessl, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2010, pp. 65–72.' date_created: 2018-04-05T16:39:34Z date_updated: 2023-09-26T13:49:21Z department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/ASAP.2010.5540798 language: - iso: eng page: 65-72 publication: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP) publication_identifier: isbn: - 978-1-4244-6965-9 publisher: IEEE Computer Society quality_controlled: '1' status: public title: Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators type: conference user_id: '15278' year: '2010' ... --- _id: '2219' author: - first_name: Sandra full_name: Gesing, Sandra last_name: Gesing - first_name: Istvan full_name: Marton, Istvan last_name: Marton - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: Bernd full_name: Schuller, Bernd last_name: Schuller - first_name: Richard full_name: Grunzke, Richard last_name: Grunzke - first_name: Jens full_name: Krüger, Jens last_name: Krüger - first_name: Sebastian full_name: Breuers, Sebastian last_name: Breuers - first_name: Dirk full_name: Blunk, Dirk last_name: Blunk - first_name: Gregor full_name: Fels, Gregor last_name: Fels - first_name: Lars full_name: Packschies, Lars last_name: Packschies - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Oliver full_name: Kohlbacher, Oliver last_name: Kohlbacher - first_name: Miklos full_name: Kozlovszky, Miklos last_name: Kozlovszky citation: ama: 'Gesing S, Marton I, Birkenheuer G, et al. Workflow Interoperability in a Grid Portal for Molecular Simulations. In: Proc. Int. Workshop on Scientific Gateways (IWSG). Consorzio COMETA; 2010:44-48.' apa: Gesing, S., Marton, I., Birkenheuer, G., Schuller, B., Grunzke, R., Krüger, J., … Kozlovszky, M. (2010). Workflow Interoperability in a Grid Portal for Molecular Simulations. In Proc. Int. Workshop on Scientific Gateways (IWSG) (pp. 44–48). Consorzio COMETA. bibtex: '@inproceedings{Gesing_Marton_Birkenheuer_Schuller_Grunzke_Krüger_Breuers_Blunk_Fels_Packschies_et al._2010, title={Workflow Interoperability in a Grid Portal for Molecular Simulations}, booktitle={Proc. Int. Workshop on Scientific Gateways (IWSG)}, publisher={Consorzio COMETA}, author={Gesing, Sandra and Marton, Istvan and Birkenheuer, Georg and Schuller, Bernd and Grunzke, Richard and Krüger, Jens and Breuers, Sebastian and Blunk, Dirk and Fels, Gregor and Packschies, Lars and et al.}, year={2010}, pages={44–48} }' chicago: Gesing, Sandra, Istvan Marton, Georg Birkenheuer, Bernd Schuller, Richard Grunzke, Jens Krüger, Sebastian Breuers, et al. “Workflow Interoperability in a Grid Portal for Molecular Simulations.” In Proc. Int. Workshop on Scientific Gateways (IWSG), 44–48. Consorzio COMETA, 2010. ieee: S. Gesing et al., “Workflow Interoperability in a Grid Portal for Molecular Simulations,” in Proc. Int. Workshop on Scientific Gateways (IWSG), 2010, pp. 44–48. mla: Gesing, Sandra, et al. “Workflow Interoperability in a Grid Portal for Molecular Simulations.” Proc. Int. Workshop on Scientific Gateways (IWSG), Consorzio COMETA, 2010, pp. 44–48. short: 'S. Gesing, I. Marton, G. Birkenheuer, B. Schuller, R. Grunzke, J. Krüger, S. Breuers, D. Blunk, G. Fels, L. Packschies, A. Brinkmann, O. Kohlbacher, M. Kozlovszky, in: Proc. Int. Workshop on Scientific Gateways (IWSG), Consorzio COMETA, 2010, pp. 44–48.' date_created: 2018-04-05T14:55:48Z date_updated: 2022-01-06T06:55:28Z department: - _id: '27' page: 44-48 publication: Proc. Int. Workshop on Scientific Gateways (IWSG) publisher: Consorzio COMETA status: public title: Workflow Interoperability in a Grid Portal for Molecular Simulations type: conference user_id: '24135' year: '2010' ... --- _id: '2261' author: - first_name: Tobias full_name: Schumacher, Tobias last_name: Schumacher - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Schumacher T, Plessl C, Platzner M. An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure. In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE; 2009:338-344.' apa: Schumacher, T., Plessl, C., & Platzner, M. (2009). An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure. Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 338–344. bibtex: '@inproceedings{Schumacher_Plessl_Platzner_2009, title={An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure}, booktitle={Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)}, publisher={IEEE}, author={Schumacher, Tobias and Plessl, Christian and Platzner, Marco}, year={2009}, pages={338–344} }' chicago: Schumacher, Tobias, Christian Plessl, and Marco Platzner. “An Accelerator for K-Th Nearest Neighbor Thinning Based on the IMORC Infrastructure.” In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 338–44. IEEE, 2009. ieee: T. Schumacher, C. Plessl, and M. Platzner, “An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2009, pp. 338–344. mla: Schumacher, Tobias, et al. “An Accelerator for K-Th Nearest Neighbor Thinning Based on the IMORC Infrastructure.” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–44. short: 'T. Schumacher, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–344.' date_created: 2018-04-06T15:15:47Z date_updated: 2023-09-26T13:52:52Z department: - _id: '27' - _id: '518' - _id: '78' keyword: - IMORC - NOC - KNN - accelerator language: - iso: eng page: 338-344 publication: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL) publication_identifier: isbn: - 978-1-4244-3892-1 issn: - 1946-1488 publisher: IEEE quality_controlled: '1' status: public title: An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure type: conference user_id: '15278' year: '2009' ... --- _id: '2239' author: - first_name: Andre full_name: Höing, Andre last_name: Höing - first_name: Guido full_name: Scherp, Guido last_name: Scherp - first_name: Stefan full_name: Gudenkauf, Stefan last_name: Gudenkauf - first_name: Dirk full_name: Meister, Dirk last_name: Meister - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Höing A, Scherp G, Gudenkauf S, Meister D, Brinkmann A. An Orchestration as a Service Infrastructure using Grid Technologies and WS-BPEL. In: Proc. Int. Conf. on Service Oriented Computing (ICSOC). Vol 5900. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer; 2009:301-315. doi:0.1007/978-3-642-10383-4_20' apa: 'Höing, A., Scherp, G., Gudenkauf, S., Meister, D., & Brinkmann, A. (2009). An Orchestration as a Service Infrastructure using Grid Technologies and WS-BPEL. In Proc. Int. Conf. on Service Oriented Computing (ICSOC) (Vol. 5900, pp. 301–315). Berlin / Heidelberg: Springer. https://doi.org/0.1007/978-3-642-10383-4_20' bibtex: '@inproceedings{Höing_Scherp_Gudenkauf_Meister_Brinkmann_2009, place={Berlin / Heidelberg}, series={Lecture Notes in Computer Science (LNCS)}, title={An Orchestration as a Service Infrastructure using Grid Technologies and WS-BPEL}, volume={5900}, DOI={0.1007/978-3-642-10383-4_20}, booktitle={Proc. Int. Conf. on Service Oriented Computing (ICSOC)}, publisher={Springer}, author={Höing, Andre and Scherp, Guido and Gudenkauf, Stefan and Meister, Dirk and Brinkmann, André}, year={2009}, pages={301–315}, collection={Lecture Notes in Computer Science (LNCS)} }' chicago: 'Höing, Andre, Guido Scherp, Stefan Gudenkauf, Dirk Meister, and André Brinkmann. “An Orchestration as a Service Infrastructure Using Grid Technologies and WS-BPEL.” In Proc. Int. Conf. on Service Oriented Computing (ICSOC), 5900:301–15. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer, 2009. https://doi.org/0.1007/978-3-642-10383-4_20.' ieee: A. Höing, G. Scherp, S. Gudenkauf, D. Meister, and A. Brinkmann, “An Orchestration as a Service Infrastructure using Grid Technologies and WS-BPEL,” in Proc. Int. Conf. on Service Oriented Computing (ICSOC), 2009, vol. 5900, pp. 301–315. mla: Höing, Andre, et al. “An Orchestration as a Service Infrastructure Using Grid Technologies and WS-BPEL.” Proc. Int. Conf. on Service Oriented Computing (ICSOC), vol. 5900, Springer, 2009, pp. 301–15, doi:0.1007/978-3-642-10383-4_20. short: 'A. Höing, G. Scherp, S. Gudenkauf, D. Meister, A. Brinkmann, in: Proc. Int. Conf. on Service Oriented Computing (ICSOC), Springer, Berlin / Heidelberg, 2009, pp. 301–315.' date_created: 2018-04-05T17:14:00Z date_updated: 2022-01-06T06:55:32Z department: - _id: '27' doi: 0.1007/978-3-642-10383-4_20 intvolume: ' 5900' page: 301-315 place: Berlin / Heidelberg publication: Proc. Int. Conf. on Service Oriented Computing (ICSOC) publisher: Springer series_title: Lecture Notes in Computer Science (LNCS) status: public title: An Orchestration as a Service Infrastructure using Grid Technologies and WS-BPEL type: conference user_id: '24135' volume: 5900 year: '2009' ... --- _id: '2238' author: - first_name: Tobias full_name: Schumacher, Tobias last_name: Schumacher - first_name: Tim full_name: Süß, Tim last_name: Süß - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Schumacher T, Süß T, Plessl C, Platzner M. Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000. In: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig). IEEE Computer Society; 2009:119-124. doi:10.1109/ReConFig.2009.32' apa: Schumacher, T., Süß, T., Plessl, C., & Platzner, M. (2009). Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000. Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 119–124. https://doi.org/10.1109/ReConFig.2009.32 bibtex: '@inproceedings{Schumacher_Süß_Plessl_Platzner_2009, place={Los Alamitos, CA, USA}, title={Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000}, DOI={10.1109/ReConFig.2009.32}, booktitle={Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE Computer Society}, author={Schumacher, Tobias and Süß, Tim and Plessl, Christian and Platzner, Marco}, year={2009}, pages={119–124} }' chicago: 'Schumacher, Tobias, Tim Süß, Christian Plessl, and Marco Platzner. “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000.” In Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 119–24. Los Alamitos, CA, USA: IEEE Computer Society, 2009. https://doi.org/10.1109/ReConFig.2009.32.' ieee: 'T. Schumacher, T. Süß, C. Plessl, and M. Platzner, “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000,” in Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 2009, pp. 119–124, doi: 10.1109/ReConFig.2009.32.' mla: Schumacher, Tobias, et al. “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000.” Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, 2009, pp. 119–24, doi:10.1109/ReConFig.2009.32. short: 'T. Schumacher, T. Süß, C. Plessl, M. Platzner, in: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 119–124.' date_created: 2018-04-05T17:11:28Z date_updated: 2023-09-26T13:52:32Z department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/ReConFig.2009.32 keyword: - IMORC - graphics language: - iso: eng page: 119-124 place: Los Alamitos, CA, USA publication: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig) publication_identifier: isbn: - 978-0-7695-3917-1 publisher: IEEE Computer Society quality_controlled: '1' status: public title: Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000 type: conference user_id: '15278' year: '2009' ... --- _id: '2260' author: - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: Arthur full_name: Carlson, Arthur last_name: Carlson - first_name: Alexander full_name: Fölling, Alexander last_name: Fölling - first_name: Mikael full_name: Högqvist, Mikael last_name: Högqvist - first_name: Andreas full_name: Hoheisel, Andreas last_name: Hoheisel - first_name: Alexander full_name: Papaspyrou, Alexander last_name: Papaspyrou - first_name: Klaus full_name: Rieger, Klaus last_name: Rieger - first_name: Bernhard full_name: Schott, Bernhard last_name: Schott - first_name: Wolfgang full_name: Ziegler, Wolfgang last_name: Ziegler citation: ama: 'Birkenheuer G, Carlson A, Fölling A, et al. Connecting Communities on the Meta-Scheduling Level: The DGSI Approach! In: Proc. Cracow Grid Workshop (CGW). ; 2009:96-103.' apa: 'Birkenheuer, G., Carlson, A., Fölling, A., Högqvist, M., Hoheisel, A., Papaspyrou, A., … Ziegler, W. (2009). Connecting Communities on the Meta-Scheduling Level: The DGSI Approach! In Proc. Cracow Grid Workshop (CGW) (pp. 96–103).' bibtex: '@inproceedings{Birkenheuer_Carlson_Fölling_Högqvist_Hoheisel_Papaspyrou_Rieger_Schott_Ziegler_2009, title={Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!}, booktitle={Proc. Cracow Grid Workshop (CGW)}, author={Birkenheuer, Georg and Carlson, Arthur and Fölling, Alexander and Högqvist, Mikael and Hoheisel, Andreas and Papaspyrou, Alexander and Rieger, Klaus and Schott, Bernhard and Ziegler, Wolfgang}, year={2009}, pages={96–103} }' chicago: 'Birkenheuer, Georg, Arthur Carlson, Alexander Fölling, Mikael Högqvist, Andreas Hoheisel, Alexander Papaspyrou, Klaus Rieger, Bernhard Schott, and Wolfgang Ziegler. “Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!” In Proc. Cracow Grid Workshop (CGW), 96–103, 2009.' ieee: 'G. Birkenheuer et al., “Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!,” in Proc. Cracow Grid Workshop (CGW), 2009, pp. 96–103.' mla: 'Birkenheuer, Georg, et al. “Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!” Proc. Cracow Grid Workshop (CGW), 2009, pp. 96–103.' short: 'G. Birkenheuer, A. Carlson, A. Fölling, M. Högqvist, A. Hoheisel, A. Papaspyrou, K. Rieger, B. Schott, W. Ziegler, in: Proc. Cracow Grid Workshop (CGW), 2009, pp. 96–103.' date_created: 2018-04-06T15:14:46Z date_updated: 2022-01-06T06:55:37Z department: - _id: '27' page: 96-103 publication: Proc. Cracow Grid Workshop (CGW) publication_identifier: isbn: - 978-83-61433-01-9 status: public title: 'Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!' type: conference user_id: '24135' year: '2009' ... --- _id: '2262' abstract: - lang: eng text: 'In this work we present EvoCache, a novel approach for implementing application-specific caches. The key innovation of EvoCache is to make the function that maps memory addresses from the CPU address space to cache indices programmable. We support arbitrary Boolean mapping functions that are implemented within a small reconfigurable logic fabric. For finding suitable cache mapping functions we rely on techniques from the evolvable hardware domain and utilize an evolutionary optimization procedure. We evaluate the use of EvoCache in an embedded processor for two specific applications (JPEG and BZIP2 compression) with respect to execution time, cache miss rate and energy consumption. We show that the evolvable hardware approach for optimizing the cache functions not only significantly improves the cache performance for the training data used during optimization, but that the evolved mapping functions generalize very well. Compared to a conventional cache architecture, EvoCache applied to test data achieves a reduction in execution time of up to 14.31% for JPEG (10.98% for BZIP2), and in energy consumption by 16.43% for JPEG (10.70% for BZIP2). We also discuss the integration of EvoCache into the operating system and show that the area and delay overheads introduced by EvoCache are acceptable. ' author: - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Kaufmann P, Plessl C, Platzner M. EvoCaches: Application-specific Adaptation of Cache Mapping. In: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS). IEEE Computer Society; 2009:11-18.' apa: 'Kaufmann, P., Plessl, C., & Platzner, M. (2009). EvoCaches: Application-specific Adaptation of Cache Mapping. Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 11–18.' bibtex: '@inproceedings{Kaufmann_Plessl_Platzner_2009, place={Los Alamitos, CA, USA}, title={EvoCaches: Application-specific Adaptation of Cache Mapping}, booktitle={Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS)}, publisher={IEEE Computer Society}, author={Kaufmann, Paul and Plessl, Christian and Platzner, Marco}, year={2009}, pages={11–18} }' chicago: 'Kaufmann, Paul, Christian Plessl, and Marco Platzner. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” In Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 11–18. Los Alamitos, CA, USA: IEEE Computer Society, 2009.' ieee: 'P. Kaufmann, C. Plessl, and M. Platzner, “EvoCaches: Application-specific Adaptation of Cache Mapping,” in Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2009, pp. 11–18.' mla: 'Kaufmann, Paul, et al. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, 2009, pp. 11–18.' short: 'P. Kaufmann, C. Plessl, M. Platzner, in: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 11–18.' date_created: 2018-04-06T15:18:24Z date_updated: 2023-09-26T13:53:11Z department: - _id: '27' - _id: '518' - _id: '78' keyword: - EvoCache - evolvable hardware - computer architecture language: - iso: eng page: 11-18 place: Los Alamitos, CA, USA publication: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS) publisher: IEEE Computer Society quality_controlled: '1' status: public title: 'EvoCaches: Application-specific Adaptation of Cache Mapping' type: conference user_id: '15278' year: '2009' ... --- _id: '2350' abstract: - lang: eng text: 'Mapping applications that consist of a collection of cores to FPGA accelerators and optimizing their performance is a challenging task in high performance reconfigurable computing. We present IMORC, an architectural template and highly versatile on-chip interconnect. IMORC links provide asynchronous FIFOs and bitwidth conversion which allows for flexibly composing accelerators from cores running at full speed within their own clock domains, thus facilitating the re-use of cores and portability. Further, IMORC inserts performance counters for monitoring runtime data. In this paper, we first introduce the IMORC architectural template and the on-chip interconnect, and then demonstrate IMORC on the example of accelerating the k-th nearest neighbor thinning problem on an XD1000 reconfigurable computing system. Using IMORC''s monitoring infrastructure, we gain insights into the data-dependent behavior of the application which, in turn, allow for optimizing the accelerator. ' author: - first_name: Tobias full_name: Schumacher, Tobias last_name: Schumacher - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Schumacher T, Plessl C, Platzner M. IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. In: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM). IEEE Computer Society; 2009:275-278. doi:10.1109/FCCM.2009.25' apa: 'Schumacher, T., Plessl, C., & Platzner, M. (2009). IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 275–278. https://doi.org/10.1109/FCCM.2009.25' bibtex: '@inproceedings{Schumacher_Plessl_Platzner_2009, title={IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing}, DOI={10.1109/FCCM.2009.25}, booktitle={Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM)}, publisher={IEEE Computer Society}, author={Schumacher, Tobias and Plessl, Christian and Platzner, Marco}, year={2009}, pages={275–278} }' chicago: 'Schumacher, Tobias, Christian Plessl, and Marco Platzner. “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.” In Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 275–78. IEEE Computer Society, 2009. https://doi.org/10.1109/FCCM.2009.25.' ieee: 'T. Schumacher, C. Plessl, and M. Platzner, “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing,” in Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2009, pp. 275–278, doi: 10.1109/FCCM.2009.25.' mla: 'Schumacher, Tobias, et al. “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.” Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–78, doi:10.1109/FCCM.2009.25.' short: 'T. Schumacher, C. Plessl, M. Platzner, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–278.' date_created: 2018-04-16T15:05:52Z date_updated: 2023-09-26T13:51:44Z department: - _id: '27' - _id: '518' - _id: '78' doi: 10.1109/FCCM.2009.25 keyword: - IMORC - interconnect - performance language: - iso: eng page: 275-278 publication: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM) publication_identifier: isbn: - 978-1-4244-4450-2 publisher: IEEE Computer Society quality_controlled: '1' status: public title: 'IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing' type: conference user_id: '15278' year: '2009' ... --- _id: '2264' author: - first_name: Dirk full_name: Meister, Dirk last_name: Meister - first_name: André full_name: Brinkmann, André last_name: Brinkmann citation: ama: 'Meister D, Brinkmann A. Multi-Level Comparison of Data Deduplication in a Backup Scenario. In: Proc. of the Israeli Experimental Systems Conference (SYSTOR). New York: ACM; 2009:8:1-8:12. doi:10.1145/1534530.1534541' apa: 'Meister, D., & Brinkmann, A. (2009). Multi-Level Comparison of Data Deduplication in a Backup Scenario. In Proc. of the Israeli Experimental Systems Conference (SYSTOR) (pp. 8:1-8:12). New York: ACM. https://doi.org/10.1145/1534530.1534541' bibtex: '@inproceedings{Meister_Brinkmann_2009, place={New York}, title={Multi-Level Comparison of Data Deduplication in a Backup Scenario}, DOI={10.1145/1534530.1534541}, booktitle={Proc. of the Israeli Experimental Systems Conference (SYSTOR)}, publisher={ACM}, author={Meister, Dirk and Brinkmann, André}, year={2009}, pages={8:1-8:12} }' chicago: 'Meister, Dirk, and André Brinkmann. “Multi-Level Comparison of Data Deduplication in a Backup Scenario.” In Proc. of the Israeli Experimental Systems Conference (SYSTOR), 8:1-8:12. New York: ACM, 2009. https://doi.org/10.1145/1534530.1534541.' ieee: D. Meister and A. Brinkmann, “Multi-Level Comparison of Data Deduplication in a Backup Scenario,” in Proc. of the Israeli Experimental Systems Conference (SYSTOR), 2009, pp. 8:1-8:12. mla: Meister, Dirk, and André Brinkmann. “Multi-Level Comparison of Data Deduplication in a Backup Scenario.” Proc. of the Israeli Experimental Systems Conference (SYSTOR), ACM, 2009, pp. 8:1-8:12, doi:10.1145/1534530.1534541. short: 'D. Meister, A. Brinkmann, in: Proc. of the Israeli Experimental Systems Conference (SYSTOR), ACM, New York, 2009, pp. 8:1-8:12.' date_created: 2018-04-06T15:21:25Z date_updated: 2022-01-06T06:55:37Z department: - _id: '27' doi: 10.1145/1534530.1534541 page: 8:1-8:12 place: New York publication: Proc. of the Israeli Experimental Systems Conference (SYSTOR) publisher: ACM status: public title: Multi-Level Comparison of Data Deduplication in a Backup Scenario type: conference user_id: '24135' year: '2009' ... --- _id: '2352' author: - first_name: Jan full_name: Beutel, Jan last_name: Beutel - first_name: Stephan full_name: Gruber, Stephan last_name: Gruber - first_name: Andi full_name: Hasler, Andi last_name: Hasler - first_name: Roman full_name: Lim, Roman last_name: Lim - first_name: Andreas full_name: Meier, Andreas last_name: Meier - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Igor full_name: Talzi, Igor last_name: Talzi - first_name: Lothar full_name: Thiele, Lothar last_name: Thiele - first_name: Christian full_name: Tschudin, Christian last_name: Tschudin - first_name: Matthias full_name: Woehrle, Matthias last_name: Woehrle - first_name: Mustafa full_name: Yuecel, Mustafa last_name: Yuecel citation: ama: 'Beutel J, Gruber S, Hasler A, et al. PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes. In: Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN). IEEE Computer Society; 2009:265-276.' apa: 'Beutel, J., Gruber, S., Hasler, A., Lim, R., Meier, A., Plessl, C., Talzi, I., Thiele, L., Tschudin, C., Woehrle, M., & Yuecel, M. (2009). PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes. Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), 265–276.' bibtex: '@inproceedings{Beutel_Gruber_Hasler_Lim_Meier_Plessl_Talzi_Thiele_Tschudin_Woehrle_et al._2009, place={Washington, DC, USA}, title={PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes}, booktitle={Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN)}, publisher={IEEE Computer Society}, author={Beutel, Jan and Gruber, Stephan and Hasler, Andi and Lim, Roman and Meier, Andreas and Plessl, Christian and Talzi, Igor and Thiele, Lothar and Tschudin, Christian and Woehrle, Matthias and et al.}, year={2009}, pages={265–276} }' chicago: 'Beutel, Jan, Stephan Gruber, Andi Hasler, Roman Lim, Andreas Meier, Christian Plessl, Igor Talzi, et al. “PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes.” In Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), 265–76. Washington, DC, USA: IEEE Computer Society, 2009.' ieee: 'J. Beutel et al., “PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes,” in Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), 2009, pp. 265–276.' mla: 'Beutel, Jan, et al. “PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes.” Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), IEEE Computer Society, 2009, pp. 265–76.' short: 'J. Beutel, S. Gruber, A. Hasler, R. Lim, A. Meier, C. Plessl, I. Talzi, L. Thiele, C. Tschudin, M. Woehrle, M. Yuecel, in: Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), IEEE Computer Society, Washington, DC, USA, 2009, pp. 265–276.' date_created: 2018-04-16T15:08:07Z date_updated: 2023-09-26T13:52:01Z department: - _id: '27' - _id: '518' extern: '1' keyword: - WSN - PermaSense language: - iso: eng page: 265-276 place: Washington, DC, USA publication: Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN) publication_identifier: isbn: - 978-1-4244-5108-1 publisher: IEEE Computer Society quality_controlled: '1' status: public title: 'PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes' type: conference user_id: '15278' year: '2009' ... --- _id: '2240' author: - first_name: Oliver full_name: Niehörster, Oliver last_name: Niehörster - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Dirk full_name: Blunk, Dirk last_name: Blunk - first_name: Brigitta full_name: Elsässer, Brigitta last_name: Elsässer - first_name: Sonja full_name: Herres-Pawlis, Sonja last_name: Herres-Pawlis - first_name: Jens full_name: Krüger, Jens last_name: Krüger - first_name: Julia full_name: Niehörster, Julia last_name: Niehörster - first_name: Lars full_name: Packschies, Lars last_name: Packschies - first_name: Gregor full_name: Fels, Gregor last_name: Fels citation: ama: 'Niehörster O, Birkenheuer G, Brinkmann A, et al. Providing Scientific Software as a Service in Consideration of Service Level Agreements. In: Proc. Cracow Grid Workshop (CGW). ; 2009:55-63.' apa: Niehörster, O., Birkenheuer, G., Brinkmann, A., Blunk, D., Elsässer, B., Herres-Pawlis, S., … Fels, G. (2009). Providing Scientific Software as a Service in Consideration of Service Level Agreements. In Proc. Cracow Grid Workshop (CGW) (pp. 55–63). bibtex: '@inproceedings{Niehörster_Birkenheuer_Brinkmann_Blunk_Elsässer_Herres-Pawlis_Krüger_Niehörster_Packschies_Fels_2009, title={Providing Scientific Software as a Service in Consideration of Service Level Agreements}, booktitle={Proc. Cracow Grid Workshop (CGW)}, author={Niehörster, Oliver and Birkenheuer, Georg and Brinkmann, André and Blunk, Dirk and Elsässer, Brigitta and Herres-Pawlis, Sonja and Krüger, Jens and Niehörster, Julia and Packschies, Lars and Fels, Gregor}, year={2009}, pages={55–63} }' chicago: Niehörster, Oliver, Georg Birkenheuer, André Brinkmann, Dirk Blunk, Brigitta Elsässer, Sonja Herres-Pawlis, Jens Krüger, Julia Niehörster, Lars Packschies, and Gregor Fels. “Providing Scientific Software as a Service in Consideration of Service Level Agreements.” In Proc. Cracow Grid Workshop (CGW), 55–63, 2009. ieee: O. Niehörster et al., “Providing Scientific Software as a Service in Consideration of Service Level Agreements,” in Proc. Cracow Grid Workshop (CGW), 2009, pp. 55–63. mla: Niehörster, Oliver, et al. “Providing Scientific Software as a Service in Consideration of Service Level Agreements.” Proc. Cracow Grid Workshop (CGW), 2009, pp. 55–63. short: 'O. Niehörster, G. Birkenheuer, A. Brinkmann, D. Blunk, B. Elsässer, S. Herres-Pawlis, J. Krüger, J. Niehörster, L. Packschies, G. Fels, in: Proc. Cracow Grid Workshop (CGW), 2009, pp. 55–63.' date_created: 2018-04-05T17:14:52Z date_updated: 2022-01-06T06:55:32Z department: - _id: '27' page: 55-63 publication: Proc. Cracow Grid Workshop (CGW) publication_identifier: isbn: - 978-83-61433-01-9 status: public title: Providing Scientific Software as a Service in Consideration of Service Level Agreements type: conference user_id: '24135' year: '2009' ... --- _id: '818' author: - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: Andre full_name: Brinkmann, Andre last_name: Brinkmann - first_name: Holger full_name: Karl, Holger id: '126' last_name: Karl citation: ama: 'Birkenheuer G, Brinkmann A, Karl H. The Gain of Overbooking. In: Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers. ; 2009:80-100. doi:10.1007/978-3-642-04633-9_5' apa: Birkenheuer, G., Brinkmann, A., & Karl, H. (2009). The Gain of Overbooking. In Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers (pp. 80–100). https://doi.org/10.1007/978-3-642-04633-9_5 bibtex: '@inproceedings{Birkenheuer_Brinkmann_Karl_2009, title={The Gain of Overbooking}, DOI={10.1007/978-3-642-04633-9_5}, booktitle={Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers}, author={Birkenheuer, Georg and Brinkmann, Andre and Karl, Holger}, year={2009}, pages={80–100} }' chicago: Birkenheuer, Georg, Andre Brinkmann, and Holger Karl. “The Gain of Overbooking.” In Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers, 80–100, 2009. https://doi.org/10.1007/978-3-642-04633-9_5. ieee: G. Birkenheuer, A. Brinkmann, and H. Karl, “The Gain of Overbooking,” in Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers, 2009, pp. 80–100. mla: Birkenheuer, Georg, et al. “The Gain of Overbooking.” Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers, 2009, pp. 80–100, doi:10.1007/978-3-642-04633-9_5. short: 'G. Birkenheuer, A. Brinkmann, H. Karl, in: Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers, 2009, pp. 80–100.' date_created: 2017-11-27T10:22:26Z date_updated: 2022-01-06T07:03:51Z department: - _id: '75' - _id: '27' doi: 10.1007/978-3-642-04633-9_5 page: 80-100 publication: Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers status: public title: The Gain of Overbooking type: conference user_id: '24135' year: '2009' ... --- _id: '2263' abstract: - lang: eng text: 'In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Unit (APU) as well as the partial reconfiguration capabilities to provide dynamically reconfigurable custom instructions. We also present a hardware tool flow that automatically translates software functions into custom instructions and a software tool flow that creates binaries using these instructions. While previous research on processors with reconfigurable functional units has been performed predominantly with simulation, the Woolcano architecture allows for exploring dynamic instruction set extension with commercially available hardware. Finally, we present a case study demonstrating a custom floating-point instruction generated with our approach, which achieves a 40x speedup over software-emulated floating-point operations and a 21% speedup over the Xilinx hardware floating-point unit. ' author: - first_name: Mariusz full_name: Grad, Mariusz last_name: Grad - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 citation: ama: 'Grad M, Plessl C. Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2009:319-322.' apa: 'Grad, M., & Plessl, C. (2009). Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 319–322.' bibtex: '@inproceedings{Grad_Plessl_2009, place={USA}, title={Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX}, booktitle={Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)}, publisher={CSREA Press}, author={Grad, Mariusz and Plessl, Christian}, year={2009}, pages={319–322} }' chicago: 'Grad, Mariusz, and Christian Plessl. “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 319–22. USA: CSREA Press, 2009.' ieee: 'M. Grad and C. Plessl, “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2009, pp. 319–322.' mla: 'Grad, Mariusz, and Christian Plessl. “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2009, pp. 319–22.' short: 'M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, USA, 2009, pp. 319–322.' date_created: 2018-04-06T15:19:51Z date_updated: 2023-09-26T13:53:30Z department: - _id: '27' - _id: '518' - _id: '78' language: - iso: eng page: 319-322 place: USA publication: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) publication_identifier: isbn: - 1-60132-101-5 publisher: CSREA Press quality_controlled: '1' status: public title: 'Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX' type: conference user_id: '15278' year: '2009' ... --- _id: '2364' author: - first_name: Tobias full_name: Schumacher, Tobias last_name: Schumacher - first_name: Robert full_name: Meiche, Robert last_name: Meiche - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann - first_name: Enno full_name: Lübbers, Enno last_name: Lübbers - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Schumacher T, Meiche R, Kaufmann P, Lübbers E, Plessl C, Platzner M. A Hardware Accelerator for k-th Nearest Neighbor Thinning. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2008:245-251.' apa: Schumacher, T., Meiche, R., Kaufmann, P., Lübbers, E., Plessl, C., & Platzner, M. (2008). A Hardware Accelerator for k-th Nearest Neighbor Thinning. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 245–251. bibtex: '@inproceedings{Schumacher_Meiche_Kaufmann_Lübbers_Plessl_Platzner_2008, title={A Hardware Accelerator for k-th Nearest Neighbor Thinning}, booktitle={Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)}, publisher={CSREA Press}, author={Schumacher, Tobias and Meiche, Robert and Kaufmann, Paul and Lübbers, Enno and Plessl, Christian and Platzner, Marco}, year={2008}, pages={245–251} }' chicago: Schumacher, Tobias, Robert Meiche, Paul Kaufmann, Enno Lübbers, Christian Plessl, and Marco Platzner. “A Hardware Accelerator for K-Th Nearest Neighbor Thinning.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 245–51. CSREA Press, 2008. ieee: T. Schumacher, R. Meiche, P. Kaufmann, E. Lübbers, C. Plessl, and M. Platzner, “A Hardware Accelerator for k-th Nearest Neighbor Thinning,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008, pp. 245–251. mla: Schumacher, Tobias, et al. “A Hardware Accelerator for K-Th Nearest Neighbor Thinning.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–51. short: 'T. Schumacher, R. Meiche, P. Kaufmann, E. Lübbers, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–251.' date_created: 2018-04-17T11:33:32Z date_updated: 2023-09-26T13:54:24Z department: - _id: '27' - _id: '518' - _id: '78' language: - iso: eng page: 245-251 publication: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) publication_identifier: isbn: - 1-60132-064-7 publisher: CSREA Press quality_controlled: '1' status: public title: A Hardware Accelerator for k-th Nearest Neighbor Thinning type: conference user_id: '15278' year: '2008' ... --- _id: '2358' author: - first_name: Tobias full_name: Beisel, Tobias last_name: Beisel - first_name: Stefan full_name: Lietsch, Stefan last_name: Lietsch - first_name: Kris full_name: Thielemans, Kris last_name: Thielemans citation: ama: 'Beisel T, Lietsch S, Thielemans K. A method for OSEM PET reconstruction on parallel architectures using STIR. In: IEEE Nuclear Science Symposium Conference Record (NSS). IEEE; 2008:4161-4168. doi:10.1109/NSSMIC.2008.4774198' apa: Beisel, T., Lietsch, S., & Thielemans, K. (2008). A method for OSEM PET reconstruction on parallel architectures using STIR. In IEEE Nuclear Science Symposium Conference Record (NSS) (pp. 4161–4168). IEEE. https://doi.org/10.1109/NSSMIC.2008.4774198 bibtex: '@inproceedings{Beisel_Lietsch_Thielemans_2008, title={A method for OSEM PET reconstruction on parallel architectures using STIR}, DOI={10.1109/NSSMIC.2008.4774198}, booktitle={IEEE Nuclear Science Symposium Conference Record (NSS)}, publisher={IEEE}, author={Beisel, Tobias and Lietsch, Stefan and Thielemans, Kris}, year={2008}, pages={4161–4168} }' chicago: Beisel, Tobias, Stefan Lietsch, and Kris Thielemans. “A Method for OSEM PET Reconstruction on Parallel Architectures Using STIR.” In IEEE Nuclear Science Symposium Conference Record (NSS), 4161–68. IEEE, 2008. https://doi.org/10.1109/NSSMIC.2008.4774198. ieee: T. Beisel, S. Lietsch, and K. Thielemans, “A method for OSEM PET reconstruction on parallel architectures using STIR,” in IEEE Nuclear Science Symposium Conference Record (NSS), 2008, pp. 4161–4168. mla: Beisel, Tobias, et al. “A Method for OSEM PET Reconstruction on Parallel Architectures Using STIR.” IEEE Nuclear Science Symposium Conference Record (NSS), IEEE, 2008, pp. 4161–68, doi:10.1109/NSSMIC.2008.4774198. short: 'T. Beisel, S. Lietsch, K. Thielemans, in: IEEE Nuclear Science Symposium Conference Record (NSS), IEEE, 2008, pp. 4161–4168.' date_created: 2018-04-17T10:59:40Z date_updated: 2022-01-06T06:55:57Z department: - _id: '27' - _id: '78' doi: 10.1109/NSSMIC.2008.4774198 page: 4161-4168 publication: IEEE Nuclear Science Symposium Conference Record (NSS) publisher: IEEE status: public title: A method for OSEM PET reconstruction on parallel architectures using STIR type: conference user_id: '24135' year: '2008' ... --- _id: '2387' author: - first_name: Dominic full_name: Battre, Dominic last_name: Battre - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: Matthias full_name: Hovestadt, Matthias last_name: Hovestadt - first_name: Odej full_name: Kao, Odej last_name: Kao - first_name: Kerstin full_name: Voss, Kerstin last_name: Voss citation: ama: 'Battre D, Birkenheuer G, Hovestadt M, Kao O, Voss K. Applying Risk Management to Support SLA Provisioning. In: Proc. Cracow Grid Workshop (CGW). ; 2008.' apa: Battre, D., Birkenheuer, G., Hovestadt, M., Kao, O., & Voss, K. (2008). Applying Risk Management to Support SLA Provisioning. In Proc. Cracow Grid Workshop (CGW). bibtex: '@inproceedings{Battre_Birkenheuer_Hovestadt_Kao_Voss_2008, title={Applying Risk Management to Support SLA Provisioning}, booktitle={Proc. Cracow Grid Workshop (CGW)}, author={Battre, Dominic and Birkenheuer, Georg and Hovestadt, Matthias and Kao, Odej and Voss, Kerstin}, year={2008} }' chicago: Battre, Dominic, Georg Birkenheuer, Matthias Hovestadt, Odej Kao, and Kerstin Voss. “Applying Risk Management to Support SLA Provisioning.” In Proc. Cracow Grid Workshop (CGW), 2008. ieee: D. Battre, G. Birkenheuer, M. Hovestadt, O. Kao, and K. Voss, “Applying Risk Management to Support SLA Provisioning,” in Proc. Cracow Grid Workshop (CGW), 2008. mla: Battre, Dominic, et al. “Applying Risk Management to Support SLA Provisioning.” Proc. Cracow Grid Workshop (CGW), 2008. short: 'D. Battre, G. Birkenheuer, M. Hovestadt, O. Kao, K. Voss, in: Proc. Cracow Grid Workshop (CGW), 2008.' date_created: 2018-04-17T12:50:12Z date_updated: 2022-01-06T06:56:02Z department: - _id: '27' publication: Proc. Cracow Grid Workshop (CGW) status: public title: Applying Risk Management to Support SLA Provisioning type: conference user_id: '24135' year: '2008' ... --- _id: '2363' author: - first_name: Stefan full_name: Lietsch, Stefan last_name: Lietsch - first_name: Henning full_name: Zabel, Henning last_name: Zabel - first_name: Christoph full_name: Laroque, Christoph last_name: Laroque citation: ama: 'Lietsch S, Zabel H, Laroque C. Computational Steering Of Interactive Material Flow Simulations. In: Proc. ASME Computers and Information in Engineering Conference (CIE). New York: ASME; 2008:1493-1502. doi:10.1115/DETC2008-49405' apa: 'Lietsch, S., Zabel, H., & Laroque, C. (2008). Computational Steering Of Interactive Material Flow Simulations. In Proc. ASME Computers and Information in Engineering Conference (CIE) (pp. 1493–1502). New York: ASME. https://doi.org/10.1115/DETC2008-49405' bibtex: '@inproceedings{Lietsch_Zabel_Laroque_2008, place={New York}, title={Computational Steering Of Interactive Material Flow Simulations}, DOI={10.1115/DETC2008-49405}, booktitle={Proc. ASME Computers and Information in Engineering Conference (CIE)}, publisher={ASME}, author={Lietsch, Stefan and Zabel, Henning and Laroque, Christoph}, year={2008}, pages={1493–1502} }' chicago: 'Lietsch, Stefan, Henning Zabel, and Christoph Laroque. “Computational Steering Of Interactive Material Flow Simulations.” In Proc. ASME Computers and Information in Engineering Conference (CIE), 1493–1502. New York: ASME, 2008. https://doi.org/10.1115/DETC2008-49405.' ieee: S. Lietsch, H. Zabel, and C. Laroque, “Computational Steering Of Interactive Material Flow Simulations,” in Proc. ASME Computers and Information in Engineering Conference (CIE), 2008, pp. 1493–1502. mla: Lietsch, Stefan, et al. “Computational Steering Of Interactive Material Flow Simulations.” Proc. ASME Computers and Information in Engineering Conference (CIE), ASME, 2008, pp. 1493–502, doi:10.1115/DETC2008-49405. short: 'S. Lietsch, H. Zabel, C. Laroque, in: Proc. ASME Computers and Information in Engineering Conference (CIE), ASME, New York, 2008, pp. 1493–1502.' date_created: 2018-04-17T11:32:25Z date_updated: 2022-01-06T06:55:57Z department: - _id: '27' doi: 10.1115/DETC2008-49405 page: 1493-1502 place: New York publication: Proc. ASME Computers and Information in Engineering Conference (CIE) publisher: ASME status: public title: Computational Steering Of Interactive Material Flow Simulations type: conference user_id: '24135' year: '2008' ... --- _id: '2368' author: - first_name: Stefan full_name: Lietsch, Stefan last_name: Lietsch - first_name: Paul full_name: Hermann Lensing, Paul last_name: Hermann Lensing citation: ama: 'Lietsch S, Hermann Lensing P. CUDA-based, parallel JPEG Compression for Remote Rendering. In: Proc. Int. Symp. on Image/Video Communications over Fixed and Mobile Networks (ISVC). IEEE; 2008.' apa: Lietsch, S., & Hermann Lensing, P. (2008). CUDA-based, parallel JPEG Compression for Remote Rendering. In Proc. Int. Symp. on Image/Video Communications over fixed and mobile networks (ISVC). IEEE. bibtex: '@inproceedings{Lietsch_Hermann Lensing_2008, title={CUDA-based, parallel JPEG Compression for Remote Rendering}, booktitle={Proc. Int. Symp. on Image/Video Communications over fixed and mobile networks (ISVC)}, publisher={IEEE}, author={Lietsch, Stefan and Hermann Lensing, Paul}, year={2008} }' chicago: Lietsch, Stefan, and Paul Hermann Lensing. “CUDA-Based, Parallel JPEG Compression for Remote Rendering.” In Proc. Int. Symp. on Image/Video Communications over Fixed and Mobile Networks (ISVC). IEEE, 2008. ieee: S. Lietsch and P. Hermann Lensing, “CUDA-based, parallel JPEG Compression for Remote Rendering,” in Proc. Int. Symp. on Image/Video Communications over fixed and mobile networks (ISVC), 2008. mla: Lietsch, Stefan, and Paul Hermann Lensing. “CUDA-Based, Parallel JPEG Compression for Remote Rendering.” Proc. Int. Symp. on Image/Video Communications over Fixed and Mobile Networks (ISVC), IEEE, 2008. short: 'S. Lietsch, P. Hermann Lensing, in: Proc. Int. Symp. on Image/Video Communications over Fixed and Mobile Networks (ISVC), IEEE, 2008.' date_created: 2018-04-17T12:01:46Z date_updated: 2022-01-06T06:55:58Z department: - _id: '27' publication: Proc. Int. Symp. on Image/Video Communications over fixed and mobile networks (ISVC) publication_identifier: isbn: - 978-84-9830-164-9 publisher: IEEE status: public title: CUDA-based, parallel JPEG Compression for Remote Rendering type: conference user_id: '24135' year: '2008' ... --- _id: '2371' author: - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Sascha full_name: Effert, Sascha last_name: Effert citation: ama: 'Brinkmann A, Effert S. Data Replication in P2P Environments. In: Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA). New York: ACM; 2008:191-193. doi:10.1145/1378533.1378570' apa: 'Brinkmann, A., & Effert, S. (2008). Data Replication in P2P Environments. In Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA) (pp. 191–193). New York: ACM. https://doi.org/10.1145/1378533.1378570' bibtex: '@inproceedings{Brinkmann_Effert_2008, place={New York}, title={Data Replication in P2P Environments}, DOI={10.1145/1378533.1378570}, booktitle={Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA)}, publisher={ACM}, author={Brinkmann, André and Effert, Sascha}, year={2008}, pages={191–193} }' chicago: 'Brinkmann, André, and Sascha Effert. “Data Replication in P2P Environments.” In Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA), 191–93. New York: ACM, 2008. https://doi.org/10.1145/1378533.1378570.' ieee: A. Brinkmann and S. Effert, “Data Replication in P2P Environments,” in Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA), 2008, pp. 191–193. mla: Brinkmann, André, and Sascha Effert. “Data Replication in P2P Environments.” Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA), ACM, 2008, pp. 191–93, doi:10.1145/1378533.1378570. short: 'A. Brinkmann, S. Effert, in: Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA), ACM, New York, 2008, pp. 191–193.' date_created: 2018-04-17T12:04:21Z date_updated: 2022-01-06T06:55:58Z department: - _id: '27' doi: 10.1145/1378533.1378570 page: 191-193 place: New York publication: Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA) publisher: ACM status: public title: Data Replication in P2P Environments type: conference user_id: '24135' year: '2008' ... --- _id: '2386' author: - first_name: Marcin full_name: Bienkowski, Marcin last_name: Bienkowski - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Miroslaw full_name: Korzeniowski, Miroslaw last_name: Korzeniowski citation: ama: 'Bienkowski M, Brinkmann A, Korzeniowski M. Degree 3 Suffices: A Large-Scale Overlay for P2P Networks. In: Proc. Int. Conf. on Principles Of DIstributed Systems (OPODIS). Berlin / Heidelberg: Springer; 2008:184-196. doi:10.1007/978-3-540-92221-6_13' apa: 'Bienkowski, M., Brinkmann, A., & Korzeniowski, M. (2008). Degree 3 Suffices: A Large-Scale Overlay for P2P Networks. In Proc. Int. Conf. on Principles Of DIstributed Systems (OPODIS) (pp. 184–196). Berlin / Heidelberg: Springer. https://doi.org/10.1007/978-3-540-92221-6_13' bibtex: '@inproceedings{Bienkowski_Brinkmann_Korzeniowski_2008, place={Berlin / Heidelberg}, title={Degree 3 Suffices: A Large-Scale Overlay for P2P Networks}, DOI={10.1007/978-3-540-92221-6_13}, booktitle={Proc. Int. Conf. on Principles Of DIstributed Systems (OPODIS)}, publisher={Springer}, author={Bienkowski, Marcin and Brinkmann, André and Korzeniowski, Miroslaw}, year={2008}, pages={184–196} }' chicago: 'Bienkowski, Marcin, André Brinkmann, and Miroslaw Korzeniowski. “Degree 3 Suffices: A Large-Scale Overlay for P2P Networks.” In Proc. Int. Conf. on Principles Of DIstributed Systems (OPODIS), 184–96. Berlin / Heidelberg: Springer, 2008. https://doi.org/10.1007/978-3-540-92221-6_13.' ieee: 'M. Bienkowski, A. Brinkmann, and M. Korzeniowski, “Degree 3 Suffices: A Large-Scale Overlay for P2P Networks,” in Proc. Int. Conf. on Principles Of DIstributed Systems (OPODIS), 2008, pp. 184–196.' mla: 'Bienkowski, Marcin, et al. “Degree 3 Suffices: A Large-Scale Overlay for P2P Networks.” Proc. Int. Conf. on Principles Of DIstributed Systems (OPODIS), Springer, 2008, pp. 184–96, doi:10.1007/978-3-540-92221-6_13.' short: 'M. Bienkowski, A. Brinkmann, M. Korzeniowski, in: Proc. Int. Conf. on Principles Of DIstributed Systems (OPODIS), Springer, Berlin / Heidelberg, 2008, pp. 184–196.' date_created: 2018-04-17T12:49:23Z date_updated: 2022-01-06T06:56:02Z department: - _id: '27' doi: 10.1007/978-3-540-92221-6_13 page: 184-196 place: Berlin / Heidelberg publication: Proc. Int. Conf. on Principles Of DIstributed Systems (OPODIS) publisher: Springer status: public title: 'Degree 3 Suffices: A Large-Scale Overlay for P2P Networks' type: conference user_id: '24135' year: '2008' ... --- _id: '2356' author: - first_name: André full_name: Brinkmann, André last_name: Brinkmann - first_name: Stefan full_name: Gudenkauf, Stefan last_name: Gudenkauf - first_name: Wilhelm full_name: Hasselbring, Wilhelm last_name: Hasselbring - first_name: André full_name: Höing, André last_name: Höing - first_name: Holger full_name: Karl, Holger id: '126' last_name: Karl - first_name: Odej full_name: Kao, Odej last_name: Kao - first_name: Holger full_name: Nitsche, Holger last_name: Nitsche - first_name: Guido full_name: Scherp, Guido last_name: Scherp citation: ama: 'Brinkmann A, Gudenkauf S, Hasselbring W, et al. Employing WS-BPEL Design Patterns for Grid Service Orchestration using a Standard WS-BPEL Engine and a Grid Middleware. In: Proc. Cracow Grid Workshop (CGW). ; 2008:103-110.' apa: Brinkmann, A., Gudenkauf, S., Hasselbring, W., Höing, A., Karl, H., Kao, O., … Scherp, G. (2008). Employing WS-BPEL Design Patterns for Grid Service Orchestration using a Standard WS-BPEL Engine and a Grid Middleware. In Proc. Cracow Grid Workshop (CGW) (pp. 103–110). bibtex: '@inproceedings{Brinkmann_Gudenkauf_Hasselbring_Höing_Karl_Kao_Nitsche_Scherp_2008, title={Employing WS-BPEL Design Patterns for Grid Service Orchestration using a Standard WS-BPEL Engine and a Grid Middleware}, booktitle={Proc. Cracow Grid Workshop (CGW)}, author={Brinkmann, André and Gudenkauf, Stefan and Hasselbring, Wilhelm and Höing, André and Karl, Holger and Kao, Odej and Nitsche, Holger and Scherp, Guido}, year={2008}, pages={103–110} }' chicago: Brinkmann, André, Stefan Gudenkauf, Wilhelm Hasselbring, André Höing, Holger Karl, Odej Kao, Holger Nitsche, and Guido Scherp. “Employing WS-BPEL Design Patterns for Grid Service Orchestration Using a Standard WS-BPEL Engine and a Grid Middleware.” In Proc. Cracow Grid Workshop (CGW), 103–10, 2008. ieee: A. Brinkmann et al., “Employing WS-BPEL Design Patterns for Grid Service Orchestration using a Standard WS-BPEL Engine and a Grid Middleware,” in Proc. Cracow Grid Workshop (CGW), 2008, pp. 103–110. mla: Brinkmann, André, et al. “Employing WS-BPEL Design Patterns for Grid Service Orchestration Using a Standard WS-BPEL Engine and a Grid Middleware.” Proc. Cracow Grid Workshop (CGW), 2008, pp. 103–10. short: 'A. Brinkmann, S. Gudenkauf, W. Hasselbring, A. Höing, H. Karl, O. Kao, H. Nitsche, G. Scherp, in: Proc. Cracow Grid Workshop (CGW), 2008, pp. 103–110.' date_created: 2018-04-17T09:41:50Z date_updated: 2022-01-06T06:55:56Z department: - _id: '27' - _id: '75' page: 103-110 publication: Proc. Cracow Grid Workshop (CGW) status: public title: Employing WS-BPEL Design Patterns for Grid Service Orchestration using a Standard WS-BPEL Engine and a Grid Middleware type: conference user_id: '24135' year: '2008' ... --- _id: '1983' author: - first_name: Dominic full_name: Battré, Dominic last_name: Battré - first_name: Matthias full_name: Hovestadt, Matthias last_name: Hovestadt - first_name: Odej full_name: Kao, Odej last_name: Kao - first_name: Axel full_name: Keller, Axel id: '15274' last_name: Keller - first_name: Kerstin full_name: Voss, Kerstin last_name: Voss citation: ama: 'Battré D, Hovestadt M, Kao O, Keller A, Voss K. Enhancing SLA Provisioning by Utilizing Profit-Oriented Fault Tolerance. In: Gonzalez TF, ed. Proc. Int. Conf. on Parallel and Distributed Computing and Systems (PDCS). Orlando, FL, USA; 2008:212-218.' apa: Battré, D., Hovestadt, M., Kao, O., Keller, A., & Voss, K. (2008). Enhancing SLA Provisioning by Utilizing Profit-Oriented Fault Tolerance. In T. F. Gonzalez (Ed.), Proc. Int. Conf. on Parallel and Distributed Computing and Systems (PDCS) (pp. 212–218). Orlando, FL, USA. bibtex: '@inproceedings{Battré_Hovestadt_Kao_Keller_Voss_2008, place={Orlando, FL, USA}, title={Enhancing SLA Provisioning by Utilizing Profit-Oriented Fault Tolerance}, booktitle={Proc. Int. Conf. on Parallel and Distributed Computing and Systems (PDCS)}, author={Battré, Dominic and Hovestadt, Matthias and Kao, Odej and Keller, Axel and Voss, Kerstin}, editor={Gonzalez, T. F.Editor}, year={2008}, pages={212–218} }' chicago: Battré, Dominic, Matthias Hovestadt, Odej Kao, Axel Keller, and Kerstin Voss. “Enhancing SLA Provisioning by Utilizing Profit-Oriented Fault Tolerance.” In Proc. Int. Conf. on Parallel and Distributed Computing and Systems (PDCS), edited by T. F. Gonzalez, 212–18. Orlando, FL, USA, 2008. ieee: D. Battré, M. Hovestadt, O. Kao, A. Keller, and K. Voss, “Enhancing SLA Provisioning by Utilizing Profit-Oriented Fault Tolerance,” in Proc. Int. Conf. on Parallel and Distributed Computing and Systems (PDCS), 2008, pp. 212–218. mla: Battré, Dominic, et al. “Enhancing SLA Provisioning by Utilizing Profit-Oriented Fault Tolerance.” Proc. Int. Conf. on Parallel and Distributed Computing and Systems (PDCS), edited by T. F. Gonzalez, 2008, pp. 212–18. short: 'D. Battré, M. Hovestadt, O. Kao, A. Keller, K. Voss, in: T.F. Gonzalez (Ed.), Proc. Int. Conf. on Parallel and Distributed Computing and Systems (PDCS), Orlando, FL, USA, 2008, pp. 212–218.' date_created: 2018-03-29T11:29:31Z date_updated: 2022-01-06T06:54:13Z department: - _id: '27' editor: - first_name: T. F. full_name: Gonzalez, T. F. last_name: Gonzalez language: - iso: eng page: 212-218 place: Orlando, FL, USA publication: Proc. Int. Conf. on Parallel and Distributed Computing and Systems (PDCS) publication_identifier: isbn: - 978-0-88986-773-4 publication_status: published status: public title: Enhancing SLA Provisioning by Utilizing Profit-Oriented Fault Tolerance type: conference user_id: '15274' year: '2008' ... --- _id: '2370' author: - first_name: Matthias full_name: Woehrle, Matthias last_name: Woehrle - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Roman full_name: Lim, Roman last_name: Lim - first_name: Jan full_name: Beutel, Jan last_name: Beutel - first_name: Lothar full_name: Thiele, Lothar last_name: Thiele citation: ama: 'Woehrle M, Plessl C, Lim R, Beutel J, Thiele L. EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks. In: IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC). IEEE Computer Society; 2008:201-208. doi:10.1109/SUTC.2008.24' apa: 'Woehrle, M., Plessl, C., Lim, R., Beutel, J., & Thiele, L. (2008). EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks. IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), 201–208. https://doi.org/10.1109/SUTC.2008.24' bibtex: '@inproceedings{Woehrle_Plessl_Lim_Beutel_Thiele_2008, place={Los Alamitos, CA, USA}, title={EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks}, DOI={10.1109/SUTC.2008.24}, booktitle={IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC)}, publisher={IEEE Computer Society}, author={Woehrle, Matthias and Plessl, Christian and Lim, Roman and Beutel, Jan and Thiele, Lothar}, year={2008}, pages={201–208} }' chicago: 'Woehrle, Matthias, Christian Plessl, Roman Lim, Jan Beutel, and Lothar Thiele. “EvAnT: Analysis and Checking of Event Traces for Wireless Sensor Networks.” In IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), 201–8. Los Alamitos, CA, USA: IEEE Computer Society, 2008. https://doi.org/10.1109/SUTC.2008.24.' ieee: 'M. Woehrle, C. Plessl, R. Lim, J. Beutel, and L. Thiele, “EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks,” in IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), 2008, pp. 201–208, doi: 10.1109/SUTC.2008.24.' mla: 'Woehrle, Matthias, et al. “EvAnT: Analysis and Checking of Event Traces for Wireless Sensor Networks.” IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), IEEE Computer Society, 2008, pp. 201–08, doi:10.1109/SUTC.2008.24.' short: 'M. Woehrle, C. Plessl, R. Lim, J. Beutel, L. Thiele, in: IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), IEEE Computer Society, Los Alamitos, CA, USA, 2008, pp. 201–208.' date_created: 2018-04-17T12:03:20Z date_updated: 2023-09-26T13:55:02Z department: - _id: '27' - _id: '518' doi: 10.1109/SUTC.2008.24 keyword: - WSN - testing - verification language: - iso: eng page: 201-208 place: Los Alamitos, CA, USA publication: IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC) publication_identifier: isbn: - 978-0-7695-3158-8 publisher: IEEE Computer Society quality_controlled: '1' status: public title: 'EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks' type: conference user_id: '15278' year: '2008' ... --- _id: '1978' author: - first_name: Dominic full_name: Battré, Dominic last_name: Battré - first_name: Matthias full_name: Hovestadt, Matthias last_name: Hovestadt - first_name: Odej full_name: Kao, Odej last_name: Kao - first_name: Axel full_name: Keller, Axel id: '15274' last_name: Keller - first_name: Kerstin full_name: Voss, Kerstin last_name: Voss citation: ama: 'Battré D, Hovestadt M, Kao O, Keller A, Voss K. Germany, Belgium, France, and Back Again: Job Migration using Globus. In: Proc. Int. Conf. on Grid Computing and Applications (GCA). ; 2008.' apa: 'Battré, D., Hovestadt, M., Kao, O., Keller, A., & Voss, K. (2008). Germany, Belgium, France, and Back Again: Job Migration using Globus. In Proc. Int. Conf. on Grid Computing and Applications (GCA).' bibtex: '@inproceedings{Battré_Hovestadt_Kao_Keller_Voss_2008, title={Germany, Belgium, France, and Back Again: Job Migration using Globus}, booktitle={Proc. Int. Conf. on Grid Computing and Applications (GCA)}, author={Battré, Dominic and Hovestadt, Matthias and Kao, Odej and Keller, Axel and Voss, Kerstin}, year={2008} }' chicago: 'Battré, Dominic, Matthias Hovestadt, Odej Kao, Axel Keller, and Kerstin Voss. “Germany, Belgium, France, and Back Again: Job Migration Using Globus.” In Proc. Int. Conf. on Grid Computing and Applications (GCA), 2008.' ieee: 'D. Battré, M. Hovestadt, O. Kao, A. Keller, and K. Voss, “Germany, Belgium, France, and Back Again: Job Migration using Globus,” in Proc. Int. Conf. on Grid Computing and Applications (GCA), 2008.' mla: 'Battré, Dominic, et al. “Germany, Belgium, France, and Back Again: Job Migration Using Globus.” Proc. Int. Conf. on Grid Computing and Applications (GCA), 2008.' short: 'D. Battré, M. Hovestadt, O. Kao, A. Keller, K. Voss, in: Proc. Int. Conf. on Grid Computing and Applications (GCA), 2008.' date_created: 2018-03-29T11:26:22Z date_updated: 2022-01-06T06:54:12Z department: - _id: '27' language: - iso: eng publication: Proc. Int. Conf. on Grid Computing and Applications (GCA) publication_status: published status: public title: 'Germany, Belgium, France, and Back Again: Job Migration using Globus' type: conference user_id: '15274' year: '2008' ... --- _id: '2383' author: - first_name: Stefan full_name: Lietsch, Stefan last_name: Lietsch - first_name: Paul full_name: Hermann Lensing, Paul last_name: Hermann Lensing citation: ama: 'Lietsch S, Hermann Lensing P. GPU-Supported Image Compression for Remote Visualization - Realization and Benchmarking. In: Proc. Int. Symp. on Visual Computing (ISVC). Vol 5358. Lecture Notes in Computer Science (LNCS). Springer; 2008:658-668. doi:10.1007/978-3-540-89639-5_63' apa: Lietsch, S., & Hermann Lensing, P. (2008). GPU-Supported Image Compression for Remote Visualization - Realization and Benchmarking. In Proc. Int. Symp. on Visual Computing (ISVC) (Vol. 5358, pp. 658–668). Springer. https://doi.org/10.1007/978-3-540-89639-5_63 bibtex: '@inproceedings{Lietsch_Hermann Lensing_2008, series={Lecture Notes in Computer Science (LNCS)}, title={GPU-Supported Image Compression for Remote Visualization - Realization and Benchmarking}, volume={5358}, DOI={10.1007/978-3-540-89639-5_63}, booktitle={Proc. Int. Symp. on Visual Computing (ISVC)}, publisher={Springer}, author={Lietsch, Stefan and Hermann Lensing, Paul}, year={2008}, pages={658–668}, collection={Lecture Notes in Computer Science (LNCS)} }' chicago: Lietsch, Stefan, and Paul Hermann Lensing. “GPU-Supported Image Compression for Remote Visualization - Realization and Benchmarking.” In Proc. Int. Symp. on Visual Computing (ISVC), 5358:658–68. Lecture Notes in Computer Science (LNCS). Springer, 2008. https://doi.org/10.1007/978-3-540-89639-5_63. ieee: S. Lietsch and P. Hermann Lensing, “GPU-Supported Image Compression for Remote Visualization - Realization and Benchmarking,” in Proc. Int. Symp. on Visual Computing (ISVC), 2008, vol. 5358, pp. 658–668. mla: Lietsch, Stefan, and Paul Hermann Lensing. “GPU-Supported Image Compression for Remote Visualization - Realization and Benchmarking.” Proc. Int. Symp. on Visual Computing (ISVC), vol. 5358, Springer, 2008, pp. 658–68, doi:10.1007/978-3-540-89639-5_63. short: 'S. Lietsch, P. Hermann Lensing, in: Proc. Int. Symp. on Visual Computing (ISVC), Springer, 2008, pp. 658–668.' date_created: 2018-04-17T12:28:48Z date_updated: 2022-01-06T06:56:01Z department: - _id: '27' doi: 10.1007/978-3-540-89639-5_63 intvolume: ' 5358' page: 658-668 publication: Proc. Int. Symp. on Visual Computing (ISVC) publisher: Springer series_title: Lecture Notes in Computer Science (LNCS) status: public title: GPU-Supported Image Compression for Remote Visualization - Realization and Benchmarking type: conference user_id: '24135' volume: 5358 year: '2008' ... --- _id: '2359' author: - first_name: Dominic full_name: Battré, Dominic last_name: Battré - first_name: Georg full_name: Birkenheuer, Georg last_name: Birkenheuer - first_name: Vikas full_name: Deora, Vikas last_name: Deora - first_name: Matthias full_name: Hovestadt, Matthias last_name: Hovestadt - first_name: Omer full_name: Rana, Omer last_name: Rana - first_name: Oliver full_name: Wäldrich, Oliver last_name: Wäldrich citation: ama: 'Battré D, Birkenheuer G, Deora V, Hovestadt M, Rana O, Wäldrich O. Guarantee and Penalty Clauses for Service Level Agreements. In: Proc. Cracow Grid Workshop (CGW). ; 2008:213-220.' apa: Battré, D., Birkenheuer, G., Deora, V., Hovestadt, M., Rana, O., & Wäldrich, O. (2008). Guarantee and Penalty Clauses for Service Level Agreements. In Proc. Cracow Grid Workshop (CGW) (pp. 213–220). bibtex: '@inproceedings{Battré_Birkenheuer_Deora_Hovestadt_Rana_Wäldrich_2008, title={Guarantee and Penalty Clauses for Service Level Agreements}, booktitle={Proc. Cracow Grid Workshop (CGW)}, author={Battré, Dominic and Birkenheuer, Georg and Deora, Vikas and Hovestadt, Matthias and Rana, Omer and Wäldrich, Oliver}, year={2008}, pages={213–220} }' chicago: Battré, Dominic, Georg Birkenheuer, Vikas Deora, Matthias Hovestadt, Omer Rana, and Oliver Wäldrich. “Guarantee and Penalty Clauses for Service Level Agreements.” In Proc. Cracow Grid Workshop (CGW), 213–20, 2008. ieee: D. Battré, G. Birkenheuer, V. Deora, M. Hovestadt, O. Rana, and O. Wäldrich, “Guarantee and Penalty Clauses for Service Level Agreements,” in Proc. Cracow Grid Workshop (CGW), 2008, pp. 213–220. mla: Battré, Dominic, et al. “Guarantee and Penalty Clauses for Service Level Agreements.” Proc. Cracow Grid Workshop (CGW), 2008, pp. 213–20. short: 'D. Battré, G. Birkenheuer, V. Deora, M. Hovestadt, O. Rana, O. Wäldrich, in: Proc. Cracow Grid Workshop (CGW), 2008, pp. 213–220.' date_created: 2018-04-17T11:02:25Z date_updated: 2022-01-06T06:55:57Z department: - _id: '27' page: 213-220 publication: Proc. Cracow Grid Workshop (CGW) status: public title: Guarantee and Penalty Clauses for Service Level Agreements type: conference user_id: '24135' year: '2008' ... --- _id: '2382' author: - first_name: Willi full_name: Richert, Willi last_name: Richert - first_name: Florian full_name: Klompmaker, Florian last_name: Klompmaker - first_name: Oliver full_name: Niehörster, Oliver last_name: Niehörster citation: ama: 'Richert W, Klompmaker F, Niehörster O. Guiding exploration by combining individual learning and imitation in societies of autonomous robots. In: Proc. IFIP Conf. on Biologically Inspired Cooperative Computing (BICC). Springer; 2008:233-244. doi:10.1007/978-0-387-09655-1_21' apa: Richert, W., Klompmaker, F., & Niehörster, O. (2008). Guiding exploration by combining individual learning and imitation in societies of autonomous robots. In Proc. IFIP Conf. on Biologically Inspired Cooperative Computing (BICC) (pp. 233–244). Springer. https://doi.org/10.1007/978-0-387-09655-1_21 bibtex: '@inproceedings{Richert_Klompmaker_Niehörster_2008, title={Guiding exploration by combining individual learning and imitation in societies of autonomous robots}, DOI={10.1007/978-0-387-09655-1_21}, booktitle={Proc. IFIP Conf. on Biologically Inspired Cooperative Computing (BICC)}, publisher={Springer}, author={Richert, Willi and Klompmaker, Florian and Niehörster, Oliver}, year={2008}, pages={233–244} }' chicago: Richert, Willi, Florian Klompmaker, and Oliver Niehörster. “Guiding Exploration by Combining Individual Learning and Imitation in Societies of Autonomous Robots.” In Proc. IFIP Conf. on Biologically Inspired Cooperative Computing (BICC), 233–44. Springer, 2008. https://doi.org/10.1007/978-0-387-09655-1_21. ieee: W. Richert, F. Klompmaker, and O. Niehörster, “Guiding exploration by combining individual learning and imitation in societies of autonomous robots,” in Proc. IFIP Conf. on Biologically Inspired Cooperative Computing (BICC), 2008, pp. 233–244. mla: Richert, Willi, et al. “Guiding Exploration by Combining Individual Learning and Imitation in Societies of Autonomous Robots.” Proc. IFIP Conf. on Biologically Inspired Cooperative Computing (BICC), Springer, 2008, pp. 233–44, doi:10.1007/978-0-387-09655-1_21. short: 'W. Richert, F. Klompmaker, O. Niehörster, in: Proc. IFIP Conf. on Biologically Inspired Cooperative Computing (BICC), Springer, 2008, pp. 233–244.' date_created: 2018-04-17T12:28:02Z date_updated: 2022-01-06T06:56:01Z department: - _id: '27' doi: 10.1007/978-0-387-09655-1_21 page: 233-244 publication: Proc. IFIP Conf. on Biologically Inspired Cooperative Computing (BICC) publisher: Springer status: public title: Guiding exploration by combining individual learning and imitation in societies of autonomous robots type: conference user_id: '24135' year: '2008' ... --- _id: '2372' author: - first_name: Tobias full_name: Schumacher, Tobias last_name: Schumacher - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Schumacher T, Plessl C, Platzner M. IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers. In: Many-Core and Reconfigurable Supercomputing Conference (MRSC). ; 2008.' apa: 'Schumacher, T., Plessl, C., & Platzner, M. (2008). IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers. Many-Core and Reconfigurable Supercomputing Conference (MRSC).' bibtex: '@inproceedings{Schumacher_Plessl_Platzner_2008, title={IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers}, booktitle={Many-core and Reconfigurable Supercomputing Conference (MRSC)}, author={Schumacher, Tobias and Plessl, Christian and Platzner, Marco}, year={2008} }' chicago: 'Schumacher, Tobias, Christian Plessl, and Marco Platzner. “IMORC: An Infrastructure for Performance Monitoring and Optimization of Reconfigurable Computers.” In Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.' ieee: 'T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers,” 2008.' mla: 'Schumacher, Tobias, et al. “IMORC: An Infrastructure for Performance Monitoring and Optimization of Reconfigurable Computers.” Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.' short: 'T. Schumacher, C. Plessl, M. Platzner, in: Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.' date_created: 2018-04-17T12:05:28Z date_updated: 2023-09-26T13:55:51Z department: - _id: '27' - _id: '518' - _id: '78' keyword: - IMORC - IP core - interconnect language: - iso: eng publication: Many-core and Reconfigurable Supercomputing Conference (MRSC) quality_controlled: '1' status: public title: 'IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers' type: conference user_id: '15278' year: '2008' ...