---
_id: '1788'
author:
- first_name: Petra
full_name: Berenbrink, Petra
last_name: Berenbrink
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Tom
full_name: Friedetzky, Tom
last_name: Friedetzky
- first_name: Dirk
full_name: Meister, Dirk
last_name: Meister
- first_name: Lars
full_name: Nagel, Lars
last_name: Nagel
citation:
ama: 'Berenbrink P, Brinkmann A, Friedetzky T, Meister D, Nagel L. Distributing
Storage in Cloud Environments. In: Proc. Int. Symp. on Parallel and Distributed
Processing Workshops (IPDPSW). IEEE; 2013. doi:10.1109/IPDPSW.2013.148'
apa: Berenbrink, P., Brinkmann, A., Friedetzky, T., Meister, D., & Nagel, L.
(2013). Distributing Storage in Cloud Environments. In Proc. Int. Symp. on
Parallel and Distributed Processing Workshops (IPDPSW). IEEE. https://doi.org/10.1109/IPDPSW.2013.148
bibtex: '@inproceedings{Berenbrink_Brinkmann_Friedetzky_Meister_Nagel_2013, title={Distributing
Storage in Cloud Environments}, DOI={10.1109/IPDPSW.2013.148},
booktitle={Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)},
publisher={IEEE}, author={Berenbrink, Petra and Brinkmann, André and Friedetzky,
Tom and Meister, Dirk and Nagel, Lars}, year={2013} }'
chicago: Berenbrink, Petra, André Brinkmann, Tom Friedetzky, Dirk Meister, and Lars
Nagel. “Distributing Storage in Cloud Environments.” In Proc. Int. Symp. on
Parallel and Distributed Processing Workshops (IPDPSW). IEEE, 2013. https://doi.org/10.1109/IPDPSW.2013.148.
ieee: P. Berenbrink, A. Brinkmann, T. Friedetzky, D. Meister, and L. Nagel, “Distributing
Storage in Cloud Environments,” in Proc. Int. Symp. on Parallel and Distributed
Processing Workshops (IPDPSW), 2013.
mla: Berenbrink, Petra, et al. “Distributing Storage in Cloud Environments.” Proc.
Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE,
2013, doi:10.1109/IPDPSW.2013.148.
short: 'P. Berenbrink, A. Brinkmann, T. Friedetzky, D. Meister, L. Nagel, in: Proc.
Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE, 2013.'
date_created: 2018-03-26T14:52:56Z
date_updated: 2022-01-06T06:53:22Z
department:
- _id: '27'
doi: 10.1109/IPDPSW.2013.148
publication: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)
publisher: IEEE
status: public
title: Distributing Storage in Cloud Environments
type: conference
user_id: '24135'
year: '2013'
...
---
_id: '1793'
author:
- first_name: Dirk
full_name: Meister, Dirk
last_name: Meister
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Tim
full_name: Süß, Tim
last_name: Süß
citation:
ama: 'Meister D, Brinkmann A, Süß T. File Recipe Compression in Data Deduplication
Systems. In: Proc. USENIX Conference on File and Storage Technologies (FAST).
USENIX Association; 2013:175-182.'
apa: Meister, D., Brinkmann, A., & Süß, T. (2013). File Recipe Compression in
Data Deduplication Systems. In Proc. USENIX Conference on File and Storage
Technologies (FAST) (pp. 175–182). USENIX Association.
bibtex: '@inproceedings{Meister_Brinkmann_Süß_2013, title={File Recipe Compression
in Data Deduplication Systems}, booktitle={Proc. USENIX Conference on File and
Storage Technologies (FAST)}, publisher={USENIX Association}, author={Meister,
Dirk and Brinkmann, André and Süß, Tim}, year={2013}, pages={175–182} }'
chicago: Meister, Dirk, André Brinkmann, and Tim Süß. “File Recipe Compression in
Data Deduplication Systems.” In Proc. USENIX Conference on File and Storage
Technologies (FAST), 175–82. USENIX Association, 2013.
ieee: D. Meister, A. Brinkmann, and T. Süß, “File Recipe Compression in Data Deduplication
Systems,” in Proc. USENIX Conference on File and Storage Technologies (FAST),
2013, pp. 175–182.
mla: Meister, Dirk, et al. “File Recipe Compression in Data Deduplication Systems.”
Proc. USENIX Conference on File and Storage Technologies (FAST), USENIX
Association, 2013, pp. 175–82.
short: 'D. Meister, A. Brinkmann, T. Süß, in: Proc. USENIX Conference on File and
Storage Technologies (FAST), USENIX Association, 2013, pp. 175–182.'
date_created: 2018-03-26T15:16:03Z
date_updated: 2022-01-06T06:53:23Z
department:
- _id: '27'
page: 175-182
publication: Proc. USENIX Conference on File and Storage Technologies (FAST)
publisher: USENIX Association
status: public
title: File Recipe Compression in Data Deduplication Systems
type: conference
user_id: '24135'
year: '2013'
...
---
_id: '1786'
author:
- first_name: Server
full_name: Kasap, Server
last_name: Kasap
- first_name: Soydan
full_name: Redif, Soydan
last_name: Redif
citation:
ama: 'Kasap S, Redif S. FPGA Implementation of a Second-Order Convolutive Blind
Signal Separation Algorithm. In: Proc. IEEE Signal Processing and Communications
Conf. (SUI). IEEE; 2013. doi:10.1109/SIU.2013.6531530'
apa: Kasap, S., & Redif, S. (2013). FPGA Implementation of a Second-Order Convolutive
Blind Signal Separation Algorithm. In Proc. IEEE Signal Processing and Communications
Conf. (SUI). IEEE. https://doi.org/10.1109/SIU.2013.6531530
bibtex: '@inproceedings{Kasap_Redif_2013, title={FPGA Implementation of a Second-Order
Convolutive Blind Signal Separation Algorithm}, DOI={10.1109/SIU.2013.6531530},
booktitle={Proc. IEEE Signal Processing and Communications Conf. (SUI)}, publisher={IEEE},
author={Kasap, Server and Redif, Soydan}, year={2013} }'
chicago: Kasap, Server, and Soydan Redif. “FPGA Implementation of a Second-Order
Convolutive Blind Signal Separation Algorithm.” In Proc. IEEE Signal Processing
and Communications Conf. (SUI). IEEE, 2013. https://doi.org/10.1109/SIU.2013.6531530.
ieee: S. Kasap and S. Redif, “FPGA Implementation of a Second-Order Convolutive
Blind Signal Separation Algorithm,” in Proc. IEEE Signal Processing and Communications
Conf. (SUI), 2013.
mla: Kasap, Server, and Soydan Redif. “FPGA Implementation of a Second-Order Convolutive
Blind Signal Separation Algorithm.” Proc. IEEE Signal Processing and Communications
Conf. (SUI), IEEE, 2013, doi:10.1109/SIU.2013.6531530.
short: 'S. Kasap, S. Redif, in: Proc. IEEE Signal Processing and Communications
Conf. (SUI), IEEE, 2013.'
date_created: 2018-03-26T14:48:53Z
date_updated: 2022-01-06T06:53:20Z
department:
- _id: '27'
- _id: '78'
doi: 10.1109/SIU.2013.6531530
publication: Proc. IEEE Signal Processing and Communications Conf. (SUI)
publisher: IEEE
status: public
title: FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm
type: conference
user_id: '24135'
year: '2013'
...
---
_id: '528'
abstract:
- lang: eng
text: Cold-boot attacks exploit the fact that DRAM contents are not immediately
lost when a PC is powered off. Instead the contents decay rather slowly, in particular
if the DRAM chips are cooled to low temperatures. This effect opens an attack
vector on cryptographic applications that keep decrypted keys in DRAM. An attacker
with access to the target computer can reboot it or remove the RAM modules and
quickly copy the RAM contents to non-volatile memory. By exploiting the known
cryptographic structure of the cipher and layout of the key data in memory, in
our application an AES key schedule with redundancy, the resulting memory image
can be searched for sections that could correspond to decayed cryptographic keys;
then, the attacker can attempt to reconstruct the original key. However, the runtime
of these algorithms grows rapidly with increasing memory image size, error rate
and complexity of the bit error model, which limits the practicability of the
approach.In this work, we study how the algorithm for key search can be accelerated
with custom computing machines. We present an FPGA-based architecture on a Maxeler
dataflow computing system that outperforms a software implementation up to 205x,
which significantly improves the practicability of cold-attacks against AES.
author:
- first_name: Heinrich
full_name: Riebler, Heinrich
id: '8961'
last_name: Riebler
- first_name: Tobias
full_name: Kenter, Tobias
id: '3145'
last_name: Kenter
- first_name: Christoph
full_name: Sorge, Christoph
last_name: Sorge
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Riebler H, Kenter T, Sorge C, Plessl C. FPGA-accelerated Key Search for Cold-Boot
Attacks against AES. In: Proceedings of the International Conference on Field-Programmable
Technology (FPT). IEEE; 2013:386-389. doi:10.1109/FPT.2013.6718394'
apa: Riebler, H., Kenter, T., Sorge, C., & Plessl, C. (2013). FPGA-accelerated
Key Search for Cold-Boot Attacks against AES. Proceedings of the International
Conference on Field-Programmable Technology (FPT), 386–389. https://doi.org/10.1109/FPT.2013.6718394
bibtex: '@inproceedings{Riebler_Kenter_Sorge_Plessl_2013, title={FPGA-accelerated
Key Search for Cold-Boot Attacks against AES}, DOI={10.1109/FPT.2013.6718394},
booktitle={Proceedings of the International Conference on Field-Programmable Technology
(FPT)}, publisher={IEEE}, author={Riebler, Heinrich and Kenter, Tobias and Sorge,
Christoph and Plessl, Christian}, year={2013}, pages={386–389} }'
chicago: Riebler, Heinrich, Tobias Kenter, Christoph Sorge, and Christian Plessl.
“FPGA-Accelerated Key Search for Cold-Boot Attacks against AES.” In Proceedings
of the International Conference on Field-Programmable Technology (FPT), 386–89.
IEEE, 2013. https://doi.org/10.1109/FPT.2013.6718394.
ieee: 'H. Riebler, T. Kenter, C. Sorge, and C. Plessl, “FPGA-accelerated Key Search
for Cold-Boot Attacks against AES,” in Proceedings of the International Conference
on Field-Programmable Technology (FPT), 2013, pp. 386–389, doi: 10.1109/FPT.2013.6718394.'
mla: Riebler, Heinrich, et al. “FPGA-Accelerated Key Search for Cold-Boot Attacks
against AES.” Proceedings of the International Conference on Field-Programmable
Technology (FPT), IEEE, 2013, pp. 386–89, doi:10.1109/FPT.2013.6718394.
short: 'H. Riebler, T. Kenter, C. Sorge, C. Plessl, in: Proceedings of the International
Conference on Field-Programmable Technology (FPT), IEEE, 2013, pp. 386–389.'
date_created: 2017-10-17T12:42:35Z
date_updated: 2023-09-26T13:37:35Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/FPT.2013.6718394
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-15T10:36:08Z
date_updated: 2018-03-15T10:36:08Z
file_id: '1294'
file_name: 528-plessl13_fpt.pdf
file_size: 822680
relation: main_file
success: 1
file_date_updated: 2018-03-15T10:36:08Z
has_accepted_license: '1'
keyword:
- coldboot
language:
- iso: eng
page: 386-389
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '13'
name: SFB 901 - Subproject C1
- _id: '4'
name: SFB 901 - Project Area C
- _id: '34'
grant_number: '610996'
name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous
System Architectures
publication: Proceedings of the International Conference on Field-Programmable Technology
(FPT)
publisher: IEEE
quality_controlled: '1'
status: public
title: FPGA-accelerated Key Search for Cold-Boot Attacks against AES
type: conference
user_id: '15278'
year: '2013'
...
---
_id: '1784'
author:
- first_name: Jürgen
full_name: Kaiser, Jürgen
last_name: Kaiser
- first_name: Dirk
full_name: Meister, Dirk
last_name: Meister
- first_name: Viktor
full_name: Gottfried, Viktor
last_name: Gottfried
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Kaiser J, Meister D, Gottfried V, Brinkmann A. MCD: Overcoming the Data Download
Bottleneck in Data Centers. In: Proc. IEEE Int. Conf. on Networking, Architecture
and Storage (NAS). Washington DC, USA: IEEE Computer Society; 2013:88-97.
doi:10.1109/NAS.2013.18'
apa: 'Kaiser, J., Meister, D., Gottfried, V., & Brinkmann, A. (2013). MCD: Overcoming
the Data Download Bottleneck in Data Centers. In Proc. IEEE Int. Conf. on Networking,
Architecture and Storage (NAS) (pp. 88–97). Washington DC, USA: IEEE Computer
Society. https://doi.org/10.1109/NAS.2013.18'
bibtex: '@inproceedings{Kaiser_Meister_Gottfried_Brinkmann_2013, place={Washington
DC, USA}, title={MCD: Overcoming the Data Download Bottleneck in Data Centers},
DOI={10.1109/NAS.2013.18}, booktitle={Proc.
IEEE Int. Conf. on Networking, Architecture and Storage (NAS)}, publisher={IEEE
Computer Society}, author={Kaiser, Jürgen and Meister, Dirk and Gottfried, Viktor
and Brinkmann, André}, year={2013}, pages={88–97} }'
chicago: 'Kaiser, Jürgen, Dirk Meister, Viktor Gottfried, and André Brinkmann. “MCD:
Overcoming the Data Download Bottleneck in Data Centers.” In Proc. IEEE Int.
Conf. on Networking, Architecture and Storage (NAS), 88–97. Washington DC,
USA: IEEE Computer Society, 2013. https://doi.org/10.1109/NAS.2013.18.'
ieee: 'J. Kaiser, D. Meister, V. Gottfried, and A. Brinkmann, “MCD: Overcoming the
Data Download Bottleneck in Data Centers,” in Proc. IEEE Int. Conf. on Networking,
Architecture and Storage (NAS), 2013, pp. 88–97.'
mla: 'Kaiser, Jürgen, et al. “MCD: Overcoming the Data Download Bottleneck in Data
Centers.” Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS),
IEEE Computer Society, 2013, pp. 88–97, doi:10.1109/NAS.2013.18.'
short: 'J. Kaiser, D. Meister, V. Gottfried, A. Brinkmann, in: Proc. IEEE Int. Conf.
on Networking, Architecture and Storage (NAS), IEEE Computer Society, Washington
DC, USA, 2013, pp. 88–97.'
date_created: 2018-03-26T14:43:38Z
date_updated: 2022-01-06T06:53:20Z
department:
- _id: '27'
doi: 10.1109/NAS.2013.18
page: 88-97
place: Washington DC, USA
publication: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS)
publisher: IEEE Computer Society
status: public
title: 'MCD: Overcoming the Data Download Bottleneck in Data Centers'
type: conference
user_id: '24135'
year: '2013'
...
---
_id: '505'
abstract:
- lang: eng
text: In this paper we introduce “On-The-Fly Computing”, our vision of future IT
services that will be provided by assembling modular software components available
on world-wide markets. After suitable components have been found, they are automatically
integrated, configured and brought to execution in an On-The-Fly Compute Center.
We envision that these future compute centers will continue to leverage three
current trends in large scale computing which are an increasing amount of parallel
processing, a trend to use heterogeneous computing resources, and—in the light
of rising energy cost—energy-efficiency as a primary goal in the design and operation
of computing systems. In this paper, we point out three research challenges and
our current work in these areas.
author:
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Peter
full_name: Kling, Peter
last_name: Kling
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Friedhelm
full_name: Meyer auf der Heide, Friedhelm
id: '15523'
last_name: Meyer auf der Heide
citation:
ama: 'Happe M, Kling P, Plessl C, Platzner M, Meyer auf der Heide F. On-The-Fly
Computing: A Novel Paradigm for Individualized IT Services. In: Proceedings
of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous
Systems (SEUS). IEEE; 2013. doi:10.1109/ISORC.2013.6913232'
apa: 'Happe, M., Kling, P., Plessl, C., Platzner, M., & Meyer auf der Heide,
F. (2013). On-The-Fly Computing: A Novel Paradigm for Individualized IT Services.
Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded
and Ubiquitous Systems (SEUS). https://doi.org/10.1109/ISORC.2013.6913232'
bibtex: '@inproceedings{Happe_Kling_Plessl_Platzner_Meyer auf der Heide_2013, title={On-The-Fly
Computing: A Novel Paradigm for Individualized IT Services}, DOI={10.1109/ISORC.2013.6913232},
booktitle={Proceedings of the 9th IEEE Workshop on Software Technology for Future
embedded and Ubiquitous Systems (SEUS)}, publisher={IEEE}, author={Happe, Markus
and Kling, Peter and Plessl, Christian and Platzner, Marco and Meyer auf der Heide,
Friedhelm}, year={2013} }'
chicago: 'Happe, Markus, Peter Kling, Christian Plessl, Marco Platzner, and Friedhelm
Meyer auf der Heide. “On-The-Fly Computing: A Novel Paradigm for Individualized
IT Services.” In Proceedings of the 9th IEEE Workshop on Software Technology
for Future Embedded and Ubiquitous Systems (SEUS). IEEE, 2013. https://doi.org/10.1109/ISORC.2013.6913232.'
ieee: 'M. Happe, P. Kling, C. Plessl, M. Platzner, and F. Meyer auf der Heide, “On-The-Fly
Computing: A Novel Paradigm for Individualized IT Services,” 2013, doi: 10.1109/ISORC.2013.6913232.'
mla: 'Happe, Markus, et al. “On-The-Fly Computing: A Novel Paradigm for Individualized
IT Services.” Proceedings of the 9th IEEE Workshop on Software Technology for
Future Embedded and Ubiquitous Systems (SEUS), IEEE, 2013, doi:10.1109/ISORC.2013.6913232.'
short: 'M. Happe, P. Kling, C. Plessl, M. Platzner, F. Meyer auf der Heide, in:
Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded
and Ubiquitous Systems (SEUS), IEEE, 2013.'
date_created: 2017-10-17T12:42:30Z
date_updated: 2023-09-26T13:38:20Z
ddc:
- '040'
department:
- _id: '63'
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/ISORC.2013.6913232
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-15T13:38:56Z
date_updated: 2018-03-15T13:38:56Z
file_id: '1308'
file_name: 505-Plessl13_seus.pdf
file_size: 1040834
relation: main_file
success: 1
file_date_updated: 2018-03-15T13:38:56Z
has_accepted_license: '1'
language:
- iso: eng
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
publication: Proceedings of the 9th IEEE Workshop on Software Technology for Future
embedded and Ubiquitous Systems (SEUS)
publisher: IEEE
quality_controlled: '1'
status: public
title: 'On-The-Fly Computing: A Novel Paradigm for Individualized IT Services'
type: conference
user_id: '15278'
year: '2013'
...
---
_id: '1787'
author:
- first_name: Tim
full_name: Suess, Tim
last_name: Suess
- first_name: Andrew
full_name: Schoenrock, Andrew
last_name: Schoenrock
- first_name: Sebastian
full_name: Meisner, Sebastian
last_name: Meisner
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Suess T, Schoenrock A, Meisner S, Plessl C. Parallel Macro Pipelining on the
Intel SCC Many-Core Computer. In: Proc. Int. Symp. on Parallel and Distributed
Processing Workshops (IPDPSW). IEEE Computer Society; 2013:64-73. doi:10.1109/IPDPSW.2013.136'
apa: Suess, T., Schoenrock, A., Meisner, S., & Plessl, C. (2013). Parallel Macro
Pipelining on the Intel SCC Many-Core Computer. Proc. Int. Symp. on Parallel
and Distributed Processing Workshops (IPDPSW), 64–73. https://doi.org/10.1109/IPDPSW.2013.136
bibtex: '@inproceedings{Suess_Schoenrock_Meisner_Plessl_2013, place={Washington,
DC, USA}, title={Parallel Macro Pipelining on the Intel SCC Many-Core Computer},
DOI={10.1109/IPDPSW.2013.136},
booktitle={Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)},
publisher={IEEE Computer Society}, author={Suess, Tim and Schoenrock, Andrew and
Meisner, Sebastian and Plessl, Christian}, year={2013}, pages={64–73} }'
chicago: 'Suess, Tim, Andrew Schoenrock, Sebastian Meisner, and Christian Plessl.
“Parallel Macro Pipelining on the Intel SCC Many-Core Computer.” In Proc. Int.
Symp. on Parallel and Distributed Processing Workshops (IPDPSW), 64–73. Washington,
DC, USA: IEEE Computer Society, 2013. https://doi.org/10.1109/IPDPSW.2013.136.'
ieee: 'T. Suess, A. Schoenrock, S. Meisner, and C. Plessl, “Parallel Macro Pipelining
on the Intel SCC Many-Core Computer,” in Proc. Int. Symp. on Parallel and Distributed
Processing Workshops (IPDPSW), 2013, pp. 64–73, doi: 10.1109/IPDPSW.2013.136.'
mla: Suess, Tim, et al. “Parallel Macro Pipelining on the Intel SCC Many-Core Computer.”
Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW),
IEEE Computer Society, 2013, pp. 64–73, doi:10.1109/IPDPSW.2013.136.
short: 'T. Suess, A. Schoenrock, S. Meisner, C. Plessl, in: Proc. Int. Symp. on
Parallel and Distributed Processing Workshops (IPDPSW), IEEE Computer Society,
Washington, DC, USA, 2013, pp. 64–73.'
date_created: 2018-03-26T14:51:05Z
date_updated: 2023-09-26T13:38:05Z
department:
- _id: '27'
- _id: '518'
- _id: '78'
- _id: '63'
doi: 10.1109/IPDPSW.2013.136
language:
- iso: eng
page: 64-73
place: Washington, DC, USA
project:
- _id: '30'
grant_number: 01|H11004A
name: Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling
Models
publication: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)
publication_identifier:
isbn:
- 978-0-7695-4979-8
publisher: IEEE Computer Society
quality_controlled: '1'
status: public
title: Parallel Macro Pipelining on the Intel SCC Many-Core Computer
type: conference
user_id: '15278'
year: '2013'
...
---
_id: '2107'
author:
- first_name: Richard
full_name: Grunzke, Richard
last_name: Grunzke
- first_name: Georg
full_name: Birkenheuer, Georg
last_name: Birkenheuer
- first_name: Dirk
full_name: Blunk, Dirk
last_name: Blunk
- first_name: Sebastian
full_name: Breuers, Sebastian
last_name: Breuers
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Sandra
full_name: Gesing, Sandra
last_name: Gesing
- first_name: Sonja
full_name: Herres-Pawlis, Sonja
last_name: Herres-Pawlis
- first_name: Oliver
full_name: Kohlbacher, Oliver
last_name: Kohlbacher
- first_name: Jens
full_name: Krüger, Jens
last_name: Krüger
- first_name: Martin
full_name: Kruse, Martin
last_name: Kruse
- first_name: Ralph
full_name: Müller-Pfefferkorn, Ralph
last_name: Müller-Pfefferkorn
- first_name: Patrick
full_name: Schäfer, Patrick
last_name: Schäfer
- first_name: Bernd
full_name: Schuller, Bernd
last_name: Schuller
- first_name: Thomas
full_name: Steinke, Thomas
last_name: Steinke
- first_name: Andreas
full_name: Zink, Andreas
last_name: Zink
citation:
ama: 'Grunzke R, Birkenheuer G, Blunk D, et al. A Data Driven Science Gateway for
Computational Workflows. In: Proc. UNICORE Summit. ; 2012.'
apa: Grunzke, R., Birkenheuer, G., Blunk, D., Breuers, S., Brinkmann, A., Gesing,
S., … Zink, A. (2012). A Data Driven Science Gateway for Computational Workflows.
In Proc. UNICORE Summit.
bibtex: '@inproceedings{Grunzke_Birkenheuer_Blunk_Breuers_Brinkmann_Gesing_Herres-Pawlis_Kohlbacher_Krüger_Kruse_et
al._2012, title={A Data Driven Science Gateway for Computational Workflows}, booktitle={Proc.
UNICORE Summit}, author={Grunzke, Richard and Birkenheuer, Georg and Blunk, Dirk
and Breuers, Sebastian and Brinkmann, André and Gesing, Sandra and Herres-Pawlis,
Sonja and Kohlbacher, Oliver and Krüger, Jens and Kruse, Martin and et al.}, year={2012}
}'
chicago: Grunzke, Richard, Georg Birkenheuer, Dirk Blunk, Sebastian Breuers, André
Brinkmann, Sandra Gesing, Sonja Herres-Pawlis, et al. “A Data Driven Science Gateway
for Computational Workflows.” In Proc. UNICORE Summit, 2012.
ieee: R. Grunzke et al., “A Data Driven Science Gateway for Computational
Workflows,” in Proc. UNICORE Summit, 2012.
mla: Grunzke, Richard, et al. “A Data Driven Science Gateway for Computational Workflows.”
Proc. UNICORE Summit, 2012.
short: 'R. Grunzke, G. Birkenheuer, D. Blunk, S. Breuers, A. Brinkmann, S. Gesing,
S. Herres-Pawlis, O. Kohlbacher, J. Krüger, M. Kruse, R. Müller-Pfefferkorn, P.
Schäfer, B. Schuller, T. Steinke, A. Zink, in: Proc. UNICORE Summit, 2012.'
date_created: 2018-03-29T15:06:46Z
date_updated: 2022-01-06T06:54:44Z
department:
- _id: '27'
- _id: '518'
publication: Proc. UNICORE Summit
status: public
title: A Data Driven Science Gateway for Computational Workflows
type: conference
user_id: '24135'
year: '2012'
...
---
_id: '2178'
author:
- first_name: Sandra
full_name: Gesing, Sandra
last_name: Gesing
- first_name: Sonja
full_name: Herres-Pawlis, Sonja
last_name: Herres-Pawlis
- first_name: Georg
full_name: Birkenheuer, Georg
last_name: Birkenheuer
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Richard
full_name: Grunzke, Richard
last_name: Grunzke
- first_name: Peter
full_name: Kacsuk, Peter
last_name: Kacsuk
- first_name: Oliver
full_name: Kohlbacher, Oliver
last_name: Kohlbacher
- first_name: Miklos
full_name: Kozlovszky, Miklos
last_name: Kozlovszky
- first_name: Jens
full_name: Krüger, Jens
last_name: Krüger
- first_name: Ralph
full_name: Müller-Pfefferkorn, Ralph
last_name: Müller-Pfefferkorn
- first_name: Patrick
full_name: Schäfer, Patrick
last_name: Schäfer
- first_name: Thomas
full_name: Steinke, Thomas
last_name: Steinke
citation:
ama: 'Gesing S, Herres-Pawlis S, Birkenheuer G, et al. A Science Gateway Getting
Ready for Serving the International Molecular Simulation Community. In: Proceedings
of Science. Vol PoS(EGICF12-EMITC2)050. ; 2012.'
apa: Gesing, S., Herres-Pawlis, S., Birkenheuer, G., Brinkmann, A., Grunzke, R.,
Kacsuk, P., … Steinke, T. (2012). A Science Gateway Getting Ready for Serving
the International Molecular Simulation Community. In Proceedings of Science
(Vol. PoS(EGICF12-EMITC2)050).
bibtex: '@inproceedings{Gesing_Herres-Pawlis_Birkenheuer_Brinkmann_Grunzke_Kacsuk_Kohlbacher_Kozlovszky_Krüger_Müller-Pfefferkorn_et
al._2012, title={A Science Gateway Getting Ready for Serving the International
Molecular Simulation Community}, volume={PoS(EGICF12-EMITC2)050}, booktitle={Proceedings
of Science}, author={Gesing, Sandra and Herres-Pawlis, Sonja and Birkenheuer,
Georg and Brinkmann, André and Grunzke, Richard and Kacsuk, Peter and Kohlbacher,
Oliver and Kozlovszky, Miklos and Krüger, Jens and Müller-Pfefferkorn, Ralph and
et al.}, year={2012} }'
chicago: Gesing, Sandra, Sonja Herres-Pawlis, Georg Birkenheuer, André Brinkmann,
Richard Grunzke, Peter Kacsuk, Oliver Kohlbacher, et al. “A Science Gateway Getting
Ready for Serving the International Molecular Simulation Community.” In Proceedings
of Science, Vol. PoS(EGICF12-EMITC2)050, 2012.
ieee: S. Gesing et al., “A Science Gateway Getting Ready for Serving the
International Molecular Simulation Community,” in Proceedings of Science,
2012, vol. PoS(EGICF12-EMITC2)050.
mla: Gesing, Sandra, et al. “A Science Gateway Getting Ready for Serving the International
Molecular Simulation Community.” Proceedings of Science, vol. PoS(EGICF12-EMITC2)050,
2012.
short: 'S. Gesing, S. Herres-Pawlis, G. Birkenheuer, A. Brinkmann, R. Grunzke, P.
Kacsuk, O. Kohlbacher, M. Kozlovszky, J. Krüger, R. Müller-Pfefferkorn, P. Schäfer,
T. Steinke, in: Proceedings of Science, 2012.'
date_created: 2018-04-03T09:15:35Z
date_updated: 2022-01-06T06:55:13Z
department:
- _id: '27'
publication: Proceedings of Science
status: public
title: A Science Gateway Getting Ready for Serving the International Molecular Simulation
Community
type: conference
user_id: '24135'
volume: PoS(EGICF12-EMITC2)050
year: '2012'
...
---
_id: '2099'
author:
- first_name: Dirk
full_name: Meister, Dirk
last_name: Meister
- first_name: Jürgen
full_name: Kaiser, Jürgen
last_name: Kaiser
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Michael
full_name: Kuhn, Michael
last_name: Kuhn
- first_name: Julian
full_name: Kunkel, Julian
last_name: Kunkel
- first_name: Toni
full_name: Cortes, Toni
last_name: Cortes
citation:
ama: 'Meister D, Kaiser J, Brinkmann A, Kuhn M, Kunkel J, Cortes T. A Study on Data
Deduplication in HPC Storage Systems. In: Proc. Int. Conf. on Supercomputing
(SC). Los Alamitos, CA, USA: IEEE Computer Society; 2012:7:1-7:11. doi:10.1109/SC.2012.14'
apa: 'Meister, D., Kaiser, J., Brinkmann, A., Kuhn, M., Kunkel, J., & Cortes,
T. (2012). A Study on Data Deduplication in HPC Storage Systems. In Proc. Int.
Conf. on Supercomputing (SC) (pp. 7:1-7:11). Los Alamitos, CA, USA: IEEE Computer
Society. https://doi.org/10.1109/SC.2012.14'
bibtex: '@inproceedings{Meister_Kaiser_Brinkmann_Kuhn_Kunkel_Cortes_2012, place={Los
Alamitos, CA, USA}, title={A Study on Data Deduplication in HPC Storage Systems},
DOI={10.1109/SC.2012.14}, booktitle={Proc.
Int. Conf. on Supercomputing (SC)}, publisher={IEEE Computer Society}, author={Meister,
Dirk and Kaiser, Jürgen and Brinkmann, André and Kuhn, Michael and Kunkel, Julian
and Cortes, Toni}, year={2012}, pages={7:1-7:11} }'
chicago: 'Meister, Dirk, Jürgen Kaiser, André Brinkmann, Michael Kuhn, Julian Kunkel,
and Toni Cortes. “A Study on Data Deduplication in HPC Storage Systems.” In Proc.
Int. Conf. on Supercomputing (SC), 7:1-7:11. Los Alamitos, CA, USA: IEEE Computer
Society, 2012. https://doi.org/10.1109/SC.2012.14.'
ieee: D. Meister, J. Kaiser, A. Brinkmann, M. Kuhn, J. Kunkel, and T. Cortes, “A
Study on Data Deduplication in HPC Storage Systems,” in Proc. Int. Conf. on
Supercomputing (SC), 2012, pp. 7:1-7:11.
mla: Meister, Dirk, et al. “A Study on Data Deduplication in HPC Storage Systems.”
Proc. Int. Conf. on Supercomputing (SC), IEEE Computer Society, 2012, pp.
7:1-7:11, doi:10.1109/SC.2012.14.
short: 'D. Meister, J. Kaiser, A. Brinkmann, M. Kuhn, J. Kunkel, T. Cortes, in:
Proc. Int. Conf. on Supercomputing (SC), IEEE Computer Society, Los Alamitos,
CA, USA, 2012, pp. 7:1-7:11.'
date_created: 2018-03-29T14:41:55Z
date_updated: 2022-01-06T06:54:42Z
department:
- _id: '27'
doi: 10.1109/SC.2012.14
page: 7:1-7:11
place: Los Alamitos, CA, USA
publication: Proc. Int. Conf. on Supercomputing (SC)
publisher: IEEE Computer Society
status: public
title: A Study on Data Deduplication in HPC Storage Systems
type: conference
user_id: '24135'
year: '2012'
...
---
_id: '2103'
author:
- first_name: Martin
full_name: Wistuba, Martin
last_name: Wistuba
- first_name: Lars
full_name: Schaefers, Lars
last_name: Schaefers
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Wistuba M, Schaefers L, Platzner M. Comparison of Bayesian Move Prediction
Systems for Computer Go. In: Proc. IEEE Conf. on Computational Intelligence
and Games (CIG). IEEE; 2012:91-99. doi:10.1109/CIG.2012.6374143'
apa: Wistuba, M., Schaefers, L., & Platzner, M. (2012). Comparison of Bayesian
Move Prediction Systems for Computer Go. In Proc. IEEE Conf. on Computational
Intelligence and Games (CIG) (pp. 91–99). IEEE. https://doi.org/10.1109/CIG.2012.6374143
bibtex: '@inproceedings{Wistuba_Schaefers_Platzner_2012, title={Comparison of Bayesian
Move Prediction Systems for Computer Go}, DOI={10.1109/CIG.2012.6374143},
booktitle={Proc. IEEE Conf. on Computational Intelligence and Games (CIG)}, publisher={IEEE},
author={Wistuba, Martin and Schaefers, Lars and Platzner, Marco}, year={2012},
pages={91–99} }'
chicago: Wistuba, Martin, Lars Schaefers, and Marco Platzner. “Comparison of Bayesian
Move Prediction Systems for Computer Go.” In Proc. IEEE Conf. on Computational
Intelligence and Games (CIG), 91–99. IEEE, 2012. https://doi.org/10.1109/CIG.2012.6374143.
ieee: M. Wistuba, L. Schaefers, and M. Platzner, “Comparison of Bayesian Move Prediction
Systems for Computer Go,” in Proc. IEEE Conf. on Computational Intelligence
and Games (CIG), 2012, pp. 91–99.
mla: Wistuba, Martin, et al. “Comparison of Bayesian Move Prediction Systems for
Computer Go.” Proc. IEEE Conf. on Computational Intelligence and Games (CIG),
IEEE, 2012, pp. 91–99, doi:10.1109/CIG.2012.6374143.
short: 'M. Wistuba, L. Schaefers, M. Platzner, in: Proc. IEEE Conf. on Computational
Intelligence and Games (CIG), IEEE, 2012, pp. 91–99.'
date_created: 2018-03-29T14:59:35Z
date_updated: 2022-01-06T06:54:42Z
department:
- _id: '27'
- _id: '78'
doi: 10.1109/CIG.2012.6374143
page: 91-99
publication: Proc. IEEE Conf. on Computational Intelligence and Games (CIG)
publisher: IEEE
status: public
title: Comparison of Bayesian Move Prediction Systems for Computer Go
type: conference
user_id: '24135'
year: '2012'
...
---
_id: '2106'
abstract:
- lang: eng
text: "Although the benefits of FPGAs for accelerating scientific codes are widely
acknowledged, the use of FPGA accelerators in scientific computing is not widespread
because reaping these benefits requires knowledge of hardware design methods and
tools that is typically not available with domain scientists. A promising but
hardly investigated approach is to develop tool flows that keep the common languages
for scientific code (C,C++, and Fortran) and allow the developer to augment the
source code with OpenMPlike directives for instructing the compiler which parts
of the application shall be offloaded the FPGA accelerator.\r\nIn this work we
study whether the promise of effective FPGA acceleration with an OpenMP-like programming
effort\r\ncan actually be held. Our target system is the Convey HC-1 reconfigurable
computer for which an OpenMP-like\r\nprogramming environment exists. As case study
we use an application from computational nanophotonics. Our results\r\nshow that
a developer without previous FPGA experience could create an FPGA-accelerated
application that is competitive to an optimized OpenMP-parallelized CPU version
running on a two socket quad-core server. Finally, we discuss our experiences
with this tool flow and the Convey HC-1 from a productivity and economic point
of view."
author:
- first_name: Björn
full_name: Meyer, Björn
last_name: Meyer
- first_name: Jörn
full_name: Schumacher, Jörn
last_name: Schumacher
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Jens
full_name: Förstner, Jens
id: '158'
last_name: Förstner
orcid: 0000-0001-7059-9862
citation:
ama: 'Meyer B, Schumacher J, Plessl C, Förstner J. Convey Vector Personalities –
FPGA Acceleration with an OpenMP-like Effort? In: Proc. Int. Conf. on Field
Programmable Logic and Applications (FPL). IEEE; 2012:189-196. doi:10.1109/FPL.2012.6339370'
apa: Meyer, B., Schumacher, J., Plessl, C., & Förstner, J. (2012). Convey Vector
Personalities – FPGA Acceleration with an OpenMP-like Effort? Proc. Int. Conf.
on Field Programmable Logic and Applications (FPL), 189–196. https://doi.org/10.1109/FPL.2012.6339370
bibtex: '@inproceedings{Meyer_Schumacher_Plessl_Förstner_2012, title={Convey Vector
Personalities – FPGA Acceleration with an OpenMP-like Effort?}, DOI={10.1109/FPL.2012.6339370},
booktitle={Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)},
publisher={IEEE}, author={Meyer, Björn and Schumacher, Jörn and Plessl, Christian
and Förstner, Jens}, year={2012}, pages={189–196} }'
chicago: Meyer, Björn, Jörn Schumacher, Christian Plessl, and Jens Förstner. “Convey
Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?” In Proc.
Int. Conf. on Field Programmable Logic and Applications (FPL), 189–96. IEEE,
2012. https://doi.org/10.1109/FPL.2012.6339370.
ieee: 'B. Meyer, J. Schumacher, C. Plessl, and J. Förstner, “Convey Vector Personalities
– FPGA Acceleration with an OpenMP-like Effort?,” in Proc. Int. Conf. on Field
Programmable Logic and Applications (FPL), 2012, pp. 189–196, doi: 10.1109/FPL.2012.6339370.'
mla: Meyer, Björn, et al. “Convey Vector Personalities – FPGA Acceleration with
an OpenMP-like Effort?” Proc. Int. Conf. on Field Programmable Logic and Applications
(FPL), IEEE, 2012, pp. 189–96, doi:10.1109/FPL.2012.6339370.
short: 'B. Meyer, J. Schumacher, C. Plessl, J. Förstner, in: Proc. Int. Conf. on
Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 189–196.'
conference:
name: 22nd International Conference on Field Programmable Logic and Applicaitons
(FPL)
date_created: 2018-03-29T15:04:25Z
date_updated: 2023-09-26T13:39:13Z
ddc:
- '000'
department:
- _id: '27'
- _id: '518'
- _id: '15'
- _id: '78'
doi: 10.1109/FPL.2012.6339370
file:
- access_level: closed
content_type: application/pdf
creator: fossie
date_created: 2019-02-13T09:04:46Z
date_updated: 2019-02-13T09:04:46Z
file_id: '7638'
file_name: 2012-11 Meyer,Schumacher,Plessl,Förstner_Convey vector personalities-FPGA
acceleratin with an openmp-like programming effort.pdf
file_size: 2148787
relation: main_file
success: 1
file_date_updated: 2019-02-13T09:04:46Z
has_accepted_license: '1'
keyword:
- funding-upb-forschungspreis
- funding-maxup
- tet_topic_hpc
language:
- iso: eng
page: 189-196
publication: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)
publisher: IEEE
quality_controlled: '1'
status: public
title: Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?
type: conference
user_id: '15278'
year: '2012'
...
---
_id: '1789'
author:
- first_name: Jürgen
full_name: Kaiser, Jürgen
last_name: Kaiser
- first_name: Dirk
full_name: Meister, Dirk
last_name: Meister
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Sascha
full_name: Effert, Sascha
last_name: Effert
citation:
ama: 'Kaiser J, Meister D, Brinkmann A, Effert S. Design of an exact data deduplication
cluster. In: Proc. Symp. on Mass Storage Systems and Technologies (MSST).
IEEE; 2012:1-12. doi:10.1109/MSST.2012.6232380'
apa: Kaiser, J., Meister, D., Brinkmann, A., & Effert, S. (2012). Design of
an exact data deduplication cluster. In Proc. Symp. on Mass Storage Systems
and Technologies (MSST) (pp. 1–12). IEEE. https://doi.org/10.1109/MSST.2012.6232380
bibtex: '@inproceedings{Kaiser_Meister_Brinkmann_Effert_2012, title={Design of an
exact data deduplication cluster}, DOI={10.1109/MSST.2012.6232380},
booktitle={Proc. Symp. on Mass Storage Systems and Technologies (MSST)}, publisher={IEEE},
author={Kaiser, Jürgen and Meister, Dirk and Brinkmann, André and Effert, Sascha},
year={2012}, pages={1–12} }'
chicago: Kaiser, Jürgen, Dirk Meister, André Brinkmann, and Sascha Effert. “Design
of an Exact Data Deduplication Cluster.” In Proc. Symp. on Mass Storage Systems
and Technologies (MSST), 1–12. IEEE, 2012. https://doi.org/10.1109/MSST.2012.6232380.
ieee: J. Kaiser, D. Meister, A. Brinkmann, and S. Effert, “Design of an exact data
deduplication cluster,” in Proc. Symp. on Mass Storage Systems and Technologies
(MSST), 2012, pp. 1–12.
mla: Kaiser, Jürgen, et al. “Design of an Exact Data Deduplication Cluster.” Proc.
Symp. on Mass Storage Systems and Technologies (MSST), IEEE, 2012, pp. 1–12,
doi:10.1109/MSST.2012.6232380.
short: 'J. Kaiser, D. Meister, A. Brinkmann, S. Effert, in: Proc. Symp. on Mass
Storage Systems and Technologies (MSST), IEEE, 2012, pp. 1–12.'
date_created: 2018-03-26T15:12:01Z
date_updated: 2022-01-06T06:53:22Z
department:
- _id: '27'
doi: 10.1109/MSST.2012.6232380
page: 1-12
publication: Proc. Symp. on Mass Storage Systems and Technologies (MSST)
publisher: IEEE
status: public
title: Design of an exact data deduplication cluster
type: conference
user_id: '24135'
year: '2012'
...
---
_id: '615'
abstract:
- lang: eng
text: Due to the continuously shrinking device structures and increasing densities
of FPGAs, thermal aspects have become the new focus for many research projects
over the last years. Most researchers rely on temperature simulations to evaluate
their novel thermal management techniques. However, the accuracy of the simulations
is to some extent questionable and they require a high computational effort if
a detailed thermal model is used.For experimental evaluation of real-world temperature
management methods, often synthetic heat sources are employed. Therefore, in this
paper we investigated the question if we can create significant rises in temperature
on modern FPGAs to enable future evaluation of thermal management techniques based
on experiments in contrast to simulations. Therefore, we have developed eight
different heat-generating cores that use different subsets of the FPGA resources.
Our experimental results show that, according to the built-in thermal diode of
our Xilinx Virtex-5 FPGA, we can increase the chip temperature by 134 degree C
in less than 12 minutes by only utilizing about 21% of the slices.
author:
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Hendrik
full_name: Hangmann, Hendrik
last_name: Hangmann
- first_name: Andreas
full_name: Agne, Andreas
last_name: Agne
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Happe M, Hangmann H, Agne A, Plessl C. Eight Ways to put your FPGA on Fire
– A Systematic Study of Heat Generators. In: Proceedings of the International
Conference on Reconfigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8.
doi:10.1109/ReConFig.2012.6416745'
apa: Happe, M., Hangmann, H., Agne, A., & Plessl, C. (2012). Eight Ways to put
your FPGA on Fire – A Systematic Study of Heat Generators. Proceedings of the
International Conference on Reconfigurable Computing and FPGAs (ReConFig),
1–8. https://doi.org/10.1109/ReConFig.2012.6416745
bibtex: '@inproceedings{Happe_Hangmann_Agne_Plessl_2012, title={Eight Ways to put
your FPGA on Fire – A Systematic Study of Heat Generators}, DOI={10.1109/ReConFig.2012.6416745},
booktitle={Proceedings of the International Conference on Reconfigurable Computing
and FPGAs (ReConFig)}, publisher={IEEE}, author={Happe, Markus and Hangmann, Hendrik
and Agne, Andreas and Plessl, Christian}, year={2012}, pages={1–8} }'
chicago: Happe, Markus, Hendrik Hangmann, Andreas Agne, and Christian Plessl. “Eight
Ways to Put Your FPGA on Fire – A Systematic Study of Heat Generators.” In Proceedings
of the International Conference on Reconfigurable Computing and FPGAs (ReConFig),
1–8. IEEE, 2012. https://doi.org/10.1109/ReConFig.2012.6416745.
ieee: 'M. Happe, H. Hangmann, A. Agne, and C. Plessl, “Eight Ways to put your FPGA
on Fire – A Systematic Study of Heat Generators,” in Proceedings of the International
Conference on Reconfigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8,
doi: 10.1109/ReConFig.2012.6416745.'
mla: Happe, Markus, et al. “Eight Ways to Put Your FPGA on Fire – A Systematic Study
of Heat Generators.” Proceedings of the International Conference on Reconfigurable
Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416745.
short: 'M. Happe, H. Hangmann, A. Agne, C. Plessl, in: Proceedings of the International
Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.'
date_created: 2017-10-17T12:42:51Z
date_updated: 2023-09-26T13:42:26Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/ReConFig.2012.6416745
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-15T06:48:32Z
date_updated: 2018-03-15T06:48:32Z
file_id: '1246'
file_name: 615-ReConFig12_01.pdf
file_size: 730144
relation: main_file
success: 1
file_date_updated: 2018-03-15T06:48:32Z
has_accepted_license: '1'
language:
- iso: eng
page: 1-8
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: Proceedings of the International Conference on Reconfigurable Computing
and FPGAs (ReConFig)
publisher: IEEE
quality_controlled: '1'
status: public
title: Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators
type: conference
user_id: '15278'
year: '2012'
...
---
_id: '2098'
author:
- first_name: Jürgen
full_name: Kaiser, Jürgen
last_name: Kaiser
- first_name: Dirk
full_name: Meister, Dirk
last_name: Meister
- first_name: Tim
full_name: Hartung, Tim
last_name: Hartung
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Kaiser J, Meister D, Hartung T, Brinkmann A. ESB: Ext2 Split Block Device.
In: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS).
IEEE; 2012:181-188. doi:10.1109/ICPADS.2012.34'
apa: 'Kaiser, J., Meister, D., Hartung, T., & Brinkmann, A. (2012). ESB: Ext2
Split Block Device. In Proc. IEEE Int. Conf. on Parallel and Distributed Systems
(ICPADS) (pp. 181–188). IEEE. https://doi.org/10.1109/ICPADS.2012.34'
bibtex: '@inproceedings{Kaiser_Meister_Hartung_Brinkmann_2012, title={ESB: Ext2
Split Block Device}, DOI={10.1109/ICPADS.2012.34},
booktitle={Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS)},
publisher={IEEE}, author={Kaiser, Jürgen and Meister, Dirk and Hartung, Tim and
Brinkmann, André}, year={2012}, pages={181–188} }'
chicago: 'Kaiser, Jürgen, Dirk Meister, Tim Hartung, and André Brinkmann. “ESB:
Ext2 Split Block Device.” In Proc. IEEE Int. Conf. on Parallel and Distributed
Systems (ICPADS), 181–88. IEEE, 2012. https://doi.org/10.1109/ICPADS.2012.34.'
ieee: 'J. Kaiser, D. Meister, T. Hartung, and A. Brinkmann, “ESB: Ext2 Split Block
Device,” in Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS),
2012, pp. 181–188.'
mla: 'Kaiser, Jürgen, et al. “ESB: Ext2 Split Block Device.” Proc. IEEE Int.
Conf. on Parallel and Distributed Systems (ICPADS), IEEE, 2012, pp. 181–88,
doi:10.1109/ICPADS.2012.34.'
short: 'J. Kaiser, D. Meister, T. Hartung, A. Brinkmann, in: Proc. IEEE Int. Conf.
on Parallel and Distributed Systems (ICPADS), IEEE, 2012, pp. 181–188.'
date_created: 2018-03-29T14:40:04Z
date_updated: 2022-01-06T06:54:42Z
department:
- _id: '27'
doi: 10.1109/ICPADS.2012.34
page: 181-188
publication: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS)
publisher: IEEE
status: public
title: 'ESB: Ext2 Split Block Device'
type: conference
user_id: '24135'
year: '2012'
...
---
_id: '612'
abstract:
- lang: eng
text: While numerous publications have presented ring oscillator designs for temperature
measurements a detailed study of the ring oscillator's design space is still missing.
In this work, we introduce metrics for comparing the performance and area efficiency
of ring oscillators and a methodology for determining these metrics. As a result,
we present a systematic study of the design space for ring oscillators for a Xilinx
Virtex-5 platform FPGA.
author:
- first_name: Christoph
full_name: Rüthing, Christoph
last_name: Rüthing
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Andreas
full_name: Agne, Andreas
last_name: Agne
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Rüthing C, Happe M, Agne A, Plessl C. Exploration of Ring Oscillator Design
Space for Temperature Measurements on FPGAs. In: Proceedings of the International
Conference on Field Programmable Logic and Applications (FPL). IEEE; 2012:559-562.
doi:10.1109/FPL.2012.6339370'
apa: Rüthing, C., Happe, M., Agne, A., & Plessl, C. (2012). Exploration of Ring
Oscillator Design Space for Temperature Measurements on FPGAs. Proceedings
of the International Conference on Field Programmable Logic and Applications (FPL),
559–562. https://doi.org/10.1109/FPL.2012.6339370
bibtex: '@inproceedings{Rüthing_Happe_Agne_Plessl_2012, title={Exploration of Ring
Oscillator Design Space for Temperature Measurements on FPGAs}, DOI={10.1109/FPL.2012.6339370},
booktitle={Proceedings of the International Conference on Field Programmable Logic
and Applications (FPL)}, publisher={IEEE}, author={Rüthing, Christoph and Happe,
Markus and Agne, Andreas and Plessl, Christian}, year={2012}, pages={559–562}
}'
chicago: Rüthing, Christoph, Markus Happe, Andreas Agne, and Christian Plessl. “Exploration
of Ring Oscillator Design Space for Temperature Measurements on FPGAs.” In Proceedings
of the International Conference on Field Programmable Logic and Applications (FPL),
559–62. IEEE, 2012. https://doi.org/10.1109/FPL.2012.6339370.
ieee: 'C. Rüthing, M. Happe, A. Agne, and C. Plessl, “Exploration of Ring Oscillator
Design Space for Temperature Measurements on FPGAs,” in Proceedings of the
International Conference on Field Programmable Logic and Applications (FPL),
2012, pp. 559–562, doi: 10.1109/FPL.2012.6339370.'
mla: Rüthing, Christoph, et al. “Exploration of Ring Oscillator Design Space for
Temperature Measurements on FPGAs.” Proceedings of the International Conference
on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–62,
doi:10.1109/FPL.2012.6339370.
short: 'C. Rüthing, M. Happe, A. Agne, C. Plessl, in: Proceedings of the International
Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp.
559–562.'
date_created: 2017-10-17T12:42:51Z
date_updated: 2023-09-26T13:42:03Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/FPL.2012.6339370
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-15T06:49:03Z
date_updated: 2018-03-15T06:49:03Z
file_id: '1247'
file_name: 612-ruething_fpl12.pdf
file_size: 202923
relation: main_file
success: 1
file_date_updated: 2018-03-15T06:49:03Z
has_accepted_license: '1'
language:
- iso: eng
page: 559-562
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: Proceedings of the International Conference on Field Programmable Logic
and Applications (FPL)
publisher: IEEE
quality_controlled: '1'
status: public
title: Exploration of Ring Oscillator Design Space for Temperature Measurements on
FPGAs
type: conference
user_id: '15278'
year: '2012'
...
---
_id: '2100'
author:
- first_name: Server
full_name: Kasap, Server
last_name: Kasap
- first_name: Soydan
full_name: Redif, Soydan
last_name: Redif
citation:
ama: 'Kasap S, Redif S. FPGA implementation of a second-order convolutive blind
signal separation algorithm. In: Int. Architecture and Engineering Symp. (ARCHENG).
; 2012.'
apa: Kasap, S., & Redif, S. (2012). FPGA implementation of a second-order convolutive
blind signal separation algorithm. In Int. Architecture and Engineering Symp.
(ARCHENG).
bibtex: '@inproceedings{Kasap_Redif_2012, title={FPGA implementation of a second-order
convolutive blind signal separation algorithm}, booktitle={Int. Architecture and
Engineering Symp. (ARCHENG)}, author={Kasap, Server and Redif, Soydan}, year={2012}
}'
chicago: Kasap, Server, and Soydan Redif. “FPGA Implementation of a Second-Order
Convolutive Blind Signal Separation Algorithm.” In Int. Architecture and Engineering
Symp. (ARCHENG), 2012.
ieee: S. Kasap and S. Redif, “FPGA implementation of a second-order convolutive
blind signal separation algorithm,” in Int. Architecture and Engineering Symp.
(ARCHENG), 2012.
mla: Kasap, Server, and Soydan Redif. “FPGA Implementation of a Second-Order Convolutive
Blind Signal Separation Algorithm.” Int. Architecture and Engineering Symp.
(ARCHENG), 2012.
short: 'S. Kasap, S. Redif, in: Int. Architecture and Engineering Symp. (ARCHENG),
2012.'
date_created: 2018-03-29T14:43:18Z
date_updated: 2022-01-06T06:54:42Z
department:
- _id: '27'
- _id: '78'
publication: Int. Architecture and Engineering Symp. (ARCHENG)
status: public
title: FPGA implementation of a second-order convolutive blind signal separation algorithm
type: conference
user_id: '24135'
year: '2012'
...
---
_id: '2097'
author:
- first_name: Server
full_name: Kasap, Server
last_name: Kasap
- first_name: Soydan
full_name: Redif, Soydan
last_name: Redif
citation:
ama: 'Kasap S, Redif S. FPGA-based design and implementation of an approximate polynomial
matrix EVD algorithm. In: Proc. Int. Conf. on Field Programmable Technology
(ICFPT). IEEE Computer Society; 2012:135-140. doi:10.1109/FPT.2012.6412125'
apa: Kasap, S., & Redif, S. (2012). FPGA-based design and implementation of
an approximate polynomial matrix EVD algorithm. In Proc. Int. Conf. on Field
Programmable Technology (ICFPT) (pp. 135–140). IEEE Computer Society. https://doi.org/10.1109/FPT.2012.6412125
bibtex: '@inproceedings{Kasap_Redif_2012, title={FPGA-based design and implementation
of an approximate polynomial matrix EVD algorithm}, DOI={10.1109/FPT.2012.6412125},
booktitle={Proc. Int. Conf. on Field Programmable Technology (ICFPT)}, publisher={IEEE
Computer Society}, author={Kasap, Server and Redif, Soydan}, year={2012}, pages={135–140}
}'
chicago: Kasap, Server, and Soydan Redif. “FPGA-Based Design and Implementation
of an Approximate Polynomial Matrix EVD Algorithm.” In Proc. Int. Conf. on
Field Programmable Technology (ICFPT), 135–40. IEEE Computer Society, 2012.
https://doi.org/10.1109/FPT.2012.6412125.
ieee: S. Kasap and S. Redif, “FPGA-based design and implementation of an approximate
polynomial matrix EVD algorithm,” in Proc. Int. Conf. on Field Programmable
Technology (ICFPT), 2012, pp. 135–140.
mla: Kasap, Server, and Soydan Redif. “FPGA-Based Design and Implementation of an
Approximate Polynomial Matrix EVD Algorithm.” Proc. Int. Conf. on Field Programmable
Technology (ICFPT), IEEE Computer Society, 2012, pp. 135–40, doi:10.1109/FPT.2012.6412125.
short: 'S. Kasap, S. Redif, in: Proc. Int. Conf. on Field Programmable Technology
(ICFPT), IEEE Computer Society, 2012, pp. 135–140.'
date_created: 2018-03-29T14:34:48Z
date_updated: 2022-01-06T06:54:42Z
department:
- _id: '27'
- _id: '78'
doi: 10.1109/FPT.2012.6412125
page: 135-140
publication: Proc. Int. Conf. on Field Programmable Technology (ICFPT)
publisher: IEEE Computer Society
status: public
title: FPGA-based design and implementation of an approximate polynomial matrix EVD
algorithm
type: conference
user_id: '24135'
year: '2012'
...
---
_id: '2104'
author:
- first_name: Tobias
full_name: Schlemmer, Tobias
last_name: Schlemmer
- first_name: Richard
full_name: Grunzke, Richard
last_name: Grunzke
- first_name: Sandra
full_name: Gesing, Sandra
last_name: Gesing
- first_name: Jens
full_name: Krüger, Jens
last_name: Krüger
- first_name: Georg
full_name: Birkenheuer, Georg
last_name: Birkenheuer
- first_name: Ralph
full_name: Müller-Pfefferkorn, Ralph
last_name: Müller-Pfefferkorn
- first_name: Oliver
full_name: Kohlbacher, Oliver
last_name: Kohlbacher
citation:
ama: 'Schlemmer T, Grunzke R, Gesing S, et al. Generic User Management for Science
Gateways via Virtual Organizations. In: Proc. EGI Technical Forum. ; 2012.'
apa: Schlemmer, T., Grunzke, R., Gesing, S., Krüger, J., Birkenheuer, G., Müller-Pfefferkorn,
R., & Kohlbacher, O. (2012). Generic User Management for Science Gateways
via Virtual Organizations. In Proc. EGI Technical Forum.
bibtex: '@inproceedings{Schlemmer_Grunzke_Gesing_Krüger_Birkenheuer_Müller-Pfefferkorn_Kohlbacher_2012,
title={Generic User Management for Science Gateways via Virtual Organizations},
booktitle={Proc. EGI Technical Forum}, author={Schlemmer, Tobias and Grunzke,
Richard and Gesing, Sandra and Krüger, Jens and Birkenheuer, Georg and Müller-Pfefferkorn,
Ralph and Kohlbacher, Oliver}, year={2012} }'
chicago: Schlemmer, Tobias, Richard Grunzke, Sandra Gesing, Jens Krüger, Georg Birkenheuer,
Ralph Müller-Pfefferkorn, and Oliver Kohlbacher. “Generic User Management for
Science Gateways via Virtual Organizations.” In Proc. EGI Technical Forum,
2012.
ieee: T. Schlemmer et al., “Generic User Management for Science Gateways
via Virtual Organizations,” in Proc. EGI Technical Forum, 2012.
mla: Schlemmer, Tobias, et al. “Generic User Management for Science Gateways via
Virtual Organizations.” Proc. EGI Technical Forum, 2012.
short: 'T. Schlemmer, R. Grunzke, S. Gesing, J. Krüger, G. Birkenheuer, R. Müller-Pfefferkorn,
O. Kohlbacher, in: Proc. EGI Technical Forum, 2012.'
date_created: 2018-03-29T15:00:48Z
date_updated: 2022-01-06T06:54:42Z
department:
- _id: '27'
publication: Proc. EGI Technical Forum
status: public
title: Generic User Management for Science Gateways via Virtual Organizations
type: conference
user_id: '24135'
year: '2012'
...
---
_id: '609'
abstract:
- lang: eng
text: Today's design and operation principles and methods do not scale well with
future reconfigurable computing systems due to an increased complexity in system
architectures and applications, run-time dynamics and corresponding requirements.
Hence, novel design and operation principles and methods are needed that possibly
break drastically with the static ones we have built into our systems and the
fixed abstraction layers we have cherished over the last decades. Thus, we propose
a HW/SW platform that collects and maintains information about its state and progress
which enables the system to reason about its behavior (self-awareness) and utilizes
its knowledge to effectively and autonomously adapt its behavior to changing requirements
(self-expression).To enable self-awareness, our compute nodes collect information
using a variety of sensors, i.e. performance counters and thermal diodes, and
use internal self-awareness models that process these information. For self-awareness,
on-line learning is crucial such that the node learns and continuously updates
its models at run-time to react to changing conditions. To enable self-expression,
we break with the classic design-time abstraction layers of hardware, operating
system and software. In contrast, our system is able to vertically migrate functionalities
between the layers at run-time to exploit trade-offs between abstraction and optimization.This
paper presents a heterogeneous multi-core architecture, that enables self-awareness
and self-expression, an operating system for our proposed hardware/software platform
and a novel self-expression method.
author:
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Andreas
full_name: Agne, Andreas
last_name: Agne
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Happe M, Agne A, Plessl C, Platzner M. Hardware/Software Platform for Self-aware
Compute Nodes. In: Proceedings of the Workshop on Self-Awareness in Reconfigurable
Computing Systems (SRCS). ; 2012:8-9.'
apa: Happe, M., Agne, A., Plessl, C., & Platzner, M. (2012). Hardware/Software
Platform for Self-aware Compute Nodes. Proceedings of the Workshop on Self-Awareness
in Reconfigurable Computing Systems (SRCS), 8–9.
bibtex: '@inproceedings{Happe_Agne_Plessl_Platzner_2012, title={Hardware/Software
Platform for Self-aware Compute Nodes}, booktitle={Proceedings of the Workshop
on Self-Awareness in Reconfigurable Computing Systems (SRCS)}, author={Happe,
Markus and Agne, Andreas and Plessl, Christian and Platzner, Marco}, year={2012},
pages={8–9} }'
chicago: Happe, Markus, Andreas Agne, Christian Plessl, and Marco Platzner. “Hardware/Software
Platform for Self-Aware Compute Nodes.” In Proceedings of the Workshop on Self-Awareness
in Reconfigurable Computing Systems (SRCS), 8–9, 2012.
ieee: M. Happe, A. Agne, C. Plessl, and M. Platzner, “Hardware/Software Platform
for Self-aware Compute Nodes,” in Proceedings of the Workshop on Self-Awareness
in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
mla: Happe, Markus, et al. “Hardware/Software Platform for Self-Aware Compute Nodes.”
Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems
(SRCS), 2012, pp. 8–9.
short: 'M. Happe, A. Agne, C. Plessl, M. Platzner, in: Proceedings of the Workshop
on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.'
date_created: 2017-10-17T12:42:50Z
date_updated: 2023-09-26T13:41:36Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-15T08:14:17Z
date_updated: 2018-03-15T08:14:17Z
file_id: '1249'
file_name: 609-happe12_fpl_awareness.pdf
file_size: 146789
relation: main_file
success: 1
file_date_updated: 2018-03-15T08:14:17Z
has_accepted_license: '1'
language:
- iso: eng
page: 8-9
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing
Systems (SRCS)
quality_controlled: '1'
status: public
title: Hardware/Software Platform for Self-aware Compute Nodes
type: conference
user_id: '15278'
year: '2012'
...
---
_id: '2105'
author:
- first_name: Giuseppe
full_name: Congiu, Giuseppe
last_name: Congiu
- first_name: Matthias
full_name: Grawinkel, Matthias
last_name: Grawinkel
- first_name: Sai
full_name: Narasimhamurthy, Sai
last_name: Narasimhamurthy
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Congiu G, Grawinkel M, Narasimhamurthy S, Brinkmann A. One Phase Commit: A
Low Overhead Atomic Commitment Protocol for Scalable Metadata Services. In: Proc.
Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS).
IEEE; 2012:16-24. doi:10.1109/ClusterW.2012.16'
apa: 'Congiu, G., Grawinkel, M., Narasimhamurthy, S., & Brinkmann, A. (2012).
One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata
Services. In Proc. Workshop on Interfaces and Architectures for Scientific
Data Storage (IASDS) (pp. 16–24). IEEE. https://doi.org/10.1109/ClusterW.2012.16'
bibtex: '@inproceedings{Congiu_Grawinkel_Narasimhamurthy_Brinkmann_2012, title={One
Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata
Services}, DOI={10.1109/ClusterW.2012.16},
booktitle={Proc. Workshop on Interfaces and Architectures for Scientific Data
Storage (IASDS)}, publisher={IEEE}, author={Congiu, Giuseppe and Grawinkel, Matthias
and Narasimhamurthy, Sai and Brinkmann, André}, year={2012}, pages={16–24} }'
chicago: 'Congiu, Giuseppe, Matthias Grawinkel, Sai Narasimhamurthy, and André Brinkmann.
“One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata
Services.” In Proc. Workshop on Interfaces and Architectures for Scientific
Data Storage (IASDS), 16–24. IEEE, 2012. https://doi.org/10.1109/ClusterW.2012.16.'
ieee: 'G. Congiu, M. Grawinkel, S. Narasimhamurthy, and A. Brinkmann, “One Phase
Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services,”
in Proc. Workshop on Interfaces and Architectures for Scientific Data Storage
(IASDS), 2012, pp. 16–24.'
mla: 'Congiu, Giuseppe, et al. “One Phase Commit: A Low Overhead Atomic Commitment
Protocol for Scalable Metadata Services.” Proc. Workshop on Interfaces and
Architectures for Scientific Data Storage (IASDS), IEEE, 2012, pp. 16–24,
doi:10.1109/ClusterW.2012.16.'
short: 'G. Congiu, M. Grawinkel, S. Narasimhamurthy, A. Brinkmann, in: Proc. Workshop
on Interfaces and Architectures for Scientific Data Storage (IASDS), IEEE, 2012,
pp. 16–24.'
date_created: 2018-03-29T15:02:15Z
date_updated: 2022-01-06T06:54:42Z
department:
- _id: '27'
doi: 10.1109/ClusterW.2012.16
page: 16-24
publication: Proc. Workshop on Interfaces and Architectures for Scientific Data Storage
(IASDS)
publisher: IEEE
status: public
title: 'One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata
Services'
type: conference
user_id: '24135'
year: '2012'
...
---
_id: '591'
abstract:
- lang: eng
text: One major obstacle for a wide spread FPGA usage in general-purpose computing
is the development tool flow that requires much higher effort than for pure software
solutions. Convey Computer promises a solution to this problem for their HC-1
platform, where the FPGAs are configured to run as a vector processor and the software
source code can be annotated with pragmas that guide an automated vectorization
process. We investigate this approach for a stereo matching algorithm that has
abundant parallelism and a number of different computational patterns. We note
that for this case study the automated vectorization in its current state doesn’t
hold its productivity promise. However, we also show that using the Vector Personality
can yield a significant speedups compared to CPU implementations in two of three
investigated phases of the algorithm. Those speedups don’t match custom FPGA implementations,
but can come with much reduced development effort.
author:
- first_name: Tobias
full_name: Kenter, Tobias
id: '3145'
last_name: Kenter
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Henning
full_name: Schmitz, Henning
last_name: Schmitz
citation:
ama: 'Kenter T, Plessl C, Schmitz H. Pragma based parallelization - Trading hardware
efficiency for ease of use? In: Proceedings of the International Conference
on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8. doi:10.1109/ReConFig.2012.6416773'
apa: Kenter, T., Plessl, C., & Schmitz, H. (2012). Pragma based parallelization
- Trading hardware efficiency for ease of use? Proceedings of the International
Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2012.6416773
bibtex: '@inproceedings{Kenter_Plessl_Schmitz_2012, title={Pragma based parallelization
- Trading hardware efficiency for ease of use?}, DOI={10.1109/ReConFig.2012.6416773},
booktitle={Proceedings of the International Conference on ReConFigurable Computing
and FPGAs (ReConFig)}, publisher={IEEE}, author={Kenter, Tobias and Plessl, Christian
and Schmitz, Henning}, year={2012}, pages={1–8} }'
chicago: Kenter, Tobias, Christian Plessl, and Henning Schmitz. “Pragma Based Parallelization
- Trading Hardware Efficiency for Ease of Use?” In Proceedings of the International
Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2012.
https://doi.org/10.1109/ReConFig.2012.6416773.
ieee: 'T. Kenter, C. Plessl, and H. Schmitz, “Pragma based parallelization - Trading
hardware efficiency for ease of use?,” in Proceedings of the International
Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8,
doi: 10.1109/ReConFig.2012.6416773.'
mla: Kenter, Tobias, et al. “Pragma Based Parallelization - Trading Hardware Efficiency
for Ease of Use?” Proceedings of the International Conference on ReConFigurable
Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416773.
short: 'T. Kenter, C. Plessl, H. Schmitz, in: Proceedings of the International Conference
on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.'
date_created: 2017-10-17T12:42:47Z
date_updated: 2023-09-26T13:41:08Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/ReConFig.2012.6416773
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-15T08:33:18Z
date_updated: 2018-03-15T08:33:18Z
file_id: '1257'
file_name: 591-ReConFig2012Kenter_Schmitz_Plessl.pdf
file_size: 371235
relation: main_file
success: 1
file_date_updated: 2018-03-15T08:33:18Z
has_accepted_license: '1'
language:
- iso: eng
page: 1-8
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: Proceedings of the International Conference on ReConFigurable Computing
and FPGAs (ReConFig)
publisher: IEEE
quality_controlled: '1'
status: public
title: Pragma based parallelization - Trading hardware efficiency for ease of use?
type: conference
user_id: '15278'
year: '2012'
...
---
_id: '2180'
author:
- first_name: Tobias
full_name: Beisel, Tobias
last_name: Beisel
- first_name: Tobias
full_name: Wiersema, Tobias
id: '3118'
last_name: Wiersema
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Beisel T, Wiersema T, Plessl C, Brinkmann A. Programming and Scheduling Model
for Supporting Heterogeneous Accelerators in Linux. In: Proc. Workshop on Computer
Architecture and Operating System Co-Design (CAOS). ; 2012.'
apa: Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2012). Programming
and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. Proc.
Workshop on Computer Architecture and Operating System Co-Design (CAOS).
bibtex: '@inproceedings{Beisel_Wiersema_Plessl_Brinkmann_2012, title={Programming
and Scheduling Model for Supporting Heterogeneous Accelerators in Linux}, booktitle={Proc.
Workshop on Computer Architecture and Operating System Co-design (CAOS)}, author={Beisel,
Tobias and Wiersema, Tobias and Plessl, Christian and Brinkmann, André}, year={2012}
}'
chicago: Beisel, Tobias, Tobias Wiersema, Christian Plessl, and André Brinkmann.
“Programming and Scheduling Model for Supporting Heterogeneous Accelerators in
Linux.” In Proc. Workshop on Computer Architecture and Operating System Co-Design
(CAOS), 2012.
ieee: T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Programming and Scheduling
Model for Supporting Heterogeneous Accelerators in Linux,” 2012.
mla: Beisel, Tobias, et al. “Programming and Scheduling Model for Supporting Heterogeneous
Accelerators in Linux.” Proc. Workshop on Computer Architecture and Operating
System Co-Design (CAOS), 2012.
short: 'T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Workshop on Computer
Architecture and Operating System Co-Design (CAOS), 2012.'
date_created: 2018-04-03T09:18:33Z
date_updated: 2023-09-26T13:40:17Z
department:
- _id: '27'
- _id: '518'
- _id: '78'
keyword:
- funding-enhance
language:
- iso: eng
project:
- _id: '30'
grant_number: 01|H11004A
name: Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling
Models
publication: Proc. Workshop on Computer Architecture and Operating System Co-design
(CAOS)
quality_controlled: '1'
status: public
title: Programming and Scheduling Model for Supporting Heterogeneous Accelerators
in Linux
type: conference
user_id: '15278'
year: '2012'
...
---
_id: '2171'
author:
- first_name: Sandra
full_name: Gesing, Sandra
last_name: Gesing
- first_name: Sonja
full_name: Herres-Pawlis, Sonja
last_name: Herres-Pawlis
- first_name: Georg
full_name: Birkenheuer, Georg
last_name: Birkenheuer
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Richard
full_name: Grunzke, Richard
last_name: Grunzke
- first_name: Peter
full_name: Kacsuk, Peter
last_name: Kacsuk
- first_name: Oliver
full_name: Kohlbacher, Oliver
last_name: Kohlbacher
- first_name: Miklos
full_name: Kozlovszky, Miklos
last_name: Kozlovszky
- first_name: Jens
full_name: Krüger, Jens
last_name: Krüger
- first_name: Ralph
full_name: Müller-Pfefferkorn, Ralph
last_name: Müller-Pfefferkorn
- first_name: Patrick
full_name: Schäfer, Patrick
last_name: Schäfer
- first_name: Thomas
full_name: Steinke, Thomas
last_name: Steinke
citation:
ama: 'Gesing S, Herres-Pawlis S, Birkenheuer G, et al. The MoSGrid Community From
National to International Scale. In: Proc. EGI Community Forum. ; 2012.'
apa: Gesing, S., Herres-Pawlis, S., Birkenheuer, G., Brinkmann, A., Grunzke, R.,
Kacsuk, P., … Steinke, T. (2012). The MoSGrid Community From National to International
Scale. In Proc. EGI Community Forum.
bibtex: '@inproceedings{Gesing_Herres-Pawlis_Birkenheuer_Brinkmann_Grunzke_Kacsuk_Kohlbacher_Kozlovszky_Krüger_Müller-Pfefferkorn_et
al._2012, title={The MoSGrid Community From National to International Scale},
booktitle={Proc. EGI Community Forum}, author={Gesing, Sandra and Herres-Pawlis,
Sonja and Birkenheuer, Georg and Brinkmann, André and Grunzke, Richard and Kacsuk,
Peter and Kohlbacher, Oliver and Kozlovszky, Miklos and Krüger, Jens and Müller-Pfefferkorn,
Ralph and et al.}, year={2012} }'
chicago: Gesing, Sandra, Sonja Herres-Pawlis, Georg Birkenheuer, André Brinkmann,
Richard Grunzke, Peter Kacsuk, Oliver Kohlbacher, et al. “The MoSGrid Community
From National to International Scale.” In Proc. EGI Community Forum, 2012.
ieee: S. Gesing et al., “The MoSGrid Community From National to International
Scale,” in Proc. EGI Community Forum, 2012.
mla: Gesing, Sandra, et al. “The MoSGrid Community From National to International
Scale.” Proc. EGI Community Forum, 2012.
short: 'S. Gesing, S. Herres-Pawlis, G. Birkenheuer, A. Brinkmann, R. Grunzke, P.
Kacsuk, O. Kohlbacher, M. Kozlovszky, J. Krüger, R. Müller-Pfefferkorn, P. Schäfer,
T. Steinke, in: Proc. EGI Community Forum, 2012.'
date_created: 2018-04-03T09:01:19Z
date_updated: 2022-01-06T06:55:11Z
department:
- _id: '27'
publication: Proc. EGI Community Forum
status: public
title: The MoSGrid Community From National to International Scale
type: conference
user_id: '24135'
year: '2012'
...
---
_id: '2101'
author:
- first_name: Matthias
full_name: Grawinkel, Matthias
last_name: Grawinkel
- first_name: Tim
full_name: Süß, Tim
last_name: Süß
- first_name: Georg
full_name: Best, Georg
last_name: Best
- first_name: Ivan
full_name: Popov, Ivan
last_name: Popov
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Grawinkel M, Süß T, Best G, Popov I, Brinkmann A. Towards Dynamic Scripted
pNFS Layouts. In: Proc. Parallel Data Storage Workshop (PDSW). IEEE; 2012:13-17.
doi:10.1109/SC.Companion.2012.13'
apa: Grawinkel, M., Süß, T., Best, G., Popov, I., & Brinkmann, A. (2012). Towards
Dynamic Scripted pNFS Layouts. In Proc. Parallel Data Storage Workshop (PDSW)
(pp. 13–17). IEEE. https://doi.org/10.1109/SC.Companion.2012.13
bibtex: '@inproceedings{Grawinkel_Süß_Best_Popov_Brinkmann_2012, title={Towards
Dynamic Scripted pNFS Layouts}, DOI={10.1109/SC.Companion.2012.13},
booktitle={Proc. Parallel Data Storage Workshop (PDSW)}, publisher={IEEE}, author={Grawinkel,
Matthias and Süß, Tim and Best, Georg and Popov, Ivan and Brinkmann, André}, year={2012},
pages={13–17} }'
chicago: Grawinkel, Matthias, Tim Süß, Georg Best, Ivan Popov, and André Brinkmann.
“Towards Dynamic Scripted PNFS Layouts.” In Proc. Parallel Data Storage Workshop
(PDSW), 13–17. IEEE, 2012. https://doi.org/10.1109/SC.Companion.2012.13.
ieee: M. Grawinkel, T. Süß, G. Best, I. Popov, and A. Brinkmann, “Towards Dynamic
Scripted pNFS Layouts,” in Proc. Parallel Data Storage Workshop (PDSW),
2012, pp. 13–17.
mla: Grawinkel, Matthias, et al. “Towards Dynamic Scripted PNFS Layouts.” Proc.
Parallel Data Storage Workshop (PDSW), IEEE, 2012, pp. 13–17, doi:10.1109/SC.Companion.2012.13.
short: 'M. Grawinkel, T. Süß, G. Best, I. Popov, A. Brinkmann, in: Proc. Parallel
Data Storage Workshop (PDSW), IEEE, 2012, pp. 13–17.'
date_created: 2018-03-29T14:44:24Z
date_updated: 2022-01-06T06:54:42Z
department:
- _id: '27'
doi: 10.1109/SC.Companion.2012.13
page: 13-17
publication: Proc. Parallel Data Storage Workshop (PDSW)
publisher: IEEE
status: public
title: Towards Dynamic Scripted pNFS Layouts
type: conference
user_id: '24135'
year: '2012'
...
---
_id: '567'
abstract:
- lang: eng
text: Heterogeneous machines are gaining momentum in the High Performance Computing
field, due to the theoretical speedups and power consumption. In practice, while
some applications meet the performance expectations, heterogeneous architectures
still require a tremendous effort from the application developers. This work presents
a code generation method to port codes into heterogeneous platforms, based on
transformations of the control flow into function calls. The results show that
the cost of the function-call mechanism is affordable for the tested HPC kernels.
The complete toolchain, based on the LLVM compiler infrastructure, is fully automated
once the sequential specification is provided.
author:
- first_name: Pablo
full_name: Barrio, Pablo
last_name: Barrio
- first_name: Carlos
full_name: Carreras, Carlos
last_name: Carreras
- first_name: Roberto
full_name: Sierra, Roberto
last_name: Sierra
- first_name: Tobias
full_name: Kenter, Tobias
id: '3145'
last_name: Kenter
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Barrio P, Carreras C, Sierra R, Kenter T, Plessl C. Turning control flow graphs
into function calls: Code generation for heterogeneous architectures. In: Proceedings
of the International Conference on High Performance Computing and Simulation (HPCS).
IEEE; 2012:559-565. doi:10.1109/HPCSim.2012.6266973'
apa: 'Barrio, P., Carreras, C., Sierra, R., Kenter, T., & Plessl, C. (2012).
Turning control flow graphs into function calls: Code generation for heterogeneous
architectures. Proceedings of the International Conference on High Performance
Computing and Simulation (HPCS), 559–565. https://doi.org/10.1109/HPCSim.2012.6266973'
bibtex: '@inproceedings{Barrio_Carreras_Sierra_Kenter_Plessl_2012, title={Turning
control flow graphs into function calls: Code generation for heterogeneous architectures},
DOI={10.1109/HPCSim.2012.6266973},
booktitle={Proceedings of the International Conference on High Performance Computing
and Simulation (HPCS)}, publisher={IEEE}, author={Barrio, Pablo and Carreras,
Carlos and Sierra, Roberto and Kenter, Tobias and Plessl, Christian}, year={2012},
pages={559–565} }'
chicago: 'Barrio, Pablo, Carlos Carreras, Roberto Sierra, Tobias Kenter, and Christian
Plessl. “Turning Control Flow Graphs into Function Calls: Code Generation for
Heterogeneous Architectures.” In Proceedings of the International Conference
on High Performance Computing and Simulation (HPCS), 559–65. IEEE, 2012. https://doi.org/10.1109/HPCSim.2012.6266973.'
ieee: 'P. Barrio, C. Carreras, R. Sierra, T. Kenter, and C. Plessl, “Turning control
flow graphs into function calls: Code generation for heterogeneous architectures,”
in Proceedings of the International Conference on High Performance Computing
and Simulation (HPCS), 2012, pp. 559–565, doi: 10.1109/HPCSim.2012.6266973.'
mla: 'Barrio, Pablo, et al. “Turning Control Flow Graphs into Function Calls: Code
Generation for Heterogeneous Architectures.” Proceedings of the International
Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012,
pp. 559–65, doi:10.1109/HPCSim.2012.6266973.'
short: 'P. Barrio, C. Carreras, R. Sierra, T. Kenter, C. Plessl, in: Proceedings
of the International Conference on High Performance Computing and Simulation (HPCS),
IEEE, 2012, pp. 559–565.'
date_created: 2017-10-17T12:42:42Z
date_updated: 2023-09-26T13:42:54Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/HPCSim.2012.6266973
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-15T10:20:24Z
date_updated: 2018-03-15T10:20:24Z
file_id: '1275'
file_name: 567-ba-ca-12a.pdf
file_size: 288508
relation: main_file
success: 1
file_date_updated: 2018-03-15T10:20:24Z
has_accepted_license: '1'
language:
- iso: eng
page: 559-565
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
publication: Proceedings of the International Conference on High Performance Computing
and Simulation (HPCS)
publisher: IEEE
quality_controlled: '1'
status: public
title: 'Turning control flow graphs into function calls: Code generation for heterogeneous
architectures'
type: conference
user_id: '15278'
year: '2012'
...
---
_id: '2199'
author:
- first_name: Sandra
full_name: Gesing, Sandra
last_name: Gesing
- first_name: Peter
full_name: Kacsuk, Peter
last_name: Kacsuk
- first_name: Miklos
full_name: Kozlovszky, Miklos
last_name: Kozlovszky
- first_name: Georg
full_name: Birkenheuer, Georg
last_name: Birkenheuer
- first_name: Dirk
full_name: Blunk, Dirk
last_name: Blunk
- first_name: Sebastian
full_name: Breuers, Sebastian
last_name: Breuers
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Gregor
full_name: Fels, Gregor
last_name: Fels
- first_name: Richard
full_name: Grunzke, Richard
last_name: Grunzke
- first_name: Sonja
full_name: Herres-Pawlis, Sonja
last_name: Herres-Pawlis
- first_name: Jens
full_name: Krüger, Jens
last_name: Krüger
- first_name: Lars
full_name: Packschies, Lars
last_name: Packschies
- first_name: Ralph
full_name: Müller-Pfefferkorn, Ralph
last_name: Müller-Pfefferkorn
- first_name: Patrick
full_name: Schäfer, Patrick
last_name: Schäfer
- first_name: Thomas
full_name: Steinke, Thomas
last_name: Steinke
- first_name: Anna
full_name: Szikszay Fabri, Anna
last_name: Szikszay Fabri
- first_name: Klaus-Dieter
full_name: Warzecha, Klaus-Dieter
last_name: Warzecha
- first_name: Martin
full_name: Wewior, Martin
last_name: Wewior
- first_name: Oliver
full_name: Kohlbacher, Oliver
last_name: Kohlbacher
citation:
ama: 'Gesing S, Kacsuk P, Kozlovszky M, et al. A Science Gateway for Molecular Simulations.
In: Proc. EGI User Forum. ; 2011:94-95.'
apa: Gesing, S., Kacsuk, P., Kozlovszky, M., Birkenheuer, G., Blunk, D., Breuers,
S., … Kohlbacher, O. (2011). A Science Gateway for Molecular Simulations. In Proc.
EGI User Forum (pp. 94–95).
bibtex: '@inproceedings{Gesing_Kacsuk_Kozlovszky_Birkenheuer_Blunk_Breuers_Brinkmann_Fels_Grunzke_Herres-Pawlis_et
al._2011, title={A Science Gateway for Molecular Simulations}, booktitle={Proc.
EGI User Forum}, author={Gesing, Sandra and Kacsuk, Peter and Kozlovszky, Miklos
and Birkenheuer, Georg and Blunk, Dirk and Breuers, Sebastian and Brinkmann, André
and Fels, Gregor and Grunzke, Richard and Herres-Pawlis, Sonja and et al.}, year={2011},
pages={94–95} }'
chicago: Gesing, Sandra, Peter Kacsuk, Miklos Kozlovszky, Georg Birkenheuer, Dirk
Blunk, Sebastian Breuers, André Brinkmann, et al. “A Science Gateway for Molecular
Simulations.” In Proc. EGI User Forum, 94–95, 2011.
ieee: S. Gesing et al., “A Science Gateway for Molecular Simulations,” in
Proc. EGI User Forum, 2011, pp. 94–95.
mla: Gesing, Sandra, et al. “A Science Gateway for Molecular Simulations.” Proc.
EGI User Forum, 2011, pp. 94–95.
short: 'S. Gesing, P. Kacsuk, M. Kozlovszky, G. Birkenheuer, D. Blunk, S. Breuers,
A. Brinkmann, G. Fels, R. Grunzke, S. Herres-Pawlis, J. Krüger, L. Packschies,
R. Müller-Pfefferkorn, P. Schäfer, T. Steinke, A. Szikszay Fabri, K.-D. Warzecha,
M. Wewior, O. Kohlbacher, in: Proc. EGI User Forum, 2011, pp. 94–95.'
date_created: 2018-04-03T15:07:11Z
date_updated: 2022-01-06T06:55:22Z
department:
- _id: '27'
page: 94-95
publication: Proc. EGI User Forum
status: public
title: A Science Gateway for Molecular Simulations
type: conference
user_id: '24135'
year: '2011'
...
---
_id: '1972'
abstract:
- lang: eng
text: We present a multi-agent system on top of the IaaS layer consisting of a scheduler
agent and multiple worker agents. Each job is controlled by an autonomous worker
agent, which is equipped with application specific knowledge (e.g., performance
functions) allowing it to estimate the type and number of necessary resources.
During runtime, the worker agent monitors the job and adapts its resources to
ensure the specified quality of service - even in noisy clouds where the job instances
are influenced by other jobs. All worker agents interact with the scheduler agent,
which takes care of limited resources and does a cost-aware scheduling by assigning
jobs to times with low energy costs. The whole architecture is self-optimizing
and able to use public or private clouds.
author:
- first_name: Oliver
full_name: Niehörster, Oliver
last_name: Niehörster
- first_name: Axel
full_name: Keller, Axel
id: '15274'
last_name: Keller
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Niehörster O, Keller A, Brinkmann A. An Energy-Aware SaaS Stack. In: Proc.
Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer
and Telecommunication Systems (MASCOTS). ; 2011. doi:10.1109/MASCOTS.2011.52'
apa: Niehörster, O., Keller, A., & Brinkmann, A. (2011). An Energy-Aware SaaS
Stack. In Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and
Simulation of Computer and Telecommunication Systems (MASCOTS). https://doi.org/10.1109/MASCOTS.2011.52
bibtex: '@inproceedings{Niehörster_Keller_Brinkmann_2011, title={An Energy-Aware
SaaS Stack}, DOI={10.1109/MASCOTS.2011.52},
booktitle={Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and
Simulation of Computer and Telecommunication Systems (MASCOTS)}, author={Niehörster,
Oliver and Keller, Axel and Brinkmann, André}, year={2011} }'
chicago: Niehörster, Oliver, Axel Keller, and André Brinkmann. “An Energy-Aware
SaaS Stack.” In Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis
and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011.
https://doi.org/10.1109/MASCOTS.2011.52.
ieee: O. Niehörster, A. Keller, and A. Brinkmann, “An Energy-Aware SaaS Stack,”
in Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation
of Computer and Telecommunication Systems (MASCOTS), 2011.
mla: Niehörster, Oliver, et al. “An Energy-Aware SaaS Stack.” Proc. Int. Meeting
of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication
Systems (MASCOTS), 2011, doi:10.1109/MASCOTS.2011.52.
short: 'O. Niehörster, A. Keller, A. Brinkmann, in: Proc. Int. Meeting of the IEEE
Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication
Systems (MASCOTS), 2011.'
date_created: 2018-03-29T11:23:22Z
date_updated: 2022-01-06T06:54:10Z
department:
- _id: '27'
doi: 10.1109/MASCOTS.2011.52
language:
- iso: eng
publication: Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation
of Computer and Telecommunication Systems (MASCOTS)
publication_status: published
status: public
title: An Energy-Aware SaaS Stack
type: conference
user_id: '15274'
year: '2011'
...
---
_id: '2190'
author:
- first_name: Oliver
full_name: Niehörster, Oliver
last_name: Niehörster
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Niehörster O, Brinkmann A. Autonomic Resource Management Handling Delayed
Configuration Effects. In: Proc. IEEE Int. Conf. on Cloud Computing Technology
and Science (CloudCom). Washington DC, USA: IEEE Computer Society; 2011:138-145.
doi:10.1109/CloudCom.2011.28'
apa: 'Niehörster, O., & Brinkmann, A. (2011). Autonomic Resource Management
Handling Delayed Configuration Effects. In Proc. IEEE Int. Conf. on Cloud Computing
Technology and Science (CloudCom) (pp. 138–145). Washington DC, USA: IEEE
Computer Society. https://doi.org/10.1109/CloudCom.2011.28'
bibtex: '@inproceedings{Niehörster_Brinkmann_2011, place={Washington DC, USA}, title={Autonomic
Resource Management Handling Delayed Configuration Effects}, DOI={10.1109/CloudCom.2011.28},
booktitle={Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom)},
publisher={IEEE Computer Society}, author={Niehörster, Oliver and Brinkmann, André},
year={2011}, pages={138–145} }'
chicago: 'Niehörster, Oliver, and André Brinkmann. “Autonomic Resource Management
Handling Delayed Configuration Effects.” In Proc. IEEE Int. Conf. on Cloud
Computing Technology and Science (CloudCom), 138–45. Washington DC, USA: IEEE
Computer Society, 2011. https://doi.org/10.1109/CloudCom.2011.28.'
ieee: O. Niehörster and A. Brinkmann, “Autonomic Resource Management Handling Delayed
Configuration Effects,” in Proc. IEEE Int. Conf. on Cloud Computing Technology
and Science (CloudCom), 2011, pp. 138–145.
mla: Niehörster, Oliver, and André Brinkmann. “Autonomic Resource Management Handling
Delayed Configuration Effects.” Proc. IEEE Int. Conf. on Cloud Computing Technology
and Science (CloudCom), IEEE Computer Society, 2011, pp. 138–45, doi:10.1109/CloudCom.2011.28.
short: 'O. Niehörster, A. Brinkmann, in: Proc. IEEE Int. Conf. on Cloud Computing
Technology and Science (CloudCom), IEEE Computer Society, Washington DC, USA,
2011, pp. 138–145.'
date_created: 2018-04-03T14:33:50Z
date_updated: 2022-01-06T06:55:19Z
department:
- _id: '27'
doi: 10.1109/CloudCom.2011.28
page: 138-145
place: Washington DC, USA
publication: Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom)
publisher: IEEE Computer Society
status: public
title: Autonomic Resource Management Handling Delayed Configuration Effects
type: conference
user_id: '24135'
year: '2011'
...
---
_id: '2203'
author:
- first_name: Oliver
full_name: Niehörster, Oliver
last_name: Niehörster
- first_name: Jens
full_name: Simon, Jens
id: '15273'
last_name: Simon
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Alexaner
full_name: Krieger, Alexaner
last_name: Krieger
citation:
ama: 'Niehörster O, Simon J, Brinkmann A, Krieger A. Autonomic Resource Management
with Support Vector Machines. In: Proc. IEEE/ACM Int. Conf. on Grid Computing
(GRID). Washington, DC, USA: IEEE Computer Society; 2011:157-164. doi:10.1109/Grid.2011.28'
apa: 'Niehörster, O., Simon, J., Brinkmann, A., & Krieger, A. (2011). Autonomic
Resource Management with Support Vector Machines. In Proc. IEEE/ACM Int. Conf.
on Grid Computing (GRID) (pp. 157–164). Washington, DC, USA: IEEE Computer
Society. https://doi.org/10.1109/Grid.2011.28'
bibtex: '@inproceedings{Niehörster_Simon_Brinkmann_Krieger_2011, place={Washington,
DC, USA}, title={Autonomic Resource Management with Support Vector Machines},
DOI={10.1109/Grid.2011.28},
booktitle={Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID)}, publisher={IEEE
Computer Society}, author={Niehörster, Oliver and Simon, Jens and Brinkmann, André
and Krieger, Alexaner}, year={2011}, pages={157–164} }'
chicago: 'Niehörster, Oliver, Jens Simon, André Brinkmann, and Alexaner Krieger.
“Autonomic Resource Management with Support Vector Machines.” In Proc. IEEE/ACM
Int. Conf. on Grid Computing (GRID), 157–64. Washington, DC, USA: IEEE Computer
Society, 2011. https://doi.org/10.1109/Grid.2011.28.'
ieee: O. Niehörster, J. Simon, A. Brinkmann, and A. Krieger, “Autonomic Resource
Management with Support Vector Machines,” in Proc. IEEE/ACM Int. Conf. on Grid
Computing (GRID), 2011, pp. 157–164.
mla: Niehörster, Oliver, et al. “Autonomic Resource Management with Support Vector
Machines.” Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID), IEEE Computer
Society, 2011, pp. 157–64, doi:10.1109/Grid.2011.28.
short: 'O. Niehörster, J. Simon, A. Brinkmann, A. Krieger, in: Proc. IEEE/ACM Int.
Conf. on Grid Computing (GRID), IEEE Computer Society, Washington, DC, USA, 2011,
pp. 157–164.'
date_created: 2018-04-03T15:13:42Z
date_updated: 2022-01-06T06:55:23Z
department:
- _id: '27'
doi: 10.1109/Grid.2011.28
page: 157-164
place: Washington, DC, USA
publication: Proc. IEEE/ACM Int. Conf. on Grid Computing (GRID)
publication_identifier:
isbn:
- 978-0-7695-4572-1
publisher: IEEE Computer Society
status: public
title: Autonomic Resource Management with Support Vector Machines
type: conference
user_id: '24135'
year: '2011'
...
---
_id: '2193'
author:
- first_name: Tobias
full_name: Beisel, Tobias
last_name: Beisel
- first_name: Tobias
full_name: Wiersema, Tobias
id: '3118'
last_name: Wiersema
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Beisel T, Wiersema T, Plessl C, Brinkmann A. Cooperative multitasking for
heterogeneous accelerators in the Linux Completely Fair Scheduler. In: Proc.
Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP).
IEEE Computer Society; 2011:223-226. doi:10.1109/ASAP.2011.6043273'
apa: Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2011). Cooperative
multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler.
Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors
(ASAP), 223–226. https://doi.org/10.1109/ASAP.2011.6043273
bibtex: '@inproceedings{Beisel_Wiersema_Plessl_Brinkmann_2011, title={Cooperative
multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler},
DOI={10.1109/ASAP.2011.6043273},
booktitle={Proc. Int. Conf. on Application-Specific Systems, Architectures, and
Processors (ASAP)}, publisher={IEEE Computer Society}, author={Beisel, Tobias
and Wiersema, Tobias and Plessl, Christian and Brinkmann, André}, year={2011},
pages={223–226} }'
chicago: Beisel, Tobias, Tobias Wiersema, Christian Plessl, and André Brinkmann.
“Cooperative Multitasking for Heterogeneous Accelerators in the Linux Completely
Fair Scheduler.” In Proc. Int. Conf. on Application-Specific Systems, Architectures,
and Processors (ASAP), 223–26. IEEE Computer Society, 2011. https://doi.org/10.1109/ASAP.2011.6043273.
ieee: 'T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Cooperative multitasking
for heterogeneous accelerators in the Linux Completely Fair Scheduler,” in Proc.
Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP),
2011, pp. 223–226, doi: 10.1109/ASAP.2011.6043273.'
mla: Beisel, Tobias, et al. “Cooperative Multitasking for Heterogeneous Accelerators
in the Linux Completely Fair Scheduler.” Proc. Int. Conf. on Application-Specific
Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011,
pp. 223–26, doi:10.1109/ASAP.2011.6043273.
short: 'T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Int. Conf. on
Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer
Society, 2011, pp. 223–226.'
date_created: 2018-04-03T14:37:14Z
date_updated: 2023-09-26T13:43:48Z
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/ASAP.2011.6043273
language:
- iso: eng
page: 223-226
project:
- _id: '30'
grant_number: 01|H11004A
name: Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling
Models
publication: Proc. Int. Conf. on Application-Specific Systems, Architectures, and
Processors (ASAP)
publisher: IEEE Computer Society
quality_controlled: '1'
status: public
title: Cooperative multitasking for heterogeneous accelerators in the Linux Completely
Fair Scheduler
type: conference
user_id: '15278'
year: '2011'
...
---
_id: '2191'
author:
- first_name: Tobias
full_name: Kenter, Tobias
id: '3145'
last_name: Kenter
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Michael
full_name: Kauschke, Michael
last_name: Kauschke
citation:
ama: 'Kenter T, Plessl C, Platzner M, Kauschke M. Estimation and Partitioning for
CPU-Accelerator Architectures. In: Intel European Research and Innovation Conference.
; 2011.'
apa: Kenter, T., Plessl, C., Platzner, M., & Kauschke, M. (2011). Estimation
and Partitioning for CPU-Accelerator Architectures. In Intel European Research
and Innovation Conference.
bibtex: '@inproceedings{Kenter_Plessl_Platzner_Kauschke_2011, title={Estimation
and Partitioning for CPU-Accelerator Architectures}, booktitle={Intel European
Research and Innovation Conference}, author={Kenter, Tobias and Plessl, Christian
and Platzner, Marco and Kauschke, Michael}, year={2011} }'
chicago: Kenter, Tobias, Christian Plessl, Marco Platzner, and Michael Kauschke.
“Estimation and Partitioning for CPU-Accelerator Architectures.” In Intel European
Research and Innovation Conference, 2011.
ieee: T. Kenter, C. Plessl, M. Platzner, and M. Kauschke, “Estimation and Partitioning
for CPU-Accelerator Architectures,” in Intel European Research and Innovation
Conference, 2011.
mla: Kenter, Tobias, et al. “Estimation and Partitioning for CPU-Accelerator Architectures.”
Intel European Research and Innovation Conference, 2011.
short: 'T. Kenter, C. Plessl, M. Platzner, M. Kauschke, in: Intel European Research
and Innovation Conference, 2011.'
date_created: 2018-04-03T14:34:57Z
date_updated: 2022-01-06T06:55:19Z
department:
- _id: '27'
- _id: '518'
- _id: '78'
keyword:
- funding-intel
publication: Intel European Research and Innovation Conference
status: public
title: Estimation and Partitioning for CPU-Accelerator Architectures
type: conference
user_id: '24135'
year: '2011'
...
---
_id: '2195'
author:
- first_name: Matthias
full_name: Grawinkel, Matthias
last_name: Grawinkel
- first_name: Thorsten
full_name: Schäfer, Thorsten
last_name: Schäfer
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Jens
full_name: Hagemeyer, Jens
last_name: Hagemeyer
- first_name: Mario
full_name: Porrmann, Mario
last_name: Porrmann
citation:
ama: 'Grawinkel M, Schäfer T, Brinkmann A, Hagemeyer J, Porrmann M. Evaluation of
Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability. In:
Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication
Systems (MASCOTS). IEEE Computer Society; 2011:297-306. doi:10.1109/mascots.2011.13'
apa: Grawinkel, M., Schäfer, T., Brinkmann, A., Hagemeyer, J., & Porrmann, M.
(2011). Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single
Disk Reliability. In Proc. Int. Symp. on Modeling, Analysis and Simulation
of Computer and Telecommunication Systems (MASCOTS) (pp. 297–306). IEEE Computer
Society. https://doi.org/10.1109/mascots.2011.13
bibtex: '@inproceedings{Grawinkel_Schäfer_Brinkmann_Hagemeyer_Porrmann_2011, title={Evaluation
of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability},
DOI={10.1109/mascots.2011.13},
booktitle={Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and
Telecommunication Systems (MASCOTS)}, publisher={IEEE Computer Society}, author={Grawinkel,
Matthias and Schäfer, Thorsten and Brinkmann, André and Hagemeyer, Jens and Porrmann,
Mario}, year={2011}, pages={297–306} }'
chicago: Grawinkel, Matthias, Thorsten Schäfer, André Brinkmann, Jens Hagemeyer,
and Mario Porrmann. “Evaluation of Applied Intra-Disk Redundancy Schemes to Improve
Single Disk Reliability.” In Proc. Int. Symp. on Modeling, Analysis and Simulation
of Computer and Telecommunication Systems (MASCOTS), 297–306. IEEE Computer
Society, 2011. https://doi.org/10.1109/mascots.2011.13.
ieee: M. Grawinkel, T. Schäfer, A. Brinkmann, J. Hagemeyer, and M. Porrmann, “Evaluation
of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability,”
in Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication
Systems (MASCOTS), 2011, pp. 297–306.
mla: Grawinkel, Matthias, et al. “Evaluation of Applied Intra-Disk Redundancy Schemes
to Improve Single Disk Reliability.” Proc. Int. Symp. on Modeling, Analysis
and Simulation of Computer and Telecommunication Systems (MASCOTS), IEEE Computer
Society, 2011, pp. 297–306, doi:10.1109/mascots.2011.13.
short: 'M. Grawinkel, T. Schäfer, A. Brinkmann, J. Hagemeyer, M. Porrmann, in: Proc.
Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication
Systems (MASCOTS), IEEE Computer Society, 2011, pp. 297–306.'
date_created: 2018-04-03T15:01:31Z
date_updated: 2022-01-06T06:55:21Z
department:
- _id: '27'
doi: 10.1109/mascots.2011.13
page: 297-306
publication: Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and
Telecommunication Systems (MASCOTS)
publisher: IEEE Computer Society
status: public
title: Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk
Reliability
type: conference
user_id: '24135'
year: '2011'
...
---
_id: '2197'
author:
- first_name: Sandra
full_name: Gesing, Sandra
last_name: Gesing
- first_name: Richard
full_name: Grunzke, Richard
last_name: Grunzke
- first_name: Ákos
full_name: Balaskó, Ákos
last_name: Balaskó
- first_name: Georg
full_name: Birkenheuer, Georg
last_name: Birkenheuer
- first_name: Dirk
full_name: Blunk, Dirk
last_name: Blunk
- first_name: Sebastian
full_name: Breuers, Sebastian
last_name: Breuers
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Gregor
full_name: Fels, Gregor
last_name: Fels
- first_name: Sonja
full_name: Herres-Pawlis, Sonja
last_name: Herres-Pawlis
- first_name: Peter
full_name: Kacsuk, Peter
last_name: Kacsuk
- first_name: Miklos
full_name: Kozlovszky, Miklos
last_name: Kozlovszky
- first_name: Jens
full_name: Krüger, Jens
last_name: Krüger
- first_name: Lars
full_name: Packschies, Lars
last_name: Packschies
- first_name: Patrick
full_name: Schäfer, Patrick
last_name: Schäfer
- first_name: Bernd
full_name: Schuller, Bernd
last_name: Schuller
- first_name: Johannes
full_name: Schuster, Johannes
last_name: Schuster
- first_name: Thomas
full_name: Steinke, Thomas
last_name: Steinke
- first_name: Anna
full_name: Szikszay Fabri, Anna
last_name: Szikszay Fabri
- first_name: Martin
full_name: Wewior, Martin
last_name: Wewior
- first_name: Ralph
full_name: Müller-Pfefferkorn, Ralph
last_name: Müller-Pfefferkorn
- first_name: Oliver
full_name: Kohlbacher, Oliver
last_name: Kohlbacher
citation:
ama: 'Gesing S, Grunzke R, Balaskó Á, et al. Granular Security for a Science Gateway
in Structural Bioinformatics. In: Proc. Int. Workshop on Scientific Gateways
(IWSG). Consorzio COMETA; 2011.'
apa: Gesing, S., Grunzke, R., Balaskó, Á., Birkenheuer, G., Blunk, D., Breuers,
S., … Kohlbacher, O. (2011). Granular Security for a Science Gateway in Structural
Bioinformatics. In Proc. Int. Workshop on Scientific Gateways (IWSG). Consorzio
COMETA.
bibtex: '@inproceedings{Gesing_Grunzke_Balaskó_Birkenheuer_Blunk_Breuers_Brinkmann_Fels_Herres-Pawlis_Kacsuk_et
al._2011, title={Granular Security for a Science Gateway in Structural Bioinformatics},
booktitle={Proc. Int. Workshop on Scientific Gateways (IWSG)}, publisher={Consorzio
COMETA}, author={Gesing, Sandra and Grunzke, Richard and Balaskó, Ákos and Birkenheuer,
Georg and Blunk, Dirk and Breuers, Sebastian and Brinkmann, André and Fels, Gregor
and Herres-Pawlis, Sonja and Kacsuk, Peter and et al.}, year={2011} }'
chicago: Gesing, Sandra, Richard Grunzke, Ákos Balaskó, Georg Birkenheuer, Dirk
Blunk, Sebastian Breuers, André Brinkmann, et al. “Granular Security for a Science
Gateway in Structural Bioinformatics.” In Proc. Int. Workshop on Scientific
Gateways (IWSG). Consorzio COMETA, 2011.
ieee: S. Gesing et al., “Granular Security for a Science Gateway in Structural
Bioinformatics,” in Proc. Int. Workshop on Scientific Gateways (IWSG),
2011.
mla: Gesing, Sandra, et al. “Granular Security for a Science Gateway in Structural
Bioinformatics.” Proc. Int. Workshop on Scientific Gateways (IWSG), Consorzio
COMETA, 2011.
short: 'S. Gesing, R. Grunzke, Á. Balaskó, G. Birkenheuer, D. Blunk, S. Breuers,
A. Brinkmann, G. Fels, S. Herres-Pawlis, P. Kacsuk, M. Kozlovszky, J. Krüger,
L. Packschies, P. Schäfer, B. Schuller, J. Schuster, T. Steinke, A. Szikszay Fabri,
M. Wewior, R. Müller-Pfefferkorn, O. Kohlbacher, in: Proc. Int. Workshop on Scientific
Gateways (IWSG), Consorzio COMETA, 2011.'
date_created: 2018-04-03T15:04:04Z
date_updated: 2022-01-06T06:55:21Z
department:
- _id: '27'
publication: Proc. Int. Workshop on Scientific Gateways (IWSG)
publisher: Consorzio COMETA
status: public
title: Granular Security for a Science Gateway in Structural Bioinformatics
type: conference
user_id: '24135'
year: '2011'
...
---
_id: '2198'
author:
- first_name: Mariusz
full_name: Grad, Mariusz
last_name: Grad
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Grad M, Plessl C. Just-in-time Instruction Set Extension – Feasibility and
Limitations for an FPGA-based Reconfigurable ASIP Architecture. In: Proc. Reconfigurable
Architectures Workshop (RAW). IEEE Computer Society; 2011:278-285. doi:10.1109/IPDPS.2011.153'
apa: Grad, M., & Plessl, C. (2011). Just-in-time Instruction Set Extension –
Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture.
Proc. Reconfigurable Architectures Workshop (RAW), 278–285. https://doi.org/10.1109/IPDPS.2011.153
bibtex: '@inproceedings{Grad_Plessl_2011, title={Just-in-time Instruction Set Extension
– Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture},
DOI={10.1109/IPDPS.2011.153},
booktitle={Proc. Reconfigurable Architectures Workshop (RAW)}, publisher={IEEE
Computer Society}, author={Grad, Mariusz and Plessl, Christian}, year={2011},
pages={278–285} }'
chicago: Grad, Mariusz, and Christian Plessl. “Just-in-Time Instruction Set Extension
– Feasibility and Limitations for an FPGA-Based Reconfigurable ASIP Architecture.”
In Proc. Reconfigurable Architectures Workshop (RAW), 278–85. IEEE Computer
Society, 2011. https://doi.org/10.1109/IPDPS.2011.153.
ieee: 'M. Grad and C. Plessl, “Just-in-time Instruction Set Extension – Feasibility
and Limitations for an FPGA-based Reconfigurable ASIP Architecture,” in Proc.
Reconfigurable Architectures Workshop (RAW), 2011, pp. 278–285, doi: 10.1109/IPDPS.2011.153.'
mla: Grad, Mariusz, and Christian Plessl. “Just-in-Time Instruction Set Extension
– Feasibility and Limitations for an FPGA-Based Reconfigurable ASIP Architecture.”
Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society,
2011, pp. 278–85, doi:10.1109/IPDPS.2011.153.
short: 'M. Grad, C. Plessl, in: Proc. Reconfigurable Architectures Workshop (RAW),
IEEE Computer Society, 2011, pp. 278–285.'
date_created: 2018-04-03T15:05:52Z
date_updated: 2023-09-26T13:44:39Z
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/IPDPS.2011.153
language:
- iso: eng
page: 278-285
publication: Proc. Reconfigurable Architectures Workshop (RAW)
publisher: IEEE Computer Society
quality_controlled: '1'
status: public
title: Just-in-time Instruction Set Extension – Feasibility and Limitations for an
FPGA-based Reconfigurable ASIP Architecture
type: conference
user_id: '15278'
year: '2011'
...
---
_id: '2189'
author:
- first_name: Matthias
full_name: Grawinkel, Matthias
last_name: Grawinkel
- first_name: Markus
full_name: Pargmann, Markus
last_name: Pargmann
- first_name: Hubert
full_name: Dömer, Hubert
last_name: Dömer
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Grawinkel M, Pargmann M, Dömer H, Brinkmann A. Lonestar: An Energy-Aware Disk
Based Long-Term Archival Storage System. In: Proc. IEEE Int. Conf. on Parallel
and Distributed Systems (ICPADS). IEEE; 2011:380-387. doi:10.1109/ICPADS.2011.77'
apa: 'Grawinkel, M., Pargmann, M., Dömer, H., & Brinkmann, A. (2011). Lonestar:
An Energy-Aware Disk Based Long-Term Archival Storage System. In Proc. IEEE
Int. Conf. on Parallel and Distributed Systems (ICPADS) (pp. 380–387). IEEE.
https://doi.org/10.1109/ICPADS.2011.77'
bibtex: '@inproceedings{Grawinkel_Pargmann_Dömer_Brinkmann_2011, title={Lonestar:
An Energy-Aware Disk Based Long-Term Archival Storage System}, DOI={10.1109/ICPADS.2011.77},
booktitle={Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS)},
publisher={IEEE}, author={Grawinkel, Matthias and Pargmann, Markus and Dömer,
Hubert and Brinkmann, André}, year={2011}, pages={380–387} }'
chicago: 'Grawinkel, Matthias, Markus Pargmann, Hubert Dömer, and André Brinkmann.
“Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System.” In Proc.
IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), 380–87. IEEE,
2011. https://doi.org/10.1109/ICPADS.2011.77.'
ieee: 'M. Grawinkel, M. Pargmann, H. Dömer, and A. Brinkmann, “Lonestar: An Energy-Aware
Disk Based Long-Term Archival Storage System,” in Proc. IEEE Int. Conf. on
Parallel and Distributed Systems (ICPADS), 2011, pp. 380–387.'
mla: 'Grawinkel, Matthias, et al. “Lonestar: An Energy-Aware Disk Based Long-Term
Archival Storage System.” Proc. IEEE Int. Conf. on Parallel and Distributed
Systems (ICPADS), IEEE, 2011, pp. 380–87, doi:10.1109/ICPADS.2011.77.'
short: 'M. Grawinkel, M. Pargmann, H. Dömer, A. Brinkmann, in: Proc. IEEE Int. Conf.
on Parallel and Distributed Systems (ICPADS), IEEE, 2011, pp. 380–387.'
date_created: 2018-04-03T14:32:23Z
date_updated: 2022-01-06T06:55:18Z
department:
- _id: '27'
doi: 10.1109/ICPADS.2011.77
page: 380-387
publication: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS)
publisher: IEEE
status: public
title: 'Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System'
type: conference
user_id: '24135'
year: '2011'
...
---
_id: '656'
abstract:
- lang: eng
text: In the next decades, hybrid multi-cores will be the predominant architecture
for reconfigurable FPGA-based systems. Temperature-aware thread mapping strategies
are key for providing dependability in such systems. These strategies rely on
measuring the temperature distribution and redicting the thermal behavior of the
system when there are changes to the hardware and software running on the FPGA.
While there are a number of tools that use thermal models to predict temperature
distributions at design time, these tools lack the flexibility to autonomously
adjust to changing FPGA configurations. To address this problem we propose a temperature-aware
system that empowers FPGA-based reconfigurable multi-cores to autonomously predict
the on-chip temperature distribution for pro-active thread remapping. Our system
obtains temperature measurements through a self-calibrating grid of sensors and
uses area constrained heat-generating circuits in order to generate spatial and
temporal temperature gradients. The generated temperature variations are then
used to learn the free parameters of the system's thermal model. The system thus
acquires an understanding of its own thermal characteristics. We implemented an
FPGA system containing a net of 144 temperature sensors on a Xilinx Virtex-6 LX240T
FPGA that is aware of its thermal model. Finally, we show that the temperature
predictions vary less than 0.72 degree C on average compared to the measured temperature
distributions at run-time.
author:
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Andreas
full_name: Agne, Andreas
last_name: Agne
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Happe M, Agne A, Plessl C. Measuring and Predicting Temperature Distributions
on FPGAs at Run-Time. In: Proceedings of the 2011 International Conference
on Reconfigurable Computing and FPGAs (ReConFig). IEEE; 2011:55-60. doi:10.1109/ReConFig.2011.59'
apa: Happe, M., Agne, A., & Plessl, C. (2011). Measuring and Predicting Temperature
Distributions on FPGAs at Run-Time. Proceedings of the 2011 International Conference
on Reconfigurable Computing and FPGAs (ReConFig), 55–60. https://doi.org/10.1109/ReConFig.2011.59
bibtex: '@inproceedings{Happe_Agne_Plessl_2011, title={Measuring and Predicting
Temperature Distributions on FPGAs at Run-Time}, DOI={10.1109/ReConFig.2011.59},
booktitle={Proceedings of the 2011 International Conference on Reconfigurable
Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Happe, Markus and Agne,
Andreas and Plessl, Christian}, year={2011}, pages={55–60} }'
chicago: Happe, Markus, Andreas Agne, and Christian Plessl. “Measuring and Predicting
Temperature Distributions on FPGAs at Run-Time.” In Proceedings of the 2011
International Conference on Reconfigurable Computing and FPGAs (ReConFig),
55–60. IEEE, 2011. https://doi.org/10.1109/ReConFig.2011.59.
ieee: 'M. Happe, A. Agne, and C. Plessl, “Measuring and Predicting Temperature Distributions
on FPGAs at Run-Time,” in Proceedings of the 2011 International Conference
on Reconfigurable Computing and FPGAs (ReConFig), 2011, pp. 55–60, doi: 10.1109/ReConFig.2011.59.'
mla: Happe, Markus, et al. “Measuring and Predicting Temperature Distributions on
FPGAs at Run-Time.” Proceedings of the 2011 International Conference on Reconfigurable
Computing and FPGAs (ReConFig), IEEE, 2011, pp. 55–60, doi:10.1109/ReConFig.2011.59.
short: 'M. Happe, A. Agne, C. Plessl, in: Proceedings of the 2011 International
Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2011, pp. 55–60.'
date_created: 2017-10-17T12:42:59Z
date_updated: 2023-09-26T13:46:08Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/ReConFig.2011.59
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-14T13:49:39Z
date_updated: 2018-03-14T13:49:39Z
file_id: '1220'
file_name: 656-2011_happe_reconfig.pdf
file_size: 502244
relation: main_file
success: 1
file_date_updated: 2018-03-14T13:49:39Z
has_accepted_license: '1'
language:
- iso: eng
page: 55-60
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: Proceedings of the 2011 International Conference on Reconfigurable Computing
and FPGAs (ReConFig)
publisher: IEEE
quality_controlled: '1'
status: public
title: Measuring and Predicting Temperature Distributions on FPGAs at Run-Time
type: conference
user_id: '15278'
year: '2011'
...
---
_id: '2205'
author:
- first_name: Georg
full_name: Birkenheuer, Georg
last_name: Birkenheuer
- first_name: Dirk
full_name: Blunk, Dirk
last_name: Blunk
- first_name: Sebastian
full_name: Breuers, Sebastian
last_name: Breuers
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Gregor
full_name: Fels, Gregor
last_name: Fels
- first_name: Sandra
full_name: Gesing, Sandra
last_name: Gesing
- first_name: Richard
full_name: Grunzke, Richard
last_name: Grunzke
- first_name: Sonja
full_name: Herres-Pawlis, Sonja
last_name: Herres-Pawlis
- first_name: Oliver
full_name: Kohlbacher, Oliver
last_name: Kohlbacher
- first_name: Jens
full_name: Krüger, Jens
last_name: Krüger
- first_name: Ulrich
full_name: Lang, Ulrich
last_name: Lang
- first_name: Lars
full_name: Packschies, Lars
last_name: Packschies
- first_name: Ralph
full_name: Müller-Pfefferkorn, Ralph
last_name: Müller-Pfefferkorn
- first_name: Patrick
full_name: Schäfer, Patrick
last_name: Schäfer
- first_name: Johannes
full_name: Schuster, Johannes
last_name: Schuster
- first_name: Thomas
full_name: Steinke, Thomas
last_name: Steinke
- first_name: Klaus-Dieter
full_name: Warzecha, Klaus-Dieter
last_name: Warzecha
- first_name: Martin
full_name: Wewior, Martin
last_name: Wewior
citation:
ama: 'Birkenheuer G, Blunk D, Breuers S, et al. MoSGrid: Progress of Workflow driven
Chemical Simulations. In: Proc. of Grid Workflow Workshop (GWW). Vol 829.
CEUR Workshop Proceedings. ; 2011.'
apa: 'Birkenheuer, G., Blunk, D., Breuers, S., Brinkmann, A., Fels, G., Gesing,
S., … Wewior, M. (2011). MoSGrid: Progress of Workflow driven Chemical Simulations.
In Proc. of Grid Workflow Workshop (GWW) (Vol. 829).'
bibtex: '@inproceedings{Birkenheuer_Blunk_Breuers_Brinkmann_Fels_Gesing_Grunzke_Herres-Pawlis_Kohlbacher_Krüger_et
al._2011, series={CEUR Workshop Proceedings}, title={MoSGrid: Progress of Workflow
driven Chemical Simulations}, volume={829}, booktitle={Proc. of Grid Workflow
Workshop (GWW)}, author={Birkenheuer, Georg and Blunk, Dirk and Breuers, Sebastian
and Brinkmann, André and Fels, Gregor and Gesing, Sandra and Grunzke, Richard
and Herres-Pawlis, Sonja and Kohlbacher, Oliver and Krüger, Jens and et al.},
year={2011}, collection={CEUR Workshop Proceedings} }'
chicago: 'Birkenheuer, Georg, Dirk Blunk, Sebastian Breuers, André Brinkmann, Gregor
Fels, Sandra Gesing, Richard Grunzke, et al. “MoSGrid: Progress of Workflow Driven
Chemical Simulations.” In Proc. of Grid Workflow Workshop (GWW), Vol. 829.
CEUR Workshop Proceedings, 2011.'
ieee: 'G. Birkenheuer et al., “MoSGrid: Progress of Workflow driven Chemical
Simulations,” in Proc. of Grid Workflow Workshop (GWW), 2011, vol. 829.'
mla: 'Birkenheuer, Georg, et al. “MoSGrid: Progress of Workflow Driven Chemical
Simulations.” Proc. of Grid Workflow Workshop (GWW), vol. 829, 2011.'
short: 'G. Birkenheuer, D. Blunk, S. Breuers, A. Brinkmann, G. Fels, S. Gesing,
R. Grunzke, S. Herres-Pawlis, O. Kohlbacher, J. Krüger, U. Lang, L. Packschies,
R. Müller-Pfefferkorn, P. Schäfer, J. Schuster, T. Steinke, K.-D. Warzecha, M.
Wewior, in: Proc. of Grid Workflow Workshop (GWW), 2011.'
date_created: 2018-04-04T09:34:24Z
date_updated: 2022-01-06T06:55:23Z
department:
- _id: '27'
intvolume: ' 829'
publication: Proc. of Grid Workflow Workshop (GWW)
series_title: CEUR Workshop Proceedings
status: public
title: 'MoSGrid: Progress of Workflow driven Chemical Simulations'
type: conference
user_id: '24135'
volume: 829
year: '2011'
...
---
_id: '2204'
author:
- first_name: Tobias
full_name: Graf, Tobias
last_name: Graf
- first_name: Ulf
full_name: Lorenz, Ulf
last_name: Lorenz
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Lars
full_name: Schaefers, Lars
last_name: Schaefers
citation:
ama: 'Graf T, Lorenz U, Platzner M, Schaefers L. Parallel Monte-Carlo Tree Search
for HPC Systems. In: Proc. European Conf. on Parallel Processing (Euro-Par).
Vol 6853. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer;
2011. doi:10.1007/978-3-642-23397-5_36'
apa: 'Graf, T., Lorenz, U., Platzner, M., & Schaefers, L. (2011). Parallel Monte-Carlo
Tree Search for HPC Systems. In Proc. European Conf. on Parallel Processing
(Euro-Par) (Vol. 6853). Berlin / Heidelberg: Springer. https://doi.org/10.1007/978-3-642-23397-5_36'
bibtex: '@inproceedings{Graf_Lorenz_Platzner_Schaefers_2011, place={Berlin / Heidelberg},
series={Lecture Notes in Computer Science (LNCS)}, title={Parallel Monte-Carlo
Tree Search for HPC Systems}, volume={6853}, DOI={10.1007/978-3-642-23397-5_36},
booktitle={Proc. European Conf. on Parallel Processing (Euro-Par)}, publisher={Springer},
author={Graf, Tobias and Lorenz, Ulf and Platzner, Marco and Schaefers, Lars},
year={2011}, collection={Lecture Notes in Computer Science (LNCS)} }'
chicago: 'Graf, Tobias, Ulf Lorenz, Marco Platzner, and Lars Schaefers. “Parallel
Monte-Carlo Tree Search for HPC Systems.” In Proc. European Conf. on Parallel
Processing (Euro-Par), Vol. 6853. Lecture Notes in Computer Science (LNCS).
Berlin / Heidelberg: Springer, 2011. https://doi.org/10.1007/978-3-642-23397-5_36.'
ieee: T. Graf, U. Lorenz, M. Platzner, and L. Schaefers, “Parallel Monte-Carlo Tree
Search for HPC Systems,” in Proc. European Conf. on Parallel Processing (Euro-Par),
2011, vol. 6853.
mla: Graf, Tobias, et al. “Parallel Monte-Carlo Tree Search for HPC Systems.” Proc.
European Conf. on Parallel Processing (Euro-Par), vol. 6853, Springer, 2011,
doi:10.1007/978-3-642-23397-5_36.
short: 'T. Graf, U. Lorenz, M. Platzner, L. Schaefers, in: Proc. European Conf.
on Parallel Processing (Euro-Par), Springer, Berlin / Heidelberg, 2011.'
date_created: 2018-04-03T15:14:56Z
date_updated: 2022-01-06T06:55:23Z
department:
- _id: '27'
- _id: '78'
doi: 10.1007/978-3-642-23397-5_36
intvolume: ' 6853'
place: Berlin / Heidelberg
publication: Proc. European Conf. on Parallel Processing (Euro-Par)
publisher: Springer
series_title: Lecture Notes in Computer Science (LNCS)
status: public
title: Parallel Monte-Carlo Tree Search for HPC Systems
type: conference
user_id: '24135'
volume: 6853
year: '2011'
...
---
_id: '2200'
author:
- first_name: Tobias
full_name: Kenter, Tobias
id: '3145'
last_name: Kenter
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Michael
full_name: Kauschke, Michael
last_name: Kauschke
citation:
ama: 'Kenter T, Platzner M, Plessl C, Kauschke M. Performance Estimation Framework
for Automated Exploration of CPU-Accelerator Architectures. In: Proc. Int.
Symp. on Field-Programmable Gate Arrays (FPGA). ACM; 2011:177-180. doi:10.1145/1950413.1950448'
apa: Kenter, T., Platzner, M., Plessl, C., & Kauschke, M. (2011). Performance
Estimation Framework for Automated Exploration of CPU-Accelerator Architectures.
Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 177–180. https://doi.org/10.1145/1950413.1950448
bibtex: '@inproceedings{Kenter_Platzner_Plessl_Kauschke_2011, place={New York, NY,
USA}, title={Performance Estimation Framework for Automated Exploration of CPU-Accelerator
Architectures}, DOI={10.1145/1950413.1950448},
booktitle={Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA)}, publisher={ACM},
author={Kenter, Tobias and Platzner, Marco and Plessl, Christian and Kauschke,
Michael}, year={2011}, pages={177–180} }'
chicago: 'Kenter, Tobias, Marco Platzner, Christian Plessl, and Michael Kauschke.
“Performance Estimation Framework for Automated Exploration of CPU-Accelerator
Architectures.” In Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA),
177–80. New York, NY, USA: ACM, 2011. https://doi.org/10.1145/1950413.1950448.'
ieee: 'T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation
Framework for Automated Exploration of CPU-Accelerator Architectures,” in Proc.
Int. Symp. on Field-Programmable Gate Arrays (FPGA), 2011, pp. 177–180, doi:
10.1145/1950413.1950448.'
mla: Kenter, Tobias, et al. “Performance Estimation Framework for Automated Exploration
of CPU-Accelerator Architectures.” Proc. Int. Symp. on Field-Programmable Gate
Arrays (FPGA), ACM, 2011, pp. 177–80, doi:10.1145/1950413.1950448.
short: 'T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: Proc. Int. Symp. on
Field-Programmable Gate Arrays (FPGA), ACM, New York, NY, USA, 2011, pp. 177–180.'
date_created: 2018-04-03T15:08:13Z
date_updated: 2023-09-26T13:45:04Z
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1145/1950413.1950448
keyword:
- design space exploration
- LLVM
- partitioning
- performance
- estimation
- funding-intel
language:
- iso: eng
page: 177-180
place: New York, NY, USA
publication: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA)
publication_identifier:
isbn:
- 978-1-4503-0554-9
publisher: ACM
quality_controlled: '1'
status: public
title: Performance Estimation Framework for Automated Exploration of CPU-Accelerator
Architectures
type: conference
user_id: '15278'
year: '2011'
...
---
_id: '2188'
author:
- first_name: Alberto
full_name: Miranda, Alberto
last_name: Miranda
- first_name: Sascha
full_name: Effert, Sascha
last_name: Effert
- first_name: Yangwook
full_name: Kang, Yangwook
last_name: Kang
- first_name: Ethan
full_name: Miller, Ethan
last_name: Miller
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Toni
full_name: Cortes, Toni
last_name: Cortes
citation:
ama: 'Miranda A, Effert S, Kang Y, Miller E, Brinkmann A, Cortes T. Reliable and
Randomized Data Distribution Strategies for Large Scale Storage Systems. In: Proc.
Int. Conf. on High Performance Computing (HIPC). Washington, DC: IEEE Computer
Society; 2011:1-10. doi:10.1109/HiPC.2011.6152745'
apa: 'Miranda, A., Effert, S., Kang, Y., Miller, E., Brinkmann, A., & Cortes,
T. (2011). Reliable and Randomized Data Distribution Strategies for Large Scale
Storage Systems. In Proc. Int. Conf. on High Performance Computing (HIPC)
(pp. 1–10). Washington, DC: IEEE Computer Society. https://doi.org/10.1109/HiPC.2011.6152745'
bibtex: '@inproceedings{Miranda_Effert_Kang_Miller_Brinkmann_Cortes_2011, place={Washington,
DC}, title={Reliable and Randomized Data Distribution Strategies for Large Scale
Storage Systems}, DOI={10.1109/HiPC.2011.6152745},
booktitle={Proc. Int. Conf. on High Performance Computing (HIPC)}, publisher={IEEE
Computer Society}, author={Miranda, Alberto and Effert, Sascha and Kang, Yangwook
and Miller, Ethan and Brinkmann, André and Cortes, Toni}, year={2011}, pages={1–10}
}'
chicago: 'Miranda, Alberto, Sascha Effert, Yangwook Kang, Ethan Miller, André Brinkmann,
and Toni Cortes. “Reliable and Randomized Data Distribution Strategies for Large
Scale Storage Systems.” In Proc. Int. Conf. on High Performance Computing (HIPC),
1–10. Washington, DC: IEEE Computer Society, 2011. https://doi.org/10.1109/HiPC.2011.6152745.'
ieee: A. Miranda, S. Effert, Y. Kang, E. Miller, A. Brinkmann, and T. Cortes, “Reliable
and Randomized Data Distribution Strategies for Large Scale Storage Systems,”
in Proc. Int. Conf. on High Performance Computing (HIPC), 2011, pp. 1–10.
mla: Miranda, Alberto, et al. “Reliable and Randomized Data Distribution Strategies
for Large Scale Storage Systems.” Proc. Int. Conf. on High Performance Computing
(HIPC), IEEE Computer Society, 2011, pp. 1–10, doi:10.1109/HiPC.2011.6152745.
short: 'A. Miranda, S. Effert, Y. Kang, E. Miller, A. Brinkmann, T. Cortes, in:
Proc. Int. Conf. on High Performance Computing (HIPC), IEEE Computer Society,
Washington, DC, 2011, pp. 1–10.'
date_created: 2018-04-03T14:30:39Z
date_updated: 2022-01-06T06:55:18Z
department:
- _id: '27'
doi: 10.1109/HiPC.2011.6152745
page: 1-10
place: Washington, DC
publication: Proc. Int. Conf. on High Performance Computing (HIPC)
publisher: IEEE Computer Society
status: public
title: Reliable and Randomized Data Distribution Strategies for Large Scale Storage
Systems
type: conference
user_id: '24135'
year: '2011'
...
---
_id: '2196'
author:
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Yan
full_name: Gao, Yan
last_name: Gao
- first_name: Miroslaw
full_name: Korzeniowski, Miroslaw
last_name: Korzeniowski
- first_name: Dirk
full_name: Meister, Dirk
last_name: Meister
citation:
ama: 'Brinkmann A, Gao Y, Korzeniowski M, Meister D. Request Load Balancing for
Highly Skewed Traffic in P2P Networks. In: Proc. IEEE Int. Conf. on Networking,
Architecture and Storage (NAS). IEEE; 2011:53-62. doi:10.1109/NAS.2011.25'
apa: Brinkmann, A., Gao, Y., Korzeniowski, M., & Meister, D. (2011). Request
Load Balancing for Highly Skewed Traffic in P2P Networks. In Proc. IEEE Int.
Conf. on Networking, Architecture and Storage (NAS) (pp. 53–62). IEEE. https://doi.org/10.1109/NAS.2011.25
bibtex: '@inproceedings{Brinkmann_Gao_Korzeniowski_Meister_2011, title={Request
Load Balancing for Highly Skewed Traffic in P2P Networks}, DOI={10.1109/NAS.2011.25},
booktitle={Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS)},
publisher={IEEE}, author={Brinkmann, André and Gao, Yan and Korzeniowski, Miroslaw
and Meister, Dirk}, year={2011}, pages={53–62} }'
chicago: Brinkmann, André, Yan Gao, Miroslaw Korzeniowski, and Dirk Meister. “Request
Load Balancing for Highly Skewed Traffic in P2P Networks.” In Proc. IEEE Int.
Conf. on Networking, Architecture and Storage (NAS), 53–62. IEEE, 2011. https://doi.org/10.1109/NAS.2011.25.
ieee: A. Brinkmann, Y. Gao, M. Korzeniowski, and D. Meister, “Request Load Balancing
for Highly Skewed Traffic in P2P Networks,” in Proc. IEEE Int. Conf. on Networking,
Architecture and Storage (NAS), 2011, pp. 53–62.
mla: Brinkmann, André, et al. “Request Load Balancing for Highly Skewed Traffic
in P2P Networks.” Proc. IEEE Int. Conf. on Networking, Architecture and Storage
(NAS), IEEE, 2011, pp. 53–62, doi:10.1109/NAS.2011.25.
short: 'A. Brinkmann, Y. Gao, M. Korzeniowski, D. Meister, in: Proc. IEEE Int. Conf.
on Networking, Architecture and Storage (NAS), IEEE, 2011, pp. 53–62.'
date_created: 2018-04-03T15:03:17Z
date_updated: 2022-01-06T06:55:21Z
department:
- _id: '27'
doi: 10.1109/NAS.2011.25
page: 53-62
publication: Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS)
publisher: IEEE
status: public
title: Request Load Balancing for Highly Skewed Traffic in P2P Networks
type: conference
user_id: '24135'
year: '2011'
...
---
_id: '1968'
abstract:
- lang: eng
text: 'Infrastructure as a Service providers use virtualization to abstract their
hardware and to create a dynamic data center. Virtualization enables the consolidation
of virtual machines as well as the migration of them to other hosts during runtime.
Each provider has its own strategy to efficiently operate a data center. We present
a rule based mapping algorithm for VMs, which is able to automatically adapt the
mapping between VMs and physical hosts. It offers an interface where policies
can be defined and combined in a generic way. The algorithm performs the initial
mapping at request time as well as a remapping during runtime. It deals with policy
and infrastructure changes. We extended the open source IaaS solution Eucalyptus
and we evaluated it with typical policies: maximizing the compute performance
and VM locality to achieve a high performance and minimizing energy consumption.
The evaluation was done on state-of-the-art servers in our own data center and
by simulations using a workload of the Parallel Workload Archive. The results
show that our algorithm performs well in dynamic data centers environments.'
author:
- first_name: Christoph
full_name: Kleineweber, Christoph
last_name: Kleineweber
- first_name: Axel
full_name: Keller, Axel
id: '15274'
last_name: Keller
- first_name: Oliver
full_name: Niehörster, Oliver
last_name: Niehörster
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Kleineweber C, Keller A, Niehörster O, Brinkmann A. Rule Based Mapping of
Virtual Machines in Clouds. In: Proc. Int. Conf. on Parallel, Distributed and
Network-Based Computing (PDP). ; 2011. doi:10.1109/PDP.2011.69'
apa: Kleineweber, C., Keller, A., Niehörster, O., & Brinkmann, A. (2011). Rule
Based Mapping of Virtual Machines in Clouds. In Proc. Int. Conf. on Parallel,
Distributed and Network-Based Computing (PDP). https://doi.org/10.1109/PDP.2011.69
bibtex: '@inproceedings{Kleineweber_Keller_Niehörster_Brinkmann_2011, title={Rule
Based Mapping of Virtual Machines in Clouds}, DOI={10.1109/PDP.2011.69},
booktitle={Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing
(PDP)}, author={Kleineweber, Christoph and Keller, Axel and Niehörster, Oliver
and Brinkmann, André}, year={2011} }'
chicago: Kleineweber, Christoph, Axel Keller, Oliver Niehörster, and André Brinkmann.
“Rule Based Mapping of Virtual Machines in Clouds.” In Proc. Int. Conf. on
Parallel, Distributed and Network-Based Computing (PDP), 2011. https://doi.org/10.1109/PDP.2011.69.
ieee: C. Kleineweber, A. Keller, O. Niehörster, and A. Brinkmann, “Rule Based Mapping
of Virtual Machines in Clouds,” in Proc. Int. Conf. on Parallel, Distributed
and Network-Based Computing (PDP), 2011.
mla: Kleineweber, Christoph, et al. “Rule Based Mapping of Virtual Machines in Clouds.”
Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP),
2011, doi:10.1109/PDP.2011.69.
short: 'C. Kleineweber, A. Keller, O. Niehörster, A. Brinkmann, in: Proc. Int. Conf.
on Parallel, Distributed and Network-Based Computing (PDP), 2011.'
date_created: 2018-03-29T11:21:05Z
date_updated: 2022-01-06T06:54:10Z
department:
- _id: '27'
doi: 10.1109/PDP.2011.69
language:
- iso: eng
publication: Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing
(PDP)
publication_status: published
status: public
title: Rule Based Mapping of Virtual Machines in Clouds
type: conference
user_id: '15274'
year: '2011'
...
---
_id: '2194'
author:
- first_name: Björn
full_name: Meyer, Björn
last_name: Meyer
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Jens
full_name: Förstner, Jens
id: '158'
last_name: Förstner
orcid: 0000-0001-7059-9862
citation:
ama: 'Meyer B, Plessl C, Förstner J. Transformation of scientific algorithms to
parallel computing code: subdomain support in a MPI-multi-GPU backend. In: Symp.
on Application Accelerators in High Performance Computing (SAAHPC). IEEE Computer
Society; 2011:60-63. doi:10.1109/SAAHPC.2011.12'
apa: 'Meyer, B., Plessl, C., & Förstner, J. (2011). Transformation of scientific
algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend.
Symp. on Application Accelerators in High Performance Computing (SAAHPC),
60–63. https://doi.org/10.1109/SAAHPC.2011.12'
bibtex: '@inproceedings{Meyer_Plessl_Förstner_2011, title={Transformation of scientific
algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend},
DOI={10.1109/SAAHPC.2011.12},
booktitle={Symp. on Application Accelerators in High Performance Computing (SAAHPC)},
publisher={IEEE Computer Society}, author={Meyer, Björn and Plessl, Christian
and Förstner, Jens}, year={2011}, pages={60–63} }'
chicago: 'Meyer, Björn, Christian Plessl, and Jens Förstner. “Transformation of
Scientific Algorithms to Parallel Computing Code: Subdomain Support in a MPI-Multi-GPU
Backend.” In Symp. on Application Accelerators in High Performance Computing
(SAAHPC), 60–63. IEEE Computer Society, 2011. https://doi.org/10.1109/SAAHPC.2011.12.'
ieee: 'B. Meyer, C. Plessl, and J. Förstner, “Transformation of scientific algorithms
to parallel computing code: subdomain support in a MPI-multi-GPU backend,” in
Symp. on Application Accelerators in High Performance Computing (SAAHPC),
2011, pp. 60–63, doi: 10.1109/SAAHPC.2011.12.'
mla: 'Meyer, Björn, et al. “Transformation of Scientific Algorithms to Parallel
Computing Code: Subdomain Support in a MPI-Multi-GPU Backend.” Symp. on Application
Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society,
2011, pp. 60–63, doi:10.1109/SAAHPC.2011.12.'
short: 'B. Meyer, C. Plessl, J. Förstner, in: Symp. on Application Accelerators
in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63.'
date_created: 2018-04-03T14:55:57Z
date_updated: 2023-09-26T13:44:11Z
department:
- _id: '27'
- _id: '518'
- _id: '15'
- _id: '78'
doi: 10.1109/SAAHPC.2011.12
keyword:
- tet_topic_hpc
language:
- iso: eng
page: 60-63
project:
- _id: '30'
grant_number: 01|H11004A
name: Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling
Models
publication: Symp. on Application Accelerators in High Performance Computing (SAAHPC)
publisher: IEEE Computer Society
quality_controlled: '1'
status: public
title: 'Transformation of scientific algorithms to parallel computing code: subdomain
support in a MPI-multi-GPU backend'
type: conference
user_id: '15278'
year: '2011'
...
---
_id: '2224'
author:
- first_name: Mariusz
full_name: Grad, Mariusz
last_name: Grad
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Grad M, Plessl C. An Open Source Circuit Library with Benchmarking Facilities.
In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms
(ERSA). CSREA Press; 2010:144-150.'
apa: Grad, M., & Plessl, C. (2010). An Open Source Circuit Library with Benchmarking
Facilities. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms
(ERSA), 144–150.
bibtex: '@inproceedings{Grad_Plessl_2010, title={An Open Source Circuit Library
with Benchmarking Facilities}, booktitle={Proc. Int. Conf. on Engineering of Reconfigurable
Systems and Algorithms (ERSA)}, publisher={CSREA Press}, author={Grad, Mariusz
and Plessl, Christian}, year={2010}, pages={144–150} }'
chicago: Grad, Mariusz, and Christian Plessl. “An Open Source Circuit Library with
Benchmarking Facilities.” In Proc. Int. Conf. on Engineering of Reconfigurable
Systems and Algorithms (ERSA), 144–50. CSREA Press, 2010.
ieee: M. Grad and C. Plessl, “An Open Source Circuit Library with Benchmarking Facilities,”
in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms
(ERSA), 2010, pp. 144–150.
mla: Grad, Mariusz, and Christian Plessl. “An Open Source Circuit Library with Benchmarking
Facilities.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and
Algorithms (ERSA), CSREA Press, 2010, pp. 144–50.
short: 'M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable
Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 144–150.'
date_created: 2018-04-05T16:28:38Z
date_updated: 2023-09-26T13:48:59Z
department:
- _id: '27'
- _id: '518'
- _id: '78'
language:
- iso: eng
page: 144-150
publication: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms
(ERSA)
publication_identifier:
isbn:
- 1-60132-140-6
publisher: CSREA Press
quality_controlled: '1'
status: public
title: An Open Source Circuit Library with Benchmarking Facilities
type: conference
user_id: '15278'
year: '2010'
...
---
_id: '2229'
author:
- first_name: Petra
full_name: Berenbrink, Petra
last_name: Berenbrink
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Tom
full_name: Friedetzky, Tom
last_name: Friedetzky
- first_name: Lars
full_name: Nagel, Lars
last_name: Nagel
citation:
ama: 'Berenbrink P, Brinkmann A, Friedetzky T, Nagel L. Balls into Bins with Related
Random Choices. In: Proc. Int. Symp. on Parallelism in Algorithms and Architectures
(SPAA). New York: ACM; 2010:100-105. doi:10.1145/1810479.1810500'
apa: 'Berenbrink, P., Brinkmann, A., Friedetzky, T., & Nagel, L. (2010). Balls
into Bins with Related Random Choices. In Proc. Int. Symp. on Parallelism in
Algorithms and Architectures (SPAA) (pp. 100–105). New York: ACM. https://doi.org/10.1145/1810479.1810500'
bibtex: '@inproceedings{Berenbrink_Brinkmann_Friedetzky_Nagel_2010, place={New York},
title={Balls into Bins with Related Random Choices}, DOI={10.1145/1810479.1810500},
booktitle={Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA)},
publisher={ACM}, author={Berenbrink, Petra and Brinkmann, André and Friedetzky,
Tom and Nagel, Lars}, year={2010}, pages={100–105} }'
chicago: 'Berenbrink, Petra, André Brinkmann, Tom Friedetzky, and Lars Nagel. “Balls
into Bins with Related Random Choices.” In Proc. Int. Symp. on Parallelism
in Algorithms and Architectures (SPAA), 100–105. New York: ACM, 2010. https://doi.org/10.1145/1810479.1810500.'
ieee: P. Berenbrink, A. Brinkmann, T. Friedetzky, and L. Nagel, “Balls into Bins
with Related Random Choices,” in Proc. Int. Symp. on Parallelism in Algorithms
and Architectures (SPAA), 2010, pp. 100–105.
mla: Berenbrink, Petra, et al. “Balls into Bins with Related Random Choices.” Proc.
Int. Symp. on Parallelism in Algorithms and Architectures (SPAA), ACM, 2010,
pp. 100–05, doi:10.1145/1810479.1810500.
short: 'P. Berenbrink, A. Brinkmann, T. Friedetzky, L. Nagel, in: Proc. Int. Symp.
on Parallelism in Algorithms and Architectures (SPAA), ACM, New York, 2010, pp.
100–105.'
date_created: 2018-04-05T16:45:55Z
date_updated: 2022-01-06T06:55:30Z
department:
- _id: '27'
doi: 10.1145/1810479.1810500
page: 100-105
place: New York
publication: Proc. Int. Symp. on Parallelism in Algorithms and Architectures (SPAA)
publisher: ACM
status: public
title: Balls into Bins with Related Random Choices
type: conference
user_id: '24135'
year: '2010'
...
---
_id: '2232'
author:
- first_name: Petra
full_name: Berenbrink, Petra
last_name: Berenbrink
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Tom
full_name: Friedetzky, Tom
last_name: Friedetzky
- first_name: Lars
full_name: Nagel, Lars
last_name: Nagel
citation:
ama: 'Berenbrink P, Brinkmann A, Friedetzky T, Nagel L. Balls into Non-uniform Bins.
In: Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS). IEEE;
2010:1-10. doi:10.1109/IPDPS.2010.5470355'
apa: Berenbrink, P., Brinkmann, A., Friedetzky, T., & Nagel, L. (2010). Balls
into Non-uniform Bins. In Proc. Int. Symp. on Parallel and Distributed Processing
(IPDPS) (pp. 1–10). IEEE. https://doi.org/10.1109/IPDPS.2010.5470355
bibtex: '@inproceedings{Berenbrink_Brinkmann_Friedetzky_Nagel_2010, title={Balls
into Non-uniform Bins}, DOI={10.1109/IPDPS.2010.5470355},
booktitle={Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS)}, publisher={IEEE},
author={Berenbrink, Petra and Brinkmann, André and Friedetzky, Tom and Nagel,
Lars}, year={2010}, pages={1–10} }'
chicago: Berenbrink, Petra, André Brinkmann, Tom Friedetzky, and Lars Nagel. “Balls
into Non-Uniform Bins.” In Proc. Int. Symp. on Parallel and Distributed Processing
(IPDPS), 1–10. IEEE, 2010. https://doi.org/10.1109/IPDPS.2010.5470355.
ieee: P. Berenbrink, A. Brinkmann, T. Friedetzky, and L. Nagel, “Balls into Non-uniform
Bins,” in Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS),
2010, pp. 1–10.
mla: Berenbrink, Petra, et al. “Balls into Non-Uniform Bins.” Proc. Int. Symp.
on Parallel and Distributed Processing (IPDPS), IEEE, 2010, pp. 1–10, doi:10.1109/IPDPS.2010.5470355.
short: 'P. Berenbrink, A. Brinkmann, T. Friedetzky, L. Nagel, in: Proc. Int. Symp.
on Parallel and Distributed Processing (IPDPS), IEEE, 2010, pp. 1–10.'
date_created: 2018-04-05T16:50:03Z
date_updated: 2022-01-06T06:55:31Z
department:
- _id: '27'
doi: 10.1109/IPDPS.2010.5470355
page: 1-10
publication: Proc. Int. Symp. on Parallel and Distributed Processing (IPDPS)
publisher: IEEE
status: public
title: Balls into Non-uniform Bins
type: conference
user_id: '24135'
year: '2010'
...
---
_id: '2220'
author:
- first_name: David
full_name: Andrews, David
last_name: Andrews
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Andrews D, Plessl C. Configurable Processor Architectures: History and Trends.
In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms
(ERSA). CSREA Press; 2010:165.'
apa: 'Andrews, D., & Plessl, C. (2010). Configurable Processor Architectures:
History and Trends. Proc. Int. Conf. on Engineering of Reconfigurable Systems
and Algorithms (ERSA), 165.'
bibtex: '@inproceedings{Andrews_Plessl_2010, title={Configurable Processor Architectures:
History and Trends}, booktitle={Proc. Int. Conf. on Engineering of Reconfigurable
Systems and Algorithms (ERSA)}, publisher={CSREA Press}, author={Andrews, David
and Plessl, Christian}, year={2010}, pages={165} }'
chicago: 'Andrews, David, and Christian Plessl. “Configurable Processor Architectures:
History and Trends.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems
and Algorithms (ERSA), 165. CSREA Press, 2010.'
ieee: 'D. Andrews and C. Plessl, “Configurable Processor Architectures: History
and Trends,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and
Algorithms (ERSA), 2010, p. 165.'
mla: 'Andrews, David, and Christian Plessl. “Configurable Processor Architectures:
History and Trends.” Proc. Int. Conf. on Engineering of Reconfigurable Systems
and Algorithms (ERSA), CSREA Press, 2010, p. 165.'
short: 'D. Andrews, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable
Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165.'
date_created: 2018-04-05T14:57:07Z
date_updated: 2023-09-26T13:47:33Z
department:
- _id: '27'
- _id: '518'
- _id: '78'
language:
- iso: eng
page: '165'
publication: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms
(ERSA)
publication_identifier:
isbn:
- 1-60132-140-6
publisher: CSREA Press
quality_controlled: '1'
status: public
title: 'Configurable Processor Architectures: History and Trends'
type: conference
user_id: '15278'
year: '2010'
...
---
_id: '2230'
author:
- first_name: Dirk
full_name: Meister, Dirk
last_name: Meister
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Meister D, Brinkmann A. dedupv1: Improving Deduplication Throughput using
Solid State Drives (SSD). In: Proc. Symp. on Mass Storage Systems and Technologies
(MSST). Washington, DC: IEEE Computer Society; 2010:1-6. doi:10.1109/MSST.2010.5496992'
apa: 'Meister, D., & Brinkmann, A. (2010). dedupv1: Improving Deduplication
Throughput using Solid State Drives (SSD). In Proc. Symp. on Mass Storage Systems
and Technologies (MSST) (pp. 1–6). Washington, DC: IEEE Computer Society.
https://doi.org/10.1109/MSST.2010.5496992'
bibtex: '@inproceedings{Meister_Brinkmann_2010, place={Washington, DC}, title={dedupv1:
Improving Deduplication Throughput using Solid State Drives (SSD)}, DOI={10.1109/MSST.2010.5496992},
booktitle={Proc. Symp. on Mass Storage Systems and Technologies (MSST)}, publisher={IEEE
Computer Society}, author={Meister, Dirk and Brinkmann, André}, year={2010}, pages={1–6}
}'
chicago: 'Meister, Dirk, and André Brinkmann. “Dedupv1: Improving Deduplication
Throughput Using Solid State Drives (SSD).” In Proc. Symp. on Mass Storage
Systems and Technologies (MSST), 1–6. Washington, DC: IEEE Computer Society,
2010. https://doi.org/10.1109/MSST.2010.5496992.'
ieee: 'D. Meister and A. Brinkmann, “dedupv1: Improving Deduplication Throughput
using Solid State Drives (SSD),” in Proc. Symp. on Mass Storage Systems and
Technologies (MSST), 2010, pp. 1–6.'
mla: 'Meister, Dirk, and André Brinkmann. “Dedupv1: Improving Deduplication Throughput
Using Solid State Drives (SSD).” Proc. Symp. on Mass Storage Systems and Technologies
(MSST), IEEE Computer Society, 2010, pp. 1–6, doi:10.1109/MSST.2010.5496992.'
short: 'D. Meister, A. Brinkmann, in: Proc. Symp. on Mass Storage Systems and Technologies
(MSST), IEEE Computer Society, Washington, DC, 2010, pp. 1–6.'
date_created: 2018-04-05T16:47:23Z
date_updated: 2022-01-06T06:55:30Z
department:
- _id: '27'
doi: 10.1109/MSST.2010.5496992
page: 1-6
place: Washington, DC
publication: Proc. Symp. on Mass Storage Systems and Technologies (MSST)
publisher: IEEE Computer Society
status: public
title: 'dedupv1: Improving Deduplication Throughput using Solid State Drives (SSD)'
type: conference
user_id: '24135'
year: '2010'
...
---
_id: '2237'
author:
- first_name: Oliver
full_name: Niehörster, Oliver
last_name: Niehörster
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Gregor
full_name: Fels, Gregor
last_name: Fels
- first_name: Jens
full_name: Krüger, Jens
last_name: Krüger
- first_name: Jens
full_name: Simon, Jens
id: '15273'
last_name: Simon
citation:
ama: 'Niehörster O, Brinkmann A, Fels G, Krüger J, Simon J. Enforcing SLAs in Scientific
Clouds. In: Proc. Int. Conf. on Cluster Computing (CLUSTER). IEEE; 2010:178-187.
doi:10.1109/CLUSTER.2010.42'
apa: Niehörster, O., Brinkmann, A., Fels, G., Krüger, J., & Simon, J. (2010).
Enforcing SLAs in Scientific Clouds. In Proc. Int. Conf. on Cluster Computing
(CLUSTER) (pp. 178–187). IEEE. https://doi.org/10.1109/CLUSTER.2010.42
bibtex: '@inproceedings{Niehörster_Brinkmann_Fels_Krüger_Simon_2010, title={Enforcing
SLAs in Scientific Clouds}, DOI={10.1109/CLUSTER.2010.42},
booktitle={Proc. Int. Conf. on Cluster Computing (CLUSTER)}, publisher={IEEE},
author={Niehörster, Oliver and Brinkmann, André and Fels, Gregor and Krüger, Jens
and Simon, Jens}, year={2010}, pages={178–187} }'
chicago: Niehörster, Oliver, André Brinkmann, Gregor Fels, Jens Krüger, and Jens
Simon. “Enforcing SLAs in Scientific Clouds.” In Proc. Int. Conf. on Cluster
Computing (CLUSTER), 178–87. IEEE, 2010. https://doi.org/10.1109/CLUSTER.2010.42.
ieee: O. Niehörster, A. Brinkmann, G. Fels, J. Krüger, and J. Simon, “Enforcing
SLAs in Scientific Clouds,” in Proc. Int. Conf. on Cluster Computing (CLUSTER),
2010, pp. 178–187.
mla: Niehörster, Oliver, et al. “Enforcing SLAs in Scientific Clouds.” Proc.
Int. Conf. on Cluster Computing (CLUSTER), IEEE, 2010, pp. 178–87, doi:10.1109/CLUSTER.2010.42.
short: 'O. Niehörster, A. Brinkmann, G. Fels, J. Krüger, J. Simon, in: Proc. Int.
Conf. on Cluster Computing (CLUSTER), IEEE, 2010, pp. 178–187.'
date_created: 2018-04-05T17:05:44Z
date_updated: 2022-01-06T06:55:32Z
department:
- _id: '27'
doi: 10.1109/CLUSTER.2010.42
page: 178-187
publication: Proc. Int. Conf. on Cluster Computing (CLUSTER)
publication_identifier:
issn:
- 1552-5244
publisher: IEEE
status: public
title: Enforcing SLAs in Scientific Clouds
type: conference
user_id: '24135'
year: '2010'
...