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IEEE, 2012. https://doi.org/10.1109/FPL.2012.6339370.","apa":"Meyer, B., Schumacher, J., Plessl, C., & Förstner, J. (2012). Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 189–196. https://doi.org/10.1109/FPL.2012.6339370","ama":"Meyer B, Schumacher J, Plessl C, Förstner J. Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE; 2012:189-196. doi:10.1109/FPL.2012.6339370"},"type":"conference","page":"189-196","user_id":"15278","ddc":["000"],"abstract":[{"text":"Although the benefits of FPGAs for accelerating scientific codes are widely acknowledged, the use of FPGA accelerators in scientific computing is not widespread because reaping these benefits requires knowledge of hardware design methods and tools that is typically not available with domain scientists. A promising but hardly investigated approach is to develop tool flows that keep the common languages for scientific code (C,C++, and Fortran) and allow the developer to augment the source code with OpenMPlike directives for instructing the compiler which parts of the application shall be offloaded the FPGA accelerator.\r\nIn this work we study whether the promise of effective FPGA acceleration with an OpenMP-like programming effort\r\ncan actually be held. Our target system is the Convey HC-1 reconfigurable computer for which an OpenMP-like\r\nprogramming environment exists. As case study we use an application from computational nanophotonics. Our results\r\nshow that a developer without previous FPGA experience could create an FPGA-accelerated application that is competitive to an optimized OpenMP-parallelized CPU version running on a two socket quad-core server. Finally, we discuss our experiences with this tool flow and the Convey HC-1 from a productivity and economic point of view.","lang":"eng"}],"status":"public","has_accepted_license":"1","date_created":"2018-03-29T15:04:25Z","file":[{"date_created":"2019-02-13T09:04:46Z","file_name":"2012-11 Meyer,Schumacher,Plessl,Förstner_Convey vector personalities-FPGA acceleratin with an openmp-like programming effort.pdf","access_level":"closed","file_size":2148787,"file_id":"7638","creator":"fossie","content_type":"application/pdf","date_updated":"2019-02-13T09:04:46Z","success":1,"relation":"main_file"}],"author":[{"last_name":"Meyer","full_name":"Meyer, Björn","first_name":"Björn"},{"last_name":"Schumacher","full_name":"Schumacher, Jörn","first_name":"Jörn"},{"first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","last_name":"Plessl","id":"16153"},{"orcid":"0000-0001-7059-9862","full_name":"Förstner, Jens","first_name":"Jens","id":"158","last_name":"Förstner"}],"quality_controlled":"1","publisher":"IEEE","file_date_updated":"2019-02-13T09:04:46Z","keyword":["funding-upb-forschungspreis","funding-maxup","tet_topic_hpc"],"publication":"Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)","doi":"10.1109/FPL.2012.6339370","date_updated":"2023-09-26T13:39:13Z","language":[{"iso":"eng"}],"title":"Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?","department":[{"_id":"27"},{"_id":"518"},{"_id":"15"},{"_id":"78"}]},{"title":"Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"project":[{"name":"SFB 901","grant_number":"160364472","_id":"1"},{"_id":"14","grant_number":"160364472","name":"SFB 901 - Subprojekt C2"},{"name":"SFB 901 - Project Area C","_id":"4"},{"grant_number":"257906","name":"Engineering Proprioception in Computing Systems","_id":"31"}],"date_updated":"2023-09-26T13:42:26Z","doi":"10.1109/ReConFig.2012.6416745","language":[{"iso":"eng"}],"abstract":[{"lang":"eng","text":"Due to the continuously shrinking device structures and increasing densities of FPGAs, thermal aspects have become the new focus for many research projects over the last years. Most researchers rely on temperature simulations to evaluate their novel thermal management techniques. However, the accuracy of the simulations is to some extent questionable and they require a high computational effort if a detailed thermal model is used.For experimental evaluation of real-world temperature management methods, often synthetic heat sources are employed. Therefore, in this paper we investigated the question if we can create significant rises in temperature on modern FPGAs to enable future evaluation of thermal management techniques based on experiments in contrast to simulations. Therefore, we have developed eight different heat-generating cores that use different subsets of the FPGA resources. Our experimental results show that, according to the built-in thermal diode of our Xilinx Virtex-5 FPGA, we can increase the chip temperature by 134 degree C in less than 12 minutes by only utilizing about 21% of the slices."}],"user_id":"15278","ddc":["040"],"file":[{"date_created":"2018-03-15T06:48:32Z","file_name":"615-ReConFig12_01.pdf","access_level":"closed","file_size":730144,"creator":"florida","file_id":"1246","date_updated":"2018-03-15T06:48:32Z","content_type":"application/pdf","relation":"main_file","success":1}],"quality_controlled":"1","author":[{"last_name":"Happe","full_name":"Happe, Markus","first_name":"Markus"},{"last_name":"Hangmann","first_name":"Hendrik","full_name":"Hangmann, Hendrik"},{"first_name":"Andreas","full_name":"Agne, Andreas","last_name":"Agne"},{"full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian","id":"16153","last_name":"Plessl"}],"publisher":"IEEE","publication":"Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig)","file_date_updated":"2018-03-15T06:48:32Z","status":"public","has_accepted_license":"1","date_created":"2017-10-17T12:42:51Z","_id":"615","type":"conference","year":"2012","citation":{"chicago":"Happe, Markus, Hendrik Hangmann, Andreas Agne, and Christian Plessl. “Eight Ways to Put Your FPGA on Fire – A Systematic Study of Heat Generators.” In Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2012. https://doi.org/10.1109/ReConFig.2012.6416745.","apa":"Happe, M., Hangmann, H., Agne, A., & Plessl, C. (2012). Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2012.6416745","ama":"Happe M, Hangmann H, Agne A, Plessl C. Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. In: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8. doi:10.1109/ReConFig.2012.6416745","bibtex":"@inproceedings{Happe_Hangmann_Agne_Plessl_2012, title={Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators}, DOI={10.1109/ReConFig.2012.6416745}, booktitle={Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Happe, Markus and Hangmann, Hendrik and Agne, Andreas and Plessl, Christian}, year={2012}, pages={1–8} }","mla":"Happe, Markus, et al. “Eight Ways to Put Your FPGA on Fire – A Systematic Study of Heat Generators.” Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416745.","short":"M. Happe, H. Hangmann, A. Agne, C. Plessl, in: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.","ieee":"M. Happe, H. Hangmann, A. Agne, and C. Plessl, “Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators,” in Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416745."},"page":"1-8"},{"_id":"591","type":"conference","citation":{"mla":"Kenter, Tobias, et al. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416773.","bibtex":"@inproceedings{Kenter_Plessl_Schmitz_2012, title={Pragma based parallelization - Trading hardware efficiency for ease of use?}, DOI={10.1109/ReConFig.2012.6416773}, booktitle={Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Kenter, Tobias and Plessl, Christian and Schmitz, Henning}, year={2012}, pages={1–8} }","ama":"Kenter T, Plessl C, Schmitz H. Pragma based parallelization - Trading hardware efficiency for ease of use? In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8. doi:10.1109/ReConFig.2012.6416773","apa":"Kenter, T., Plessl, C., & Schmitz, H. (2012). Pragma based parallelization - Trading hardware efficiency for ease of use? Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2012.6416773","chicago":"Kenter, Tobias, Christian Plessl, and Henning Schmitz. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?” In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2012. https://doi.org/10.1109/ReConFig.2012.6416773.","ieee":"T. Kenter, C. Plessl, and H. Schmitz, “Pragma based parallelization - Trading hardware efficiency for ease of use?,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416773.","short":"T. Kenter, C. Plessl, H. Schmitz, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8."},"year":"2012","page":"1-8","user_id":"15278","ddc":["040"],"abstract":[{"text":"One major obstacle for a wide spread FPGA usage in general-purpose computing is the development tool flow that requires much higher effort than for pure software solutions. Convey Computer promises a solution to this problem for their HC-1 platform, where the FPGAs are configured to run as a vector processor and the software source code can be annotated with pragmas that guide an automated vectorization process. We investigate this approach for a stereo matching algorithm that has abundant parallelism and a number of different computational patterns. We note that for this case study the automated vectorization in its current state doesn’t hold its productivity promise. However, we also show that using the Vector Personality can yield a significant speedups compared to CPU implementations in two of three investigated phases of the algorithm. Those speedups don’t match custom FPGA implementations, but can come with much reduced development effort.","lang":"eng"}],"has_accepted_license":"1","status":"public","date_created":"2017-10-17T12:42:47Z","file":[{"relation":"main_file","success":1,"date_updated":"2018-03-15T08:33:18Z","content_type":"application/pdf","file_id":"1257","creator":"florida","file_size":371235,"access_level":"closed","date_created":"2018-03-15T08:33:18Z","file_name":"591-ReConFig2012Kenter_Schmitz_Plessl.pdf"}],"author":[{"last_name":"Kenter","id":"3145","first_name":"Tobias","full_name":"Kenter, Tobias"},{"first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","id":"16153"},{"full_name":"Schmitz, Henning","first_name":"Henning","last_name":"Schmitz"}],"quality_controlled":"1","publisher":"IEEE","file_date_updated":"2018-03-15T08:33:18Z","publication":"Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)","doi":"10.1109/ReConFig.2012.6416773","date_updated":"2023-09-26T13:41:08Z","language":[{"iso":"eng"}],"title":"Pragma based parallelization - Trading hardware efficiency for ease of use?","project":[{"name":"SFB 901","grant_number":"160364472","_id":"1"},{"_id":"14","grant_number":"160364472","name":"SFB 901 - Subprojekt C2"},{"name":"SFB 901 - Project Area C","_id":"4"},{"name":"Engineering Proprioception in Computing Systems","grant_number":"257906","_id":"31"}],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}]},{"status":"public","has_accepted_license":"1","date_created":"2017-10-17T12:42:50Z","quality_controlled":"1","author":[{"first_name":"Markus","full_name":"Happe, Markus","last_name":"Happe"},{"first_name":"Andreas","full_name":"Agne, Andreas","last_name":"Agne"},{"orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","first_name":"Christian","id":"16153","last_name":"Plessl"},{"full_name":"Platzner, Marco","first_name":"Marco","id":"398","last_name":"Platzner"}],"publication":"Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS)","file_date_updated":"2018-03-15T08:14:17Z","file":[{"access_level":"closed","date_created":"2018-03-15T08:14:17Z","file_name":"609-happe12_fpl_awareness.pdf","success":1,"relation":"main_file","date_updated":"2018-03-15T08:14:17Z","content_type":"application/pdf","creator":"florida","file_id":"1249","file_size":146789}],"ddc":["040"],"user_id":"15278","abstract":[{"text":"Today's design and operation principles and methods do not scale well with future reconfigurable computing systems due to an increased complexity in system architectures and applications, run-time dynamics and corresponding requirements. Hence, novel design and operation principles and methods are needed that possibly break drastically with the static ones we have built into our systems and the fixed abstraction layers we have cherished over the last decades. Thus, we propose a HW/SW platform that collects and maintains information about its state and progress which enables the system to reason about its behavior (self-awareness) and utilizes its knowledge to effectively and autonomously adapt its behavior to changing requirements (self-expression).To enable self-awareness, our compute nodes collect information using a variety of sensors, i.e. performance counters and thermal diodes, and use internal self-awareness models that process these information. For self-awareness, on-line learning is crucial such that the node learns and continuously updates its models at run-time to react to changing conditions. To enable self-expression, we break with the classic design-time abstraction layers of hardware, operating system and software. In contrast, our system is able to vertically migrate functionalities between the layers at run-time to exploit trade-offs between abstraction and optimization.This paper presents a heterogeneous multi-core architecture, that enables self-awareness and self-expression, an operating system for our proposed hardware/software platform and a novel self-expression method.","lang":"eng"}],"citation":{"short":"M. Happe, A. Agne, C. Plessl, M. Platzner, in: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.","ieee":"M. Happe, A. Agne, C. Plessl, and M. Platzner, “Hardware/Software Platform for Self-aware Compute Nodes,” in Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.","apa":"Happe, M., Agne, A., Plessl, C., & Platzner, M. (2012). Hardware/Software Platform for Self-aware Compute Nodes. Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 8–9.","ama":"Happe M, Agne A, Plessl C, Platzner M. Hardware/Software Platform for Self-aware Compute Nodes. In: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS). ; 2012:8-9.","chicago":"Happe, Markus, Andreas Agne, Christian Plessl, and Marco Platzner. “Hardware/Software Platform for Self-Aware Compute Nodes.” In Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 8–9, 2012.","bibtex":"@inproceedings{Happe_Agne_Plessl_Platzner_2012, title={Hardware/Software Platform for Self-aware Compute Nodes}, booktitle={Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS)}, author={Happe, Markus and Agne, Andreas and Plessl, Christian and Platzner, Marco}, year={2012}, pages={8–9} }","mla":"Happe, Markus, et al. “Hardware/Software Platform for Self-Aware Compute Nodes.” Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9."},"year":"2012","type":"conference","page":"8-9","_id":"609","project":[{"_id":"1","name":"SFB 901","grant_number":"160364472"},{"_id":"14","grant_number":"160364472","name":"SFB 901 - Subprojekt C2"},{"_id":"4","name":"SFB 901 - Project Area C"},{"_id":"31","name":"Engineering Proprioception in Computing Systems","grant_number":"257906"}],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"title":"Hardware/Software Platform for Self-aware Compute Nodes","language":[{"iso":"eng"}],"date_updated":"2023-09-26T13:41:36Z"},{"_id":"567","page":"559-565","citation":{"chicago":"Barrio, Pablo, Carlos Carreras, Roberto Sierra, Tobias Kenter, and Christian Plessl. “Turning Control Flow Graphs into Function Calls: Code Generation for Heterogeneous Architectures.” In Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 559–65. IEEE, 2012. https://doi.org/10.1109/HPCSim.2012.6266973.","apa":"Barrio, P., Carreras, C., Sierra, R., Kenter, T., & Plessl, C. (2012). Turning control flow graphs into function calls: Code generation for heterogeneous architectures. Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 559–565. https://doi.org/10.1109/HPCSim.2012.6266973","ama":"Barrio P, Carreras C, Sierra R, Kenter T, Plessl C. Turning control flow graphs into function calls: Code generation for heterogeneous architectures. In: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS). IEEE; 2012:559-565. doi:10.1109/HPCSim.2012.6266973","mla":"Barrio, Pablo, et al. “Turning Control Flow Graphs into Function Calls: Code Generation for Heterogeneous Architectures.” Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–65, doi:10.1109/HPCSim.2012.6266973.","bibtex":"@inproceedings{Barrio_Carreras_Sierra_Kenter_Plessl_2012, title={Turning control flow graphs into function calls: Code generation for heterogeneous architectures}, DOI={10.1109/HPCSim.2012.6266973}, booktitle={Proceedings of the International Conference on High Performance Computing and Simulation (HPCS)}, publisher={IEEE}, author={Barrio, Pablo and Carreras, Carlos and Sierra, Roberto and Kenter, Tobias and Plessl, Christian}, year={2012}, pages={559–565} }","short":"P. Barrio, C. Carreras, R. Sierra, T. Kenter, C. Plessl, in: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–565.","ieee":"P. Barrio, C. Carreras, R. Sierra, T. Kenter, and C. Plessl, “Turning control flow graphs into function calls: Code generation for heterogeneous architectures,” in Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 2012, pp. 559–565, doi: 10.1109/HPCSim.2012.6266973."},"year":"2012","type":"conference","user_id":"15278","ddc":["040"],"abstract":[{"text":"Heterogeneous machines are gaining momentum in the High Performance Computing field, due to the theoretical speedups and power consumption. In practice, while some applications meet the performance expectations, heterogeneous architectures still require a tremendous effort from the application developers. This work presents a code generation method to port codes into heterogeneous platforms, based on transformations of the control flow into function calls. The results show that the cost of the function-call mechanism is affordable for the tested HPC kernels. The complete toolchain, based on the LLVM compiler infrastructure, is fully automated once the sequential specification is provided.","lang":"eng"}],"date_created":"2017-10-17T12:42:42Z","has_accepted_license":"1","status":"public","file":[{"file_id":"1275","creator":"florida","file_size":288508,"relation":"main_file","success":1,"date_updated":"2018-03-15T10:20:24Z","content_type":"application/pdf","date_created":"2018-03-15T10:20:24Z","file_name":"567-ba-ca-12a.pdf","access_level":"closed"}],"publication":"Proceedings of the International Conference on High Performance Computing and Simulation (HPCS)","file_date_updated":"2018-03-15T10:20:24Z","publisher":"IEEE","quality_controlled":"1","author":[{"last_name":"Barrio","full_name":"Barrio, Pablo","first_name":"Pablo"},{"full_name":"Carreras, Carlos","first_name":"Carlos","last_name":"Carreras"},{"last_name":"Sierra","first_name":"Roberto","full_name":"Sierra, Roberto"},{"first_name":"Tobias","full_name":"Kenter, Tobias","last_name":"Kenter","id":"3145"},{"first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","id":"16153"}],"doi":"10.1109/HPCSim.2012.6266973","date_updated":"2023-09-26T13:42:54Z","language":[{"iso":"eng"}],"title":"Turning control flow graphs into function calls: Code generation for heterogeneous architectures","project":[{"_id":"1","grant_number":"160364472","name":"SFB 901"},{"name":"SFB 901 - Subprojekt C2","grant_number":"160364472","_id":"14"},{"name":"SFB 901 - Project Area C","_id":"4"}],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}]},{"title":"Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"project":[{"name":"SFB 901","grant_number":"160364472","_id":"1"},{"_id":"14","grant_number":"160364472","name":"SFB 901 - Subprojekt C2"},{"name":"SFB 901 - Project Area C","_id":"4"},{"grant_number":"257906","name":"Engineering Proprioception in Computing Systems","_id":"31"}],"date_updated":"2023-09-26T13:42:03Z","doi":"10.1109/FPL.2012.6339370","language":[{"iso":"eng"}],"abstract":[{"lang":"eng","text":"While numerous publications have presented ring oscillator designs for temperature measurements a detailed study of the ring oscillator's design space is still missing. In this work, we introduce metrics for comparing the performance and area efficiency of ring oscillators and a methodology for determining these metrics. As a result, we present a systematic study of the design space for ring oscillators for a Xilinx Virtex-5 platform FPGA."}],"user_id":"15278","ddc":["040"],"file":[{"date_updated":"2018-03-15T06:49:03Z","content_type":"application/pdf","relation":"main_file","success":1,"file_size":202923,"file_id":"1247","creator":"florida","access_level":"closed","date_created":"2018-03-15T06:49:03Z","file_name":"612-ruething_fpl12.pdf"}],"quality_controlled":"1","author":[{"last_name":"Rüthing","first_name":"Christoph","full_name":"Rüthing, Christoph"},{"last_name":"Happe","first_name":"Markus","full_name":"Happe, Markus"},{"last_name":"Agne","full_name":"Agne, Andreas","first_name":"Andreas"},{"id":"16153","last_name":"Plessl","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","first_name":"Christian"}],"publisher":"IEEE","file_date_updated":"2018-03-15T06:49:03Z","publication":"Proceedings of the International Conference on Field Programmable Logic and Applications (FPL)","status":"public","has_accepted_license":"1","date_created":"2017-10-17T12:42:51Z","_id":"612","year":"2012","citation":{"short":"C. Rüthing, M. Happe, A. Agne, C. Plessl, in: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–562.","ieee":"C. Rüthing, M. Happe, A. Agne, and C. Plessl, “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs,” in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 2012, pp. 559–562, doi: 10.1109/FPL.2012.6339370.","apa":"Rüthing, C., Happe, M., Agne, A., & Plessl, C. (2012). Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs. Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 559–562. https://doi.org/10.1109/FPL.2012.6339370","ama":"Rüthing C, Happe M, Agne A, Plessl C. Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs. In: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2012:559-562. doi:10.1109/FPL.2012.6339370","chicago":"Rüthing, Christoph, Markus Happe, Andreas Agne, and Christian Plessl. “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs.” In Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 559–62. IEEE, 2012. https://doi.org/10.1109/FPL.2012.6339370.","mla":"Rüthing, Christoph, et al. “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs.” Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–62, doi:10.1109/FPL.2012.6339370.","bibtex":"@inproceedings{Rüthing_Happe_Agne_Plessl_2012, title={Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs}, DOI={10.1109/FPL.2012.6339370}, booktitle={Proceedings of the International Conference on Field Programmable Logic and Applications (FPL)}, publisher={IEEE}, author={Rüthing, Christoph and Happe, Markus and Agne, Andreas and Plessl, Christian}, year={2012}, pages={559–562} }"},"type":"conference","page":"559-562"},{"user_id":"15278","title":"Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux","status":"public","project":[{"_id":"30","name":"Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models","grant_number":"01|H11004A"}],"date_created":"2018-04-03T09:18:33Z","quality_controlled":"1","author":[{"full_name":"Beisel, Tobias","first_name":"Tobias","last_name":"Beisel"},{"id":"3118","last_name":"Wiersema","full_name":"Wiersema, Tobias","first_name":"Tobias"},{"last_name":"Plessl","id":"16153","first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982"},{"first_name":"André","full_name":"Brinkmann, André","last_name":"Brinkmann"}],"publication":"Proc. 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Workshop on Computer Architecture and Operating System Co-design (CAOS)}, author={Beisel, Tobias and Wiersema, Tobias and Plessl, Christian and Brinkmann, André}, year={2012} }","mla":"Beisel, Tobias, et al. “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux.” Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.","apa":"Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2012). Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS).","ama":"Beisel T, Wiersema T, Plessl C, Brinkmann A. Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. In: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS). ; 2012.","chicago":"Beisel, Tobias, Tobias Wiersema, Christian Plessl, and André Brinkmann. “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux.” In Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012."},"type":"conference","year":"2012"},{"user_id":"15274","title":"Rule Based Mapping of Virtual Machines in Clouds","abstract":[{"text":"Infrastructure as a Service providers use virtualization to abstract their hardware and to create a dynamic data center. Virtualization enables the consolidation of virtual machines as well as the migration of them to other hosts during runtime. Each provider has its own strategy to efficiently operate a data center. We present a rule based mapping algorithm for VMs, which is able to automatically adapt the mapping between VMs and physical hosts. It offers an interface where policies can be defined and combined in a generic way. The algorithm performs the initial mapping at request time as well as a remapping during runtime. It deals with policy and infrastructure changes. We extended the open source IaaS solution Eucalyptus and we evaluated it with typical policies: maximizing the compute performance and VM locality to achieve a high performance and minimizing energy consumption. The evaluation was done on state-of-the-art servers in our own data center and by simulations using a workload of the Parallel Workload Archive. The results show that our algorithm performs well in dynamic data centers environments.","lang":"eng"}],"status":"public","date_created":"2018-03-29T11:21:05Z","publication_status":"published","author":[{"last_name":"Kleineweber","full_name":"Kleineweber, Christoph","first_name":"Christoph"},{"full_name":"Keller, Axel","first_name":"Axel","id":"15274","last_name":"Keller"},{"full_name":"Niehörster, Oliver","first_name":"Oliver","last_name":"Niehörster"},{"full_name":"Brinkmann, André","first_name":"André","last_name":"Brinkmann"}],"department":[{"_id":"27"}],"publication":"Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP)","doi":"10.1109/PDP.2011.69","_id":"1968","date_updated":"2022-01-06T06:54:10Z","language":[{"iso":"eng"}],"year":"2011","citation":{"short":"C. Kleineweber, A. Keller, O. Niehörster, A. Brinkmann, in: Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011.","ieee":"C. Kleineweber, A. Keller, O. Niehörster, and A. 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Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011, doi:10.1109/PDP.2011.69.","bibtex":"@inproceedings{Kleineweber_Keller_Niehörster_Brinkmann_2011, title={Rule Based Mapping of Virtual Machines in Clouds}, DOI={10.1109/PDP.2011.69}, booktitle={Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP)}, author={Kleineweber, Christoph and Keller, Axel and Niehörster, Oliver and Brinkmann, André}, year={2011} }"},"type":"conference"},{"language":[{"iso":"eng"}],"citation":{"ieee":"O. Niehörster, A. Keller, and A. Brinkmann, “An Energy-Aware SaaS Stack,” in Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011.","short":"O. Niehörster, A. Keller, A. Brinkmann, in: Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011.","mla":"Niehörster, Oliver, et al. “An Energy-Aware SaaS Stack.” Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011, doi:10.1109/MASCOTS.2011.52.","bibtex":"@inproceedings{Niehörster_Keller_Brinkmann_2011, title={An Energy-Aware SaaS Stack}, DOI={10.1109/MASCOTS.2011.52}, booktitle={Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS)}, author={Niehörster, Oliver and Keller, Axel and Brinkmann, André}, year={2011} }","chicago":"Niehörster, Oliver, Axel Keller, and André Brinkmann. “An Energy-Aware SaaS Stack.” In Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011. https://doi.org/10.1109/MASCOTS.2011.52.","apa":"Niehörster, O., Keller, A., & Brinkmann, A. (2011). An Energy-Aware SaaS Stack. In Proc. Int. Meeting of the IEEE Int. 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The whole architecture is self-optimizing and able to use public or private clouds.","lang":"eng"}],"user_id":"15274","title":"An Energy-Aware SaaS Stack"},{"date_created":"2018-04-03T14:30:39Z","status":"public","publication":"Proc. Int. Conf. on High Performance Computing (HIPC)","department":[{"_id":"27"}],"author":[{"last_name":"Miranda","first_name":"Alberto","full_name":"Miranda, Alberto"},{"last_name":"Effert","first_name":"Sascha","full_name":"Effert, Sascha"},{"last_name":"Kang","first_name":"Yangwook","full_name":"Kang, Yangwook"},{"full_name":"Miller, Ethan","first_name":"Ethan","last_name":"Miller"},{"last_name":"Brinkmann","full_name":"Brinkmann, André","first_name":"André"},{"first_name":"Toni","full_name":"Cortes, Toni","last_name":"Cortes"}],"publisher":"IEEE Computer Society","user_id":"24135","title":"Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems","place":"Washington, DC","page":"1-10","type":"conference","citation":{"short":"A. Miranda, S. Effert, Y. Kang, E. Miller, A. Brinkmann, T. Cortes, in: Proc. Int. Conf. on High Performance Computing (HIPC), IEEE Computer Society, Washington, DC, 2011, pp. 1–10.","ieee":"A. Miranda, S. Effert, Y. Kang, E. Miller, A. Brinkmann, and T. Cortes, “Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems,” in Proc. Int. Conf. on High Performance Computing (HIPC), 2011, pp. 1–10.","chicago":"Miranda, Alberto, Sascha Effert, Yangwook Kang, Ethan Miller, André Brinkmann, and Toni Cortes. “Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems.” In Proc. Int. Conf. on High Performance Computing (HIPC), 1–10. Washington, DC: IEEE Computer Society, 2011. https://doi.org/10.1109/HiPC.2011.6152745.","apa":"Miranda, A., Effert, S., Kang, Y., Miller, E., Brinkmann, A., & Cortes, T. (2011). Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems. In Proc. Int. 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Conf. on High Performance Computing (HIPC)}, publisher={IEEE Computer Society}, author={Miranda, Alberto and Effert, Sascha and Kang, Yangwook and Miller, Ethan and Brinkmann, André and Cortes, Toni}, year={2011}, pages={1–10} }","mla":"Miranda, Alberto, et al. “Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems.” Proc. Int. Conf. on High Performance Computing (HIPC), IEEE Computer Society, 2011, pp. 1–10, doi:10.1109/HiPC.2011.6152745."},"year":"2011","doi":"10.1109/HiPC.2011.6152745","date_updated":"2022-01-06T06:55:18Z","_id":"2188"},{"author":[{"full_name":"Grawinkel, Matthias","first_name":"Matthias","last_name":"Grawinkel"},{"full_name":"Pargmann, Markus","first_name":"Markus","last_name":"Pargmann"},{"last_name":"Dömer","first_name":"Hubert","full_name":"Dömer, Hubert"},{"first_name":"André","full_name":"Brinkmann, André","last_name":"Brinkmann"}],"publisher":"IEEE","department":[{"_id":"27"}],"publication":"Proc. IEEE Int. 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Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System. In Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS) (pp. 380–387). IEEE. https://doi.org/10.1109/ICPADS.2011.77","ama":"Grawinkel M, Pargmann M, Dömer H, Brinkmann A. Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System. In: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS). IEEE; 2011:380-387. doi:10.1109/ICPADS.2011.77","mla":"Grawinkel, Matthias, et al. “Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System.” Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), IEEE, 2011, pp. 380–87, doi:10.1109/ICPADS.2011.77.","bibtex":"@inproceedings{Grawinkel_Pargmann_Dömer_Brinkmann_2011, title={Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System}, DOI={10.1109/ICPADS.2011.77}, booktitle={Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS)}, publisher={IEEE}, author={Grawinkel, Matthias and Pargmann, Markus and Dömer, Hubert and Brinkmann, André}, year={2011}, pages={380–387} }"},"year":"2011","page":"380-387","date_updated":"2022-01-06T06:55:18Z","_id":"2189","doi":"10.1109/ICPADS.2011.77"},{"type":"conference","year":"2011","citation":{"short":"O. Niehörster, A. Brinkmann, in: Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), IEEE Computer Society, Washington DC, USA, 2011, pp. 138–145.","ieee":"O. Niehörster and A. Brinkmann, “Autonomic Resource Management Handling Delayed Configuration Effects,” in Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), 2011, pp. 138–145.","ama":"Niehörster O, Brinkmann A. Autonomic Resource Management Handling Delayed Configuration Effects. In: Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom). Washington DC, USA: IEEE Computer Society; 2011:138-145. doi:10.1109/CloudCom.2011.28","apa":"Niehörster, O., & Brinkmann, A. (2011). Autonomic Resource Management Handling Delayed Configuration Effects. In Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom) (pp. 138–145). Washington DC, USA: IEEE Computer Society. https://doi.org/10.1109/CloudCom.2011.28","chicago":"Niehörster, Oliver, and André Brinkmann. “Autonomic Resource Management Handling Delayed Configuration Effects.” In Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), 138–45. Washington DC, USA: IEEE Computer Society, 2011. https://doi.org/10.1109/CloudCom.2011.28.","bibtex":"@inproceedings{Niehörster_Brinkmann_2011, place={Washington DC, USA}, title={Autonomic Resource Management Handling Delayed Configuration Effects}, DOI={10.1109/CloudCom.2011.28}, booktitle={Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom)}, publisher={IEEE Computer Society}, author={Niehörster, Oliver and Brinkmann, André}, year={2011}, pages={138–145} }","mla":"Niehörster, Oliver, and André Brinkmann. “Autonomic Resource Management Handling Delayed Configuration Effects.” Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), IEEE Computer Society, 2011, pp. 138–45, doi:10.1109/CloudCom.2011.28."},"page":"138-145","_id":"2190","date_updated":"2022-01-06T06:55:19Z","doi":"10.1109/CloudCom.2011.28","author":[{"first_name":"Oliver","full_name":"Niehörster, Oliver","last_name":"Niehörster"},{"last_name":"Brinkmann","full_name":"Brinkmann, André","first_name":"André"}],"publisher":"IEEE Computer Society","department":[{"_id":"27"}],"publication":"Proc. IEEE Int. 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Estimation and Partitioning for CPU-Accelerator Architectures. In: Intel European Research and Innovation Conference. ; 2011.","apa":"Kenter, T., Plessl, C., Platzner, M., & Kauschke, M. (2011). Estimation and Partitioning for CPU-Accelerator Architectures. In Intel European Research and Innovation Conference.","ieee":"T. Kenter, C. Plessl, M. Platzner, and M. Kauschke, “Estimation and Partitioning for CPU-Accelerator Architectures,” in Intel European Research and Innovation Conference, 2011.","short":"T. Kenter, C. Plessl, M. Platzner, M. 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Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS). IEEE Computer Society; 2011:297-306. doi:10.1109/mascots.2011.13","chicago":"Grawinkel, Matthias, Thorsten Schäfer, André Brinkmann, Jens Hagemeyer, and Mario Porrmann. “Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability.” In Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 297–306. IEEE Computer Society, 2011. https://doi.org/10.1109/mascots.2011.13.","mla":"Grawinkel, Matthias, et al. “Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability.” Proc. Int. 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IEEE Computer Society; 2011:223-226. doi:10.1109/ASAP.2011.6043273","chicago":"Beisel, Tobias, Tobias Wiersema, Christian Plessl, and André Brinkmann. “Cooperative Multitasking for Heterogeneous Accelerators in the Linux Completely Fair Scheduler.” In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 223–26. IEEE Computer Society, 2011. https://doi.org/10.1109/ASAP.2011.6043273."},"year":"2011","type":"conference","date_updated":"2023-09-26T13:43:48Z","_id":"2193","doi":"10.1109/ASAP.2011.6043273"},{"language":[{"iso":"eng"}],"doi":"10.1109/ReConFig.2011.59","date_updated":"2023-09-26T13:46:08Z","project":[{"grant_number":"160364472","name":"SFB 901","_id":"1"},{"_id":"14","grant_number":"160364472","name":"SFB 901 - Subprojekt C2"},{"_id":"4","name":"SFB 901 - Project Area C"},{"_id":"31","name":"Engineering Proprioception in Computing Systems","grant_number":"257906"}],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"title":"Measuring and Predicting Temperature Distributions on FPGAs at Run-Time","page":"55-60","citation":{"ieee":"M. Happe, A. Agne, and C. Plessl, “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time,” in Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2011, pp. 55–60, doi: 10.1109/ReConFig.2011.59.","short":"M. Happe, A. Agne, C. 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IEEE, 2011. https://doi.org/10.1109/ReConFig.2011.59."},"year":"2011","type":"conference","_id":"656","date_created":"2017-10-17T12:42:59Z","has_accepted_license":"1","status":"public","publication":"Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","file_date_updated":"2018-03-14T13:49:39Z","publisher":"IEEE","author":[{"full_name":"Happe, Markus","first_name":"Markus","last_name":"Happe"},{"last_name":"Agne","first_name":"Andreas","full_name":"Agne, Andreas"},{"first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","id":"16153"}],"quality_controlled":"1","file":[{"file_size":502244,"creator":"florida","file_id":"1220","date_updated":"2018-03-14T13:49:39Z","content_type":"application/pdf","relation":"main_file","success":1,"date_created":"2018-03-14T13:49:39Z","file_name":"656-2011_happe_reconfig.pdf","access_level":"closed"}],"ddc":["040"],"user_id":"15278","abstract":[{"lang":"eng","text":"In the next decades, hybrid multi-cores will be the predominant architecture for reconfigurable FPGA-based systems. Temperature-aware thread mapping strategies are key for providing dependability in such systems. These strategies rely on measuring the temperature distribution and redicting the thermal behavior of the system when there are changes to the hardware and software running on the FPGA. While there are a number of tools that use thermal models to predict temperature distributions at design time, these tools lack the flexibility to autonomously adjust to changing FPGA configurations. To address this problem we propose a temperature-aware system that empowers FPGA-based reconfigurable multi-cores to autonomously predict the on-chip temperature distribution for pro-active thread remapping. Our system obtains temperature measurements through a self-calibrating grid of sensors and uses area constrained heat-generating circuits in order to generate spatial and temporal temperature gradients. The generated temperature variations are then used to learn the free parameters of the system's thermal model. The system thus acquires an understanding of its own thermal characteristics. We implemented an FPGA system containing a net of 144 temperature sensors on a Xilinx Virtex-6 LX240T FPGA that is aware of its thermal model. Finally, we show that the temperature predictions vary less than 0.72 degree C on average compared to the measured temperature distributions at run-time."}]},{"type":"conference","citation":{"ieee":"T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures,” in Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 2011, pp. 177–180, doi: 10.1145/1950413.1950448.","short":"T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: Proc. Int. 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The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations. In Proc. Int. Workshop on Scientific Gateways (IWSG) (pp. 39–43). Consorzio COMETA.","chicago":"Wewior, Martin, Lars Packschies, Dirk Blunk, Daniel Wickeroth, Klaus-Dieter Warzecha, Sonja Herres-Pawlis, Sandra Gesing, et al. “The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations.” In Proc. Int. Workshop on Scientific Gateways (IWSG), 39–43. Consorzio COMETA, 2010.","ieee":"M. Wewior et al., “The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations,” in Proc. Int. Workshop on Scientific Gateways (IWSG), 2010, pp. 39–43.","short":"M. Wewior, L. Packschies, D. Blunk, D. Wickeroth, K.-D. Warzecha, S. Herres-Pawlis, S. Gesing, S. Breuers, J. Krüger, G. Birkenheuer, U. Lang, in: Proc. Int. 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Cracow Grid Workshop (CGW)","author":[{"last_name":"Niehörster","full_name":"Niehörster, Oliver","first_name":"Oliver"},{"last_name":"Birkenheuer","first_name":"Georg","full_name":"Birkenheuer, Georg"},{"first_name":"André","full_name":"Brinkmann, André","last_name":"Brinkmann"},{"last_name":"Blunk","first_name":"Dirk","full_name":"Blunk, Dirk"},{"first_name":"Brigitta","full_name":"Elsässer, Brigitta","last_name":"Elsässer"},{"last_name":"Herres-Pawlis","full_name":"Herres-Pawlis, Sonja","first_name":"Sonja"},{"last_name":"Krüger","full_name":"Krüger, Jens","first_name":"Jens"},{"first_name":"Julia","full_name":"Niehörster, Julia","last_name":"Niehörster"},{"last_name":"Packschies","full_name":"Packschies, Lars","first_name":"Lars"},{"last_name":"Fels","first_name":"Gregor","full_name":"Fels, Gregor"}],"publication_identifier":{"isbn":["978-83-61433-01-9"]},"date_created":"2018-04-05T17:14:52Z","status":"public","title":"Providing Scientific Software as a Service in Consideration of Service Level Agreements","user_id":"24135","page":"55-63","year":"2009","citation":{"chicago":"Niehörster, Oliver, Georg Birkenheuer, André Brinkmann, Dirk Blunk, Brigitta Elsässer, Sonja Herres-Pawlis, Jens Krüger, Julia Niehörster, Lars Packschies, and Gregor Fels. “Providing Scientific Software as a Service in Consideration of Service Level Agreements.” In Proc. Cracow Grid Workshop (CGW), 55–63, 2009.","ama":"Niehörster O, Birkenheuer G, Brinkmann A, et al. Providing Scientific Software as a Service in Consideration of Service Level Agreements. In: Proc. Cracow Grid Workshop (CGW). ; 2009:55-63.","apa":"Niehörster, O., Birkenheuer, G., Brinkmann, A., Blunk, D., Elsässer, B., Herres-Pawlis, S., … Fels, G. (2009). Providing Scientific Software as a Service in Consideration of Service Level Agreements. In Proc. Cracow Grid Workshop (CGW) (pp. 55–63).","mla":"Niehörster, Oliver, et al. “Providing Scientific Software as a Service in Consideration of Service Level Agreements.” Proc. Cracow Grid Workshop (CGW), 2009, pp. 55–63.","bibtex":"@inproceedings{Niehörster_Birkenheuer_Brinkmann_Blunk_Elsässer_Herres-Pawlis_Krüger_Niehörster_Packschies_Fels_2009, title={Providing Scientific Software as a Service in Consideration of Service Level Agreements}, booktitle={Proc. Cracow Grid Workshop (CGW)}, author={Niehörster, Oliver and Birkenheuer, Georg and Brinkmann, André and Blunk, Dirk and Elsässer, Brigitta and Herres-Pawlis, Sonja and Krüger, Jens and Niehörster, Julia and Packschies, Lars and Fels, Gregor}, year={2009}, pages={55–63} }","short":"O. Niehörster, G. Birkenheuer, A. Brinkmann, D. Blunk, B. Elsässer, S. Herres-Pawlis, J. Krüger, J. Niehörster, L. Packschies, G. Fels, in: Proc. Cracow Grid Workshop (CGW), 2009, pp. 55–63.","ieee":"O. Niehörster et al., “Providing Scientific Software as a Service in Consideration of Service Level Agreements,” in Proc. Cracow Grid Workshop (CGW), 2009, pp. 55–63."},"type":"conference","_id":"2240","date_updated":"2022-01-06T06:55:32Z"},{"department":[{"_id":"27"}],"publication":"Proc. Cracow Grid Workshop (CGW)","author":[{"full_name":"Birkenheuer, Georg","first_name":"Georg","last_name":"Birkenheuer"},{"first_name":"Arthur","full_name":"Carlson, Arthur","last_name":"Carlson"},{"last_name":"Fölling","first_name":"Alexander","full_name":"Fölling, Alexander"},{"last_name":"Högqvist","first_name":"Mikael","full_name":"Högqvist, Mikael"},{"first_name":"Andreas","full_name":"Hoheisel, Andreas","last_name":"Hoheisel"},{"last_name":"Papaspyrou","first_name":"Alexander","full_name":"Papaspyrou, Alexander"},{"last_name":"Rieger","first_name":"Klaus","full_name":"Rieger, Klaus"},{"full_name":"Schott, Bernhard","first_name":"Bernhard","last_name":"Schott"},{"full_name":"Ziegler, Wolfgang","first_name":"Wolfgang","last_name":"Ziegler"}],"date_created":"2018-04-06T15:14:46Z","status":"public","publication_identifier":{"isbn":["978-83-61433-01-9"]},"user_id":"24135","title":"Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!","page":"96-103","citation":{"ama":"Birkenheuer G, Carlson A, Fölling A, et al. Connecting Communities on the Meta-Scheduling Level: The DGSI Approach! In: Proc. Cracow Grid Workshop (CGW). ; 2009:96-103.","apa":"Birkenheuer, G., Carlson, A., Fölling, A., Högqvist, M., Hoheisel, A., Papaspyrou, A., … Ziegler, W. (2009). Connecting Communities on the Meta-Scheduling Level: The DGSI Approach! In Proc. Cracow Grid Workshop (CGW) (pp. 96–103).","chicago":"Birkenheuer, Georg, Arthur Carlson, Alexander Fölling, Mikael Högqvist, Andreas Hoheisel, Alexander Papaspyrou, Klaus Rieger, Bernhard Schott, and Wolfgang Ziegler. “Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!” In Proc. Cracow Grid Workshop (CGW), 96–103, 2009.","mla":"Birkenheuer, Georg, et al. “Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!” Proc. Cracow Grid Workshop (CGW), 2009, pp. 96–103.","bibtex":"@inproceedings{Birkenheuer_Carlson_Fölling_Högqvist_Hoheisel_Papaspyrou_Rieger_Schott_Ziegler_2009, title={Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!}, booktitle={Proc. Cracow Grid Workshop (CGW)}, author={Birkenheuer, Georg and Carlson, Arthur and Fölling, Alexander and Högqvist, Mikael and Hoheisel, Andreas and Papaspyrou, Alexander and Rieger, Klaus and Schott, Bernhard and Ziegler, Wolfgang}, year={2009}, pages={96–103} }","short":"G. Birkenheuer, A. Carlson, A. Fölling, M. Högqvist, A. Hoheisel, A. Papaspyrou, K. Rieger, B. Schott, W. Ziegler, in: Proc. Cracow Grid Workshop (CGW), 2009, pp. 96–103.","ieee":"G. Birkenheuer et al., “Connecting Communities on the Meta-Scheduling Level: The DGSI Approach!,” in Proc. Cracow Grid Workshop (CGW), 2009, pp. 96–103."},"type":"conference","year":"2009","_id":"2260","date_updated":"2022-01-06T06:55:37Z"},{"page":"8:1-8:12","citation":{"chicago":"Meister, Dirk, and André Brinkmann. “Multi-Level Comparison of Data Deduplication in a Backup Scenario.” In Proc. of the Israeli Experimental Systems Conference (SYSTOR), 8:1-8:12. New York: ACM, 2009. https://doi.org/10.1145/1534530.1534541.","ama":"Meister D, Brinkmann A. Multi-Level Comparison of Data Deduplication in a Backup Scenario. In: Proc. of the Israeli Experimental Systems Conference (SYSTOR). New York: ACM; 2009:8:1-8:12. doi:10.1145/1534530.1534541","apa":"Meister, D., & Brinkmann, A. (2009). Multi-Level Comparison of Data Deduplication in a Backup Scenario. In Proc. of the Israeli Experimental Systems Conference (SYSTOR) (pp. 8:1-8:12). New York: ACM. https://doi.org/10.1145/1534530.1534541","bibtex":"@inproceedings{Meister_Brinkmann_2009, place={New York}, title={Multi-Level Comparison of Data Deduplication in a Backup Scenario}, DOI={10.1145/1534530.1534541}, booktitle={Proc. of the Israeli Experimental Systems Conference (SYSTOR)}, publisher={ACM}, author={Meister, Dirk and Brinkmann, André}, year={2009}, pages={8:1-8:12} }","mla":"Meister, Dirk, and André Brinkmann. “Multi-Level Comparison of Data Deduplication in a Backup Scenario.” Proc. of the Israeli Experimental Systems Conference (SYSTOR), ACM, 2009, pp. 8:1-8:12, doi:10.1145/1534530.1534541.","short":"D. Meister, A. Brinkmann, in: Proc. of the Israeli Experimental Systems Conference (SYSTOR), ACM, New York, 2009, pp. 8:1-8:12.","ieee":"D. Meister and A. Brinkmann, “Multi-Level Comparison of Data Deduplication in a Backup Scenario,” in Proc. of the Israeli Experimental Systems Conference (SYSTOR), 2009, pp. 8:1-8:12."},"type":"conference","year":"2009","doi":"10.1145/1534530.1534541","date_updated":"2022-01-06T06:55:37Z","_id":"2264","date_created":"2018-04-06T15:21:25Z","status":"public","publication":"Proc. of the Israeli Experimental Systems Conference (SYSTOR)","department":[{"_id":"27"}],"publisher":"ACM","author":[{"last_name":"Meister","first_name":"Dirk","full_name":"Meister, Dirk"},{"first_name":"André","full_name":"Brinkmann, André","last_name":"Brinkmann"}],"title":"Multi-Level Comparison of Data Deduplication in a Backup Scenario","user_id":"24135","place":"New York"},{"doi":"10.1007/978-3-642-04633-9_5","_id":"818","date_updated":"2022-01-06T07:03:51Z","year":"2009","citation":{"bibtex":"@inproceedings{Birkenheuer_Brinkmann_Karl_2009, title={The Gain of Overbooking}, DOI={10.1007/978-3-642-04633-9_5}, booktitle={Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers}, author={Birkenheuer, Georg and Brinkmann, Andre and Karl, Holger}, year={2009}, pages={80–100} }","mla":"Birkenheuer, Georg, et al. “The Gain of Overbooking.” Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers, 2009, pp. 80–100, doi:10.1007/978-3-642-04633-9_5.","chicago":"Birkenheuer, Georg, Andre Brinkmann, and Holger Karl. “The Gain of Overbooking.” In Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers, 80–100, 2009. https://doi.org/10.1007/978-3-642-04633-9_5.","ama":"Birkenheuer G, Brinkmann A, Karl H. The Gain of Overbooking. In: Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers. ; 2009:80-100. doi:10.1007/978-3-642-04633-9_5","apa":"Birkenheuer, G., Brinkmann, A., & Karl, H. (2009). The Gain of Overbooking. In Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers (pp. 80–100). https://doi.org/10.1007/978-3-642-04633-9_5","ieee":"G. Birkenheuer, A. Brinkmann, and H. Karl, “The Gain of Overbooking,” in Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers, 2009, pp. 80–100.","short":"G. Birkenheuer, A. Brinkmann, H. Karl, in: Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers, 2009, pp. 80–100."},"type":"conference","page":"80-100","title":"The Gain of Overbooking","user_id":"24135","status":"public","date_created":"2017-11-27T10:22:26Z","author":[{"last_name":"Birkenheuer","first_name":"Georg","full_name":"Birkenheuer, Georg"},{"last_name":"Brinkmann","full_name":"Brinkmann, Andre","first_name":"Andre"},{"full_name":"Karl, Holger","first_name":"Holger","id":"126","last_name":"Karl"}],"publication":"Job Scheduling Strategies for Parallel Processing, 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009. Revised Papers","department":[{"_id":"75"},{"_id":"27"}]},{"abstract":[{"lang":"eng","text":"Mapping applications that consist of a collection of cores to FPGA accelerators and optimizing their performance is a challenging task in high performance reconfigurable computing. We present IMORC, an architectural template and highly versatile on-chip interconnect. IMORC links provide asynchronous FIFOs and bitwidth conversion which allows for flexibly composing accelerators from cores running at full speed within their own clock domains, thus facilitating the re-use of cores and portability. Further, IMORC inserts performance counters for monitoring runtime data. In this paper, we first introduce the IMORC architectural template and the on-chip interconnect, and then demonstrate IMORC on the example of accelerating the k-th nearest neighbor thinning problem on an XD1000 reconfigurable computing system. Using IMORC's monitoring infrastructure, we gain insights into the data-dependent behavior of the application which, in turn, allow for optimizing the accelerator. "}],"user_id":"15278","publisher":"IEEE Computer Society","author":[{"first_name":"Tobias","full_name":"Schumacher, Tobias","last_name":"Schumacher"},{"id":"16153","last_name":"Plessl","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","first_name":"Christian"},{"first_name":"Marco","full_name":"Platzner, Marco","last_name":"Platzner","id":"398"}],"quality_controlled":"1","keyword":["IMORC","interconnect","performance"],"publication":"Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM)","status":"public","date_created":"2018-04-16T15:05:52Z","_id":"2350","year":"2009","citation":{"chicago":"Schumacher, Tobias, Christian Plessl, and Marco Platzner. “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.” In Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 275–78. IEEE Computer Society, 2009. https://doi.org/10.1109/FCCM.2009.25.","apa":"Schumacher, T., Plessl, C., & Platzner, M. (2009). IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 275–278. https://doi.org/10.1109/FCCM.2009.25","ama":"Schumacher T, Plessl C, Platzner M. IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. In: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM). IEEE Computer Society; 2009:275-278. doi:10.1109/FCCM.2009.25","mla":"Schumacher, Tobias, et al. “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.” Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–78, doi:10.1109/FCCM.2009.25.","bibtex":"@inproceedings{Schumacher_Plessl_Platzner_2009, title={IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing}, DOI={10.1109/FCCM.2009.25}, booktitle={Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM)}, publisher={IEEE Computer Society}, author={Schumacher, Tobias and Plessl, Christian and Platzner, Marco}, year={2009}, pages={275–278} }","short":"T. Schumacher, C. Plessl, M. Platzner, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–278.","ieee":"T. Schumacher, C. Plessl, and M. Platzner, “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing,” in Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2009, pp. 275–278, doi: 10.1109/FCCM.2009.25."},"type":"conference","page":"275-278","title":"IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"publication_identifier":{"isbn":["978-1-4244-4450-2"]},"date_updated":"2023-09-26T13:51:44Z","doi":"10.1109/FCCM.2009.25","language":[{"iso":"eng"}]},{"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"publication":"Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS)","keyword":["EvoCache","evolvable hardware","computer architecture"],"author":[{"first_name":"Paul","full_name":"Kaufmann, Paul","last_name":"Kaufmann"},{"last_name":"Plessl","id":"16153","first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982"},{"last_name":"Platzner","id":"398","first_name":"Marco","full_name":"Platzner, Marco"}],"publisher":"IEEE Computer Society","quality_controlled":"1","date_created":"2018-04-06T15:18:24Z","status":"public","abstract":[{"lang":"eng","text":"In this work we present EvoCache, a novel approach for implementing application-specific caches. The key innovation of EvoCache is to make the function that maps memory addresses from the CPU address space to cache indices programmable. We support arbitrary Boolean mapping functions that are implemented within a small reconfigurable logic fabric. For finding suitable cache mapping functions we rely on techniques from the evolvable hardware domain and utilize an evolutionary optimization procedure. We evaluate the use of EvoCache in an embedded processor for two specific applications (JPEG and BZIP2 compression) with respect to execution time, cache miss rate and energy consumption. We show that the evolvable hardware approach for optimizing the cache functions not only significantly improves the cache performance for the training data used during optimization, but that the evolved mapping functions generalize very well. Compared to a conventional cache architecture, EvoCache applied to test data achieves a reduction in execution time of up to 14.31% for JPEG (10.98% for BZIP2), and in energy consumption by 16.43% for JPEG (10.70% for BZIP2). We also discuss the integration of EvoCache into the operating system and show that the area and delay overheads introduced by EvoCache are acceptable. "}],"place":"Los Alamitos, CA, USA","user_id":"15278","title":"EvoCaches: Application-specific Adaptation of Cache Mapping","language":[{"iso":"eng"}],"page":"11-18","type":"conference","year":"2009","citation":{"ieee":"P. Kaufmann, C. Plessl, and M. Platzner, “EvoCaches: Application-specific Adaptation of Cache Mapping,” in Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2009, pp. 11–18.","short":"P. Kaufmann, C. Plessl, M. Platzner, in: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 11–18.","mla":"Kaufmann, Paul, et al. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, 2009, pp. 11–18.","bibtex":"@inproceedings{Kaufmann_Plessl_Platzner_2009, place={Los Alamitos, CA, USA}, title={EvoCaches: Application-specific Adaptation of Cache Mapping}, booktitle={Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS)}, publisher={IEEE Computer Society}, author={Kaufmann, Paul and Plessl, Christian and Platzner, Marco}, year={2009}, pages={11–18} }","apa":"Kaufmann, P., Plessl, C., & Platzner, M. (2009). EvoCaches: Application-specific Adaptation of Cache Mapping. Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 11–18.","ama":"Kaufmann P, Plessl C, Platzner M. EvoCaches: Application-specific Adaptation of Cache Mapping. In: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS). IEEE Computer Society; 2009:11-18.","chicago":"Kaufmann, Paul, Christian Plessl, and Marco Platzner. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” In Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 11–18. Los Alamitos, CA, USA: IEEE Computer Society, 2009."},"_id":"2262","date_updated":"2023-09-26T13:53:11Z"},{"publication":"Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN)","department":[{"_id":"27"},{"_id":"518"}],"keyword":["WSN","PermaSense"],"publisher":"IEEE Computer Society","author":[{"first_name":"Jan","full_name":"Beutel, Jan","last_name":"Beutel"},{"last_name":"Gruber","full_name":"Gruber, Stephan","first_name":"Stephan"},{"first_name":"Andi","full_name":"Hasler, Andi","last_name":"Hasler"},{"full_name":"Lim, Roman","first_name":"Roman","last_name":"Lim"},{"first_name":"Andreas","full_name":"Meier, Andreas","last_name":"Meier"},{"full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian","id":"16153","last_name":"Plessl"},{"full_name":"Talzi, Igor","first_name":"Igor","last_name":"Talzi"},{"last_name":"Thiele","first_name":"Lothar","full_name":"Thiele, Lothar"},{"first_name":"Christian","full_name":"Tschudin, Christian","last_name":"Tschudin"},{"first_name":"Matthias","full_name":"Woehrle, Matthias","last_name":"Woehrle"},{"first_name":"Mustafa","full_name":"Yuecel, Mustafa","last_name":"Yuecel"}],"quality_controlled":"1","publication_identifier":{"isbn":["978-1-4244-5108-1"]},"date_created":"2018-04-16T15:08:07Z","status":"public","extern":"1","place":"Washington, DC, USA","title":"PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes","user_id":"15278","page":"265-276","year":"2009","type":"conference","citation":{"short":"J. Beutel, S. Gruber, A. Hasler, R. Lim, A. Meier, C. Plessl, I. Talzi, L. Thiele, C. Tschudin, M. Woehrle, M. Yuecel, in: Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), IEEE Computer Society, Washington, DC, USA, 2009, pp. 265–276.","ieee":"J. Beutel et al., “PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes,” in Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), 2009, pp. 265–276.","ama":"Beutel J, Gruber S, Hasler A, et al. PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes. In: Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN). IEEE Computer Society; 2009:265-276.","apa":"Beutel, J., Gruber, S., Hasler, A., Lim, R., Meier, A., Plessl, C., Talzi, I., Thiele, L., Tschudin, C., Woehrle, M., & Yuecel, M. (2009). PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes. Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), 265–276.","chicago":"Beutel, Jan, Stephan Gruber, Andi Hasler, Roman Lim, Andreas Meier, Christian Plessl, Igor Talzi, et al. “PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes.” In Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), 265–76. Washington, DC, USA: IEEE Computer Society, 2009.","mla":"Beutel, Jan, et al. “PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes.” Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), IEEE Computer Society, 2009, pp. 265–76.","bibtex":"@inproceedings{Beutel_Gruber_Hasler_Lim_Meier_Plessl_Talzi_Thiele_Tschudin_Woehrle_et al._2009, place={Washington, DC, USA}, title={PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes}, booktitle={Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN)}, publisher={IEEE Computer Society}, author={Beutel, Jan and Gruber, Stephan and Hasler, Andi and Lim, Roman and Meier, Andreas and Plessl, Christian and Talzi, Igor and Thiele, Lothar and Tschudin, Christian and Woehrle, Matthias and et al.}, year={2009}, pages={265–276} }"},"language":[{"iso":"eng"}],"_id":"2352","date_updated":"2023-09-26T13:52:01Z"},{"doi":"10.1109/ReConFig.2009.32","_id":"2238","date_updated":"2023-09-26T13:52:32Z","type":"conference","year":"2009","citation":{"chicago":"Schumacher, Tobias, Tim Süß, Christian Plessl, and Marco Platzner. “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000.” In Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 119–24. Los Alamitos, CA, USA: IEEE Computer Society, 2009. https://doi.org/10.1109/ReConFig.2009.32.","ama":"Schumacher T, Süß T, Plessl C, Platzner M. Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000. In: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig). IEEE Computer Society; 2009:119-124. doi:10.1109/ReConFig.2009.32","apa":"Schumacher, T., Süß, T., Plessl, C., & Platzner, M. (2009). Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000. Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 119–124. https://doi.org/10.1109/ReConFig.2009.32","bibtex":"@inproceedings{Schumacher_Süß_Plessl_Platzner_2009, place={Los Alamitos, CA, USA}, title={Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000}, DOI={10.1109/ReConFig.2009.32}, booktitle={Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE Computer Society}, author={Schumacher, Tobias and Süß, Tim and Plessl, Christian and Platzner, Marco}, year={2009}, pages={119–124} }","mla":"Schumacher, Tobias, et al. “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000.” Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, 2009, pp. 119–24, doi:10.1109/ReConFig.2009.32.","short":"T. Schumacher, T. Süß, C. Plessl, M. Platzner, in: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 119–124.","ieee":"T. Schumacher, T. Süß, C. Plessl, and M. Platzner, “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000,” in Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 2009, pp. 119–124, doi: 10.1109/ReConFig.2009.32."},"page":"119-124","language":[{"iso":"eng"}],"title":"Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000","user_id":"15278","place":"Los Alamitos, CA, USA","publication_identifier":{"isbn":["978-0-7695-3917-1"]},"status":"public","date_created":"2018-04-05T17:11:28Z","publisher":"IEEE Computer Society","quality_controlled":"1","author":[{"last_name":"Schumacher","full_name":"Schumacher, Tobias","first_name":"Tobias"},{"full_name":"Süß, Tim","first_name":"Tim","last_name":"Süß"},{"last_name":"Plessl","id":"16153","first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian"},{"full_name":"Platzner, Marco","first_name":"Marco","id":"398","last_name":"Platzner"}],"publication":"Proc. Int. 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Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–344.","ieee":"T. Schumacher, C. Plessl, and M. Platzner, “An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2009, pp. 338–344.","chicago":"Schumacher, Tobias, Christian Plessl, and Marco Platzner. “An Accelerator for K-Th Nearest Neighbor Thinning Based on the IMORC Infrastructure.” In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 338–44. IEEE, 2009.","ama":"Schumacher T, Plessl C, Platzner M. An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure. In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE; 2009:338-344.","apa":"Schumacher, T., Plessl, C., & Platzner, M. (2009). An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure. Proc. Int. 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Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)","quality_controlled":"1","author":[{"full_name":"Grad, Mariusz","first_name":"Mariusz","last_name":"Grad"},{"id":"16153","last_name":"Plessl","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","first_name":"Christian"}],"publisher":"CSREA Press","user_id":"15278","title":"Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX","abstract":[{"text":"In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Unit (APU) as well as the partial reconfiguration capabilities to provide dynamically reconfigurable custom instructions. We also present a hardware tool flow that automatically translates software functions into custom instructions and a software tool flow that creates binaries using these instructions. While previous research on processors with reconfigurable functional units has been performed predominantly with simulation, the Woolcano architecture allows for exploring dynamic instruction set extension with commercially available hardware. Finally, we present a case study demonstrating a custom floating-point instruction generated with our approach, which achieves a 40x speedup over software-emulated floating-point operations and a 21% speedup over the Xilinx hardware floating-point unit. ","lang":"eng"}],"place":"USA","language":[{"iso":"eng"}],"page":"319-322","citation":{"short":"M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, USA, 2009, pp. 319–322.","ieee":"M. Grad and C. Plessl, “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2009, pp. 319–322.","chicago":"Grad, Mariusz, and Christian Plessl. “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 319–22. USA: CSREA Press, 2009.","ama":"Grad M, Plessl C. Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2009:319-322.","apa":"Grad, M., & Plessl, C. (2009). Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 319–322.","bibtex":"@inproceedings{Grad_Plessl_2009, place={USA}, title={Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX}, booktitle={Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)}, publisher={CSREA Press}, author={Grad, Mariusz and Plessl, Christian}, year={2009}, pages={319–322} }","mla":"Grad, Mariusz, and Christian Plessl. “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2009, pp. 319–22."},"year":"2009","type":"conference","_id":"2263","date_updated":"2023-09-26T13:53:30Z"},{"title":"Quality Assurance of Grid Service Provisioning by Risk Aware Managing of Resource Failures","user_id":"15274","publication_status":"published","status":"public","date_created":"2018-03-29T11:23:57Z","author":[{"last_name":"Battré","first_name":"Dominic","full_name":"Battré, Dominic"},{"first_name":"Matthias","full_name":"Hovestadt, Matthias","last_name":"Hovestadt"},{"last_name":"Kao","first_name":"Odej","full_name":"Kao, Odej"},{"full_name":"Keller, Axel","first_name":"Axel","id":"15274","last_name":"Keller"},{"full_name":"Voss, Kerstin","first_name":"Kerstin","last_name":"Voss"}],"publication":"Proc. Int. Conf. on Risks and Security of Internet and Systems","department":[{"_id":"27"}],"_id":"1974","date_updated":"2022-01-06T06:54:11Z","type":"conference","citation":{"apa":"Battré, D., Hovestadt, M., Kao, O., Keller, A., & Voss, K. (2008). Quality Assurance of Grid Service Provisioning by Risk Aware Managing of Resource Failures. In Proc. Int. Conf. on Risks and Security of Internet and Systems.","ama":"Battré D, Hovestadt M, Kao O, Keller A, Voss K. Quality Assurance of Grid Service Provisioning by Risk Aware Managing of Resource Failures. In: Proc. Int. Conf. on Risks and Security of Internet and Systems. ; 2008.","chicago":"Battré, Dominic, Matthias Hovestadt, Odej Kao, Axel Keller, and Kerstin Voss. “Quality Assurance of Grid Service Provisioning by Risk Aware Managing of Resource Failures.” In Proc. Int. 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DMTF Academic Alliance Workshop on Systems and Virtualization Management: Standards and New Technologies}, author={Battré, Dominic and Hovestadt, Matthias and Kao, Odej and Keller, Axel and Voss, Kerstin}, year={2008} }","short":"D. Battré, M. Hovestadt, O. Kao, A. Keller, K. Voss, in: Proc. Int. DMTF Academic Alliance Workshop on Systems and Virtualization Management: Standards and New Technologies, 2008.","ieee":"D. Battré, M. Hovestadt, O. Kao, A. Keller, and K. Voss, “Virtual Execution Environments and the Negotiation of Service Level Agreements in Grid Systems,” in Proc. Int. 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Workshop on Scheduling and Resource Management for Parallel and Distributed Systems","department":[{"_id":"27"}],"author":[{"first_name":"Dominic","full_name":"Battré, Dominic","last_name":"Battré"},{"full_name":"Hovestadt, Matthias","first_name":"Matthias","last_name":"Hovestadt"},{"last_name":"Kao","first_name":"Odej","full_name":"Kao, Odej"},{"first_name":"Axel","full_name":"Keller, Axel","last_name":"Keller","id":"15274"},{"last_name":"Voss","first_name":"Kerstin","full_name":"Voss, Kerstin"}],"title":"Implementation of Virtual Execution Environments for improving SLA-compliant Job Migration in Grids","user_id":"15274","abstract":[{"text":"Abstract:\r\nCommercial Grid users demand for contractually fixed QoS levels. Service Level Agreements (SLAs) are powerful instruments for describing such contracts. SLA-aware resource management is the foundation for realizing SLA contracts within the Grid. OpenCCS is such an SLA-aware RMS, using transparent checkpointing to cope with resource outages. It generates a compatibility profile for each checkpoint dataset, so that the job can be resumed even on resources within the Grid. However, only a small number of Grid resources comply to such a profile. This paper describes the concept of virtual execution environments and how they increase the number of potential migration targets.The paper also describes how these virtual execution environments have been implemented within the OpenCCS resource management system.","lang":"eng"}],"place":"Portland, Oregon USA","type":"conference","year":"2008","citation":{"mla":"Battré, Dominic, et al. “Implementation of Virtual Execution Environments for Improving SLA-Compliant Job Migration in Grids.” Proc. Int. Workshop on Scheduling and Resource Management for Parallel and Distributed Systems, 2008, doi:10.1109/ICPP-W.2008.40.","bibtex":"@inproceedings{Battré_Hovestadt_Kao_Keller_Voss_2008, place={Portland, Oregon USA}, title={Implementation of Virtual Execution Environments for improving SLA-compliant Job Migration in Grids}, DOI={10.1109/ICPP-W.2008.40}, booktitle={Proc. Int. Workshop on Scheduling and Resource Management for Parallel and Distributed Systems}, author={Battré, Dominic and Hovestadt, Matthias and Kao, Odej and Keller, Axel and Voss, Kerstin}, year={2008} }","ama":"Battré D, Hovestadt M, Kao O, Keller A, Voss K. Implementation of Virtual Execution Environments for improving SLA-compliant Job Migration in Grids. In: Proc. Int. Workshop on Scheduling and Resource Management for Parallel and Distributed Systems. Portland, Oregon USA; 2008. doi:10.1109/ICPP-W.2008.40","apa":"Battré, D., Hovestadt, M., Kao, O., Keller, A., & Voss, K. (2008). Implementation of Virtual Execution Environments for improving SLA-compliant Job Migration in Grids. In Proc. Int. Workshop on Scheduling and Resource Management for Parallel and Distributed Systems. Portland, Oregon USA. https://doi.org/10.1109/ICPP-W.2008.40","chicago":"Battré, Dominic, Matthias Hovestadt, Odej Kao, Axel Keller, and Kerstin Voss. “Implementation of Virtual Execution Environments for Improving SLA-Compliant Job Migration in Grids.” In Proc. Int. Workshop on Scheduling and Resource Management for Parallel and Distributed Systems. Portland, Oregon USA, 2008. https://doi.org/10.1109/ICPP-W.2008.40.","ieee":"D. Battré, M. Hovestadt, O. Kao, A. Keller, and K. Voss, “Implementation of Virtual Execution Environments for improving SLA-compliant Job Migration in Grids,” in Proc. Int. Workshop on Scheduling and Resource Management for Parallel and Distributed Systems, 2008.","short":"D. Battré, M. Hovestadt, O. Kao, A. Keller, K. Voss, in: Proc. Int. Workshop on Scheduling and Resource Management for Parallel and Distributed Systems, Portland, Oregon USA, 2008."},"language":[{"iso":"eng"}],"doi":"10.1109/ICPP-W.2008.40","date_updated":"2022-01-06T06:54:12Z","_id":"1976"},{"author":[{"last_name":"Battré","first_name":"Dominic","full_name":"Battré, Dominic"},{"last_name":"Hovestadt","first_name":"Matthias","full_name":"Hovestadt, Matthias"},{"last_name":"Kao","full_name":"Kao, Odej","first_name":"Odej"},{"last_name":"Keller","id":"15274","first_name":"Axel","full_name":"Keller, Axel"},{"last_name":"Voss","first_name":"Kerstin","full_name":"Voss, Kerstin"}],"publication":"Proc. Int. Conf. on Grid Computing and Applications (GCA)","department":[{"_id":"27"}],"publication_status":"published","status":"public","date_created":"2018-03-29T11:26:22Z","title":"Germany, Belgium, France, and Back Again: Job Migration using Globus","user_id":"15274","year":"2008","type":"conference","citation":{"ama":"Battré D, Hovestadt M, Kao O, Keller A, Voss K. Germany, Belgium, France, and Back Again: Job Migration using Globus. In: Proc. Int. Conf. on Grid Computing and Applications (GCA). ; 2008.","apa":"Battré, D., Hovestadt, M., Kao, O., Keller, A., & Voss, K. (2008). Germany, Belgium, France, and Back Again: Job Migration using Globus. In Proc. Int. Conf. on Grid Computing and Applications (GCA).","chicago":"Battré, Dominic, Matthias Hovestadt, Odej Kao, Axel Keller, and Kerstin Voss. “Germany, Belgium, France, and Back Again: Job Migration Using Globus.” In Proc. Int. Conf. on Grid Computing and Applications (GCA), 2008.","mla":"Battré, Dominic, et al. “Germany, Belgium, France, and Back Again: Job Migration Using Globus.” Proc. Int. Conf. on Grid Computing and Applications (GCA), 2008.","bibtex":"@inproceedings{Battré_Hovestadt_Kao_Keller_Voss_2008, title={Germany, Belgium, France, and Back Again: Job Migration using Globus}, booktitle={Proc. Int. Conf. on Grid Computing and Applications (GCA)}, author={Battré, Dominic and Hovestadt, Matthias and Kao, Odej and Keller, Axel and Voss, Kerstin}, year={2008} }","short":"D. Battré, M. Hovestadt, O. Kao, A. Keller, K. Voss, in: Proc. Int. Conf. on Grid Computing and Applications (GCA), 2008.","ieee":"D. Battré, M. Hovestadt, O. Kao, A. Keller, and K. Voss, “Germany, Belgium, France, and Back Again: Job Migration using Globus,” in Proc. Int. Conf. on Grid Computing and Applications (GCA), 2008."},"language":[{"iso":"eng"}],"_id":"1978","date_updated":"2022-01-06T06:54:12Z"},{"doi":"10.1109/SCC.2008.106","_id":"1980","date_updated":"2022-01-06T06:54:13Z","language":[{"iso":"eng"}],"year":"2008","type":"conference","citation":{"ieee":"D. Battré, M. Hovestadt, O. Kao, A. Keller, and K. Voss, “Virtual Execution Environments for ensuring SLA-compliant Job Migration in Grids,” in Proc. Int. Conf. on Services Computing (SCC), 2008.","short":"D. Battré, M. Hovestadt, O. Kao, A. Keller, K. Voss, in: Proc. Int. Conf. on Services Computing (SCC), 2008.","bibtex":"@inproceedings{Battré_Hovestadt_Kao_Keller_Voss_2008, title={Virtual Execution Environments for ensuring SLA-compliant Job Migration in Grids}, DOI={10.1109/SCC.2008.106}, booktitle={Proc. Int. Conf. on Services Computing (SCC)}, author={Battré, Dominic and Hovestadt, Matthias and Kao, Odej and Keller, Axel and Voss, Kerstin}, year={2008} }","mla":"Battré, Dominic, et al. “Virtual Execution Environments for Ensuring SLA-Compliant Job Migration in Grids.” Proc. Int. Conf. on Services Computing (SCC), 2008, doi:10.1109/SCC.2008.106.","chicago":"Battré, Dominic, Matthias Hovestadt, Odej Kao, Axel Keller, and Kerstin Voss. “Virtual Execution Environments for Ensuring SLA-Compliant Job Migration in Grids.” In Proc. Int. Conf. on Services Computing (SCC), 2008. https://doi.org/10.1109/SCC.2008.106.","ama":"Battré D, Hovestadt M, Kao O, Keller A, Voss K. Virtual Execution Environments for ensuring SLA-compliant Job Migration in Grids. In: Proc. Int. Conf. on Services Computing (SCC). ; 2008. doi:10.1109/SCC.2008.106","apa":"Battré, D., Hovestadt, M., Kao, O., Keller, A., & Voss, K. (2008). Virtual Execution Environments for ensuring SLA-compliant Job Migration in Grids. In Proc. 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This paper highlights the concepts of migrating such checkpoint datasets to achieve the goal of SLA compliant job execution."}],"user_id":"15274","title":"Job Migration and Fault Tolerance in SLA-aware Resource Management Systems","language":[{"iso":"eng"}],"year":"2008","citation":{"apa":"Battré, D., Hovestadt, M., Kao, O., Keller, A., & Voss, K. (2008). Job Migration and Fault Tolerance in SLA-aware Resource Management Systems. In Proc. Int. Conf. on Grid and Pervasive Computing (GPC) (pp. 43–48). https://doi.org/10.1109/GPC.WORKSHOPS.2008.71","ama":"Battré D, Hovestadt M, Kao O, Keller A, Voss K. Job Migration and Fault Tolerance in SLA-aware Resource Management Systems. In: Proc. Int. Conf. on Grid and Pervasive Computing (GPC). ; 2008:43-48. doi:10.1109/GPC.WORKSHOPS.2008.71","chicago":"Battré, Dominic, Matthias Hovestadt, Odej Kao, Axel Keller, and Kerstin Voss. “Job Migration and Fault Tolerance in SLA-Aware Resource Management Systems.” In Proc. Int. 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Int. Conf. on Grid and Pervasive Computing (GPC), 2008, pp. 43–48."},"type":"conference","page":"43-48","_id":"1981","date_updated":"2022-01-06T06:54:13Z","doi":"10.1109/GPC.WORKSHOPS.2008.71"},{"publication":"Proc. Int. Conf. on Parallel and Distributed Computing and Systems (PDCS)","department":[{"_id":"27"}],"author":[{"first_name":"Dominic","full_name":"Battré, Dominic","last_name":"Battré"},{"last_name":"Hovestadt","first_name":"Matthias","full_name":"Hovestadt, Matthias"},{"last_name":"Kao","first_name":"Odej","full_name":"Kao, Odej"},{"last_name":"Keller","id":"15274","first_name":"Axel","full_name":"Keller, Axel"},{"first_name":"Kerstin","full_name":"Voss, Kerstin","last_name":"Voss"}],"publication_identifier":{"isbn":["978-0-88986-773-4"]},"publication_status":"published","editor":[{"last_name":"Gonzalez","first_name":"T. F.","full_name":"Gonzalez, T. F."}],"date_created":"2018-03-29T11:29:31Z","status":"public","place":"Orlando, FL, USA","title":"Enhancing SLA Provisioning by Utilizing Profit-Oriented Fault Tolerance","user_id":"15274","page":"212-218","citation":{"bibtex":"@inproceedings{Battré_Hovestadt_Kao_Keller_Voss_2008, place={Orlando, FL, USA}, title={Enhancing SLA Provisioning by Utilizing Profit-Oriented Fault Tolerance}, booktitle={Proc. Int. Conf. on Parallel and Distributed Computing and Systems (PDCS)}, author={Battré, Dominic and Hovestadt, Matthias and Kao, Odej and Keller, Axel and Voss, Kerstin}, editor={Gonzalez, T. F.Editor}, year={2008}, pages={212–218} }","mla":"Battré, Dominic, et al. “Enhancing SLA Provisioning by Utilizing Profit-Oriented Fault Tolerance.” Proc. Int. Conf. on Parallel and Distributed Computing and Systems (PDCS), edited by T. F. Gonzalez, 2008, pp. 212–18.","apa":"Battré, D., Hovestadt, M., Kao, O., Keller, A., & Voss, K. (2008). Enhancing SLA Provisioning by Utilizing Profit-Oriented Fault Tolerance. In T. F. Gonzalez (Ed.), Proc. Int. Conf. on Parallel and Distributed Computing and Systems (PDCS) (pp. 212–218). Orlando, FL, USA.","ama":"Battré D, Hovestadt M, Kao O, Keller A, Voss K. Enhancing SLA Provisioning by Utilizing Profit-Oriented Fault Tolerance. In: Gonzalez TF, ed. Proc. Int. Conf. on Parallel and Distributed Computing and Systems (PDCS). Orlando, FL, USA; 2008:212-218.","chicago":"Battré, Dominic, Matthias Hovestadt, Odej Kao, Axel Keller, and Kerstin Voss. “Enhancing SLA Provisioning by Utilizing Profit-Oriented Fault Tolerance.” In Proc. Int. Conf. on Parallel and Distributed Computing and Systems (PDCS), edited by T. F. Gonzalez, 212–18. Orlando, FL, USA, 2008.","ieee":"D. Battré, M. Hovestadt, O. Kao, A. Keller, and K. Voss, “Enhancing SLA Provisioning by Utilizing Profit-Oriented Fault Tolerance,” in Proc. Int. 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Battré, M. Hovestadt, O. Kao, A. Keller, K. Voss, in: Proc. Workshop of the UK PLANNING AND SCHEDULING Special Interest Group (PlanSIG), 2007.","ieee":"D. Battré, M. Hovestadt, O. Kao, A. Keller, and K. Voss, “Planning-based Scheduling for SLA-awareness and Grid Integration,” in Proc. Workshop of the UK PLANNING AND SCHEDULING Special Interest Group (PlanSIG), 2007.","chicago":"Battré, Dominic, Matthias Hovestadt, Odej Kao, Axel Keller, and Kerstin Voss. “Planning-Based Scheduling for SLA-Awareness and Grid Integration.” In Proc. Workshop of the UK PLANNING AND SCHEDULING Special Interest Group (PlanSIG), 2007.","apa":"Battré, D., Hovestadt, M., Kao, O., Keller, A., & Voss, K. (2007). Planning-based Scheduling for SLA-awareness and Grid Integration. In Proc. Workshop of the UK PLANNING AND SCHEDULING Special Interest Group (PlanSIG).","ama":"Battré D, Hovestadt M, Kao O, Keller A, Voss K. Planning-based Scheduling for SLA-awareness and Grid Integration. In: Proc. Workshop of the UK PLANNING AND SCHEDULING Special Interest Group (PlanSIG). ; 2007.","bibtex":"@inproceedings{Battré_Hovestadt_Kao_Keller_Voss_2007, title={Planning-based Scheduling for SLA-awareness and Grid Integration}, booktitle={Proc. Workshop of the UK PLANNING AND SCHEDULING Special Interest Group (PlanSIG)}, author={Battré, Dominic and Hovestadt, Matthias and Kao, Odej and Keller, Axel and Voss, Kerstin}, year={2007} }","mla":"Battré, Dominic, et al. “Planning-Based Scheduling for SLA-Awareness and Grid Integration.” Proc. Workshop of the UK PLANNING AND SCHEDULING Special Interest Group (PlanSIG), 2007."},"type":"conference","abstract":[{"lang":"eng","text":"Service level agreements (SLAs) are powerful instruments for describing all obligations and expectations\r\nin a business relationship. It is of focal importance for deploying Grid technology to commercial applications.\r\nThe EC-funded project HPC4U (Highly Predictable Clusters for Internet Grids) aimed at introducing \r\nSLA-awareness in local resource management systems, while the EC-funded project AssessGrid \r\nintroduced the notion of risk, which is associated with every business contract. \r\nThis paper highlights the concept of planning based resource management and describes\r\nthe SLA-aware scheduler developed and used in these projects."}],"user_id":"15274","title":"Planning-based Scheduling for SLA-awareness and Grid Integration","publication":"Proc. Workshop of the UK PLANNING AND SCHEDULING Special Interest Group (PlanSIG)","department":[{"_id":"27"}],"author":[{"full_name":"Battré, Dominic","first_name":"Dominic","last_name":"Battré"},{"full_name":"Hovestadt, Matthias","first_name":"Matthias","last_name":"Hovestadt"},{"first_name":"Odej","full_name":"Kao, Odej","last_name":"Kao"},{"first_name":"Axel","full_name":"Keller, Axel","last_name":"Keller","id":"15274"},{"last_name":"Voss","first_name":"Kerstin","full_name":"Voss, Kerstin"}],"date_created":"2018-03-29T11:30:52Z","status":"public","publication_status":"published"},{"date_updated":"2022-01-06T06:54:14Z","_id":"1988","language":[{"iso":"eng"}],"citation":{"chicago":"Battré, Dominic, Matthias Hovestadt, Odej Kao, Axel Keller, and Kerstin Voss. “Transparent Cross Border Migration of Parallel Multi Node Applications.” In Proc. Cracow Grid Workshop, Academic Computer Center CYFRNET, 334–41, 2007.","ama":"Battré D, Hovestadt M, Kao O, Keller A, Voss K. Transparent Cross Border Migration of Parallel Multi Node Applications. In: Proc. Cracow Grid Workshop, Academic Computer Center CYFRNET. ; 2007:334-341.","apa":"Battré, D., Hovestadt, M., Kao, O., Keller, A., & Voss, K. (2007). Transparent Cross Border Migration of Parallel Multi Node Applications. In Proc. Cracow Grid Workshop, Academic Computer Center CYFRNET (pp. 334–341).","mla":"Battré, Dominic, et al. “Transparent Cross Border Migration of Parallel Multi Node Applications.” Proc. Cracow Grid Workshop, Academic Computer Center CYFRNET, 2007, pp. 334–41.","bibtex":"@inproceedings{Battré_Hovestadt_Kao_Keller_Voss_2007, title={Transparent Cross Border Migration of Parallel Multi Node Applications}, booktitle={Proc. Cracow Grid Workshop, Academic Computer Center CYFRNET}, author={Battré, Dominic and Hovestadt, Matthias and Kao, Odej and Keller, Axel and Voss, Kerstin}, year={2007}, pages={334–341} }","short":"D. Battré, M. Hovestadt, O. Kao, A. Keller, K. Voss, in: Proc. Cracow Grid Workshop, Academic Computer Center CYFRNET, 2007, pp. 334–341.","ieee":"D. Battré, M. Hovestadt, O. Kao, A. Keller, and K. Voss, “Transparent Cross Border Migration of Parallel Multi Node Applications,” in Proc. Cracow Grid Workshop, Academic Computer Center CYFRNET, 2007, pp. 334–341."},"type":"conference","year":"2007","page":"334-341","user_id":"15274","title":"Transparent Cross Border Migration of Parallel Multi Node Applications","author":[{"first_name":"Dominic","full_name":"Battré, Dominic","last_name":"Battré"},{"first_name":"Matthias","full_name":"Hovestadt, Matthias","last_name":"Hovestadt"},{"last_name":"Kao","first_name":"Odej","full_name":"Kao, Odej"},{"last_name":"Keller","id":"15274","first_name":"Axel","full_name":"Keller, Axel"},{"last_name":"Voss","first_name":"Kerstin","full_name":"Voss, Kerstin"}],"publication":"Proc. Cracow Grid Workshop, Academic Computer Center CYFRNET","department":[{"_id":"27"}],"status":"public","date_created":"2018-03-29T11:31:22Z","publication_status":"published"},{"_id":"2389","intvolume":" 4841","date_updated":"2022-01-06T06:56:03Z","series_title":"Lecture Notes in Computer Science (LNCS)","page":"724-733","year":"2007","citation":{"ieee":"S. Lietsch and O. Marquardt, “A CUDA-Supported Approach to Remote Rendering,” in Proc. Int. Symp. on Visual Computing (ISVC), 2007, vol. 4841, pp. 724–733.","short":"S. Lietsch, O. Marquardt, in: Proc. Int. Symp. on Visual Computing (ISVC), Springer, Berlin / Heidelberg, 2007, pp. 724–733.","mla":"Lietsch, Stefan, and Oliver Marquardt. “A CUDA-Supported Approach to Remote Rendering.” Proc. Int. Symp. on Visual Computing (ISVC), vol. 4841, Springer, 2007, pp. 724–33.","bibtex":"@inproceedings{Lietsch_Marquardt_2007, place={Berlin / Heidelberg}, series={Lecture Notes in Computer Science (LNCS)}, title={A CUDA-Supported Approach to Remote Rendering}, volume={4841}, booktitle={Proc. Int. Symp. on Visual Computing (ISVC)}, publisher={Springer}, author={Lietsch, Stefan and Marquardt, Oliver}, year={2007}, pages={724–733}, collection={Lecture Notes in Computer Science (LNCS)} }","ama":"Lietsch S, Marquardt O. A CUDA-Supported Approach to Remote Rendering. In: Proc. Int. Symp. on Visual Computing (ISVC). Vol 4841. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer; 2007:724-733.","apa":"Lietsch, S., & Marquardt, O. (2007). A CUDA-Supported Approach to Remote Rendering. In Proc. Int. Symp. on Visual Computing (ISVC) (Vol. 4841, pp. 724–733). Berlin / Heidelberg: Springer.","chicago":"Lietsch, Stefan, and Oliver Marquardt. “A CUDA-Supported Approach to Remote Rendering.” In Proc. Int. Symp. on Visual Computing (ISVC), 4841:724–33. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer, 2007."},"type":"conference","place":"Berlin / Heidelberg","user_id":"24135","title":"A CUDA-Supported Approach to Remote Rendering","publication":"Proc. Int. Symp. on Visual Computing (ISVC)","department":[{"_id":"27"}],"publisher":"Springer","author":[{"last_name":"Lietsch","full_name":"Lietsch, Stefan","first_name":"Stefan"},{"last_name":"Marquardt","first_name":"Oliver","full_name":"Marquardt, Oliver"}],"date_created":"2018-04-17T13:30:48Z","status":"public","volume":4841,"publication_identifier":{"isbn":["978-3-540-76857-9"]}},{"_id":"2390","date_updated":"2022-01-06T06:56:04Z","doi":"10.1109/SKG.2007.40","type":"conference","year":"2007","citation":{"ieee":"K. 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