---
_id: '615'
abstract:
- lang: eng
text: Due to the continuously shrinking device structures and increasing densities
of FPGAs, thermal aspects have become the new focus for many research projects
over the last years. Most researchers rely on temperature simulations to evaluate
their novel thermal management techniques. However, the accuracy of the simulations
is to some extent questionable and they require a high computational effort if
a detailed thermal model is used.For experimental evaluation of real-world temperature
management methods, often synthetic heat sources are employed. Therefore, in this
paper we investigated the question if we can create significant rises in temperature
on modern FPGAs to enable future evaluation of thermal management techniques based
on experiments in contrast to simulations. Therefore, we have developed eight
different heat-generating cores that use different subsets of the FPGA resources.
Our experimental results show that, according to the built-in thermal diode of
our Xilinx Virtex-5 FPGA, we can increase the chip temperature by 134 degree C
in less than 12 minutes by only utilizing about 21% of the slices.
author:
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Hendrik
full_name: Hangmann, Hendrik
last_name: Hangmann
- first_name: Andreas
full_name: Agne, Andreas
last_name: Agne
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Happe M, Hangmann H, Agne A, Plessl C. Eight Ways to put your FPGA on Fire
– A Systematic Study of Heat Generators. In: Proceedings of the International
Conference on Reconfigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8.
doi:10.1109/ReConFig.2012.6416745'
apa: Happe, M., Hangmann, H., Agne, A., & Plessl, C. (2012). Eight Ways to put
your FPGA on Fire – A Systematic Study of Heat Generators. Proceedings of the
International Conference on Reconfigurable Computing and FPGAs (ReConFig),
1–8. https://doi.org/10.1109/ReConFig.2012.6416745
bibtex: '@inproceedings{Happe_Hangmann_Agne_Plessl_2012, title={Eight Ways to put
your FPGA on Fire – A Systematic Study of Heat Generators}, DOI={10.1109/ReConFig.2012.6416745},
booktitle={Proceedings of the International Conference on Reconfigurable Computing
and FPGAs (ReConFig)}, publisher={IEEE}, author={Happe, Markus and Hangmann, Hendrik
and Agne, Andreas and Plessl, Christian}, year={2012}, pages={1–8} }'
chicago: Happe, Markus, Hendrik Hangmann, Andreas Agne, and Christian Plessl. “Eight
Ways to Put Your FPGA on Fire – A Systematic Study of Heat Generators.” In Proceedings
of the International Conference on Reconfigurable Computing and FPGAs (ReConFig),
1–8. IEEE, 2012. https://doi.org/10.1109/ReConFig.2012.6416745.
ieee: 'M. Happe, H. Hangmann, A. Agne, and C. Plessl, “Eight Ways to put your FPGA
on Fire – A Systematic Study of Heat Generators,” in Proceedings of the International
Conference on Reconfigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8,
doi: 10.1109/ReConFig.2012.6416745.'
mla: Happe, Markus, et al. “Eight Ways to Put Your FPGA on Fire – A Systematic Study
of Heat Generators.” Proceedings of the International Conference on Reconfigurable
Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416745.
short: 'M. Happe, H. Hangmann, A. Agne, C. Plessl, in: Proceedings of the International
Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.'
date_created: 2017-10-17T12:42:51Z
date_updated: 2023-09-26T13:42:26Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/ReConFig.2012.6416745
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-15T06:48:32Z
date_updated: 2018-03-15T06:48:32Z
file_id: '1246'
file_name: 615-ReConFig12_01.pdf
file_size: 730144
relation: main_file
success: 1
file_date_updated: 2018-03-15T06:48:32Z
has_accepted_license: '1'
language:
- iso: eng
page: 1-8
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: Proceedings of the International Conference on Reconfigurable Computing
and FPGAs (ReConFig)
publisher: IEEE
quality_controlled: '1'
status: public
title: Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators
type: conference
user_id: '15278'
year: '2012'
...
---
_id: '591'
abstract:
- lang: eng
text: One major obstacle for a wide spread FPGA usage in general-purpose computing
is the development tool flow that requires much higher effort than for pure software
solutions. Convey Computer promises a solution to this problem for their HC-1
platform, where the FPGAs are configured to run as a vector processor and the software
source code can be annotated with pragmas that guide an automated vectorization
process. We investigate this approach for a stereo matching algorithm that has
abundant parallelism and a number of different computational patterns. We note
that for this case study the automated vectorization in its current state doesn’t
hold its productivity promise. However, we also show that using the Vector Personality
can yield a significant speedups compared to CPU implementations in two of three
investigated phases of the algorithm. Those speedups don’t match custom FPGA implementations,
but can come with much reduced development effort.
author:
- first_name: Tobias
full_name: Kenter, Tobias
id: '3145'
last_name: Kenter
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Henning
full_name: Schmitz, Henning
last_name: Schmitz
citation:
ama: 'Kenter T, Plessl C, Schmitz H. Pragma based parallelization - Trading hardware
efficiency for ease of use? In: Proceedings of the International Conference
on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8. doi:10.1109/ReConFig.2012.6416773'
apa: Kenter, T., Plessl, C., & Schmitz, H. (2012). Pragma based parallelization
- Trading hardware efficiency for ease of use? Proceedings of the International
Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2012.6416773
bibtex: '@inproceedings{Kenter_Plessl_Schmitz_2012, title={Pragma based parallelization
- Trading hardware efficiency for ease of use?}, DOI={10.1109/ReConFig.2012.6416773},
booktitle={Proceedings of the International Conference on ReConFigurable Computing
and FPGAs (ReConFig)}, publisher={IEEE}, author={Kenter, Tobias and Plessl, Christian
and Schmitz, Henning}, year={2012}, pages={1–8} }'
chicago: Kenter, Tobias, Christian Plessl, and Henning Schmitz. “Pragma Based Parallelization
- Trading Hardware Efficiency for Ease of Use?” In Proceedings of the International
Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2012.
https://doi.org/10.1109/ReConFig.2012.6416773.
ieee: 'T. Kenter, C. Plessl, and H. Schmitz, “Pragma based parallelization - Trading
hardware efficiency for ease of use?,” in Proceedings of the International
Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8,
doi: 10.1109/ReConFig.2012.6416773.'
mla: Kenter, Tobias, et al. “Pragma Based Parallelization - Trading Hardware Efficiency
for Ease of Use?” Proceedings of the International Conference on ReConFigurable
Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416773.
short: 'T. Kenter, C. Plessl, H. Schmitz, in: Proceedings of the International Conference
on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.'
date_created: 2017-10-17T12:42:47Z
date_updated: 2023-09-26T13:41:08Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/ReConFig.2012.6416773
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-15T08:33:18Z
date_updated: 2018-03-15T08:33:18Z
file_id: '1257'
file_name: 591-ReConFig2012Kenter_Schmitz_Plessl.pdf
file_size: 371235
relation: main_file
success: 1
file_date_updated: 2018-03-15T08:33:18Z
has_accepted_license: '1'
language:
- iso: eng
page: 1-8
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: Proceedings of the International Conference on ReConFigurable Computing
and FPGAs (ReConFig)
publisher: IEEE
quality_controlled: '1'
status: public
title: Pragma based parallelization - Trading hardware efficiency for ease of use?
type: conference
user_id: '15278'
year: '2012'
...
---
_id: '609'
abstract:
- lang: eng
text: Today's design and operation principles and methods do not scale well with
future reconfigurable computing systems due to an increased complexity in system
architectures and applications, run-time dynamics and corresponding requirements.
Hence, novel design and operation principles and methods are needed that possibly
break drastically with the static ones we have built into our systems and the
fixed abstraction layers we have cherished over the last decades. Thus, we propose
a HW/SW platform that collects and maintains information about its state and progress
which enables the system to reason about its behavior (self-awareness) and utilizes
its knowledge to effectively and autonomously adapt its behavior to changing requirements
(self-expression).To enable self-awareness, our compute nodes collect information
using a variety of sensors, i.e. performance counters and thermal diodes, and
use internal self-awareness models that process these information. For self-awareness,
on-line learning is crucial such that the node learns and continuously updates
its models at run-time to react to changing conditions. To enable self-expression,
we break with the classic design-time abstraction layers of hardware, operating
system and software. In contrast, our system is able to vertically migrate functionalities
between the layers at run-time to exploit trade-offs between abstraction and optimization.This
paper presents a heterogeneous multi-core architecture, that enables self-awareness
and self-expression, an operating system for our proposed hardware/software platform
and a novel self-expression method.
author:
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Andreas
full_name: Agne, Andreas
last_name: Agne
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Happe M, Agne A, Plessl C, Platzner M. Hardware/Software Platform for Self-aware
Compute Nodes. In: Proceedings of the Workshop on Self-Awareness in Reconfigurable
Computing Systems (SRCS). ; 2012:8-9.'
apa: Happe, M., Agne, A., Plessl, C., & Platzner, M. (2012). Hardware/Software
Platform for Self-aware Compute Nodes. Proceedings of the Workshop on Self-Awareness
in Reconfigurable Computing Systems (SRCS), 8–9.
bibtex: '@inproceedings{Happe_Agne_Plessl_Platzner_2012, title={Hardware/Software
Platform for Self-aware Compute Nodes}, booktitle={Proceedings of the Workshop
on Self-Awareness in Reconfigurable Computing Systems (SRCS)}, author={Happe,
Markus and Agne, Andreas and Plessl, Christian and Platzner, Marco}, year={2012},
pages={8–9} }'
chicago: Happe, Markus, Andreas Agne, Christian Plessl, and Marco Platzner. “Hardware/Software
Platform for Self-Aware Compute Nodes.” In Proceedings of the Workshop on Self-Awareness
in Reconfigurable Computing Systems (SRCS), 8–9, 2012.
ieee: M. Happe, A. Agne, C. Plessl, and M. Platzner, “Hardware/Software Platform
for Self-aware Compute Nodes,” in Proceedings of the Workshop on Self-Awareness
in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
mla: Happe, Markus, et al. “Hardware/Software Platform for Self-Aware Compute Nodes.”
Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems
(SRCS), 2012, pp. 8–9.
short: 'M. Happe, A. Agne, C. Plessl, M. Platzner, in: Proceedings of the Workshop
on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.'
date_created: 2017-10-17T12:42:50Z
date_updated: 2023-09-26T13:41:36Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-15T08:14:17Z
date_updated: 2018-03-15T08:14:17Z
file_id: '1249'
file_name: 609-happe12_fpl_awareness.pdf
file_size: 146789
relation: main_file
success: 1
file_date_updated: 2018-03-15T08:14:17Z
has_accepted_license: '1'
language:
- iso: eng
page: 8-9
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing
Systems (SRCS)
quality_controlled: '1'
status: public
title: Hardware/Software Platform for Self-aware Compute Nodes
type: conference
user_id: '15278'
year: '2012'
...
---
_id: '567'
abstract:
- lang: eng
text: Heterogeneous machines are gaining momentum in the High Performance Computing
field, due to the theoretical speedups and power consumption. In practice, while
some applications meet the performance expectations, heterogeneous architectures
still require a tremendous effort from the application developers. This work presents
a code generation method to port codes into heterogeneous platforms, based on
transformations of the control flow into function calls. The results show that
the cost of the function-call mechanism is affordable for the tested HPC kernels.
The complete toolchain, based on the LLVM compiler infrastructure, is fully automated
once the sequential specification is provided.
author:
- first_name: Pablo
full_name: Barrio, Pablo
last_name: Barrio
- first_name: Carlos
full_name: Carreras, Carlos
last_name: Carreras
- first_name: Roberto
full_name: Sierra, Roberto
last_name: Sierra
- first_name: Tobias
full_name: Kenter, Tobias
id: '3145'
last_name: Kenter
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Barrio P, Carreras C, Sierra R, Kenter T, Plessl C. Turning control flow graphs
into function calls: Code generation for heterogeneous architectures. In: Proceedings
of the International Conference on High Performance Computing and Simulation (HPCS).
IEEE; 2012:559-565. doi:10.1109/HPCSim.2012.6266973'
apa: 'Barrio, P., Carreras, C., Sierra, R., Kenter, T., & Plessl, C. (2012).
Turning control flow graphs into function calls: Code generation for heterogeneous
architectures. Proceedings of the International Conference on High Performance
Computing and Simulation (HPCS), 559–565. https://doi.org/10.1109/HPCSim.2012.6266973'
bibtex: '@inproceedings{Barrio_Carreras_Sierra_Kenter_Plessl_2012, title={Turning
control flow graphs into function calls: Code generation for heterogeneous architectures},
DOI={10.1109/HPCSim.2012.6266973},
booktitle={Proceedings of the International Conference on High Performance Computing
and Simulation (HPCS)}, publisher={IEEE}, author={Barrio, Pablo and Carreras,
Carlos and Sierra, Roberto and Kenter, Tobias and Plessl, Christian}, year={2012},
pages={559–565} }'
chicago: 'Barrio, Pablo, Carlos Carreras, Roberto Sierra, Tobias Kenter, and Christian
Plessl. “Turning Control Flow Graphs into Function Calls: Code Generation for
Heterogeneous Architectures.” In Proceedings of the International Conference
on High Performance Computing and Simulation (HPCS), 559–65. IEEE, 2012. https://doi.org/10.1109/HPCSim.2012.6266973.'
ieee: 'P. Barrio, C. Carreras, R. Sierra, T. Kenter, and C. Plessl, “Turning control
flow graphs into function calls: Code generation for heterogeneous architectures,”
in Proceedings of the International Conference on High Performance Computing
and Simulation (HPCS), 2012, pp. 559–565, doi: 10.1109/HPCSim.2012.6266973.'
mla: 'Barrio, Pablo, et al. “Turning Control Flow Graphs into Function Calls: Code
Generation for Heterogeneous Architectures.” Proceedings of the International
Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012,
pp. 559–65, doi:10.1109/HPCSim.2012.6266973.'
short: 'P. Barrio, C. Carreras, R. Sierra, T. Kenter, C. Plessl, in: Proceedings
of the International Conference on High Performance Computing and Simulation (HPCS),
IEEE, 2012, pp. 559–565.'
date_created: 2017-10-17T12:42:42Z
date_updated: 2023-09-26T13:42:54Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/HPCSim.2012.6266973
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-15T10:20:24Z
date_updated: 2018-03-15T10:20:24Z
file_id: '1275'
file_name: 567-ba-ca-12a.pdf
file_size: 288508
relation: main_file
success: 1
file_date_updated: 2018-03-15T10:20:24Z
has_accepted_license: '1'
language:
- iso: eng
page: 559-565
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
publication: Proceedings of the International Conference on High Performance Computing
and Simulation (HPCS)
publisher: IEEE
quality_controlled: '1'
status: public
title: 'Turning control flow graphs into function calls: Code generation for heterogeneous
architectures'
type: conference
user_id: '15278'
year: '2012'
...
---
_id: '612'
abstract:
- lang: eng
text: While numerous publications have presented ring oscillator designs for temperature
measurements a detailed study of the ring oscillator's design space is still missing.
In this work, we introduce metrics for comparing the performance and area efficiency
of ring oscillators and a methodology for determining these metrics. As a result,
we present a systematic study of the design space for ring oscillators for a Xilinx
Virtex-5 platform FPGA.
author:
- first_name: Christoph
full_name: Rüthing, Christoph
last_name: Rüthing
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Andreas
full_name: Agne, Andreas
last_name: Agne
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Rüthing C, Happe M, Agne A, Plessl C. Exploration of Ring Oscillator Design
Space for Temperature Measurements on FPGAs. In: Proceedings of the International
Conference on Field Programmable Logic and Applications (FPL). IEEE; 2012:559-562.
doi:10.1109/FPL.2012.6339370'
apa: Rüthing, C., Happe, M., Agne, A., & Plessl, C. (2012). Exploration of Ring
Oscillator Design Space for Temperature Measurements on FPGAs. Proceedings
of the International Conference on Field Programmable Logic and Applications (FPL),
559–562. https://doi.org/10.1109/FPL.2012.6339370
bibtex: '@inproceedings{Rüthing_Happe_Agne_Plessl_2012, title={Exploration of Ring
Oscillator Design Space for Temperature Measurements on FPGAs}, DOI={10.1109/FPL.2012.6339370},
booktitle={Proceedings of the International Conference on Field Programmable Logic
and Applications (FPL)}, publisher={IEEE}, author={Rüthing, Christoph and Happe,
Markus and Agne, Andreas and Plessl, Christian}, year={2012}, pages={559–562}
}'
chicago: Rüthing, Christoph, Markus Happe, Andreas Agne, and Christian Plessl. “Exploration
of Ring Oscillator Design Space for Temperature Measurements on FPGAs.” In Proceedings
of the International Conference on Field Programmable Logic and Applications (FPL),
559–62. IEEE, 2012. https://doi.org/10.1109/FPL.2012.6339370.
ieee: 'C. Rüthing, M. Happe, A. Agne, and C. Plessl, “Exploration of Ring Oscillator
Design Space for Temperature Measurements on FPGAs,” in Proceedings of the
International Conference on Field Programmable Logic and Applications (FPL),
2012, pp. 559–562, doi: 10.1109/FPL.2012.6339370.'
mla: Rüthing, Christoph, et al. “Exploration of Ring Oscillator Design Space for
Temperature Measurements on FPGAs.” Proceedings of the International Conference
on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–62,
doi:10.1109/FPL.2012.6339370.
short: 'C. Rüthing, M. Happe, A. Agne, C. Plessl, in: Proceedings of the International
Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp.
559–562.'
date_created: 2017-10-17T12:42:51Z
date_updated: 2023-09-26T13:42:03Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/FPL.2012.6339370
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-15T06:49:03Z
date_updated: 2018-03-15T06:49:03Z
file_id: '1247'
file_name: 612-ruething_fpl12.pdf
file_size: 202923
relation: main_file
success: 1
file_date_updated: 2018-03-15T06:49:03Z
has_accepted_license: '1'
language:
- iso: eng
page: 559-562
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: Proceedings of the International Conference on Field Programmable Logic
and Applications (FPL)
publisher: IEEE
quality_controlled: '1'
status: public
title: Exploration of Ring Oscillator Design Space for Temperature Measurements on
FPGAs
type: conference
user_id: '15278'
year: '2012'
...
---
_id: '2180'
author:
- first_name: Tobias
full_name: Beisel, Tobias
last_name: Beisel
- first_name: Tobias
full_name: Wiersema, Tobias
id: '3118'
last_name: Wiersema
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Beisel T, Wiersema T, Plessl C, Brinkmann A. Programming and Scheduling Model
for Supporting Heterogeneous Accelerators in Linux. In: Proc. Workshop on Computer
Architecture and Operating System Co-Design (CAOS). ; 2012.'
apa: Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2012). Programming
and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. Proc.
Workshop on Computer Architecture and Operating System Co-Design (CAOS).
bibtex: '@inproceedings{Beisel_Wiersema_Plessl_Brinkmann_2012, title={Programming
and Scheduling Model for Supporting Heterogeneous Accelerators in Linux}, booktitle={Proc.
Workshop on Computer Architecture and Operating System Co-design (CAOS)}, author={Beisel,
Tobias and Wiersema, Tobias and Plessl, Christian and Brinkmann, André}, year={2012}
}'
chicago: Beisel, Tobias, Tobias Wiersema, Christian Plessl, and André Brinkmann.
“Programming and Scheduling Model for Supporting Heterogeneous Accelerators in
Linux.” In Proc. Workshop on Computer Architecture and Operating System Co-Design
(CAOS), 2012.
ieee: T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Programming and Scheduling
Model for Supporting Heterogeneous Accelerators in Linux,” 2012.
mla: Beisel, Tobias, et al. “Programming and Scheduling Model for Supporting Heterogeneous
Accelerators in Linux.” Proc. Workshop on Computer Architecture and Operating
System Co-Design (CAOS), 2012.
short: 'T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Workshop on Computer
Architecture and Operating System Co-Design (CAOS), 2012.'
date_created: 2018-04-03T09:18:33Z
date_updated: 2023-09-26T13:40:17Z
department:
- _id: '27'
- _id: '518'
- _id: '78'
keyword:
- funding-enhance
language:
- iso: eng
project:
- _id: '30'
grant_number: 01|H11004A
name: Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling
Models
publication: Proc. Workshop on Computer Architecture and Operating System Co-design
(CAOS)
quality_controlled: '1'
status: public
title: Programming and Scheduling Model for Supporting Heterogeneous Accelerators
in Linux
type: conference
user_id: '15278'
year: '2012'
...
---
_id: '1968'
abstract:
- lang: eng
text: 'Infrastructure as a Service providers use virtualization to abstract their
hardware and to create a dynamic data center. Virtualization enables the consolidation
of virtual machines as well as the migration of them to other hosts during runtime.
Each provider has its own strategy to efficiently operate a data center. We present
a rule based mapping algorithm for VMs, which is able to automatically adapt the
mapping between VMs and physical hosts. It offers an interface where policies
can be defined and combined in a generic way. The algorithm performs the initial
mapping at request time as well as a remapping during runtime. It deals with policy
and infrastructure changes. We extended the open source IaaS solution Eucalyptus
and we evaluated it with typical policies: maximizing the compute performance
and VM locality to achieve a high performance and minimizing energy consumption.
The evaluation was done on state-of-the-art servers in our own data center and
by simulations using a workload of the Parallel Workload Archive. The results
show that our algorithm performs well in dynamic data centers environments.'
author:
- first_name: Christoph
full_name: Kleineweber, Christoph
last_name: Kleineweber
- first_name: Axel
full_name: Keller, Axel
id: '15274'
last_name: Keller
- first_name: Oliver
full_name: Niehörster, Oliver
last_name: Niehörster
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Kleineweber C, Keller A, Niehörster O, Brinkmann A. Rule Based Mapping of
Virtual Machines in Clouds. In: Proc. Int. Conf. on Parallel, Distributed and
Network-Based Computing (PDP). ; 2011. doi:10.1109/PDP.2011.69'
apa: Kleineweber, C., Keller, A., Niehörster, O., & Brinkmann, A. (2011). Rule
Based Mapping of Virtual Machines in Clouds. In Proc. Int. Conf. on Parallel,
Distributed and Network-Based Computing (PDP). https://doi.org/10.1109/PDP.2011.69
bibtex: '@inproceedings{Kleineweber_Keller_Niehörster_Brinkmann_2011, title={Rule
Based Mapping of Virtual Machines in Clouds}, DOI={10.1109/PDP.2011.69},
booktitle={Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing
(PDP)}, author={Kleineweber, Christoph and Keller, Axel and Niehörster, Oliver
and Brinkmann, André}, year={2011} }'
chicago: Kleineweber, Christoph, Axel Keller, Oliver Niehörster, and André Brinkmann.
“Rule Based Mapping of Virtual Machines in Clouds.” In Proc. Int. Conf. on
Parallel, Distributed and Network-Based Computing (PDP), 2011. https://doi.org/10.1109/PDP.2011.69.
ieee: C. Kleineweber, A. Keller, O. Niehörster, and A. Brinkmann, “Rule Based Mapping
of Virtual Machines in Clouds,” in Proc. Int. Conf. on Parallel, Distributed
and Network-Based Computing (PDP), 2011.
mla: Kleineweber, Christoph, et al. “Rule Based Mapping of Virtual Machines in Clouds.”
Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP),
2011, doi:10.1109/PDP.2011.69.
short: 'C. Kleineweber, A. Keller, O. Niehörster, A. Brinkmann, in: Proc. Int. Conf.
on Parallel, Distributed and Network-Based Computing (PDP), 2011.'
date_created: 2018-03-29T11:21:05Z
date_updated: 2022-01-06T06:54:10Z
department:
- _id: '27'
doi: 10.1109/PDP.2011.69
language:
- iso: eng
publication: Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing
(PDP)
publication_status: published
status: public
title: Rule Based Mapping of Virtual Machines in Clouds
type: conference
user_id: '15274'
year: '2011'
...
---
_id: '1972'
abstract:
- lang: eng
text: We present a multi-agent system on top of the IaaS layer consisting of a scheduler
agent and multiple worker agents. Each job is controlled by an autonomous worker
agent, which is equipped with application specific knowledge (e.g., performance
functions) allowing it to estimate the type and number of necessary resources.
During runtime, the worker agent monitors the job and adapts its resources to
ensure the specified quality of service - even in noisy clouds where the job instances
are influenced by other jobs. All worker agents interact with the scheduler agent,
which takes care of limited resources and does a cost-aware scheduling by assigning
jobs to times with low energy costs. The whole architecture is self-optimizing
and able to use public or private clouds.
author:
- first_name: Oliver
full_name: Niehörster, Oliver
last_name: Niehörster
- first_name: Axel
full_name: Keller, Axel
id: '15274'
last_name: Keller
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Niehörster O, Keller A, Brinkmann A. An Energy-Aware SaaS Stack. In: Proc.
Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer
and Telecommunication Systems (MASCOTS). ; 2011. doi:10.1109/MASCOTS.2011.52'
apa: Niehörster, O., Keller, A., & Brinkmann, A. (2011). An Energy-Aware SaaS
Stack. In Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and
Simulation of Computer and Telecommunication Systems (MASCOTS). https://doi.org/10.1109/MASCOTS.2011.52
bibtex: '@inproceedings{Niehörster_Keller_Brinkmann_2011, title={An Energy-Aware
SaaS Stack}, DOI={10.1109/MASCOTS.2011.52},
booktitle={Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and
Simulation of Computer and Telecommunication Systems (MASCOTS)}, author={Niehörster,
Oliver and Keller, Axel and Brinkmann, André}, year={2011} }'
chicago: Niehörster, Oliver, Axel Keller, and André Brinkmann. “An Energy-Aware
SaaS Stack.” In Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis
and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011.
https://doi.org/10.1109/MASCOTS.2011.52.
ieee: O. Niehörster, A. Keller, and A. Brinkmann, “An Energy-Aware SaaS Stack,”
in Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation
of Computer and Telecommunication Systems (MASCOTS), 2011.
mla: Niehörster, Oliver, et al. “An Energy-Aware SaaS Stack.” Proc. Int. Meeting
of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication
Systems (MASCOTS), 2011, doi:10.1109/MASCOTS.2011.52.
short: 'O. Niehörster, A. Keller, A. Brinkmann, in: Proc. Int. Meeting of the IEEE
Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication
Systems (MASCOTS), 2011.'
date_created: 2018-03-29T11:23:22Z
date_updated: 2022-01-06T06:54:10Z
department:
- _id: '27'
doi: 10.1109/MASCOTS.2011.52
language:
- iso: eng
publication: Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation
of Computer and Telecommunication Systems (MASCOTS)
publication_status: published
status: public
title: An Energy-Aware SaaS Stack
type: conference
user_id: '15274'
year: '2011'
...
---
_id: '2188'
author:
- first_name: Alberto
full_name: Miranda, Alberto
last_name: Miranda
- first_name: Sascha
full_name: Effert, Sascha
last_name: Effert
- first_name: Yangwook
full_name: Kang, Yangwook
last_name: Kang
- first_name: Ethan
full_name: Miller, Ethan
last_name: Miller
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
- first_name: Toni
full_name: Cortes, Toni
last_name: Cortes
citation:
ama: 'Miranda A, Effert S, Kang Y, Miller E, Brinkmann A, Cortes T. Reliable and
Randomized Data Distribution Strategies for Large Scale Storage Systems. In: Proc.
Int. Conf. on High Performance Computing (HIPC). Washington, DC: IEEE Computer
Society; 2011:1-10. doi:10.1109/HiPC.2011.6152745'
apa: 'Miranda, A., Effert, S., Kang, Y., Miller, E., Brinkmann, A., & Cortes,
T. (2011). Reliable and Randomized Data Distribution Strategies for Large Scale
Storage Systems. In Proc. Int. Conf. on High Performance Computing (HIPC)
(pp. 1–10). Washington, DC: IEEE Computer Society. https://doi.org/10.1109/HiPC.2011.6152745'
bibtex: '@inproceedings{Miranda_Effert_Kang_Miller_Brinkmann_Cortes_2011, place={Washington,
DC}, title={Reliable and Randomized Data Distribution Strategies for Large Scale
Storage Systems}, DOI={10.1109/HiPC.2011.6152745},
booktitle={Proc. Int. Conf. on High Performance Computing (HIPC)}, publisher={IEEE
Computer Society}, author={Miranda, Alberto and Effert, Sascha and Kang, Yangwook
and Miller, Ethan and Brinkmann, André and Cortes, Toni}, year={2011}, pages={1–10}
}'
chicago: 'Miranda, Alberto, Sascha Effert, Yangwook Kang, Ethan Miller, André Brinkmann,
and Toni Cortes. “Reliable and Randomized Data Distribution Strategies for Large
Scale Storage Systems.” In Proc. Int. Conf. on High Performance Computing (HIPC),
1–10. Washington, DC: IEEE Computer Society, 2011. https://doi.org/10.1109/HiPC.2011.6152745.'
ieee: A. Miranda, S. Effert, Y. Kang, E. Miller, A. Brinkmann, and T. Cortes, “Reliable
and Randomized Data Distribution Strategies for Large Scale Storage Systems,”
in Proc. Int. Conf. on High Performance Computing (HIPC), 2011, pp. 1–10.
mla: Miranda, Alberto, et al. “Reliable and Randomized Data Distribution Strategies
for Large Scale Storage Systems.” Proc. Int. Conf. on High Performance Computing
(HIPC), IEEE Computer Society, 2011, pp. 1–10, doi:10.1109/HiPC.2011.6152745.
short: 'A. Miranda, S. Effert, Y. Kang, E. Miller, A. Brinkmann, T. Cortes, in:
Proc. Int. Conf. on High Performance Computing (HIPC), IEEE Computer Society,
Washington, DC, 2011, pp. 1–10.'
date_created: 2018-04-03T14:30:39Z
date_updated: 2022-01-06T06:55:18Z
department:
- _id: '27'
doi: 10.1109/HiPC.2011.6152745
page: 1-10
place: Washington, DC
publication: Proc. Int. Conf. on High Performance Computing (HIPC)
publisher: IEEE Computer Society
status: public
title: Reliable and Randomized Data Distribution Strategies for Large Scale Storage
Systems
type: conference
user_id: '24135'
year: '2011'
...
---
_id: '2189'
author:
- first_name: Matthias
full_name: Grawinkel, Matthias
last_name: Grawinkel
- first_name: Markus
full_name: Pargmann, Markus
last_name: Pargmann
- first_name: Hubert
full_name: Dömer, Hubert
last_name: Dömer
- first_name: André
full_name: Brinkmann, André
last_name: Brinkmann
citation:
ama: 'Grawinkel M, Pargmann M, Dömer H, Brinkmann A. Lonestar: An Energy-Aware Disk
Based Long-Term Archival Storage System. In: Proc. IEEE Int. Conf. on Parallel
and Distributed Systems (ICPADS). IEEE; 2011:380-387. doi:10.1109/ICPADS.2011.77'
apa: 'Grawinkel, M., Pargmann, M., Dömer, H., & Brinkmann, A. (2011). Lonestar:
An Energy-Aware Disk Based Long-Term Archival Storage System. In Proc. IEEE
Int. Conf. on Parallel and Distributed Systems (ICPADS) (pp. 380–387). IEEE.
https://doi.org/10.1109/ICPADS.2011.77'
bibtex: '@inproceedings{Grawinkel_Pargmann_Dömer_Brinkmann_2011, title={Lonestar:
An Energy-Aware Disk Based Long-Term Archival Storage System}, DOI={10.1109/ICPADS.2011.77},
booktitle={Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS)},
publisher={IEEE}, author={Grawinkel, Matthias and Pargmann, Markus and Dömer,
Hubert and Brinkmann, André}, year={2011}, pages={380–387} }'
chicago: 'Grawinkel, Matthias, Markus Pargmann, Hubert Dömer, and André Brinkmann.
“Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System.” In Proc.
IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), 380–87. IEEE,
2011. https://doi.org/10.1109/ICPADS.2011.77.'
ieee: 'M. Grawinkel, M. Pargmann, H. Dömer, and A. Brinkmann, “Lonestar: An Energy-Aware
Disk Based Long-Term Archival Storage System,” in Proc. IEEE Int. Conf. on
Parallel and Distributed Systems (ICPADS), 2011, pp. 380–387.'
mla: 'Grawinkel, Matthias, et al. “Lonestar: An Energy-Aware Disk Based Long-Term
Archival Storage System.” Proc. IEEE Int. Conf. on Parallel and Distributed
Systems (ICPADS), IEEE, 2011, pp. 380–87, doi:10.1109/ICPADS.2011.77.'
short: 'M. Grawinkel, M. Pargmann, H. Dömer, A. Brinkmann, in: Proc. IEEE Int. Conf.
on Parallel and Distributed Systems (ICPADS), IEEE, 2011, pp. 380–387.'
date_created: 2018-04-03T14:32:23Z
date_updated: 2022-01-06T06:55:18Z
department:
- _id: '27'
doi: 10.1109/ICPADS.2011.77
page: 380-387
publication: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS)
publisher: IEEE
status: public
title: 'Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System'
type: conference
user_id: '24135'
year: '2011'
...