@article{7689,
author = {Riebler, Heinrich and Vaz, Gavin Francis and Kenter, Tobias and Plessl, Christian},
journal = {ACM Trans. Archit. Code Optim. (TACO)},
keyword = {htrop},
title = {{Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL (to appear)}},
year = {2019},
}
@article{12871,
author = {Platzner, Marco and Plessl, Christian},
issn = {0170-6012},
journal = {Informatik Spektrum},
title = {{FPGAs im Rechenzentrum}},
doi = {10.1007/s00287-019-01187-w},
year = {2019},
}
@unpublished{12878,
abstract = {In scientific computing, the acceleration of atomistic computer simulations
by means of custom hardware is finding ever growing application. A major
limitation, however, is that the high efficiency in terms of performance and
low power consumption entails the massive usage of low-precision computing
units. Here, based on the approximate computing paradigm, we present an
algorithmic method to rigorously compensate for numerical inaccuracies due to
low-accuracy arithmetic operations, yet still obtaining exact expectation
values using a properly modified Langevin-type equation.},
author = {Rengaraj, Varadarajan and Lass, Michael and Plessl, Christian and Kühne, Thomas},
booktitle = {arXiv:1907.08497},
title = {{Accurate Sampling with Noisy Forces from Approximate Computing}},
year = {2019},
}
@article{21,
abstract = {We address the general mathematical problem of computing the inverse p-th
root of a given matrix in an efficient way. A new method to construct iteration
functions that allow calculating arbitrary p-th roots and their inverses of
symmetric positive definite matrices is presented. We show that the order of
convergence is at least quadratic and that adaptively adjusting a parameter q
always leads to an even faster convergence. In this way, a better performance
than with previously known iteration schemes is achieved. The efficiency of the
iterative functions is demonstrated for various matrices with different
densities, condition numbers and spectral radii.},
author = {Richters, Dorothee and Lass, Michael and Walther, Andrea and Plessl, Christian and Kühne, Thomas},
journal = {Communications in Computational Physics},
number = {2},
pages = {564--585},
publisher = {Global Science Press},
title = {{A General Algorithm to Calculate the Inverse Principal p-th Root of Symmetric Positive Definite Matrices}},
doi = {10.4208/cicp.OA-2018-0053},
volume = {25},
year = {2019},
}
@inproceedings{15478,
author = {Gorlani, Paolo and Kenter, Tobias and Plessl, Christian},
booktitle = {Proceedings of the International Conference on Field-Programmable Technology (FPT)},
publisher = {IEEE},
title = {{OpenCL Implementation of Cannon's Matrix Multiplication Algorithm on Intel Stratix 10 FPGAs}},
year = {2019},
}
@misc{5417,
author = {Ramaswami, Arjun},
title = {{Accelerating Molecular Dynamic Simulations by Offloading Fast Fourier Transformations to FPGA}},
year = {2018},
}
@article{6516,
author = {Mertens, Jan Cedric and Boschmann, Alexander and Schmidt, M. and Plessl, Christian},
issn = {1369-7072},
journal = {Sports Engineering},
number = {4},
pages = {441--451},
publisher = {Springer Nature},
title = {{Sprint diagnostic with GPS and inertial sensor fusion}},
doi = {10.1007/s12283-018-0291-0},
volume = {21},
year = {2018},
}
@article{20,
abstract = {Approximate computing has shown to provide new ways to improve performance
and power consumption of error-resilient applications. While many of these
applications can be found in image processing, data classification or machine
learning, we demonstrate its suitability to a problem from scientific
computing. Utilizing the self-correcting behavior of iterative algorithms, we
show that approximate computing can be applied to the calculation of inverse
matrix p-th roots which are required in many applications in scientific
computing. Results show great opportunities to reduce the computational effort
and bandwidth required for the execution of the discussed algorithm, especially
when targeting special accelerator hardware.},
author = {Lass, Michael and Kühne, Thomas and Plessl, Christian},
issn = {1943-0671},
journal = {Embedded Systems Letters},
number = {2},
pages = { 33--36},
publisher = {IEEE},
title = {{Using Approximate Computing for the Calculation of Inverse Matrix p-th Roots}},
doi = {10.1109/LES.2017.2760923},
volume = {10},
year = {2018},
}
@misc{5414,
author = {Filmwala, Tasneem},
title = {{Study Effects of Approximation on Conjugate Gradient Algorithm and Accelerate it on FPGA Platform}},
year = {2018},
}
@misc{5421,
author = {Gadewar, Onkar},
title = {{Programmable Programs? - Designing FPGA Overlay Architectures with OpenCL}},
year = {2018},
}
@inproceedings{22,
abstract = {This paper describes a data structure and a heuristic to plan and map arbitrary resources in complex combinations while applying time dependent constraints. The approach is used in the planning based workload manager OpenCCS at the Paderborn Center for Parallel Computing (PC\(^2\)) to operate heterogeneous clusters with up to 10000 cores. We also show performance results derived from four years of operation.},
author = {Keller, Axel},
booktitle = {Proc. Workshop on Job Scheduling Strategies for Parallel Processing (JSSPP)},
editor = {Klusáček, D. and Cirne, W. and Desai, N.},
isbn = {978-3-319-77398-8},
keyword = {Scheduling Planning Mapping Workload management},
location = {Orlando, FL, USA},
pages = {132--151},
publisher = {Springer},
title = {{A Data Structure for Planning Based Workload Management of Heterogeneous HPC Systems}},
doi = {10.1007/978-3-319-77398-8_8},
volume = {10773},
year = {2018},
}
@inproceedings{1588,
abstract = {The exploration of FPGAs as accelerators for scientific simulations has so far mostly been focused on small kernels of methods working on regular data structures, for example in the form of stencil computations for finite difference methods. In computational sciences, often more advanced methods are employed that promise better stability, convergence, locality and scaling. Unstructured meshes are shown to be more effective and more accurate, compared to regular grids, in representing computation domains of various shapes. Using unstructured meshes, the discontinuous Galerkin method preserves the ability to perform explicit local update operations for simulations in the time domain. In this work, we investigate FPGAs as target platform for an implementation of the nodal discontinuous Galerkin method to find time-domain solutions of Maxwell's equations in an unstructured mesh. When maximizing data reuse and fitting constant coefficients into suitably partitioned on-chip memory, high computational intensity allows us to implement and feed wide data paths with hundreds of floating point operators. By decoupling off-chip memory accesses from the computations, high memory bandwidth can be sustained, even for the irregular access pattern required by parts of the application. Using the Intel/Altera OpenCL SDK for FPGAs, we present different implementation variants for different polynomial orders of the method. In different phases of the algorithm, either computational or bandwidth limits of the Arria 10 platform are almost reached, thus outperforming a highly multithreaded CPU implementation by around 2x.},
author = {Kenter, Tobias and Mahale, Gopinath and Alhaddad, Samer and Grynko, Yevgen and Schmitt, Christian and Afzal, Ayesha and Hannig, Frank and Förstner, Jens and Plessl, Christian},
booktitle = {Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM)},
keyword = {tet_topic_hpc},
publisher = {IEEE},
title = {{OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes}},
doi = {10.1109/FCCM.2018.00037},
year = {2018},
}
@inproceedings{1204,
author = {Riebler, Heinrich and Vaz, Gavin Francis and Kenter, Tobias and Plessl, Christian},
booktitle = {Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP)},
isbn = {9781450349826},
keyword = {htrop},
publisher = {ACM},
title = {{Automated Code Acceleration Targeting Heterogeneous OpenCL Devices}},
doi = {10.1145/3178487.3178534},
year = {2018},
}
@inproceedings{1590,
abstract = {We present the submatrix method, a highly parallelizable method for the approximate calculation of inverse p-th roots of large sparse symmetric matrices which are required in different scientific applications. Following the idea of Approximate Computing, we allow imprecision in the final result in order to utilize the sparsity of the input matrix and to allow massively parallel execution. For an n x n matrix, the proposed algorithm allows to distribute the calculations over n nodes with only little communication overhead. The result matrix exhibits the same sparsity pattern as the input matrix, allowing for efficient reuse of allocated data structures.
We evaluate the algorithm with respect to the error that it introduces into calculated results, as well as its performance and scalability. We demonstrate that the error is relatively limited for well-conditioned matrices and that results are still valuable for error-resilient applications like preconditioning even for ill-conditioned matrices. We discuss the execution time and scaling of the algorithm on a theoretical level and present a distributed implementation of the algorithm using MPI and OpenMP. We demonstrate the scalability of this implementation by running it on a high-performance compute cluster comprised of 1024 CPU cores, showing a speedup of 665x compared to single-threaded execution.},
author = {Lass, Michael and Mohr, Stephan and Wiebeler, Hendrik and Kühne, Thomas and Plessl, Christian},
booktitle = {Proc. Platform for Advanced Scientific Computing (PASC) Conference},
isbn = {978-1-4503-5891-0/18/07},
keyword = {approximate computing, linear algebra, matrix inversion, matrix p-th roots, numeric algorithm, parallel computing},
location = {Basel, Switzerland},
publisher = {ACM},
title = {{A Massively Parallel Algorithm for the Approximate Calculation of Inverse p-th Roots of Large Sparse Matrices}},
doi = {10.1145/3218176.3218231},
year = {2018},
}
@article{1589,
author = {Schumacher, Jörn and Plessl, Christian and Vandelli, Wainer},
journal = {Journal of Physics: Conference Series},
publisher = {IOP Publishing},
title = {{High-Throughput and Low-Latency Network Communication with NetIO}},
doi = {10.1088/1742-6596/898/8/082003},
volume = {898},
year = {2017},
}
@inproceedings{1592,
author = {Kenter, Tobias and Förstner, Jens and Plessl, Christian},
booktitle = {Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)},
keyword = {tet_topic_hpc},
publisher = {IEEE},
title = {{Flexible FPGA design for FDTD using OpenCL}},
doi = {10.23919/FPL.2017.8056844},
year = {2017},
}
@article{18,
abstract = {Branch and bound (B&B) algorithms structure the search space as a tree and eliminate infeasible solutions early by pruning subtrees that cannot lead to a valid or optimal solution. Custom hardware designs significantly accelerate the execution of these algorithms. In this article, we demonstrate a high-performance B&B implementation on FPGAs. First, we identify general elements of B&B algorithms and describe their implementation as a finite state machine. Then, we introduce workers that autonomously cooperate using work stealing to allow parallel execution and full utilization of the target FPGA. Finally, we explore advantages of instance-specific designs that target a specific problem instance to improve performance.
We evaluate our concepts by applying them to a branch and bound problem, the reconstruction of corrupted AES keys obtained from cold-boot attacks. The evaluation shows that our work stealing approach is scalable with the available resources and provides speedups proportional to the number of workers. Instance-specific designs allow us to achieve an overall speedup of 47 × compared to the fastest implementation of AES key reconstruction so far. Finally, we demonstrate how instance-specific designs can be generated just-in-time such that the provided speedups outweigh the additional time required for design synthesis.},
author = {Riebler, Heinrich and Lass, Michael and Mittendorf, Robert and Löcke, Thomas and Plessl, Christian},
issn = {1936-7406},
journal = {ACM Transactions on Reconfigurable Technology and Systems (TRETS)},
keyword = {coldboot},
number = {3},
pages = {24:1--24:23},
publisher = {Association for Computing Machinery (ACM)},
title = {{Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs}},
doi = {10.1145/3053687},
volume = {10},
year = {2017},
}
@inproceedings{24,
author = {Kenter, Tobias and Plessl, Christian},
booktitle = {Proc. Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC)},
title = {{Microdisk Cavity FDTD Simulation on FPGA using OpenCL}},
year = {2016},
}
@inproceedings{31,
author = {Riebler, Heinrich and Vaz, Gavin Francis and Plessl, Christian and Trainiti, Ettore M. G. and Durelli, Gianluca C. and Bolchini, Cristiana},
booktitle = {Proc. HiPEAC Workshop on Reonfigurable Computing (WRC)},
title = {{Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems}},
year = {2016},
}
@inbook{156,
abstract = {Many modern compute nodes are heterogeneous multi-cores that integrate several CPU cores with fixed function or reconfigurable hardware cores. Such systems need to adapt task scheduling and mapping to optimise for performance and energy under varying workloads and, increasingly important, for thermal and fault management and are thus relevant targets for self-aware computing. In this chapter, we take up the generic reference architecture for designing self-aware and self-expressive computing systems and refine it for heterogeneous multi-cores. We present ReconOS, an architecture, programming model and execution environment for heterogeneous multi-cores, and show how the components of the reference architecture can be implemented on top of ReconOS. In particular, the unique feature of dynamic partial reconfiguration supports self-expression through starting and terminating reconfigurable hardware cores. We detail a case study that runs two applications on an architecture with one CPU and 12 reconfigurable hardware cores and present self-expression strategies for adapting under performance, temperature and even conflicting constraints. The case study demonstrates that the reference architecture as a model for self-aware computing is highly useful as it allows us to structure and simplify the design process, which will be essential for designing complex future compute nodes. Furthermore, ReconOS is used as a base technology for flexible protocol stacks in Chapter 10, an approach for self-aware computing at the networking level.},
author = {Agne, Andreas and Happe, Markus and Lösch, Achim and Plessl, Christian and Platzner, Marco},
booktitle = {Self-aware Computing Systems},
pages = {145--165},
publisher = {Springer International Publishing},
title = {{Self-aware Compute Nodes}},
doi = {10.1007/978-3-319-39675-0_8},
year = {2016},
}