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Journal of Electronics}, publisher={Taylor & Francis}, author={Redif, Soydan and Kasap, Server}, year={2012}, pages={1646–1651} }","chicago":"Redif, Soydan, and Server Kasap. “Parallel Algorithm for Computation of Second-Order Sequential Best Rotations.” Int. Journal of Electronics 100, no. 12 (2012): 1646–51. https://doi.org/10.1080/00207217.2012.751343.","ama":"Redif S, Kasap S. Parallel algorithm for computation of second-order sequential best rotations. Int Journal of Electronics. 2012;100(12):1646-1651. doi:10.1080/00207217.2012.751343","apa":"Redif, S., & Kasap, S. (2012). Parallel algorithm for computation of second-order sequential best rotations. Int. Journal of Electronics, 100(12), 1646–1651. https://doi.org/10.1080/00207217.2012.751343"},"doi":"10.1080/00207217.2012.751343","issue":"12","_id":"2173","intvolume":" 100","date_updated":"2022-01-06T06:55:12Z","volume":100,"date_created":"2018-04-03T09:05:36Z","status":"public","department":[{"_id":"27"},{"_id":"78"}],"publication":"Int. Journal of Electronics","author":[{"last_name":"Redif","first_name":"Soydan","full_name":"Redif, Soydan"},{"first_name":"Server","full_name":"Kasap, Server","last_name":"Kasap"}],"publisher":"Taylor & Francis","title":"Parallel algorithm for computation of second-order sequential best rotations","user_id":"24135"},{"user_id":"24135","title":"Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer","author":[{"last_name":"Kasap","first_name":"Server","full_name":"Kasap, Server"},{"last_name":"Benkrid","full_name":"Benkrid, Khaled","first_name":"Khaled"}],"publisher":"Academy Publishers","publication":"Journal of Computers","department":[{"_id":"27"},{"_id":"78"}],"status":"public","date_created":"2018-04-03T09:08:00Z","volume":7,"_id":"2174","date_updated":"2022-01-06T06:55:12Z","intvolume":" 7","issue":"6","citation":{"short":"S. Kasap, K. Benkrid, Journal of Computers 7 (2012) 1312–1328.","ieee":"S. Kasap and K. Benkrid, “Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer,” Journal of Computers, vol. 7, no. 6, pp. 1312–1328, 2012.","apa":"Kasap, S., & Benkrid, K. (2012). Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer. Journal of Computers, 7(6), 1312–1328.","ama":"Kasap S, Benkrid K. Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer. Journal of Computers. 2012;7(6):1312-1328.","chicago":"Kasap, Server, and Khaled Benkrid. “Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer.” Journal of Computers 7, no. 6 (2012): 1312–28.","mla":"Kasap, Server, and Khaled Benkrid. “Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer.” Journal of Computers, vol. 7, no. 6, Academy Publishers, 2012, pp. 1312–28.","bibtex":"@article{Kasap_Benkrid_2012, title={Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer}, volume={7}, number={6}, journal={Journal of Computers}, publisher={Academy Publishers}, author={Kasap, Server and Benkrid, Khaled}, year={2012}, pages={1312–1328} }"},"type":"journal_article","year":"2012","page":"1312-1328"},{"citation":{"short":"S. Herres-Pawlis, G. Birkenheuer, A. Brinkmann, S. Gesing, R. Grunzke, R. Jäkel, O. Kohlbacher, J. Krüger, I. Dos Santos Vieira, Studies in Health Technology and Informatics 175 (2012) 142–151.","ieee":"S. Herres-Pawlis et al., “Workflow-enhanced conformational analysis of guanidine zinc complexes via a science gateway,” Studies in Health Technology and Informatics, vol. 175, pp. 142–151, 2012.","ama":"Herres-Pawlis S, Birkenheuer G, Brinkmann A, et al. Workflow-enhanced conformational analysis of guanidine zinc complexes via a science gateway. Studies in Health Technology and Informatics. 2012;175:142-151. doi:10.3233/978-1-61499-054-3-142","apa":"Herres-Pawlis, S., Birkenheuer, G., Brinkmann, A., Gesing, S., Grunzke, R., Jäkel, R., … Dos Santos Vieira, I. (2012). Workflow-enhanced conformational analysis of guanidine zinc complexes via a science gateway. Studies in Health Technology and Informatics, 175, 142–151. https://doi.org/10.3233/978-1-61499-054-3-142","chicago":"Herres-Pawlis, Sonja, Georg Birkenheuer, André Brinkmann, Sandra Gesing, Richard Grunzke, René Jäkel, Oliver Kohlbacher, Jens Krüger, and Ines Dos Santos Vieira. “Workflow-Enhanced Conformational Analysis of Guanidine Zinc Complexes via a Science Gateway.” Studies in Health Technology and Informatics 175 (2012): 142–51. https://doi.org/10.3233/978-1-61499-054-3-142.","bibtex":"@article{Herres-Pawlis_Birkenheuer_Brinkmann_Gesing_Grunzke_Jäkel_Kohlbacher_Krüger_Dos Santos Vieira_2012, title={Workflow-enhanced conformational analysis of guanidine zinc complexes via a science gateway}, volume={175}, DOI={10.3233/978-1-61499-054-3-142}, journal={Studies in Health Technology and Informatics}, publisher={IOP Publishing}, author={Herres-Pawlis, Sonja and Birkenheuer, Georg and Brinkmann, André and Gesing, Sandra and Grunzke, Richard and Jäkel, René and Kohlbacher, Oliver and Krüger, Jens and Dos Santos Vieira, Ines}, year={2012}, pages={142–151} }","mla":"Herres-Pawlis, Sonja, et al. “Workflow-Enhanced Conformational Analysis of Guanidine Zinc Complexes via a Science Gateway.” Studies in Health Technology and Informatics, vol. 175, IOP Publishing, 2012, pp. 142–51, doi:10.3233/978-1-61499-054-3-142."},"type":"journal_article","year":"2012","page":"142-151","doi":"10.3233/978-1-61499-054-3-142","date_updated":"2022-01-06T06:55:13Z","_id":"2176","intvolume":" 175","status":"public","date_created":"2018-04-03T09:12:01Z","volume":175,"publisher":"IOP Publishing","author":[{"last_name":"Herres-Pawlis","full_name":"Herres-Pawlis, Sonja","first_name":"Sonja"},{"first_name":"Georg","full_name":"Birkenheuer, Georg","last_name":"Birkenheuer"},{"last_name":"Brinkmann","full_name":"Brinkmann, André","first_name":"André"},{"last_name":"Gesing","full_name":"Gesing, Sandra","first_name":"Sandra"},{"full_name":"Grunzke, Richard","first_name":"Richard","last_name":"Grunzke"},{"last_name":"Jäkel","first_name":"René","full_name":"Jäkel, René"},{"last_name":"Kohlbacher","first_name":"Oliver","full_name":"Kohlbacher, Oliver"},{"last_name":"Krüger","first_name":"Jens","full_name":"Krüger, Jens"},{"first_name":"Ines","full_name":"Dos Santos Vieira, Ines","last_name":"Dos Santos Vieira"}],"publication":"Studies in Health Technology and Informatics","department":[{"_id":"27"}],"user_id":"24135","title":"Workflow-enhanced conformational analysis of guanidine zinc complexes via a science gateway"},{"date_updated":"2022-01-06T06:55:13Z","_id":"2178","type":"conference","year":"2012","citation":{"chicago":"Gesing, Sandra, Sonja Herres-Pawlis, Georg Birkenheuer, André Brinkmann, Richard Grunzke, Peter Kacsuk, Oliver Kohlbacher, et al. “A Science Gateway Getting Ready for Serving the International Molecular Simulation Community.” In Proceedings of Science, Vol. PoS(EGICF12-EMITC2)050, 2012.","ama":"Gesing S, Herres-Pawlis S, Birkenheuer G, et al. A Science Gateway Getting Ready for Serving the International Molecular Simulation Community. In: Proceedings of Science. Vol PoS(EGICF12-EMITC2)050. ; 2012.","apa":"Gesing, S., Herres-Pawlis, S., Birkenheuer, G., Brinkmann, A., Grunzke, R., Kacsuk, P., … Steinke, T. (2012). A Science Gateway Getting Ready for Serving the International Molecular Simulation Community. In Proceedings of Science (Vol. PoS(EGICF12-EMITC2)050).","bibtex":"@inproceedings{Gesing_Herres-Pawlis_Birkenheuer_Brinkmann_Grunzke_Kacsuk_Kohlbacher_Kozlovszky_Krüger_Müller-Pfefferkorn_et al._2012, title={A Science Gateway Getting Ready for Serving the International Molecular Simulation Community}, volume={PoS(EGICF12-EMITC2)050}, booktitle={Proceedings of Science}, author={Gesing, Sandra and Herres-Pawlis, Sonja and Birkenheuer, Georg and Brinkmann, André and Grunzke, Richard and Kacsuk, Peter and Kohlbacher, Oliver and Kozlovszky, Miklos and Krüger, Jens and Müller-Pfefferkorn, Ralph and et al.}, year={2012} }","mla":"Gesing, Sandra, et al. “A Science Gateway Getting Ready for Serving the International Molecular Simulation Community.” Proceedings of Science, vol. PoS(EGICF12-EMITC2)050, 2012.","short":"S. Gesing, S. Herres-Pawlis, G. Birkenheuer, A. Brinkmann, R. Grunzke, P. Kacsuk, O. Kohlbacher, M. Kozlovszky, J. Krüger, R. Müller-Pfefferkorn, P. Schäfer, T. Steinke, in: Proceedings of Science, 2012.","ieee":"S. Gesing et al., “A Science Gateway Getting Ready for Serving the International Molecular Simulation Community,” in Proceedings of Science, 2012, vol. PoS(EGICF12-EMITC2)050."},"user_id":"24135","title":"A Science Gateway Getting Ready for Serving the International Molecular Simulation Community","date_created":"2018-04-03T09:15:35Z","status":"public","volume":"PoS(EGICF12-EMITC2)050","department":[{"_id":"27"}],"publication":"Proceedings of Science","author":[{"full_name":"Gesing, Sandra","first_name":"Sandra","last_name":"Gesing"},{"last_name":"Herres-Pawlis","first_name":"Sonja","full_name":"Herres-Pawlis, Sonja"},{"full_name":"Birkenheuer, Georg","first_name":"Georg","last_name":"Birkenheuer"},{"last_name":"Brinkmann","first_name":"André","full_name":"Brinkmann, André"},{"last_name":"Grunzke","full_name":"Grunzke, Richard","first_name":"Richard"},{"first_name":"Peter","full_name":"Kacsuk, Peter","last_name":"Kacsuk"},{"first_name":"Oliver","full_name":"Kohlbacher, Oliver","last_name":"Kohlbacher"},{"last_name":"Kozlovszky","first_name":"Miklos","full_name":"Kozlovszky, Miklos"},{"first_name":"Jens","full_name":"Krüger, Jens","last_name":"Krüger"},{"last_name":"Müller-Pfefferkorn","full_name":"Müller-Pfefferkorn, Ralph","first_name":"Ralph"},{"first_name":"Patrick","full_name":"Schäfer, Patrick","last_name":"Schäfer"},{"first_name":"Thomas","full_name":"Steinke, Thomas","last_name":"Steinke"}]},{"citation":{"bibtex":"@book{Plessl_Platzner_Agne_Happe_Lübbers_2012, title={Programming models for reconfigurable heterogeneous multi-cores}, publisher={Awareness Magazine}, author={Plessl, Christian and Platzner, Marco and Agne, Andreas and Happe, Markus and Lübbers, Enno}, year={2012} }","mla":"Plessl, Christian, et al. Programming Models for Reconfigurable Heterogeneous Multi-Cores. Awareness Magazine, 2012.","apa":"Plessl, C., Platzner, M., Agne, A., Happe, M., & Lübbers, E. (2012). Programming models for reconfigurable heterogeneous multi-cores. Awareness Magazine.","ama":"Plessl C, Platzner M, Agne A, Happe M, Lübbers E. Programming Models for Reconfigurable Heterogeneous Multi-Cores. Awareness Magazine; 2012.","chicago":"Plessl, Christian, Marco Platzner, Andreas Agne, Markus Happe, and Enno Lübbers. Programming Models for Reconfigurable Heterogeneous Multi-Cores. Awareness Magazine, 2012.","ieee":"C. Plessl, M. Platzner, A. Agne, M. Happe, and E. Lübbers, Programming models for reconfigurable heterogeneous multi-cores. Awareness Magazine, 2012.","short":"C. Plessl, M. Platzner, A. Agne, M. Happe, E. Lübbers, Programming Models for Reconfigurable Heterogeneous Multi-Cores, Awareness Magazine, 2012."},"year":"2012","type":"misc","language":[{"iso":"eng"}],"date_updated":"2022-01-06T07:02:44Z","_id":"587","date_created":"2017-10-17T12:42:46Z","project":[{"_id":"1","name":"SFB 901"},{"_id":"14","name":"SFB 901 - Subprojekt C2"},{"name":"SFB 901 - Project Area C","_id":"4"}],"status":"public","has_accepted_license":"1","file_date_updated":"2018-03-15T08:37:02Z","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"publisher":"Awareness Magazine","author":[{"last_name":"Plessl","id":"16153","first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian"},{"last_name":"Platzner","id":"398","first_name":"Marco","full_name":"Platzner, Marco"},{"full_name":"Agne, Andreas","first_name":"Andreas","last_name":"Agne"},{"last_name":"Happe","full_name":"Happe, Markus","first_name":"Markus"},{"first_name":"Enno","full_name":"Lübbers, Enno","last_name":"Lübbers"}],"file":[{"date_created":"2018-03-15T08:37:02Z","file_name":"587-2012_plessl_awareness_magazine.pdf","access_level":"closed","creator":"florida","file_id":"1260","file_size":353057,"success":1,"relation":"main_file","content_type":"application/pdf","date_updated":"2018-03-15T08:37:02Z"}],"title":"Programming models for reconfigurable heterogeneous multi-cores","ddc":["040"],"user_id":"398"},{"_id":"2106","conference":{"name":"22nd International Conference on Field Programmable Logic and Applicaitons (FPL)"},"type":"conference","year":"2012","citation":{"short":"B. Meyer, J. Schumacher, C. Plessl, J. Förstner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 189–196.","ieee":"B. Meyer, J. Schumacher, C. Plessl, and J. Förstner, “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2012, pp. 189–196, doi: 10.1109/FPL.2012.6339370.","chicago":"Meyer, Björn, Jörn Schumacher, Christian Plessl, and Jens Förstner. “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?” In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 189–96. IEEE, 2012. https://doi.org/10.1109/FPL.2012.6339370.","apa":"Meyer, B., Schumacher, J., Plessl, C., & Förstner, J. (2012). Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 189–196. https://doi.org/10.1109/FPL.2012.6339370","ama":"Meyer B, Schumacher J, Plessl C, Förstner J. Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE; 2012:189-196. doi:10.1109/FPL.2012.6339370","mla":"Meyer, Björn, et al. “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 189–96, doi:10.1109/FPL.2012.6339370.","bibtex":"@inproceedings{Meyer_Schumacher_Plessl_Förstner_2012, title={Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?}, DOI={10.1109/FPL.2012.6339370}, booktitle={Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)}, publisher={IEEE}, author={Meyer, Björn and Schumacher, Jörn and Plessl, Christian and Förstner, Jens}, year={2012}, pages={189–196} }"},"page":"189-196","user_id":"15278","ddc":["000"],"abstract":[{"text":"Although the benefits of FPGAs for accelerating scientific codes are widely acknowledged, the use of FPGA accelerators in scientific computing is not widespread because reaping these benefits requires knowledge of hardware design methods and tools that is typically not available with domain scientists. A promising but hardly investigated approach is to develop tool flows that keep the common languages for scientific code (C,C++, and Fortran) and allow the developer to augment the source code with OpenMPlike directives for instructing the compiler which parts of the application shall be offloaded the FPGA accelerator.\r\nIn this work we study whether the promise of effective FPGA acceleration with an OpenMP-like programming effort\r\ncan actually be held. Our target system is the Convey HC-1 reconfigurable computer for which an OpenMP-like\r\nprogramming environment exists. As case study we use an application from computational nanophotonics. Our results\r\nshow that a developer without previous FPGA experience could create an FPGA-accelerated application that is competitive to an optimized OpenMP-parallelized CPU version running on a two socket quad-core server. Finally, we discuss our experiences with this tool flow and the Convey HC-1 from a productivity and economic point of view.","lang":"eng"}],"status":"public","has_accepted_license":"1","date_created":"2018-03-29T15:04:25Z","file":[{"date_updated":"2019-02-13T09:04:46Z","content_type":"application/pdf","success":1,"relation":"main_file","file_size":2148787,"creator":"fossie","file_id":"7638","access_level":"closed","date_created":"2019-02-13T09:04:46Z","file_name":"2012-11 Meyer,Schumacher,Plessl,Förstner_Convey vector personalities-FPGA acceleratin with an openmp-like programming effort.pdf"}],"author":[{"last_name":"Meyer","first_name":"Björn","full_name":"Meyer, Björn"},{"last_name":"Schumacher","full_name":"Schumacher, Jörn","first_name":"Jörn"},{"last_name":"Plessl","id":"16153","first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian"},{"full_name":"Förstner, Jens","orcid":"0000-0001-7059-9862","first_name":"Jens","id":"158","last_name":"Förstner"}],"quality_controlled":"1","publisher":"IEEE","file_date_updated":"2019-02-13T09:04:46Z","keyword":["funding-upb-forschungspreis","funding-maxup","tet_topic_hpc"],"publication":"Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)","doi":"10.1109/FPL.2012.6339370","date_updated":"2023-09-26T13:39:13Z","language":[{"iso":"eng"}],"title":"Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?","department":[{"_id":"27"},{"_id":"518"},{"_id":"15"},{"_id":"78"}]},{"_id":"2108","intvolume":" 36","issue":"2","page":"110-126","type":"journal_article","citation":{"ieee":"T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators,” Microprocessors and Microsystems, vol. 36, no. 2, pp. 110–126, 2012, doi: 10.1016/j.micpro.2011.04.002.","short":"T. Schumacher, C. Plessl, M. Platzner, Microprocessors and Microsystems 36 (2012) 110–126.","mla":"Schumacher, Tobias, et al. “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators.” Microprocessors and Microsystems, vol. 36, no. 2, 2012, pp. 110–26, doi:10.1016/j.micpro.2011.04.002.","bibtex":"@article{Schumacher_Plessl_Platzner_2012, title={IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators}, volume={36}, DOI={10.1016/j.micpro.2011.04.002}, number={2}, journal={Microprocessors and Microsystems}, author={Schumacher, Tobias and Plessl, Christian and Platzner, Marco}, year={2012}, pages={110–126} }","apa":"Schumacher, T., Plessl, C., & Platzner, M. (2012). IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. Microprocessors and Microsystems, 36(2), 110–126. https://doi.org/10.1016/j.micpro.2011.04.002","ama":"Schumacher T, Plessl C, Platzner M. IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. Microprocessors and Microsystems. 2012;36(2):110-126. doi:10.1016/j.micpro.2011.04.002","chicago":"Schumacher, Tobias, Christian Plessl, and Marco Platzner. “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators.” Microprocessors and Microsystems 36, no. 2 (2012): 110–26. https://doi.org/10.1016/j.micpro.2011.04.002."},"year":"2012","user_id":"15278","publication":"Microprocessors and Microsystems","keyword":["funding-altera"],"quality_controlled":"1","author":[{"full_name":"Schumacher, Tobias","first_name":"Tobias","last_name":"Schumacher"},{"full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian","id":"16153","last_name":"Plessl"},{"first_name":"Marco","full_name":"Platzner, Marco","last_name":"Platzner","id":"398"}],"date_created":"2018-03-29T15:12:38Z","status":"public","volume":36,"date_updated":"2023-09-26T13:39:30Z","doi":"10.1016/j.micpro.2011.04.002","language":[{"iso":"eng"}],"title":"IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"publication_identifier":{"issn":["0141-9331"]}},{"abstract":[{"lang":"eng","text":"Due to the continuously shrinking device structures and increasing densities of FPGAs, thermal aspects have become the new focus for many research projects over the last years. Most researchers rely on temperature simulations to evaluate their novel thermal management techniques. However, the accuracy of the simulations is to some extent questionable and they require a high computational effort if a detailed thermal model is used.For experimental evaluation of real-world temperature management methods, often synthetic heat sources are employed. Therefore, in this paper we investigated the question if we can create significant rises in temperature on modern FPGAs to enable future evaluation of thermal management techniques based on experiments in contrast to simulations. Therefore, we have developed eight different heat-generating cores that use different subsets of the FPGA resources. Our experimental results show that, according to the built-in thermal diode of our Xilinx Virtex-5 FPGA, we can increase the chip temperature by 134 degree C in less than 12 minutes by only utilizing about 21% of the slices."}],"ddc":["040"],"user_id":"15278","publisher":"IEEE","quality_controlled":"1","author":[{"full_name":"Happe, Markus","first_name":"Markus","last_name":"Happe"},{"first_name":"Hendrik","full_name":"Hangmann, Hendrik","last_name":"Hangmann"},{"last_name":"Agne","full_name":"Agne, Andreas","first_name":"Andreas"},{"last_name":"Plessl","id":"16153","first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982"}],"publication":"Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig)","file_date_updated":"2018-03-15T06:48:32Z","file":[{"file_id":"1246","creator":"florida","file_size":730144,"success":1,"relation":"main_file","content_type":"application/pdf","date_updated":"2018-03-15T06:48:32Z","file_name":"615-ReConFig12_01.pdf","date_created":"2018-03-15T06:48:32Z","access_level":"closed"}],"has_accepted_license":"1","status":"public","date_created":"2017-10-17T12:42:51Z","_id":"615","citation":{"ieee":"M. Happe, H. Hangmann, A. Agne, and C. Plessl, “Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators,” in Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416745.","short":"M. Happe, H. Hangmann, A. Agne, C. Plessl, in: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.","mla":"Happe, Markus, et al. “Eight Ways to Put Your FPGA on Fire – A Systematic Study of Heat Generators.” Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416745.","bibtex":"@inproceedings{Happe_Hangmann_Agne_Plessl_2012, title={Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators}, DOI={10.1109/ReConFig.2012.6416745}, booktitle={Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Happe, Markus and Hangmann, Hendrik and Agne, Andreas and Plessl, Christian}, year={2012}, pages={1–8} }","chicago":"Happe, Markus, Hendrik Hangmann, Andreas Agne, and Christian Plessl. “Eight Ways to Put Your FPGA on Fire – A Systematic Study of Heat Generators.” In Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2012. https://doi.org/10.1109/ReConFig.2012.6416745.","ama":"Happe M, Hangmann H, Agne A, Plessl C. Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. In: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8. doi:10.1109/ReConFig.2012.6416745","apa":"Happe, M., Hangmann, H., Agne, A., & Plessl, C. (2012). Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2012.6416745"},"year":"2012","type":"conference","page":"1-8","title":"Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"project":[{"grant_number":"160364472","name":"SFB 901","_id":"1"},{"_id":"14","grant_number":"160364472","name":"SFB 901 - Subprojekt C2"},{"_id":"4","name":"SFB 901 - Project Area C"},{"grant_number":"257906","name":"Engineering Proprioception in Computing Systems","_id":"31"}],"date_updated":"2023-09-26T13:42:26Z","doi":"10.1109/ReConFig.2012.6416745","language":[{"iso":"eng"}]},{"user_id":"15278","ddc":["040"],"abstract":[{"text":"One major obstacle for a wide spread FPGA usage in general-purpose computing is the development tool flow that requires much higher effort than for pure software solutions. Convey Computer promises a solution to this problem for their HC-1 platform, where the FPGAs are configured to run as a vector processor and the software source code can be annotated with pragmas that guide an automated vectorization process. We investigate this approach for a stereo matching algorithm that has abundant parallelism and a number of different computational patterns. We note that for this case study the automated vectorization in its current state doesn’t hold its productivity promise. However, we also show that using the Vector Personality can yield a significant speedups compared to CPU implementations in two of three investigated phases of the algorithm. Those speedups don’t match custom FPGA implementations, but can come with much reduced development effort.","lang":"eng"}],"date_created":"2017-10-17T12:42:47Z","has_accepted_license":"1","status":"public","file":[{"content_type":"application/pdf","date_updated":"2018-03-15T08:33:18Z","success":1,"relation":"main_file","file_size":371235,"creator":"florida","file_id":"1257","access_level":"closed","date_created":"2018-03-15T08:33:18Z","file_name":"591-ReConFig2012Kenter_Schmitz_Plessl.pdf"}],"publication":"Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)","file_date_updated":"2018-03-15T08:33:18Z","author":[{"first_name":"Tobias","full_name":"Kenter, Tobias","last_name":"Kenter","id":"3145"},{"first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","last_name":"Plessl","id":"16153"},{"last_name":"Schmitz","full_name":"Schmitz, Henning","first_name":"Henning"}],"publisher":"IEEE","quality_controlled":"1","_id":"591","page":"1-8","citation":{"short":"T. Kenter, C. Plessl, H. Schmitz, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.","ieee":"T. Kenter, C. Plessl, and H. Schmitz, “Pragma based parallelization - Trading hardware efficiency for ease of use?,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416773.","chicago":"Kenter, Tobias, Christian Plessl, and Henning Schmitz. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?” In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2012. https://doi.org/10.1109/ReConFig.2012.6416773.","apa":"Kenter, T., Plessl, C., & Schmitz, H. (2012). Pragma based parallelization - Trading hardware efficiency for ease of use? Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2012.6416773","ama":"Kenter T, Plessl C, Schmitz H. Pragma based parallelization - Trading hardware efficiency for ease of use? In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8. doi:10.1109/ReConFig.2012.6416773","mla":"Kenter, Tobias, et al. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416773.","bibtex":"@inproceedings{Kenter_Plessl_Schmitz_2012, title={Pragma based parallelization - Trading hardware efficiency for ease of use?}, DOI={10.1109/ReConFig.2012.6416773}, booktitle={Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Kenter, Tobias and Plessl, Christian and Schmitz, Henning}, year={2012}, pages={1–8} }"},"year":"2012","type":"conference","title":"Pragma based parallelization - Trading hardware efficiency for ease of use?","project":[{"name":"SFB 901","grant_number":"160364472","_id":"1"},{"grant_number":"160364472","name":"SFB 901 - Subprojekt C2","_id":"14"},{"name":"SFB 901 - Project Area C","_id":"4"},{"_id":"31","grant_number":"257906","name":"Engineering Proprioception in Computing Systems"}],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"doi":"10.1109/ReConFig.2012.6416773","date_updated":"2023-09-26T13:41:08Z","language":[{"iso":"eng"}]},{"language":[{"iso":"eng"}],"date_updated":"2023-09-26T13:41:36Z","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"project":[{"_id":"1","name":"SFB 901","grant_number":"160364472"},{"_id":"14","grant_number":"160364472","name":"SFB 901 - Subprojekt C2"},{"_id":"4","name":"SFB 901 - Project Area C"},{"grant_number":"257906","name":"Engineering Proprioception in Computing Systems","_id":"31"}],"title":"Hardware/Software Platform for Self-aware Compute Nodes","page":"8-9","citation":{"ama":"Happe M, Agne A, Plessl C, Platzner M. Hardware/Software Platform for Self-aware Compute Nodes. In: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS). ; 2012:8-9.","apa":"Happe, M., Agne, A., Plessl, C., & Platzner, M. (2012). Hardware/Software Platform for Self-aware Compute Nodes. Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 8–9.","chicago":"Happe, Markus, Andreas Agne, Christian Plessl, and Marco Platzner. “Hardware/Software Platform for Self-Aware Compute Nodes.” In Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 8–9, 2012.","mla":"Happe, Markus, et al. “Hardware/Software Platform for Self-Aware Compute Nodes.” Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.","bibtex":"@inproceedings{Happe_Agne_Plessl_Platzner_2012, title={Hardware/Software Platform for Self-aware Compute Nodes}, booktitle={Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS)}, author={Happe, Markus and Agne, Andreas and Plessl, Christian and Platzner, Marco}, year={2012}, pages={8–9} }","short":"M. Happe, A. Agne, C. Plessl, M. Platzner, in: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.","ieee":"M. Happe, A. Agne, C. Plessl, and M. Platzner, “Hardware/Software Platform for Self-aware Compute Nodes,” in Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9."},"type":"conference","year":"2012","_id":"609","file":[{"content_type":"application/pdf","date_updated":"2018-03-15T08:14:17Z","success":1,"relation":"main_file","file_size":146789,"creator":"florida","file_id":"1249","access_level":"closed","date_created":"2018-03-15T08:14:17Z","file_name":"609-happe12_fpl_awareness.pdf"}],"publication":"Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS)","file_date_updated":"2018-03-15T08:14:17Z","author":[{"last_name":"Happe","first_name":"Markus","full_name":"Happe, Markus"},{"last_name":"Agne","first_name":"Andreas","full_name":"Agne, Andreas"},{"id":"16153","last_name":"Plessl","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian"},{"id":"398","last_name":"Platzner","full_name":"Platzner, Marco","first_name":"Marco"}],"quality_controlled":"1","date_created":"2017-10-17T12:42:50Z","has_accepted_license":"1","status":"public","abstract":[{"lang":"eng","text":"Today's design and operation principles and methods do not scale well with future reconfigurable computing systems due to an increased complexity in system architectures and applications, run-time dynamics and corresponding requirements. Hence, novel design and operation principles and methods are needed that possibly break drastically with the static ones we have built into our systems and the fixed abstraction layers we have cherished over the last decades. Thus, we propose a HW/SW platform that collects and maintains information about its state and progress which enables the system to reason about its behavior (self-awareness) and utilizes its knowledge to effectively and autonomously adapt its behavior to changing requirements (self-expression).To enable self-awareness, our compute nodes collect information using a variety of sensors, i.e. performance counters and thermal diodes, and use internal self-awareness models that process these information. For self-awareness, on-line learning is crucial such that the node learns and continuously updates its models at run-time to react to changing conditions. To enable self-expression, we break with the classic design-time abstraction layers of hardware, operating system and software. In contrast, our system is able to vertically migrate functionalities between the layers at run-time to exploit trade-offs between abstraction and optimization.This paper presents a heterogeneous multi-core architecture, that enables self-awareness and self-expression, an operating system for our proposed hardware/software platform and a novel self-expression method."}],"user_id":"15278","ddc":["040"]},{"project":[{"_id":"1","grant_number":"160364472","name":"SFB 901"},{"_id":"14","grant_number":"160364472","name":"SFB 901 - Subprojekt C2"},{"name":"SFB 901 - Project Area C","_id":"4"}],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"title":"Turning control flow graphs into function calls: Code generation for heterogeneous architectures","language":[{"iso":"eng"}],"doi":"10.1109/HPCSim.2012.6266973","date_updated":"2023-09-26T13:42:54Z","status":"public","has_accepted_license":"1","date_created":"2017-10-17T12:42:42Z","file":[{"date_created":"2018-03-15T10:20:24Z","file_name":"567-ba-ca-12a.pdf","access_level":"closed","creator":"florida","file_id":"1275","file_size":288508,"relation":"main_file","success":1,"content_type":"application/pdf","date_updated":"2018-03-15T10:20:24Z"}],"quality_controlled":"1","publisher":"IEEE","author":[{"last_name":"Barrio","first_name":"Pablo","full_name":"Barrio, Pablo"},{"first_name":"Carlos","full_name":"Carreras, Carlos","last_name":"Carreras"},{"last_name":"Sierra","first_name":"Roberto","full_name":"Sierra, Roberto"},{"id":"3145","last_name":"Kenter","full_name":"Kenter, Tobias","first_name":"Tobias"},{"id":"16153","last_name":"Plessl","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","first_name":"Christian"}],"file_date_updated":"2018-03-15T10:20:24Z","publication":"Proceedings of the International Conference on High Performance Computing and Simulation (HPCS)","user_id":"15278","ddc":["040"],"abstract":[{"lang":"eng","text":"Heterogeneous machines are gaining momentum in the High Performance Computing field, due to the theoretical speedups and power consumption. In practice, while some applications meet the performance expectations, heterogeneous architectures still require a tremendous effort from the application developers. This work presents a code generation method to port codes into heterogeneous platforms, based on transformations of the control flow into function calls. The results show that the cost of the function-call mechanism is affordable for the tested HPC kernels. The complete toolchain, based on the LLVM compiler infrastructure, is fully automated once the sequential specification is provided."}],"year":"2012","type":"conference","citation":{"bibtex":"@inproceedings{Barrio_Carreras_Sierra_Kenter_Plessl_2012, title={Turning control flow graphs into function calls: Code generation for heterogeneous architectures}, DOI={10.1109/HPCSim.2012.6266973}, booktitle={Proceedings of the International Conference on High Performance Computing and Simulation (HPCS)}, publisher={IEEE}, author={Barrio, Pablo and Carreras, Carlos and Sierra, Roberto and Kenter, Tobias and Plessl, Christian}, year={2012}, pages={559–565} }","mla":"Barrio, Pablo, et al. “Turning Control Flow Graphs into Function Calls: Code Generation for Heterogeneous Architectures.” Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–65, doi:10.1109/HPCSim.2012.6266973.","ama":"Barrio P, Carreras C, Sierra R, Kenter T, Plessl C. Turning control flow graphs into function calls: Code generation for heterogeneous architectures. In: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS). IEEE; 2012:559-565. doi:10.1109/HPCSim.2012.6266973","apa":"Barrio, P., Carreras, C., Sierra, R., Kenter, T., & Plessl, C. (2012). Turning control flow graphs into function calls: Code generation for heterogeneous architectures. Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 559–565. https://doi.org/10.1109/HPCSim.2012.6266973","chicago":"Barrio, Pablo, Carlos Carreras, Roberto Sierra, Tobias Kenter, and Christian Plessl. “Turning Control Flow Graphs into Function Calls: Code Generation for Heterogeneous Architectures.” In Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 559–65. IEEE, 2012. https://doi.org/10.1109/HPCSim.2012.6266973.","ieee":"P. Barrio, C. Carreras, R. Sierra, T. Kenter, and C. Plessl, “Turning control flow graphs into function calls: Code generation for heterogeneous architectures,” in Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 2012, pp. 559–565, doi: 10.1109/HPCSim.2012.6266973.","short":"P. Barrio, C. Carreras, R. Sierra, T. Kenter, C. Plessl, in: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–565."},"page":"559-565","_id":"567"},{"user_id":"15278","ddc":["040"],"abstract":[{"text":"While numerous publications have presented ring oscillator designs for temperature measurements a detailed study of the ring oscillator's design space is still missing. In this work, we introduce metrics for comparing the performance and area efficiency of ring oscillators and a methodology for determining these metrics. As a result, we present a systematic study of the design space for ring oscillators for a Xilinx Virtex-5 platform FPGA.","lang":"eng"}],"date_created":"2017-10-17T12:42:51Z","has_accepted_license":"1","status":"public","file":[{"content_type":"application/pdf","date_updated":"2018-03-15T06:49:03Z","relation":"main_file","success":1,"file_size":202923,"file_id":"1247","creator":"florida","access_level":"closed","date_created":"2018-03-15T06:49:03Z","file_name":"612-ruething_fpl12.pdf"}],"publication":"Proceedings of the International Conference on Field Programmable Logic and Applications (FPL)","file_date_updated":"2018-03-15T06:49:03Z","quality_controlled":"1","publisher":"IEEE","author":[{"last_name":"Rüthing","full_name":"Rüthing, Christoph","first_name":"Christoph"},{"last_name":"Happe","full_name":"Happe, Markus","first_name":"Markus"},{"last_name":"Agne","first_name":"Andreas","full_name":"Agne, Andreas"},{"last_name":"Plessl","id":"16153","first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian"}],"_id":"612","page":"559-562","type":"conference","citation":{"chicago":"Rüthing, Christoph, Markus Happe, Andreas Agne, and Christian Plessl. “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs.” In Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 559–62. IEEE, 2012. https://doi.org/10.1109/FPL.2012.6339370.","ama":"Rüthing C, Happe M, Agne A, Plessl C. Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs. In: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2012:559-562. doi:10.1109/FPL.2012.6339370","apa":"Rüthing, C., Happe, M., Agne, A., & Plessl, C. (2012). Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs. Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 559–562. https://doi.org/10.1109/FPL.2012.6339370","bibtex":"@inproceedings{Rüthing_Happe_Agne_Plessl_2012, title={Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs}, DOI={10.1109/FPL.2012.6339370}, booktitle={Proceedings of the International Conference on Field Programmable Logic and Applications (FPL)}, publisher={IEEE}, author={Rüthing, Christoph and Happe, Markus and Agne, Andreas and Plessl, Christian}, year={2012}, pages={559–562} }","mla":"Rüthing, Christoph, et al. “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs.” Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–62, doi:10.1109/FPL.2012.6339370.","short":"C. Rüthing, M. Happe, A. Agne, C. Plessl, in: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–562.","ieee":"C. Rüthing, M. Happe, A. Agne, and C. Plessl, “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs,” in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 2012, pp. 559–562, doi: 10.1109/FPL.2012.6339370."},"year":"2012","title":"Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs","project":[{"_id":"1","grant_number":"160364472","name":"SFB 901"},{"grant_number":"160364472","name":"SFB 901 - Subprojekt C2","_id":"14"},{"_id":"4","name":"SFB 901 - Project Area C"},{"name":"Engineering Proprioception in Computing Systems","grant_number":"257906","_id":"31"}],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"doi":"10.1109/FPL.2012.6339370","date_updated":"2023-09-26T13:42:03Z","language":[{"iso":"eng"}]},{"date_updated":"2023-09-26T13:40:17Z","_id":"2180","language":[{"iso":"eng"}],"year":"2012","type":"conference","citation":{"short":"T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.","ieee":"T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux,” 2012.","chicago":"Beisel, Tobias, Tobias Wiersema, Christian Plessl, and André Brinkmann. “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux.” In Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.","apa":"Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2012). Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS).","ama":"Beisel T, Wiersema T, Plessl C, Brinkmann A. Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. In: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS). ; 2012.","mla":"Beisel, Tobias, et al. “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux.” Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.","bibtex":"@inproceedings{Beisel_Wiersema_Plessl_Brinkmann_2012, title={Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux}, booktitle={Proc. Workshop on Computer Architecture and Operating System Co-design (CAOS)}, author={Beisel, Tobias and Wiersema, Tobias and Plessl, Christian and Brinkmann, André}, year={2012} }"},"user_id":"15278","title":"Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux","keyword":["funding-enhance"],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"publication":"Proc. Workshop on Computer Architecture and Operating System Co-design (CAOS)","quality_controlled":"1","author":[{"last_name":"Beisel","full_name":"Beisel, Tobias","first_name":"Tobias"},{"full_name":"Wiersema, Tobias","first_name":"Tobias","id":"3118","last_name":"Wiersema"},{"first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","last_name":"Plessl","id":"16153"},{"full_name":"Brinkmann, André","first_name":"André","last_name":"Brinkmann"}],"project":[{"name":"Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models","grant_number":"01|H11004A","_id":"30"}],"date_created":"2018-04-03T09:18:33Z","status":"public"},{"citation":{"chicago":"Grad, Mariusz, and Christian Plessl. “On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-Based Reconfigurable Processors.” Int. Journal of Reconfigurable Computing (IJRC), 2012. https://doi.org/10.1155/2012/418315.","apa":"Grad, M., & Plessl, C. (2012). On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors. Int. Journal of Reconfigurable Computing (IJRC). https://doi.org/10.1155/2012/418315","ama":"Grad M, Plessl C. On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors. Int Journal of Reconfigurable Computing (IJRC). Published online 2012. doi:10.1155/2012/418315","bibtex":"@article{Grad_Plessl_2012, title={On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors}, DOI={10.1155/2012/418315}, journal={Int. Journal of Reconfigurable Computing (IJRC)}, publisher={Hindawi Publishing Corp.}, author={Grad, Mariusz and Plessl, Christian}, year={2012} }","mla":"Grad, Mariusz, and Christian Plessl. “On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-Based Reconfigurable Processors.” Int. Journal of Reconfigurable Computing (IJRC), Hindawi Publishing Corp., 2012, doi:10.1155/2012/418315.","short":"M. Grad, C. Plessl, Int. Journal of Reconfigurable Computing (IJRC) (2012).","ieee":"M. Grad and C. Plessl, “On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors,” Int. Journal of Reconfigurable Computing (IJRC), 2012, doi: 10.1155/2012/418315."},"year":"2012","type":"journal_article","language":[{"iso":"eng"}],"_id":"2177","date_updated":"2023-09-26T13:39:48Z","doi":"10.1155/2012/418315","quality_controlled":"1","publisher":"Hindawi Publishing Corp.","author":[{"last_name":"Grad","first_name":"Mariusz","full_name":"Grad, Mariusz"},{"last_name":"Plessl","id":"16153","first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian"}],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"publication":"Int. Journal of Reconfigurable Computing (IJRC)","status":"public","date_created":"2018-04-03T09:13:22Z","title":"On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors","user_id":"15278"},{"language":[{"iso":"eng"}],"type":"conference","year":"2011","citation":{"ieee":"C. Kleineweber, A. Keller, O. Niehörster, and A. Brinkmann, “Rule Based Mapping of Virtual Machines in Clouds,” in Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011.","short":"C. Kleineweber, A. Keller, O. Niehörster, A. Brinkmann, in: Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011.","bibtex":"@inproceedings{Kleineweber_Keller_Niehörster_Brinkmann_2011, title={Rule Based Mapping of Virtual Machines in Clouds}, DOI={10.1109/PDP.2011.69}, booktitle={Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP)}, author={Kleineweber, Christoph and Keller, Axel and Niehörster, Oliver and Brinkmann, André}, year={2011} }","mla":"Kleineweber, Christoph, et al. “Rule Based Mapping of Virtual Machines in Clouds.” Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011, doi:10.1109/PDP.2011.69.","apa":"Kleineweber, C., Keller, A., Niehörster, O., & Brinkmann, A. (2011). Rule Based Mapping of Virtual Machines in Clouds. In Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP). https://doi.org/10.1109/PDP.2011.69","ama":"Kleineweber C, Keller A, Niehörster O, Brinkmann A. Rule Based Mapping of Virtual Machines in Clouds. In: Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP). ; 2011. doi:10.1109/PDP.2011.69","chicago":"Kleineweber, Christoph, Axel Keller, Oliver Niehörster, and André Brinkmann. “Rule Based Mapping of Virtual Machines in Clouds.” In Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP), 2011. https://doi.org/10.1109/PDP.2011.69."},"date_updated":"2022-01-06T06:54:10Z","_id":"1968","doi":"10.1109/PDP.2011.69","department":[{"_id":"27"}],"publication":"Proc. Int. Conf. on Parallel, Distributed and Network-Based Computing (PDP)","author":[{"last_name":"Kleineweber","full_name":"Kleineweber, Christoph","first_name":"Christoph"},{"full_name":"Keller, Axel","first_name":"Axel","id":"15274","last_name":"Keller"},{"first_name":"Oliver","full_name":"Niehörster, Oliver","last_name":"Niehörster"},{"last_name":"Brinkmann","first_name":"André","full_name":"Brinkmann, André"}],"date_created":"2018-03-29T11:21:05Z","status":"public","publication_status":"published","abstract":[{"lang":"eng","text":"Infrastructure as a Service providers use virtualization to abstract their hardware and to create a dynamic data center. Virtualization enables the consolidation of virtual machines as well as the migration of them to other hosts during runtime. Each provider has its own strategy to efficiently operate a data center. We present a rule based mapping algorithm for VMs, which is able to automatically adapt the mapping between VMs and physical hosts. It offers an interface where policies can be defined and combined in a generic way. The algorithm performs the initial mapping at request time as well as a remapping during runtime. It deals with policy and infrastructure changes. We extended the open source IaaS solution Eucalyptus and we evaluated it with typical policies: maximizing the compute performance and VM locality to achieve a high performance and minimizing energy consumption. The evaluation was done on state-of-the-art servers in our own data center and by simulations using a workload of the Parallel Workload Archive. The results show that our algorithm performs well in dynamic data centers environments."}],"user_id":"15274","title":"Rule Based Mapping of Virtual Machines in Clouds"},{"doi":"10.1002/spe.1055","_id":"1971","date_updated":"2022-01-06T06:54:10Z","citation":{"ieee":"G. Birkenheuer et al., “Virtualized HPC: a contradiction in terms?,” Software: Practice and Experience, 2011.","short":"G. Birkenheuer, A. Brinkmann, J. Kaiser, A. Keller, M. Keller, C. Kleineweber, C. Konersmann, O. Niehörster, T. Schäfer, J. Simon, M. Wilhelm, Software: Practice and Experience (2011).","bibtex":"@article{Birkenheuer_Brinkmann_Kaiser_Keller_Keller_Kleineweber_Konersmann_Niehörster_Schäfer_Simon_et al._2011, title={Virtualized HPC: a contradiction in terms?}, DOI={10.1002/spe.1055}, journal={Software: Practice and Experience}, publisher={John Wiley & Sons}, author={Birkenheuer, Georg and Brinkmann, André and Kaiser, Jürgen and Keller, Axel and Keller, Matthias and Kleineweber, Christoph and Konersmann, Christoph and Niehörster, Oliver and Schäfer, Thorsten and Simon, Jens and et al.}, year={2011} }","mla":"Birkenheuer, Georg, et al. “Virtualized HPC: A Contradiction in Terms?” Software: Practice and Experience, John Wiley & Sons, 2011, doi:10.1002/spe.1055.","chicago":"Birkenheuer, Georg, André Brinkmann, Jürgen Kaiser, Axel Keller, Matthias Keller, Christoph Kleineweber, Christoph Konersmann, et al. “Virtualized HPC: A Contradiction in Terms?” Software: Practice and Experience, 2011. https://doi.org/10.1002/spe.1055.","apa":"Birkenheuer, G., Brinkmann, A., Kaiser, J., Keller, A., Keller, M., Kleineweber, C., … Wilhelm, M. (2011). Virtualized HPC: a contradiction in terms? Software: Practice and Experience. https://doi.org/10.1002/spe.1055","ama":"Birkenheuer G, Brinkmann A, Kaiser J, et al. Virtualized HPC: a contradiction in terms? Software: Practice and Experience. 2011. doi:10.1002/spe.1055"},"type":"journal_article","year":"2011","language":[{"iso":"eng"}],"title":"Virtualized HPC: a contradiction in terms?","user_id":"15274","abstract":[{"lang":"eng","text":"System virtualization has become the enabling technology to manage the increasing number of different applications inside data centers. The abstraction from the underlying hardware and the provision of multiple virtual machines (VM) on a single physical server have led to a consolidation and more efficient usage of physical servers. The abstraction from the hardware also eases the provision of applications on different data centers, as applied in several cloud computing environments. In this case, the application need not adapt to the environment of the cloud computing provider, but can travel around with its own VM image, including its own operating system and libraries. System virtualization and cloud computing could also be very attractive in the context of high‐performance computing (HPC). Today, HPC centers have to cope with both, the management of the infrastructure and also the applications. Virtualization technology would enable these centers to focus on the infrastructure, while the users, collaborating inside their virtual organizations (VOs), would be able to provide the software. Nevertheless, there seems to be a contradiction between HPC and cloud computing, as there are very few successful approaches to virtualize HPC centers. This work discusses the underlying reasons, including the management and performance, and presents solutions to overcome the contradiction, including a set of new libraries. The viability of the presented approach is shown based on evaluating a selected parallel, scientific application in a virtualized HPC environment. "}],"publication_status":"published","status":"public","date_created":"2018-03-29T11:22:26Z","author":[{"last_name":"Birkenheuer","first_name":"Georg","full_name":"Birkenheuer, Georg"},{"last_name":"Brinkmann","full_name":"Brinkmann, André","first_name":"André"},{"first_name":"Jürgen","full_name":"Kaiser, Jürgen","last_name":"Kaiser"},{"full_name":"Keller, Axel","first_name":"Axel","id":"15274","last_name":"Keller"},{"first_name":"Matthias","full_name":"Keller, Matthias","last_name":"Keller"},{"last_name":"Kleineweber","full_name":"Kleineweber, Christoph","first_name":"Christoph"},{"last_name":"Konersmann","first_name":"Christoph","full_name":"Konersmann, Christoph"},{"last_name":"Niehörster","full_name":"Niehörster, Oliver","first_name":"Oliver"},{"last_name":"Schäfer","full_name":"Schäfer, Thorsten","first_name":"Thorsten"},{"id":"15273","last_name":"Simon","full_name":"Simon, Jens","first_name":"Jens"},{"last_name":"Wilhelm","full_name":"Wilhelm, Maximilan","first_name":"Maximilan"}],"publisher":"John Wiley & Sons","publication":"Software: Practice and Experience","department":[{"_id":"27"}]},{"doi":"10.1109/MASCOTS.2011.52","date_updated":"2022-01-06T06:54:10Z","_id":"1972","language":[{"iso":"eng"}],"year":"2011","citation":{"short":"O. Niehörster, A. Keller, A. Brinkmann, in: Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011.","ieee":"O. Niehörster, A. Keller, and A. Brinkmann, “An Energy-Aware SaaS Stack,” in Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011.","chicago":"Niehörster, Oliver, Axel Keller, and André Brinkmann. “An Energy-Aware SaaS Stack.” In Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011. https://doi.org/10.1109/MASCOTS.2011.52.","ama":"Niehörster O, Keller A, Brinkmann A. An Energy-Aware SaaS Stack. In: Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS). ; 2011. doi:10.1109/MASCOTS.2011.52","apa":"Niehörster, O., Keller, A., & Brinkmann, A. (2011). An Energy-Aware SaaS Stack. In Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS). https://doi.org/10.1109/MASCOTS.2011.52","bibtex":"@inproceedings{Niehörster_Keller_Brinkmann_2011, title={An Energy-Aware SaaS Stack}, DOI={10.1109/MASCOTS.2011.52}, booktitle={Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS)}, author={Niehörster, Oliver and Keller, Axel and Brinkmann, André}, year={2011} }","mla":"Niehörster, Oliver, et al. “An Energy-Aware SaaS Stack.” Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011, doi:10.1109/MASCOTS.2011.52."},"type":"conference","user_id":"15274","title":"An Energy-Aware SaaS Stack","abstract":[{"lang":"eng","text":"We present a multi-agent system on top of the IaaS layer consisting of a scheduler agent and multiple worker agents. Each job is controlled by an autonomous worker agent, which is equipped with application specific knowledge (e.g., performance functions) allowing it to estimate the type and number of necessary resources. During runtime, the worker agent monitors the job and adapts its resources to ensure the specified quality of service - even in noisy clouds where the job instances are influenced by other jobs. All worker agents interact with the scheduler agent, which takes care of limited resources and does a cost-aware scheduling by assigning jobs to times with low energy costs. The whole architecture is self-optimizing and able to use public or private clouds."}],"date_created":"2018-03-29T11:23:22Z","status":"public","publication_status":"published","department":[{"_id":"27"}],"publication":"Proc. Int. Meeting of the IEEE Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS)","author":[{"last_name":"Niehörster","first_name":"Oliver","full_name":"Niehörster, Oliver"},{"first_name":"Axel","full_name":"Keller, Axel","last_name":"Keller","id":"15274"},{"last_name":"Brinkmann","first_name":"André","full_name":"Brinkmann, André"}]},{"place":"Washington, DC","user_id":"24135","title":"Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems","publication":"Proc. Int. Conf. on High Performance Computing (HIPC)","department":[{"_id":"27"}],"author":[{"last_name":"Miranda","first_name":"Alberto","full_name":"Miranda, Alberto"},{"last_name":"Effert","first_name":"Sascha","full_name":"Effert, Sascha"},{"last_name":"Kang","first_name":"Yangwook","full_name":"Kang, Yangwook"},{"first_name":"Ethan","full_name":"Miller, Ethan","last_name":"Miller"},{"last_name":"Brinkmann","first_name":"André","full_name":"Brinkmann, André"},{"first_name":"Toni","full_name":"Cortes, Toni","last_name":"Cortes"}],"publisher":"IEEE Computer Society","date_created":"2018-04-03T14:30:39Z","status":"public","_id":"2188","date_updated":"2022-01-06T06:55:18Z","doi":"10.1109/HiPC.2011.6152745","page":"1-10","type":"conference","citation":{"short":"A. Miranda, S. Effert, Y. Kang, E. Miller, A. Brinkmann, T. Cortes, in: Proc. Int. Conf. on High Performance Computing (HIPC), IEEE Computer Society, Washington, DC, 2011, pp. 1–10.","ieee":"A. Miranda, S. Effert, Y. Kang, E. Miller, A. Brinkmann, and T. Cortes, “Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems,” in Proc. Int. Conf. on High Performance Computing (HIPC), 2011, pp. 1–10.","ama":"Miranda A, Effert S, Kang Y, Miller E, Brinkmann A, Cortes T. Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems. In: Proc. Int. Conf. on High Performance Computing (HIPC). Washington, DC: IEEE Computer Society; 2011:1-10. doi:10.1109/HiPC.2011.6152745","apa":"Miranda, A., Effert, S., Kang, Y., Miller, E., Brinkmann, A., & Cortes, T. (2011). Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems. In Proc. Int. Conf. on High Performance Computing (HIPC) (pp. 1–10). Washington, DC: IEEE Computer Society. https://doi.org/10.1109/HiPC.2011.6152745","chicago":"Miranda, Alberto, Sascha Effert, Yangwook Kang, Ethan Miller, André Brinkmann, and Toni Cortes. “Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems.” In Proc. Int. Conf. on High Performance Computing (HIPC), 1–10. Washington, DC: IEEE Computer Society, 2011. https://doi.org/10.1109/HiPC.2011.6152745.","mla":"Miranda, Alberto, et al. “Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems.” Proc. Int. Conf. on High Performance Computing (HIPC), IEEE Computer Society, 2011, pp. 1–10, doi:10.1109/HiPC.2011.6152745.","bibtex":"@inproceedings{Miranda_Effert_Kang_Miller_Brinkmann_Cortes_2011, place={Washington, DC}, title={Reliable and Randomized Data Distribution Strategies for Large Scale Storage Systems}, DOI={10.1109/HiPC.2011.6152745}, booktitle={Proc. Int. Conf. on High Performance Computing (HIPC)}, publisher={IEEE Computer Society}, author={Miranda, Alberto and Effert, Sascha and Kang, Yangwook and Miller, Ethan and Brinkmann, André and Cortes, Toni}, year={2011}, pages={1–10} }"},"year":"2011"},{"status":"public","date_created":"2018-04-03T14:32:23Z","author":[{"last_name":"Grawinkel","first_name":"Matthias","full_name":"Grawinkel, Matthias"},{"full_name":"Pargmann, Markus","first_name":"Markus","last_name":"Pargmann"},{"full_name":"Dömer, Hubert","first_name":"Hubert","last_name":"Dömer"},{"last_name":"Brinkmann","first_name":"André","full_name":"Brinkmann, André"}],"publisher":"IEEE","department":[{"_id":"27"}],"publication":"Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS)","title":"Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System","user_id":"24135","citation":{"short":"M. Grawinkel, M. Pargmann, H. Dömer, A. Brinkmann, in: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), IEEE, 2011, pp. 380–387.","ieee":"M. Grawinkel, M. Pargmann, H. Dömer, and A. Brinkmann, “Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System,” in Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), 2011, pp. 380–387.","ama":"Grawinkel M, Pargmann M, Dömer H, Brinkmann A. Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System. In: Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS). IEEE; 2011:380-387. doi:10.1109/ICPADS.2011.77","apa":"Grawinkel, M., Pargmann, M., Dömer, H., & Brinkmann, A. (2011). Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System. In Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS) (pp. 380–387). IEEE. https://doi.org/10.1109/ICPADS.2011.77","chicago":"Grawinkel, Matthias, Markus Pargmann, Hubert Dömer, and André Brinkmann. “Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System.” In Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), 380–87. IEEE, 2011. https://doi.org/10.1109/ICPADS.2011.77.","bibtex":"@inproceedings{Grawinkel_Pargmann_Dömer_Brinkmann_2011, title={Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System}, DOI={10.1109/ICPADS.2011.77}, booktitle={Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS)}, publisher={IEEE}, author={Grawinkel, Matthias and Pargmann, Markus and Dömer, Hubert and Brinkmann, André}, year={2011}, pages={380–387} }","mla":"Grawinkel, Matthias, et al. “Lonestar: An Energy-Aware Disk Based Long-Term Archival Storage System.” Proc. IEEE Int. Conf. on Parallel and Distributed Systems (ICPADS), IEEE, 2011, pp. 380–87, doi:10.1109/ICPADS.2011.77."},"type":"conference","year":"2011","page":"380-387","doi":"10.1109/ICPADS.2011.77","date_updated":"2022-01-06T06:55:18Z","_id":"2189"},{"place":"Washington DC, USA","user_id":"24135","title":"Autonomic Resource Management Handling Delayed Configuration Effects","author":[{"first_name":"Oliver","full_name":"Niehörster, Oliver","last_name":"Niehörster"},{"last_name":"Brinkmann","full_name":"Brinkmann, André","first_name":"André"}],"publisher":"IEEE Computer Society","publication":"Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom)","department":[{"_id":"27"}],"status":"public","date_created":"2018-04-03T14:33:50Z","_id":"2190","date_updated":"2022-01-06T06:55:19Z","doi":"10.1109/CloudCom.2011.28","citation":{"ieee":"O. Niehörster and A. Brinkmann, “Autonomic Resource Management Handling Delayed Configuration Effects,” in Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), 2011, pp. 138–145.","short":"O. Niehörster, A. Brinkmann, in: Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), IEEE Computer Society, Washington DC, USA, 2011, pp. 138–145.","mla":"Niehörster, Oliver, and André Brinkmann. “Autonomic Resource Management Handling Delayed Configuration Effects.” Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), IEEE Computer Society, 2011, pp. 138–45, doi:10.1109/CloudCom.2011.28.","bibtex":"@inproceedings{Niehörster_Brinkmann_2011, place={Washington DC, USA}, title={Autonomic Resource Management Handling Delayed Configuration Effects}, DOI={10.1109/CloudCom.2011.28}, booktitle={Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom)}, publisher={IEEE Computer Society}, author={Niehörster, Oliver and Brinkmann, André}, year={2011}, pages={138–145} }","ama":"Niehörster O, Brinkmann A. Autonomic Resource Management Handling Delayed Configuration Effects. In: Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom). Washington DC, USA: IEEE Computer Society; 2011:138-145. doi:10.1109/CloudCom.2011.28","apa":"Niehörster, O., & Brinkmann, A. (2011). Autonomic Resource Management Handling Delayed Configuration Effects. In Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom) (pp. 138–145). Washington DC, USA: IEEE Computer Society. https://doi.org/10.1109/CloudCom.2011.28","chicago":"Niehörster, Oliver, and André Brinkmann. “Autonomic Resource Management Handling Delayed Configuration Effects.” In Proc. IEEE Int. Conf. on Cloud Computing Technology and Science (CloudCom), 138–45. Washington DC, USA: IEEE Computer Society, 2011. https://doi.org/10.1109/CloudCom.2011.28."},"year":"2011","type":"conference","page":"138-145"}]