@article{46147, author = {{Brosch, Anian and Tinazzi, Fabio and Wallscheid, Oliver and Zigliotto, Mauro and Böcker, Joachim}}, issn = {{0885-8993}}, journal = {{IEEE Transactions on Power Electronics}}, keywords = {{Electrical and Electronic Engineering}}, publisher = {{Institute of Electrical and Electronics Engineers (IEEE)}}, title = {{{Finite Set Sensorless Control With Minimum a Priori Knowledge and Tuning Effort for Interior Permanent Magnet Synchronous Motors}}}, doi = {{10.1109/tpel.2023.3294557}}, year = {{2023}}, } @article{46155, author = {{Bruns, Julia and Hagena, Maike and Gasteiger, Hedwig}}, issn = {{0742-051X}}, journal = {{Teaching and Teacher Education}}, keywords = {{Education}}, publisher = {{Elsevier BV}}, title = {{{Professional Development Enacted by Facilitators in the Context of Early Mathematics Education: Scaling up or Dilution of Effects?}}}, doi = {{10.1016/j.tate.2023.104270}}, volume = {{132}}, year = {{2023}}, } @book{46157, editor = {{Biehler, Rolf and Liebendörfer, Michael and Gueudet, Ghislaine and Rasmussen, Chris and Winsløw, Carl}}, isbn = {{9783031141744}}, issn = {{1869-4918}}, publisher = {{Springer International Publishing}}, title = {{{Practice-Oriented Research in Tertiary Mathematics Education}}}, doi = {{10.1007/978-3-031-14175-1}}, year = {{2023}}, } @article{38041, abstract = {{While FPGA accelerator boards and their respective high-level design tools are maturing, there is still a lack of multi-FPGA applications, libraries, and not least, benchmarks and reference implementations towards sustained HPC usage of these devices. As in the early days of GPUs in HPC, for workloads that can reasonably be decoupled into loosely coupled working sets, multi-accelerator support can be achieved by using standard communication interfaces like MPI on the host side. However, for performance and productivity, some applications can profit from a tighter coupling of the accelerators. FPGAs offer unique opportunities here when extending the dataflow characteristics to their communication interfaces. In this work, we extend the HPCC FPGA benchmark suite by multi-FPGA support and three missing benchmarks that particularly characterize or stress inter-device communication: b_eff, PTRANS, and LINPACK. With all benchmarks implemented for current boards with Intel and Xilinx FPGAs, we established a baseline for multi-FPGA performance. Additionally, for the communication-centric benchmarks, we explored the potential of direct FPGA-to-FPGA communication with a circuit-switched inter-FPGA network that is currently only available for one of the boards. The evaluation with parallel execution on up to 26 FPGA boards makes use of one of the largest academic FPGA installations.}}, author = {{Meyer, Marius and Kenter, Tobias and Plessl, Christian}}, issn = {{1936-7406}}, journal = {{ACM Transactions on Reconfigurable Technology and Systems}}, keywords = {{General Computer Science}}, publisher = {{Association for Computing Machinery (ACM)}}, title = {{{Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks}}}, doi = {{10.1145/3576200}}, year = {{2023}}, } @inbook{45893, author = {{Hansmeier, Tim and Kenter, Tobias and Meyer, Marius and Riebler, Heinrich and Platzner, Marco and Plessl, Christian}}, booktitle = {{On-The-Fly Computing -- Individualized IT-services in dynamic markets}}, editor = {{Haake, Claus-Jochen and Meyer auf der Heide, Friedhelm and Platzner, Marco and Wachsmuth, Henning and Wehrheim, Heike}}, pages = {{165--182}}, publisher = {{Heinz Nixdorf Institut, Universität Paderborn}}, title = {{{Compute Centers I: Heterogeneous Execution Environments}}}, doi = {{10.5281/zenodo.8068642}}, volume = {{412}}, year = {{2023}}, } @inproceedings{46190, author = {{Opdenhövel, Jan-Oliver and Plessl, Christian and Kenter, Tobias}}, booktitle = {{Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies}}, publisher = {{ACM}}, title = {{{Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation}}}, doi = {{10.1145/3597031.3597050}}, year = {{2023}}, } @inproceedings{46188, author = {{Faj, Jennifer and Kenter, Tobias and Faghih-Naini, Sara and Plessl, Christian and Aizinger, Vadym}}, booktitle = {{Proceedings of the Platform for Advanced Scientific Computing Conference}}, publisher = {{ACM}}, title = {{{Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes}}}, doi = {{10.1145/3592979.3593407}}, year = {{2023}}, } @inproceedings{46189, author = {{Prouveur, Charles and Haefele, Matthieu and Kenter, Tobias and Voss, Nils}}, booktitle = {{Proceedings of the Platform for Advanced Scientific Computing Conference}}, publisher = {{ACM}}, title = {{{FPGA Acceleration for HPC Supercapacitor Simulations}}}, doi = {{10.1145/3592979.3593419}}, year = {{2023}}, } @article{46213, author = {{Weber, Daniel and Schenke, Maximilian and Wallscheid, Oliver}}, issn = {{2169-3536}}, journal = {{IEEE Access}}, keywords = {{General Engineering, General Materials Science, General Computer Science, Electrical and Electronic Engineering}}, pages = {{76524--76536}}, publisher = {{Institute of Electrical and Electronics Engineers (IEEE)}}, title = {{{Steady-State Error Compensation for Reinforcement Learning-Based Control of Power Electronic Systems}}}, doi = {{10.1109/access.2023.3297274}}, volume = {{11}}, year = {{2023}}, } @inproceedings{46212, author = {{Weber, Daniel and Schenke, Maximilian and Wallscheid, Oliver}}, booktitle = {{2023 International Conference on Future Energy Solutions (FES)}}, publisher = {{IEEE}}, title = {{{Safe Reinforcement Learning-Based Control in Power Electronic Systems}}}, doi = {{10.1109/fes57669.2023.10182718}}, year = {{2023}}, } @unpublished{46229, author = {{Lienen, Christian and Nowosad, Alexander Philipp and Platzner, Marco}}, title = {{{Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms}}}, year = {{2023}}, } @misc{46221, author = {{N., N.}}, title = {{{Improving the End-of-Line Test of Custom-Built Geared Motors using Clustering based on Neural Networks}}}, year = {{2023}}, } @article{46251, author = {{Demir, Caglar and Ngonga Ngomo, Axel-Cyrille}}, journal = {{International Joint Conference on Artificial Intelligence}}, location = {{Macau}}, title = {{{Neuro-Symbolic Class Expression Learning}}}, year = {{2023}}, } @article{46256, author = {{Ma, Yulai and Mattiolo, Davide and Steffen, Eckhard and Wolf, Isaak Hieronymus}}, issn = {{0895-4801}}, journal = {{SIAM Journal on Discrete Mathematics}}, keywords = {{General Mathematics}}, number = {{3}}, pages = {{1548--1565}}, publisher = {{Society for Industrial & Applied Mathematics (SIAM)}}, title = {{{Pairwise Disjoint Perfect Matchings in r-Edge-Connected r-Regular Graphs}}}, doi = {{10.1137/22m1500654}}, volume = {{37}}, year = {{2023}}, } @inproceedings{43228, abstract = {{The computation of electron repulsion integrals (ERIs) over Gaussian-type orbitals (GTOs) is a challenging problem in quantum-mechanics-based atomistic simulations. In practical simulations, several trillions of ERIs may have to be computed for every time step. In this work, we investigate FPGAs as accelerators for the ERI computation. We use template parameters, here within the Intel oneAPI tool flow, to create customized designs for 256 different ERI quartet classes, based on their orbitals. To maximize data reuse, all intermediates are buffered in FPGA on-chip memory with customized layout. The pre-calculation of intermediates also helps to overcome data dependencies caused by multi-dimensional recurrence relations. The involved loop structures are partially or even fully unrolled for high throughput of FPGA kernels. Furthermore, a lossy compression algorithm utilizing arbitrary bitwidth integers is integrated in the FPGA kernels. To our best knowledge, this is the first work on ERI computation on FPGAs that supports more than just the single most basic quartet class. Also, the integration of ERI computation and compression it a novelty that is not even covered by CPU or GPU libraries so far. Our evaluation shows that using 16-bit integer for the ERI compression, the fastest FPGA kernels exceed the performance of 10 GERIS ($10 \times 10^9$ ERIs per second) on one Intel Stratix 10 GX 2800 FPGA, with maximum absolute errors around $10^{-7}$ - $10^{-5}$ Hartree. The measured throughput can be accurately explained by a performance model. The FPGA kernels deployed on 2 FPGAs outperform similar computations using the widely used libint reference on a two-socket server with 40 Xeon Gold 6148 CPU cores of the same process technology by factors up to 6.0x and on a new two-socket server with 128 EPYC 7713 CPU cores by up to 1.9x.}}, author = {{Wu, Xin and Kenter, Tobias and Schade, Robert and Kühne, Thomas and Plessl, Christian}}, booktitle = {{2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)}}, pages = {{162--173}}, title = {{{Computing and Compressing Electron Repulsion Integrals on FPGAs}}}, doi = {{10.1109/FCCM57271.2023.00026}}, year = {{2023}}, } @article{45361, abstract = {{ The non-orthogonal local submatrix method applied to electronic structure–based molecular dynamics simulations is shown to exceed 1.1 EFLOP/s in FP16/FP32-mixed floating-point arithmetic when using 4400 NVIDIA A100 GPUs of the Perlmutter system. This is enabled by a modification of the original method that pushes the sustained fraction of the peak performance to about 80%. Example calculations are performed for SARS-CoV-2 spike proteins with up to 83 million atoms. }}, author = {{Schade, Robert and Kenter, Tobias and Elgabarty, Hossam and Lass, Michael and Kühne, Thomas and Plessl, Christian}}, issn = {{1094-3420}}, journal = {{The International Journal of High Performance Computing Applications}}, keywords = {{Hardware and Architecture, Theoretical Computer Science, Software}}, publisher = {{SAGE Publications}}, title = {{{Breaking the exascale barrier for the electronic structure problem in ab-initio molecular dynamics}}}, doi = {{10.1177/10943420231177631}}, year = {{2023}}, } @inproceedings{45913, author = {{Clausing, Lennart and Guetattfi, Zakarya and Kaufmann, Paul and Lienen, Christian and Platzner, Marco}}, booktitle = {{Proceedings of the 19th International Symposium on Applied Reconfigurable Computing (ARC)}}, title = {{{On Guaranteeing Schedulability of Periodic Real-time Hardware Tasks under ReconOS64}}}, year = {{2023}}, } @phdthesis{45780, author = {{Tornede, Alexander}}, title = {{{Advanced Algorithm Selection with Machine Learning: Handling Large Algorithm Sets, Learning From Censored Data, and Simplyfing Meta Level Decisions}}}, doi = {{10.17619/UNIPB/1-1780 }}, year = {{2023}}, } @inproceedings{45578, abstract = {{A frequency-flexible Nyquist pulse synthesizer is presented with optical pulse bandwidths up to fopt=100 GHz and repetition rates equal to fopt/9, fabricated in an electronic-photonic co-integrated platform utilizing linear on-chip drivers.}}, author = {{Kress, Christian and Schwabe, Tobias and Silberhorn, Christine and Scheytt, J. Christoph}}, booktitle = {{ Conference on Lasers and Electro-Optics (CLEO) 2023}}, location = {{San Jose, CA, USA}}, publisher = {{Optica Publishing Group}}, title = {{{Generation of 100 GHz Periodic Nyquist Pulses using Cascaded Mach-Zehnder Modulators in a Silicon Electronic-Photonic Platform}}}, doi = {{https://doi.org/10.1364/CLEO_SI.2023.SF1P.6}}, year = {{2023}}, } @inproceedings{42163, abstract = {{The article shows how to learn models of dynamical systems from data which are governed by an unknown variational PDE. Rather than employing reduction techniques, we learn a discrete field theory governed by a discrete Lagrangian density $L_d$ that is modelled as a neural network. Careful regularisation of the loss function for training $L_d$ is necessary to obtain a field theory that is suitable for numerical computations: we derive a regularisation term which optimises the solvability of the discrete Euler--Lagrange equations. Secondly, we develop a method to find solutions to machine learned discrete field theories which constitute travelling waves of the underlying continuous PDE.}}, author = {{Offen, Christian and Ober-Blöbaum, Sina}}, booktitle = {{Geometric Science of Information}}, editor = {{Nielsen, F and Barbaresco, F}}, keywords = {{System identification, discrete Lagrangians, travelling waves}}, location = {{Saint-Malo, Palais du Grand Large, France}}, pages = {{569--579}}, publisher = {{Springer, Cham.}}, title = {{{Learning discrete Lagrangians for variational PDEs from data and detection of travelling waves}}}, doi = {{10.1007/978-3-031-38271-0_57}}, volume = {{14071}}, year = {{2023}}, }