@inproceedings{61102,
  author       = {{Hebrok, Sven and Storm, Tim Leonhard and Cramer, Felix Matthias and Radoy, Maximilian and Somorovsky, Juraj}},
  booktitle    = {{34th USENIX Security Symposium (USENIX Security 25)}},
  pages        = {{8017–8034}},
  title        = {{{STEK Sharing is Not Caring: Bypassing TLS Authentication in Web Servers using Session Tickets}}},
  year         = {{2025}},
}

@article{62051,
  author       = {{Hinnenthal, Kristian and Liedtke, David Jan and Scheideler, Christian}},
  issn         = {{0304-3975}},
  journal      = {{Theoretical Computer Science}},
  publisher    = {{Elsevier BV}},
  title        = {{{Efficient shape formation by 3D hybrid programmable matter: An algorithm for low diameter intermediate structures}}},
  doi          = {{10.1016/j.tcs.2025.115552}},
  volume       = {{1057}},
  year         = {{2025}},
}

@inproceedings{59218,
  author       = {{Reimer, Jan Dennis and Holst, Stefan and Sadeghi-Kohan, Somayeh and Wunderlich, Hans-Joachim and Hellebrand, Sybille}},
  booktitle    = {{IEEE International Symposium of Electronics Design Automation (ISEDA'25), May 2025}},
  title        = {{{ThorSim: Throughput-Oriented Timing Simulation of FinFET Digital Circuits}}},
  year         = {{2025}},
}

@article{62064,
  abstract     = {{SYCL is an open standard for targeting heterogeneous hardware from C++. In this work, we evaluate a SYCL implementation for a discontinuous Galerkin discretization of the 2D shallow water equations targeting CPUs, GPUs, and also FPGAs. The discretization uses polynomial orders zero to two on unstructured triangular meshes. Separating memory accesses from the numerical code allow us to optimize data accesses for the target architecture. A performance analysis shows good portability across x86 and ARM CPUs, GPUs from different vendors, and even two variants of Intel Stratix 10 FPGAs. Measuring the energy to solution shows that GPUs yield an up to 10x higher energy efficiency in terms of degrees of freedom per joule compared to CPUs. With custom designed caches, FPGAs offer a meaningful complement to the other architectures with particularly good computational performance on smaller meshes. FPGAs with High Bandwidth Memory are less affected by bandwidth issues and have similar energy efficiency as latest generation CPUs.}},
  author       = {{Büttner, Markus and Alt, Christoph and Kenter, Tobias and Köstler, Harald and Plessl, Christian and Aizinger, Vadym}},
  issn         = {{1573-0484}},
  journal      = {{The Journal of Supercomputing}},
  number       = {{6}},
  publisher    = {{Springer Science and Business Media LLC}},
  title        = {{{Analyzing performance portability for a SYCL implementation of the 2D shallow water equations}}},
  doi          = {{10.1007/s11227-025-07063-7}},
  volume       = {{81}},
  year         = {{2025}},
}

@inproceedings{62066,
  abstract     = {{In the context of high-performance computing (HPC) for distributed workloads, individual field-programmable gate arrays (FPGAs) need efficient ways to exchange data, which requires network infrastructure and software abstractions. Dedicated multi-FPGA clusters provide inter-FPGA networks for direct device to device communication. The oneAPI high-level synthesis toolchain offers I/O pipes to allow user kernels to interact with the networking ports of the FPGA board. In this work, we evaluate using oneAPI I/O pipes for direct FPGA-to-FPGA communication by scaling a SYCL implementation of a Jacobi solver on up to 25 FPGAs in the Noctua 2 cluster. We see good results in weak and strong scaling experiments.}},
  author       = {{Alt, Christoph and Plessl, Christian and Kenter, Tobias}},
  booktitle    = {{Proceedings of the 13th International Workshop on OpenCL and SYCL}},
  isbn         = {{9798400713606}},
  keywords     = {{Multi-FPGA, High-level Synthesis, oneAPI, FPGA}},
  publisher    = {{Association for Computing Machinery}},
  title        = {{{Evaluating oneAPI I/O Pipes in a Case Study of Scaling a SYCL Jacobi Solver to multiple FPGAs}}},
  doi          = {{10.1145/3731125.3731131}},
  year         = {{2025}},
}

@inproceedings{62065,
  author       = {{Sundriyal, Shivam and Büttner, Markus and Alt, Christoph and Kenter, Tobias and Aizinger, Vadym}},
  booktitle    = {{2025 IEEE High Performance Extreme Computing Conference (HPEC)}},
  publisher    = {{IEEE}},
  title        = {{{Adaptive Spectral Block Floating Point for Discontinuous Galerkin Methods}}},
  doi          = {{10.1109/hpec67600.2025.11196195}},
  year         = {{2025}},
}

@inbook{62039,
  author       = {{Vernholz, Mats and Temmen, Katrin}},
  booktitle    = {{Towards inclusive and egalitarian vocational education and training: Key challenges and strategies from a holistic and multi-contextual approach. Proceedings of the 6th Crossing Boundaries Conference in Vocational Education and Training}},
  editor       = {{Quintana-Murci, Elena and Salva-Mut, Francisca and Stalder, Barbara Elisabeth and Nägele, Christof}},
  publisher    = {{LibreCat University}},
  title        = {{{Why Engineering Students Choose a Career in Teacher Education – Qualitative Analysis of Bachelor Students' Motives}}},
  doi          = {{10.5281/ZENODO.15364031}},
  year         = {{2025}},
}

@inproceedings{62119,
  author       = {{Ihtassine, Reda and Firmansyah, Asep Fajar and Srivastava, Nikit and Ali, Manzoor and Ngonga Ngomo, Axel-Cyrille and Sherif, Mohamed}},
  booktitle    = {{Proceedings of the 12th Knowledge Capture Conference 2025, {K-CAP} 2025, The Thirteenth International Conference on Knowledge Capture, December 10 - 12, 2025, Dayton, Ohio, USA}},
  keywords     = {{Srivastava ali dice enexa firmansyah ihtassine ngonga sailproject sherif whale}},
  publisher    = {{ACM}},
  title        = {{{NL2LS: LLM-based Automatic Linking of Knowledge Graphs}}},
  year         = {{2025}},
}

@article{62138,
  abstract     = {{<jats:p>This paper presents a comprehensive design framework for Enterprise Architecture aimed at facilitating decision-driven analytics in smart factories. The motivation behind this research lies in challenges faced by manufacturing companies, such as skilled labor shortages and increasing global competition, alongside the imperative for sustainable production. This journal provides a novel approach for designing and documenting prescriptive analytics use cases in manufacturing environments. The framework addresses the need for effective integration of advanced data analytics and prescriptive analytics solutions within existing production environments, thereby enhancing operational efficiency and decision-making processes. A Design Science Research approach is used to iteratively derive a framework based on stakeholder needs and activities along the prescriptive analytics use case development cycle. The resulting framework is demonstrated and evaluated in an IoT Factory setup in a research facility. From a practical perspective, the framework supports manufacturing companies in systematically designing prescriptive analytics use cases. From a research perspective, it contributes to the body of knowledge on Enterprise Architecture Management (EAM) by operationalizing the design of prescriptive analytics use cases in manufacturing contexts. The main contributions of this study include the development of a framework that supports the planning, design, and integration of prescriptive analytics use cases. This framework fosters interdisciplinary collaboration and aids in managing the complexity of data-driven projects.</jats:p>}},
  author       = {{Weller, Julian and Dumitrescu, Roman}},
  issn         = {{2079-9292}},
  journal      = {{Electronics}},
  number       = {{21}},
  publisher    = {{MDPI AG}},
  title        = {{{Decision-Driven Analytics in Smart Factories: Enterprise Architecture Framework for Use Case Specification and Engineering (FUSE)}}},
  doi          = {{10.3390/electronics14214271}},
  volume       = {{14}},
  year         = {{2025}},
}

@article{62148,
  author       = {{Sadiye, Babak and Iftekhar, Mohammed and Müller, Wolfgang and Scheytt, J. Christoph}},
  issn         = {{1063-8210}},
  journal      = {{IEEE Transactions on Very Large Scale Integration (VLSI) Systems}},
  publisher    = {{IEEE}},
  title        = {{{60-Gb/s 1:4 Demultiplexer in 22-nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design}}},
  doi          = {{10.1109/TVLSI.2025.3625787}},
  year         = {{2025}},
}

@inproceedings{61079,
  abstract     = {{We propose a spatio-spectral, combined model-based and data-driven
diarization pipeline consisting of TDOA-based segmentation followed by
embedding-based clustering. The proposed system requires neither access to
multi-channel training data nor prior knowledge about the number or placement
of microphones. It works for both a compact microphone array and distributed
microphones, with minor adjustments. Due to its superior handling of
overlapping speech during segmentation, the proposed pipeline significantly
outperforms the single-channel pyannote approach, both in a scenario with a
compact microphone array and in a setup with distributed microphones.
Additionally, we show that, unlike fully spatial diarization pipelines, the
proposed system can correctly track speakers when they change positions.}},
  author       = {{Cord-Landwehr, Tobias and Gburrek, Tobias and Deegen, Marc and Haeb-Umbach, Reinhold}},
  booktitle    = {{Proceedings of INTERSPEECH}},
  location     = {{Rotterdam}},
  title        = {{{Spatio-spectral diarization of meetings by combining TDOA-based  segmentation and speaker embedding-based clustering}}},
  doi          = {{10.21437/Interspeech.2025-1663}},
  year         = {{2025}},
}

@inproceedings{62164,
  author       = {{Kuhlmann, Michael and Seebauer, Fritz and Wagner, Petra and Häb-Umbach, Reinhold}},
  booktitle    = {{Interspeech 2025}},
  publisher    = {{ISCA}},
  title        = {{{Towards Frame-level Quality Predictions of Synthetic Speech}}},
  doi          = {{10.21437/interspeech.2025-2190}},
  year         = {{2025}},
}

@phdthesis{62167,
  abstract     = {{Diese Dissertation befasst sich mit der Entwicklung eines induktiv-basierten Lokalisierungsverfahrens mittels planarer Spulen, das auf magnetischer Kopplung beruht. Grundlage ist die elektromagnetische Induktion, bei der sich die entstehende Spannung proportional zur Gegeninduktivität verhält. Das Verfahren arbeitet im physikalischen Nahfeld und im Frequenzbereich von einigen kHz bis MHz, um eine effiziente Kopplung ohne Ausbreitung elektromagnetischer Wellen zu gewährleisten. Im Vergleich zu etablierten Verfahren wie GPS oder Ultraschall zeigt die induktive Ortung Vorteile bei kurzer Reichweite, insbesondere durch hohe Genauigkeit im Zentimeterbereich und geringe Materialabhängigkeit. Zudem lässt sie sich in bestehende Technologien wie bei der drahtlosen Energieübertragung integrieren und durch Sensorfusion mit anderen Verfahren kombinieren. Zur Modellierung und Optimierung werden physikalische Eigenschaften von planaren Spulen und EM-Feldern analysiert und elektrische Ersatzschaltbilder eingesetzt. Die geometriebasierte Berechnung der Gegeninduktivität ermöglicht die Entwicklung und Bewertung geeigneter Ortungsalgorithmen. Stochastische Filterverfahren verbessern zusätzlich die Robustheit gegenüber Umgebungseinflüssen. Abschließend wird eine modulare Simulationsplattform vorgestellt, die als Grundlage für die Generierung von Trainingsdaten sowie zur Weiterentwicklung von Mess-, Ortungs- und Filtermethoden dient.}},
  author       = {{Lange, Sven}},
  pages        = {{247}},
  publisher    = {{Universitätsbibliothek Paderborn}},
  title        = {{{Analyse und Modellierung eines induktiven Ortungsprozesses unter Berücksichtigung der elektromagnetischen Wechselwirkungen planarer Spulensysteme}}},
  doi          = {{10.17619/UNIPB/1-2436}},
  year         = {{2025}},
}

@misc{62247,
  author       = {{Werner, Felix}},
  title        = {{{Monoton erreichbarer Delaunaygraph}}},
  year         = {{2025}},
}

@inproceedings{62126,
  author       = {{Iftekhar, Mohammed and Sadiye, Babak and Müller, Wolfgang and Scheytt, J. Christoph}},
  booktitle    = {{IEEE Nordic Circuits and Systems Conference (NORCAS)}},
  location     = {{Riga, Latvia}},
  title        = {{{A 50 Gbps Reference-less NRZ Full-rate Bang-Bang CDR with Automatic Frequency Acquisition in 130 nm SiGe:C BiCMOS Technology}}},
  doi          = {{10.1109/NorCAS66540.2025.11231203}},
  year         = {{2025}},
}

@inproceedings{62270,
  author       = {{Weizel, Maxim and Malavalli Nagaraju, Harshan Gowda and Scheytt, J. Christoph}},
  booktitle    = {{2025 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)}},
  location     = {{Phoenix, Arizona, USA}},
  publisher    = {{IEEE}},
  title        = {{{A 128 GS/s 2x Time-Interleaved Track and Hold Amplifier in 130nm SiGe BiCMOS}}},
  doi          = {{10.1109/bcicts63111.2025.11211462}},
  year         = {{2025}},
}

@inproceedings{58856,
  author       = {{Hannemann, Kai Arne and Bütün, Hüseyin Berke and Müller, Wolfgang and Scheytt, J. Christoph}},
  booktitle    = {{MBMV 2025 - 28. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen}},
  isbn         = {{978-3-8007-6515-7}},
  publisher    = {{VDE Verlag}},
  title        = {{{Verilator and FireSim RTL Simulations on a HPC Cluster: A Comparative Case Study}}},
  year         = {{2025}},
}

@misc{62268,
  author       = {{Bengaluru Amarnath, Prajwal}},
  publisher    = {{Paderborn University}},
  title        = {{{Design and Integration of Intra-Process Communication for ROS 2 into ReconROS}}},
  year         = {{2025}},
}

@inproceedings{61950,
  abstract     = {{<jats:title>ABSTRACT:</jats:title><jats:p>The importance of the circular economy as an alternative to today’s prevailing linear economy is recognised in both industry and research. Product designers are having a major influence on this transition by adapting the characteristics of physical products in the early phases of the product development process. However, most products follow a linear approach and are far from being circular. This paper aims to identify the challenges that product designers face when designing circular products. Building on a developed understanding of related terms in circular product design, an exploratory literature review is conducted. The results help to gain an overview and understanding of the challenges that need to be addressed. Therefore, further research directions are derived to support the transition from linear to circular products in the long term.</jats:p>}},
  author       = {{Jagnow, Jan and Stöhr, Bernd and Bernijazov, Ruslan and Koldewey, Christian and Dumitrescu, Roman}},
  booktitle    = {{Proceedings of the Design Society}},
  issn         = {{2732-527X}},
  pages        = {{931--940}},
  publisher    = {{Cambridge University Press (CUP)}},
  title        = {{{Circular product design: a literature-based identification of challenges from the perspective of product designers}}},
  doi          = {{10.1017/pds.2025.10107}},
  volume       = {{5}},
  year         = {{2025}},
}

@inproceedings{61928,
  abstract     = {{<jats:title>ABSTRACT:</jats:title><jats:p>Well-designed products are crucial to a company's business success. Management support is a critical success factor in ensuring that design-related aspects are given appropriate attention during product development. Despite the importance of management, the literature doesn't provide a clear picture of what characterizes a competent manager in product design. This gap impedes competence development and explains why organizations struggle to leverage the benefits of well-designed products. This research aims to address this gap by synthesizing important findings from the literature into a model of managerial competence. The model provides initial insight into the individual competencies managers need to meet their responsibility for good product design in organizations.</jats:p>}},
  author       = {{Stöhr, Bernd and Koldewey, Christian and Bernijazov, Ruslan and Dumitrescu, Roman}},
  booktitle    = {{Proceedings of the Design Society}},
  issn         = {{2732-527X}},
  pages        = {{1425--1434}},
  publisher    = {{Cambridge University Press (CUP)}},
  title        = {{{Effective management support for design: towards a model of managerial competence}}},
  doi          = {{10.1017/pds.2025.10156}},
  volume       = {{5}},
  year         = {{2025}},
}

