@article{45336,
  author       = {{Schönherr, Johanna and Schukajlow, S. and Leopold, C.}},
  journal      = {{Educational Studies in Mathematics}},
  number       = {{1}},
  pages        = {{53–78}},
  title        = {{{Make a drawing. Effects of strategic knowledge, drawing accuracy, and type of drawing on students’ mathematical modelling performance}}},
  doi          = {{10.1007/s10649-016-9736-1}},
  volume       = {{95}},
  year         = {{2017}},
}

@article{31377,
  author       = {{Weich, Tobias and Hoffmann, Max}},
  journal      = {{die hochschullehre}},
  title        = {{{Exkursinhalte in der fachmathematischen Lehramtsausbildung: Wie man das Wesen und die Rolle der Mathematik vermittelt.}}},
  volume       = {{3}},
  year         = {{2017}},
}

@article{29462,
  abstract     = {{Time-variant age information of different parts of a system can be used for system-level performance improvement through high-level task scheduling, thus extending the life-time of the system. Progressive age information should provide the age state that the system is in, and the rate that it is being aged at. In this paper, we propose a structure that monitors certain paths of a circuit and detects its gradual age growth, and provides the aging rate and aging state of the circuit. The proposed monitors are placed on a selected set of nodes that represent a timing bottleneck of the system. These monitors sample expected data on these nodes, and compare them with the expected values. The timing of sampling changes as the circuit ages and its delay increases. The timing of sampling will provide a measure of aging advancement of a circuit. To assess the efficacy of the proposed method and compare it with other state-of-the-art aging monitors, we use them on selected nodes of the execution unit of different processors, as well as some circuits from ITC99 benchmarks. The results reveal that the precision of our proposed method is between 0.12 (ns) to 0.401 (ns). Its Area and power overhead are negligible and are about 2.13 and 0.69 percent respectively.}},
  author       = {{Sadeghi-Kohan, Somayeh and Kamal, Mehdi and Navabi, Zainalabedin}},
  issn         = {{2168-6750}},
  journal      = {{IEEE Transactions on Emerging Topics in Computing}},
  keywords     = {{Age advancement, age monitoring clock, aging rate, self-adjusting monitors}},
  number       = {{3}},
  pages        = {{627--641}},
  publisher    = {{Institute of Electrical and Electronics Engineers (IEEE)}},
  title        = {{{Self-Adjusting Monitor for Measuring Aging Rate and Advancement}}},
  doi          = {{10.1109/tetc.2017.2771441}},
  volume       = {{8}},
  year         = {{2017}},
}

@inproceedings{29463,
  abstract     = {{In this paper we propose to think out of the box and discuss an approach for universal mitigation of Negative Bias Temperature Instability (NBTI) induced aging untied from the limitations of its modelling. The cost-effective approach exploits a simple property of a randomized design, i.e., the equalized signal probability and switching activity at gate inputs. The techniques considered for structural design randomization involve both the hardware architecture and embedded software layers. Ultimately, the proposed approach aims at extending the reliable lifetime of nanoelectronic systems.}},
  author       = {{Jenihhin, Maksim and Kamkin, Alexander and Navabi, Zainalabedin and Sadeghi-Kohan, Somayeh}},
  booktitle    = {{2016 IEEE East-West Design & Test Symposium (EWDTS)}},
  publisher    = {{IEEE}},
  title        = {{{Universal mitigation of NBTI-induced aging by design randomization}}},
  doi          = {{10.1109/ewdts.2016.7807635}},
  year         = {{2017}},
}

@article{24212,
  abstract     = {{A hybrid multi-channel receiver featuring fully-differential transimpedance input stages for 25Gbps data rate per channel is presented along with measurement results focusing on the channel-to-channel interference and sensitivity. OMA of -16dBm at a BER of 10−4 is estimated at the photodiode for all channels. Each channel dissipates 330mW of power provided from a single 3.3V supply voltage.}},
  author       = {{Gudyriev, Sergiy and Scheytt, Christoph and Kress, Christian and Yan, Lei and Christian, Meuer and Zimmermann, Lars}},
  isbn         = {{978-1-943580-33-0}},
  journal      = {{OSA Frontiers in Optics + Laser Science}},
  title        = {{{Fully-Differential, Hybrid, Multi-channel 4x25Gbps Direct Direction Receiver in 0.25\textmum BiCMOS SiGe Technology}}},
  doi          = {{https://doi.org/10.1364/FIO.2017.FM3A.3}},
  year         = {{2017}},
}

@article{18,
  abstract     = {{Branch and bound (B&B) algorithms structure the search space as a tree and eliminate infeasible solutions early by pruning subtrees that cannot lead to a valid or optimal solution. Custom hardware designs significantly accelerate the execution of these algorithms. In this article, we demonstrate a high-performance B&B implementation on FPGAs. First, we identify general elements of B&B algorithms and describe their implementation as a finite state machine. Then, we introduce workers that autonomously cooperate using work stealing to allow parallel execution and full utilization of the target FPGA. Finally, we explore advantages of instance-specific designs that target a specific problem instance to improve performance.

We evaluate our concepts by applying them to a branch and bound problem, the reconstruction of corrupted AES keys obtained from cold-boot attacks. The evaluation shows that our work stealing approach is scalable with the available resources and provides speedups proportional to the number of workers. Instance-specific designs allow us to achieve an overall speedup of 47 × compared to the fastest implementation of AES key reconstruction so far. Finally, we demonstrate how instance-specific designs can be generated just-in-time such that the provided speedups outweigh the additional time required for design synthesis.}},
  author       = {{Riebler, Heinrich and Lass, Michael and Mittendorf, Robert and Löcke, Thomas and Plessl, Christian}},
  issn         = {{1936-7406}},
  journal      = {{ACM Transactions on Reconfigurable Technology and Systems (TRETS)}},
  keywords     = {{coldboot}},
  number       = {{3}},
  pages        = {{24:1--24:23}},
  publisher    = {{Association for Computing Machinery (ACM)}},
  title        = {{{Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs}}},
  doi          = {{10.1145/3053687}},
  volume       = {{10}},
  year         = {{2017}},
}

@inproceedings{1592,
  abstract     = {{Compared to classical HDL designs, generating FPGA with high-level synthesis from an OpenCL specification promises easier exploration of different design alternatives and, through ready-to-use infrastructure and common abstractions for host and memory interfaces, easier portability between different FPGA families. In this work, we evaluate the extent of this promise. To this end, we present a parameterized FDTD implementation for photonic microcavity simulations. Our design can trade-off different forms of parallelism and works for two independent OpenCL-based FPGA design flows. Hence, we can target FPGAs from different vendors and different FPGA families. We describe how we used pre-processor macros to achieve this flexibility and to work around different shortcomings of the current tools. Choosing the right design configurations, we are able to present two extremely competitive solutions for very different FPGA targets, reaching up to 172 GFLOPS sustained performance. With the portability and flexibility demonstrated, code developers not only avoid vendor lock-in, but can even make best use of real trade-offs between different architectures.}},
  author       = {{Kenter, Tobias and Förstner, Jens and Plessl, Christian}},
  booktitle    = {{Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)}},
  keywords     = {{tet_topic_hpc}},
  publisher    = {{IEEE}},
  title        = {{{Flexible FPGA design for FDTD using OpenCL}}},
  doi          = {{10.23919/FPL.2017.8056844}},
  year         = {{2017}},
}

@article{1589,
  author       = {{Schumacher, Jörn and Plessl, Christian and Vandelli, Wainer}},
  journal      = {{Journal of Physics: Conference Series}},
  publisher    = {{IOP Publishing}},
  title        = {{{High-Throughput and Low-Latency Network Communication with NetIO}}},
  doi          = {{10.1088/1742-6596/898/8/082003}},
  volume       = {{898}},
  year         = {{2017}},
}

@inbook{56356,
  author       = {{Biehler, Rolf and Friedrich, Hauke}},
  booktitle    = {{Beiträge zum Mathematikunterricht 2017}},
  editor       = {{Kortenkamp, U. and Kuzle, A.}},
  pages        = {{91--94}},
  publisher    = {{WTM-Verlag}},
  title        = {{{Professionelles Wissen von Lehrkräften zum Thema bedingte Wahrscheinlichkeiten und stochastische Unabhängigkeit}}},
  year         = {{2017}},
}

@inbook{56363,
  author       = {{Biehler, Rolf and Frischemeier, Daniel and Reading, Chris and Shaughnessy, J. Michael}},
  booktitle    = {{International Handbook of Research in Statistics Education}},
  editor       = {{Ben-Zvi, Dani and Makar, K. and Garfield, J.}},
  isbn         = {{9783319661933}},
  issn         = {{2197-1951}},
  pages        = {{139--192}},
  publisher    = {{Springer International Publishing}},
  title        = {{{Reasoning About Data}}},
  doi          = {{10.1007/978-3-319-66195-7_5}},
  year         = {{2017}},
}

@inbook{56704,
  author       = {{Fleischmann, Yael and Biehler, Rolf}},
  booktitle    = {{Beiträge zum Mathematikunterricht 2017}},
  editor       = {{Kortenkamp, U. and Kuzle, A.}},
  pages        = {{231--234}},
  publisher    = {{WTM-Verlag}},
  title        = {{{Analyse von Studierendenbearbeitungen von Präsenzaufgaben in der linearen Algebra}}},
  year         = {{2017}},
}

@inbook{56785,
  author       = {{Mai, Tobias and Feudel, Frank and Biehler, Rolf}},
  booktitle    = {{Beiträge zum Mathematikunterricht 2017}},
  editor       = {{Kortenkamp, U. and Kuzle, A.}},
  pages        = {{629--632}},
  publisher    = {{WTM-Verlag}},
  title        = {{{Der Vektorbegriff an der Schnittstelle zwischen Schule und Hochschule}}},
  year         = {{2017}},
}

@inbook{56786,
  author       = {{Nieszporek, Ralf and Biehler, Rolf}},
  booktitle    = {{Beiträge zum Mathematikunterricht 2017}},
  editor       = {{Kortenkamp, U. and Kuzle, A.}},
  pages        = {{1259--1262}},
  publisher    = {{WTM-Verlag}},
  title        = {{{Kompetenzzuwachsmessung bei Lehrkräftefortbildungen durch retrospektive Selbsteinschätzung am Beispiel von "Stochastik kompakt"}}},
  year         = {{2017}},
}

@inbook{56889,
  author       = {{Barzel, Bärbel and Biehler, Rolf}},
  booktitle    = {{Proceedings of the Third ERME Topic Conference on Mathematics Teaching, Resources and Teacher Professional Development}},
  editor       = {{Zehetmeier, S. and Rösken-Winter, B. and Potari, D. and Ribeiro, M.}},
  pages        = {{16--34}},
  publisher    = {{Humboldt-Universität zu Berlin}},
  title        = {{{Design principles and domains of knowledge for the professionalization of teachers and facilitators-Two examples from the DZLM for upper secondary teachers}}},
  year         = {{2017}},
}

@inbook{56891,
  author       = {{Biehler, Rolf}},
  booktitle    = {{Erfolgreich studieren mit E-Learning: Online-Kurse für Mathematik und Sprach-und Textverständnis - Dokumentation der Tagung vom 3. November 2016 RWTH Aachen University}},
  editor       = {{Leuchter, C. and Wistuba, F. and Czapla, C. and Segerer, C.}},
  pages        = {{18–30}},
  publisher    = {{RWTH Aachen University}},
  title        = {{{Das virtuelle Eingangstutorium Mathematik studiVEMINT–Struktur und Inhalt}}},
  year         = {{2017}},
}

@inbook{56892,
  author       = {{Biehler, Rolf and Hochmuth, Reinhard}},
  booktitle    = {{Didactics of Mathematics in Higher Education as a Scientific Discipline–Conference Proceedings - Khdm-report 17-05}},
  editor       = {{Göller, R. and Biehler, R. and Hochmuth, R. and Rück, H.-G.}},
  pages        = {{14–20}},
  publisher    = {{Universität Kassel}},
  title        = {{{Relating different mathematical praxeologies as a challenge for designing mathematical content for bridging courses}}},
  year         = {{2017}},
}

@article{56896,
  author       = {{Biehler, Rolf and Frischemeier, Daniel and Podworny, Susanne}},
  journal      = {{Statistics Education Research Journal}},
  number       = {{2}},
  pages        = {{244–286}},
  title        = {{{Elementary preservice teachers´ reasoning about modeling a "family factory" with TinkerPlots - A pilot study}}},
  volume       = {{16}},
  year         = {{2017}},
}

@article{56895,
  author       = {{Biehler, Rolf and Frischemeier, Daniel and Podworny, Susanne}},
  journal      = {{Statistics Education Research Journal}},
  number       = {{2}},
  pages        = {{8–12}},
  title        = {{{Reasoning about models and modelling in the context of informal statistical inference}}},
  volume       = {{16}},
  year         = {{2017}},
}

@inproceedings{56894,
  author       = {{Biehler, Rolf and Frischemeier, D and Podworny, Susanne}},
  location     = {{Marrakech, Marokko}},
  title        = {{{Design, realization and evaluation of a university course for preservice teachers on developing statistical reasoning and literacy with a focus on civic statistics}}},
  year         = {{2017}},
}

@inbook{56897,
  author       = {{Biehler, Rolf and Nieszporek, Ralf}},
  booktitle    = {{Proceedings of the Tenth Congress of the European Society for Research in Mathematics Educa-tion (CERME10, February 1-5, 2017)}},
  editor       = {{Dooley, T. and Guedet, G.}},
  pages        = {{2804–2811}},
  publisher    = {{DCU Institute of Education and ERME}},
  title        = {{{Upper secondary teachers’ stages of concern related to curricular innovations before and after a professional development course on teaching probability and statistics including the use of digital tools}}},
  year         = {{2017}},
}

