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Modular Energy Demand Modeling of Manufacturing Processes for Energy  Efficiency Improvement. <i>Procedia CIRP</i>. 2025;135:1351-1358. doi:<a href=\"https://doi.org/doi.org/10.1016/j.procir.2025.08.001\">doi.org/10.1016/j.procir.2025.08.001</a>","bibtex":"@article{Naumann_Henne_Ostermann_Schlosser_Meschede_2025, title={Modular Energy Demand Modeling of Manufacturing Processes for Energy  Efficiency Improvement}, volume={135}, DOI={<a href=\"https://doi.org/doi.org/10.1016/j.procir.2025.08.001\">doi.org/10.1016/j.procir.2025.08.001</a>}, journal={Procedia CIRP}, publisher={Elsevier}, author={Naumann, Marius and Henne, Kevin and Ostermann, Moritz and Schlosser, Florian and Meschede, Henning}, year={2025}, pages={1351–1358} }","apa":"Naumann, M., Henne, K., Ostermann, M., Schlosser, F., &#38; Meschede, H. (2025). Modular Energy Demand Modeling of Manufacturing Processes for Energy  Efficiency Improvement. <i>Procedia CIRP</i>, <i>135</i>, 1351–1358. <a href=\"https://doi.org/doi.org/10.1016/j.procir.2025.08.001\">https://doi.org/doi.org/10.1016/j.procir.2025.08.001</a>","ieee":"M. Naumann, K. Henne, M. Ostermann, F. Schlosser, and H. Meschede, “Modular Energy Demand Modeling of Manufacturing Processes for Energy  Efficiency Improvement,” <i>Procedia CIRP</i>, vol. 135, pp. 1351–1358, 2025, doi: <a href=\"https://doi.org/doi.org/10.1016/j.procir.2025.08.001\">doi.org/10.1016/j.procir.2025.08.001</a>.","short":"M. Naumann, K. Henne, M. Ostermann, F. Schlosser, H. Meschede, Procedia CIRP 135 (2025) 1351–1358.","chicago":"Naumann, Marius, Kevin Henne, Moritz Ostermann, Florian Schlosser, and Henning Meschede. “Modular Energy Demand Modeling of Manufacturing Processes for Energy  Efficiency Improvement.” <i>Procedia CIRP</i> 135 (2025): 1351–58. <a href=\"https://doi.org/doi.org/10.1016/j.procir.2025.08.001\">https://doi.org/doi.org/10.1016/j.procir.2025.08.001</a>."},"file_date_updated":"2025-11-03T09:49:33Z","oa":"1","has_accepted_license":"1","conference":{"location":"Manchester","name":"32nd CIRP Conference on Life Cycle Engineering (LCE2025)"},"status":"public","volume":135,"ddc":["050"],"user_id":"94950","_id":"62045","publisher":"Elsevier","page":"1351-1358","publication":"Procedia CIRP","department":[{"_id":"644"}],"type":"journal_article","date_created":"2025-11-03T09:49:38Z","file":[{"content_type":"application/pdf","file_id":"62046","date_updated":"2025-11-03T09:49:33Z","relation":"main_file","access_level":"open_access","file_size":954515,"file_name":"1-s2.0-S2212827125007541-main.pdf","date_created":"2025-11-03T09:49:33Z","creator":"mariusn"}],"intvolume":"       135","date_updated":"2025-11-03T09:56:18Z","author":[{"full_name":"Naumann, Marius","first_name":"Marius","last_name":"Naumann","id":"94950"},{"id":"56918","full_name":"Henne, Kevin","first_name":"Kevin","last_name":"Henne"},{"id":"44763","last_name":"Ostermann","orcid":"https://orcid.org/0000-0003-1146-0443","first_name":"Moritz","full_name":"Ostermann, Moritz"},{"id":"88614","first_name":"Florian","last_name":"Schlosser","full_name":"Schlosser, Florian"},{"full_name":"Meschede, Henning","orcid":"0000-0002-1538-089X","first_name":"Henning","last_name":"Meschede","id":"86954"}],"title":"Modular Energy Demand Modeling of Manufacturing Processes for Energy  Efficiency Improvement","year":"2025","doi":"doi.org/10.1016/j.procir.2025.08.001","language":[{"iso":"eng"}]},{"user_id":"68826","page":"8017–8034","_id":"61102","date_updated":"2025-11-03T10:04:46Z","status":"public","title":"STEK Sharing is Not Caring: Bypassing TLS Authentication in Web Servers using Session Tickets","year":"2025","author":[{"first_name":"Sven","last_name":"Hebrok","full_name":"Hebrok, Sven"},{"full_name":"Storm, Tim Leonhard","last_name":"Storm","first_name":"Tim Leonhard"},{"full_name":"Cramer, Felix Matthias","last_name":"Cramer","first_name":"Felix Matthias"},{"full_name":"Radoy, Maximilian","first_name":"Maximilian","last_name":"Radoy"},{"full_name":"Somorovsky, Juraj","last_name":"Somorovsky","first_name":"Juraj"}],"type":"conference","department":[{"_id":"632"},{"_id":"632"}],"date_created":"2025-08-31T12:33:33Z","publication":"34th USENIX Security Symposium (USENIX Security 25)","citation":{"bibtex":"@inproceedings{Hebrok_Storm_Cramer_Radoy_Somorovsky_2025, title={STEK Sharing is Not Caring: Bypassing TLS Authentication in Web Servers using Session Tickets}, booktitle={34th USENIX Security Symposium (USENIX Security 25)}, author={Hebrok, Sven and Storm, Tim Leonhard and Cramer, Felix Matthias and Radoy, Maximilian and Somorovsky, Juraj}, year={2025}, pages={8017–8034} }","ama":"Hebrok S, Storm TL, Cramer FM, Radoy M, Somorovsky J. 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Somorovsky, “STEK Sharing is Not Caring: Bypassing TLS Authentication in Web Servers using Session Tickets,” in <i>34th USENIX Security Symposium (USENIX Security 25)</i>, 2025, pp. 8017–8034.","apa":"Hebrok, S., Storm, T. L., Cramer, F. M., Radoy, M., &#38; Somorovsky, J. (2025). STEK Sharing is Not Caring: Bypassing TLS Authentication in Web Servers using Session Tickets. <i>34th USENIX Security Symposium (USENIX Security 25)</i>, 8017–8034."}},{"citation":{"short":"K. Hinnenthal, D.J. Liedtke, C. Scheideler, Theoretical Computer Science 1057 (2025).","chicago":"Hinnenthal, Kristian, David Jan Liedtke, and Christian Scheideler. “Efficient Shape Formation by 3D Hybrid Programmable Matter: An Algorithm for Low Diameter Intermediate Structures.” <i>Theoretical Computer Science</i> 1057 (2025). <a href=\"https://doi.org/10.1016/j.tcs.2025.115552\">https://doi.org/10.1016/j.tcs.2025.115552</a>.","apa":"Hinnenthal, K., Liedtke, D. J., &#38; Scheideler, C. (2025). Efficient shape formation by 3D hybrid programmable matter: An algorithm for low diameter intermediate structures. <i>Theoretical Computer Science</i>, <i>1057</i>, Article 115552. <a href=\"https://doi.org/10.1016/j.tcs.2025.115552\">https://doi.org/10.1016/j.tcs.2025.115552</a>","ieee":"K. Hinnenthal, D. J. Liedtke, and C. Scheideler, “Efficient shape formation by 3D hybrid programmable matter: An algorithm for low diameter intermediate structures,” <i>Theoretical Computer Science</i>, vol. 1057, Art. no. 115552, 2025, doi: <a href=\"https://doi.org/10.1016/j.tcs.2025.115552\">10.1016/j.tcs.2025.115552</a>.","ama":"Hinnenthal K, Liedtke DJ, Scheideler C. Efficient shape formation by 3D hybrid programmable matter: An algorithm for low diameter intermediate structures. <i>Theoretical Computer Science</i>. 2025;1057. doi:<a href=\"https://doi.org/10.1016/j.tcs.2025.115552\">10.1016/j.tcs.2025.115552</a>","bibtex":"@article{Hinnenthal_Liedtke_Scheideler_2025, title={Efficient shape formation by 3D hybrid programmable matter: An algorithm for low diameter intermediate structures}, volume={1057}, DOI={<a href=\"https://doi.org/10.1016/j.tcs.2025.115552\">10.1016/j.tcs.2025.115552</a>}, number={115552}, journal={Theoretical Computer Science}, publisher={Elsevier BV}, author={Hinnenthal, Kristian and Liedtke, David Jan and Scheideler, Christian}, year={2025} }","mla":"Hinnenthal, Kristian, et al. “Efficient Shape Formation by 3D Hybrid Programmable Matter: An Algorithm for Low Diameter Intermediate Structures.” <i>Theoretical Computer Science</i>, vol. 1057, 115552, Elsevier BV, 2025, doi:<a href=\"https://doi.org/10.1016/j.tcs.2025.115552\">10.1016/j.tcs.2025.115552</a>."},"publication":"Theoretical Computer Science","date_created":"2025-11-03T10:19:53Z","department":[{"_id":"79"}],"type":"journal_article","publication_identifier":{"issn":["0304-3975"]},"author":[{"id":"32229","full_name":"Hinnenthal, Kristian","last_name":"Hinnenthal","first_name":"Kristian"},{"full_name":"Liedtke, David Jan","last_name":"Liedtke","first_name":"David Jan","id":"55557"},{"id":"20792","full_name":"Scheideler, Christian","first_name":"Christian","last_name":"Scheideler"}],"title":"Efficient shape formation by 3D hybrid programmable matter: An algorithm for low diameter intermediate structures","status":"public","year":"2025","intvolume":"      1057","publication_status":"published","date_updated":"2025-11-03T10:21:52Z","publisher":"Elsevier BV","_id":"62051","language":[{"iso":"eng"}],"article_number":"115552","volume":1057,"user_id":"55557","doi":"10.1016/j.tcs.2025.115552"},{"department":[{"_id":"48"}],"type":"conference","date_created":"2025-03-31T15:57:21Z","place":"Hong Kong, China","citation":{"ama":"Reimer JD, Holst S, Sadeghi-Kohan S, Wunderlich H-J, Hellebrand S. ThorSim: Throughput-Oriented Timing Simulation of FinFET Digital Circuits. In: <i>IEEE International Symposium of Electronics Design Automation (ISEDA’25), May 2025</i>. ; 2025.","bibtex":"@inproceedings{Reimer_Holst_Sadeghi-Kohan_Wunderlich_Hellebrand_2025, place={Hong Kong, China}, title={ThorSim: Throughput-Oriented Timing Simulation of FinFET Digital Circuits}, booktitle={IEEE International Symposium of Electronics Design Automation (ISEDA’25), May 2025}, author={Reimer, Jan Dennis and Holst, Stefan and Sadeghi-Kohan, Somayeh and Wunderlich, Hans-Joachim and Hellebrand, Sybille}, year={2025} }","mla":"Reimer, Jan Dennis, et al. “ThorSim: Throughput-Oriented Timing Simulation of FinFET Digital Circuits.” <i>IEEE International Symposium of Electronics Design Automation (ISEDA’25), May 2025</i>, 2025.","short":"J.D. Reimer, S. Holst, S. Sadeghi-Kohan, H.-J. Wunderlich, S. Hellebrand, in: IEEE International Symposium of Electronics Design Automation (ISEDA’25), May 2025, Hong Kong, China, 2025.","chicago":"Reimer, Jan Dennis, Stefan Holst, Somayeh Sadeghi-Kohan, Hans-Joachim Wunderlich, and Sybille Hellebrand. “ThorSim: Throughput-Oriented Timing Simulation of FinFET Digital Circuits.” In <i>IEEE International Symposium of Electronics Design Automation (ISEDA’25), May 2025</i>. Hong Kong, China, 2025.","apa":"Reimer, J. D., Holst, S., Sadeghi-Kohan, S., Wunderlich, H.-J., &#38; Hellebrand, S. (2025). ThorSim: Throughput-Oriented Timing Simulation of FinFET Digital Circuits. <i>IEEE International Symposium of Electronics Design Automation (ISEDA’25), May 2025</i>.","ieee":"J. D. Reimer, S. Holst, S. Sadeghi-Kohan, H.-J. Wunderlich, and S. Hellebrand, “ThorSim: Throughput-Oriented Timing Simulation of FinFET Digital Circuits,” 2025."},"publication":"IEEE International Symposium of Electronics Design Automation (ISEDA'25), May 2025","user_id":"36703","_id":"59218","language":[{"iso":"eng"}],"date_updated":"2025-11-03T13:30:51Z","author":[{"id":"36703","full_name":"Reimer, Jan Dennis","first_name":"Jan Dennis","last_name":"Reimer"},{"full_name":"Holst, Stefan","last_name":"Holst","first_name":"Stefan"},{"first_name":"Somayeh","last_name":"Sadeghi-Kohan","full_name":"Sadeghi-Kohan, Somayeh"},{"first_name":"Hans-Joachim","last_name":"Wunderlich","full_name":"Wunderlich, Hans-Joachim"},{"full_name":"Hellebrand, Sybille","last_name":"Hellebrand","first_name":"Sybille"}],"status":"public","title":"ThorSim: Throughput-Oriented Timing Simulation of FinFET Digital Circuits","year":"2025"},{"oa":"1","quality_controlled":"1","citation":{"ama":"Büttner M, Alt C, Kenter T, Köstler H, Plessl C, Aizinger V. Analyzing performance portability for a SYCL implementation of the 2D shallow water equations. <i>The Journal of Supercomputing</i>. 2025;81(6). doi:<a href=\"https://doi.org/10.1007/s11227-025-07063-7\">10.1007/s11227-025-07063-7</a>","bibtex":"@article{Büttner_Alt_Kenter_Köstler_Plessl_Aizinger_2025, title={Analyzing performance portability for a SYCL implementation of the 2D shallow water equations}, volume={81}, DOI={<a href=\"https://doi.org/10.1007/s11227-025-07063-7\">10.1007/s11227-025-07063-7</a>}, number={6772}, journal={The Journal of Supercomputing}, publisher={Springer Science and Business Media LLC}, author={Büttner, Markus and Alt, Christoph and Kenter, Tobias and Köstler, Harald and Plessl, Christian and Aizinger, Vadym}, year={2025} }","mla":"Büttner, Markus, et al. “Analyzing Performance Portability for a SYCL Implementation of the 2D Shallow Water Equations.” <i>The Journal of Supercomputing</i>, vol. 81, no. 6, 772, Springer Science and Business Media LLC, 2025, doi:<a href=\"https://doi.org/10.1007/s11227-025-07063-7\">10.1007/s11227-025-07063-7</a>.","short":"M. Büttner, C. Alt, T. Kenter, H. Köstler, C. Plessl, V. Aizinger, The Journal of Supercomputing 81 (2025).","chicago":"Büttner, Markus, Christoph Alt, Tobias Kenter, Harald Köstler, Christian Plessl, and Vadym Aizinger. “Analyzing Performance Portability for a SYCL Implementation of the 2D Shallow Water Equations.” <i>The Journal of Supercomputing</i> 81, no. 6 (2025). <a href=\"https://doi.org/10.1007/s11227-025-07063-7\">https://doi.org/10.1007/s11227-025-07063-7</a>.","apa":"Büttner, M., Alt, C., Kenter, T., Köstler, H., Plessl, C., &#38; Aizinger, V. (2025). Analyzing performance portability for a SYCL implementation of the 2D shallow water equations. <i>The Journal of Supercomputing</i>, <i>81</i>(6), Article 772. <a href=\"https://doi.org/10.1007/s11227-025-07063-7\">https://doi.org/10.1007/s11227-025-07063-7</a>","ieee":"M. Büttner, C. Alt, T. Kenter, H. Köstler, C. Plessl, and V. Aizinger, “Analyzing performance portability for a SYCL implementation of the 2D shallow water equations,” <i>The Journal of Supercomputing</i>, vol. 81, no. 6, Art. no. 772, 2025, doi: <a href=\"https://doi.org/10.1007/s11227-025-07063-7\">10.1007/s11227-025-07063-7</a>."},"user_id":"3145","volume":81,"publisher":"Springer Science and Business Media LLC","_id":"62064","status":"public","type":"journal_article","department":[{"_id":"27"},{"_id":"518"}],"date_created":"2025-11-04T09:37:50Z","abstract":[{"lang":"eng","text":"SYCL is an open standard for targeting heterogeneous hardware from C++. In this work, we evaluate a SYCL implementation for a discontinuous Galerkin discretization of the 2D shallow water equations targeting CPUs, GPUs, and also FPGAs. The discretization uses polynomial orders zero to two on unstructured triangular meshes. Separating memory accesses from the numerical code allow us to optimize data accesses for the target architecture. A performance analysis shows good portability across x86 and ARM CPUs, GPUs from different vendors, and even two variants of Intel Stratix 10 FPGAs. Measuring the energy to solution shows that GPUs yield an up to 10x higher energy efficiency in terms of degrees of freedom per joule compared to CPUs. With custom designed caches, FPGAs offer a meaningful complement to the other architectures with particularly good computational performance on smaller meshes. FPGAs with High Bandwidth Memory are less affected by bandwidth issues and have similar energy efficiency as latest generation CPUs."}],"issue":"6","publication":"The Journal of Supercomputing","doi":"10.1007/s11227-025-07063-7","main_file_link":[{"open_access":"1"}],"article_number":"772","language":[{"iso":"eng"}],"date_updated":"2025-11-04T09:48:10Z","publication_status":"published","intvolume":"        81","year":"2025","title":"Analyzing performance portability for a SYCL implementation of the 2D shallow water equations","author":[{"last_name":"Büttner","first_name":"Markus","full_name":"Büttner, Markus"},{"id":"100625","first_name":"Christoph","last_name":"Alt","full_name":"Alt, Christoph"},{"id":"3145","last_name":"Kenter","first_name":"Tobias","full_name":"Kenter, Tobias"},{"last_name":"Köstler","first_name":"Harald","full_name":"Köstler, Harald"},{"full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian","last_name":"Plessl","id":"16153"},{"full_name":"Aizinger, Vadym","first_name":"Vadym","last_name":"Aizinger"}],"publication_identifier":{"issn":["1573-0484"]}},{"main_file_link":[{"open_access":"1"}],"series_title":"IWOCL ’25","language":[{"iso":"eng"}],"doi":"10.1145/3731125.3731131","year":"2025","title":"Evaluating oneAPI I/O Pipes in a Case Study of Scaling a SYCL Jacobi Solver to multiple FPGAs","author":[{"first_name":"Christoph","last_name":"Alt","full_name":"Alt, Christoph","id":"100625"},{"full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian","last_name":"Plessl","id":"16153"},{"id":"3145","last_name":"Kenter","first_name":"Tobias","full_name":"Kenter, Tobias"}],"publication_identifier":{"isbn":["9798400713606"]},"date_updated":"2025-11-04T09:47:26Z","date_created":"2025-11-04T09:45:23Z","keyword":["Multi-FPGA","High-level Synthesis","oneAPI","FPGA"],"type":"conference","department":[{"_id":"27"},{"_id":"518"}],"publication":"Proceedings of the 13th International Workshop on OpenCL and SYCL","abstract":[{"text":"In the context of high-performance computing (HPC) for distributed workloads, individual field-programmable gate arrays (FPGAs) need efficient ways to exchange data, which requires network infrastructure and software abstractions. Dedicated multi-FPGA clusters provide inter-FPGA networks for direct device to device communication. The oneAPI high-level synthesis toolchain offers I/O pipes to allow user kernels to interact with the networking ports of the FPGA board. In this work, we evaluate using oneAPI I/O pipes for direct FPGA-to-FPGA communication by scaling a SYCL implementation of a Jacobi solver on up to 25 FPGAs in the Noctua 2 cluster. We see good results in weak and strong scaling experiments.","lang":"eng"}],"publisher":"Association for Computing Machinery","_id":"62066","user_id":"3145","status":"public","place":"New York, NY, USA","oa":"1","citation":{"bibtex":"@inproceedings{Alt_Plessl_Kenter_2025, place={New York, NY, USA}, series={IWOCL ’25}, title={Evaluating oneAPI I/O Pipes in a Case Study of Scaling a SYCL Jacobi Solver to multiple FPGAs}, DOI={<a href=\"https://doi.org/10.1145/3731125.3731131\">10.1145/3731125.3731131</a>}, booktitle={Proceedings of the 13th International Workshop on OpenCL and SYCL}, publisher={Association for Computing Machinery}, author={Alt, Christoph and Plessl, Christian and Kenter, Tobias}, year={2025}, collection={IWOCL ’25} }","ama":"Alt C, Plessl C, Kenter T. Evaluating oneAPI I/O Pipes in a Case Study of Scaling a SYCL Jacobi Solver to multiple FPGAs. In: <i>Proceedings of the 13th International Workshop on OpenCL and SYCL</i>. IWOCL ’25. Association for Computing Machinery; 2025. doi:<a href=\"https://doi.org/10.1145/3731125.3731131\">10.1145/3731125.3731131</a>","mla":"Alt, Christoph, et al. “Evaluating OneAPI I/O Pipes in a Case Study of Scaling a SYCL Jacobi Solver to Multiple FPGAs.” <i>Proceedings of the 13th International Workshop on OpenCL and SYCL</i>, Association for Computing Machinery, 2025, doi:<a href=\"https://doi.org/10.1145/3731125.3731131\">10.1145/3731125.3731131</a>.","short":"C. Alt, C. Plessl, T. Kenter, in: Proceedings of the 13th International Workshop on OpenCL and SYCL, Association for Computing Machinery, New York, NY, USA, 2025.","chicago":"Alt, Christoph, Christian Plessl, and Tobias Kenter. “Evaluating OneAPI I/O Pipes in a Case Study of Scaling a SYCL Jacobi Solver to Multiple FPGAs.” In <i>Proceedings of the 13th International Workshop on OpenCL and SYCL</i>. IWOCL ’25. New York, NY, USA: Association for Computing Machinery, 2025. <a href=\"https://doi.org/10.1145/3731125.3731131\">https://doi.org/10.1145/3731125.3731131</a>.","ieee":"C. Alt, C. Plessl, and T. Kenter, “Evaluating oneAPI I/O Pipes in a Case Study of Scaling a SYCL Jacobi Solver to multiple FPGAs,” 2025, doi: <a href=\"https://doi.org/10.1145/3731125.3731131\">10.1145/3731125.3731131</a>.","apa":"Alt, C., Plessl, C., &#38; Kenter, T. (2025). Evaluating oneAPI I/O Pipes in a Case Study of Scaling a SYCL Jacobi Solver to multiple FPGAs. <i>Proceedings of the 13th International Workshop on OpenCL and SYCL</i>. <a href=\"https://doi.org/10.1145/3731125.3731131\">https://doi.org/10.1145/3731125.3731131</a>"},"quality_controlled":"1","project":[{"name":"Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}]},{"title":"Adaptive Spectral Block Floating Point for Discontinuous Galerkin Methods","status":"public","year":"2025","author":[{"full_name":"Sundriyal, Shivam","last_name":"Sundriyal","first_name":"Shivam"},{"last_name":"Büttner","first_name":"Markus","full_name":"Büttner, Markus"},{"full_name":"Alt, Christoph","last_name":"Alt","first_name":"Christoph","id":"100625"},{"id":"3145","full_name":"Kenter, Tobias","first_name":"Tobias","last_name":"Kenter"},{"first_name":"Vadym","last_name":"Aizinger","full_name":"Aizinger, Vadym"}],"date_updated":"2025-11-04T09:48:46Z","publication_status":"published","language":[{"iso":"eng"}],"_id":"62065","publisher":"IEEE","doi":"10.1109/hpec67600.2025.11196195","user_id":"3145","publication":"2025 IEEE High Performance Extreme Computing Conference (HPEC)","citation":{"chicago":"Sundriyal, Shivam, Markus Büttner, Christoph Alt, Tobias Kenter, and Vadym Aizinger. “Adaptive Spectral Block Floating Point for Discontinuous Galerkin Methods.” In <i>2025 IEEE High Performance Extreme Computing Conference (HPEC)</i>. IEEE, 2025. <a href=\"https://doi.org/10.1109/hpec67600.2025.11196195\">https://doi.org/10.1109/hpec67600.2025.11196195</a>.","short":"S. Sundriyal, M. Büttner, C. Alt, T. Kenter, V. Aizinger, in: 2025 IEEE High Performance Extreme Computing Conference (HPEC), IEEE, 2025.","apa":"Sundriyal, S., Büttner, M., Alt, C., Kenter, T., &#38; Aizinger, V. (2025). Adaptive Spectral Block Floating Point for Discontinuous Galerkin Methods. <i>2025 IEEE High Performance Extreme Computing Conference (HPEC)</i>. <a href=\"https://doi.org/10.1109/hpec67600.2025.11196195\">https://doi.org/10.1109/hpec67600.2025.11196195</a>","ieee":"S. Sundriyal, M. Büttner, C. Alt, T. Kenter, and V. Aizinger, “Adaptive Spectral Block Floating Point for Discontinuous Galerkin Methods,” 2025, doi: <a href=\"https://doi.org/10.1109/hpec67600.2025.11196195\">10.1109/hpec67600.2025.11196195</a>.","ama":"Sundriyal S, Büttner M, Alt C, Kenter T, Aizinger V. Adaptive Spectral Block Floating Point for Discontinuous Galerkin Methods. In: <i>2025 IEEE High Performance Extreme Computing Conference (HPEC)</i>. IEEE; 2025. doi:<a href=\"https://doi.org/10.1109/hpec67600.2025.11196195\">10.1109/hpec67600.2025.11196195</a>","bibtex":"@inproceedings{Sundriyal_Büttner_Alt_Kenter_Aizinger_2025, title={Adaptive Spectral Block Floating Point for Discontinuous Galerkin Methods}, DOI={<a href=\"https://doi.org/10.1109/hpec67600.2025.11196195\">10.1109/hpec67600.2025.11196195</a>}, booktitle={2025 IEEE High Performance Extreme Computing Conference (HPEC)}, publisher={IEEE}, author={Sundriyal, Shivam and Büttner, Markus and Alt, Christoph and Kenter, Tobias and Aizinger, Vadym}, year={2025} }","mla":"Sundriyal, Shivam, et al. “Adaptive Spectral Block Floating Point for Discontinuous Galerkin Methods.” <i>2025 IEEE High Performance Extreme Computing Conference (HPEC)</i>, IEEE, 2025, doi:<a href=\"https://doi.org/10.1109/hpec67600.2025.11196195\">10.1109/hpec67600.2025.11196195</a>."},"quality_controlled":"1","project":[{"name":"Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"date_created":"2025-11-04T09:43:18Z","type":"conference","department":[{"_id":"27"},{"_id":"518"}]},{"status":"public","has_accepted_license":"1","_id":"62039","publisher":"LibreCat University","user_id":"76955","ddc":["370"],"editor":[{"full_name":"Quintana-Murci, Elena","last_name":"Quintana-Murci","first_name":"Elena"},{"full_name":"Salva-Mut, Francisca","last_name":"Salva-Mut","first_name":"Francisca"},{"last_name":"Stalder","first_name":"Barbara Elisabeth","full_name":"Stalder, Barbara Elisabeth"},{"full_name":"Nägele, Christof","first_name":"Christof","last_name":"Nägele"}],"file_date_updated":"2025-11-03T09:00:43Z","citation":{"mla":"Vernholz, Mats, and Katrin Temmen. “Why Engineering Students Choose a Career in Teacher Education – Qualitative Analysis of Bachelor Students’ Motives.” <i>Towards Inclusive and Egalitarian Vocational Education and Training: Key Challenges and Strategies from a Holistic and Multi-Contextual Approach. Proceedings of the 6th Crossing Boundaries Conference in Vocational Education and Training</i>, edited by Elena Quintana-Murci et al., LibreCat University, 2025, doi:<a href=\"https://doi.org/10.5281/ZENODO.15364031\">10.5281/ZENODO.15364031</a>.","ama":"Vernholz M, Temmen K. Why Engineering Students Choose a Career in Teacher Education – Qualitative Analysis of Bachelor Students’ Motives. In: Quintana-Murci E, Salva-Mut F, Stalder BE, Nägele C, eds. <i>Towards Inclusive and Egalitarian Vocational Education and Training: Key Challenges and Strategies from a Holistic and Multi-Contextual Approach. Proceedings of the 6th Crossing Boundaries Conference in Vocational Education and Training</i>. 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Quintana-Murci, F. Salva-Mut, B. E. Stalder, &#38; C. Nägele (Eds.), <i>Towards inclusive and egalitarian vocational education and training: Key challenges and strategies from a holistic and multi-contextual approach. Proceedings of the 6th Crossing Boundaries Conference in Vocational Education and Training</i>. LibreCat University. <a href=\"https://doi.org/10.5281/ZENODO.15364031\">https://doi.org/10.5281/ZENODO.15364031</a>","ieee":"M. Vernholz and K. Temmen, “Why Engineering Students Choose a Career in Teacher Education – Qualitative Analysis of Bachelor Students’ Motives,” in <i>Towards inclusive and egalitarian vocational education and training: Key challenges and strategies from a holistic and multi-contextual approach. Proceedings of the 6th Crossing Boundaries Conference in Vocational Education and Training</i>, E. Quintana-Murci, F. Salva-Mut, B. E. Stalder, and C. Nägele, Eds. LibreCat University, 2025.","chicago":"Vernholz, Mats, and Katrin Temmen. “Why Engineering Students Choose a Career in Teacher Education – Qualitative Analysis of Bachelor Students’ Motives.” In <i>Towards Inclusive and Egalitarian Vocational Education and Training: Key Challenges and Strategies from a Holistic and Multi-Contextual Approach. Proceedings of the 6th Crossing Boundaries Conference in Vocational Education and Training</i>, edited by Elena Quintana-Murci, Francisca Salva-Mut, Barbara Elisabeth Stalder, and Christof Nägele. LibreCat University, 2025. <a href=\"https://doi.org/10.5281/ZENODO.15364031\">https://doi.org/10.5281/ZENODO.15364031</a>.","short":"M. Vernholz, K. Temmen, in: E. Quintana-Murci, F. Salva-Mut, B.E. Stalder, C. Nägele (Eds.), Towards Inclusive and Egalitarian Vocational Education and Training: Key Challenges and Strategies from a Holistic and Multi-Contextual Approach. Proceedings of the 6th Crossing Boundaries Conference in Vocational Education and Training, LibreCat University, 2025."},"quality_controlled":"1","oa":"1","year":"2025","title":"Why Engineering Students Choose a Career in Teacher Education – Qualitative Analysis of Bachelor Students' Motives","author":[{"id":"76955","full_name":"Vernholz, Mats","orcid":"0000-0001-5175-357X","last_name":"Vernholz","first_name":"Mats"},{"full_name":"Temmen, Katrin","first_name":"Katrin","last_name":"Temmen","id":"30086"}],"date_updated":"2025-11-05T09:50:18Z","language":[{"iso":"eng"}],"doi":"10.5281/ZENODO.15364031","publication":"Towards inclusive and egalitarian vocational education and training: Key challenges and strategies from a holistic and multi-contextual approach. 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NL2LS: LLM-based Automatic Linking of Knowledge Graphs. <i>Proceedings of the 12th Knowledge Capture Conference 2025, {K-CAP} 2025, The Thirteenth International Conference on Knowledge Capture, December 10 - 12, 2025, Dayton, Ohio, USA</i>."},"publication":"Proceedings of the 12th Knowledge Capture Conference 2025, {K-CAP} 2025, The Thirteenth International Conference on Knowledge Capture, December 10 - 12, 2025, Dayton, Ohio, USA","department":[{"_id":"574"}],"keyword":["Srivastava ali dice enexa firmansyah ihtassine ngonga sailproject sherif whale"],"type":"conference","date_created":"2025-11-06T15:13:39Z","date_updated":"2025-11-06T15:19:28Z","author":[{"id":"103911","full_name":"Ihtassine, Reda","last_name":"Ihtassine","first_name":"Reda"},{"full_name":"Firmansyah, Asep Fajar","first_name":"Asep Fajar","last_name":"Firmansyah","id":"76787"},{"full_name":"Srivastava, Nikit","first_name":"Nikit","orcid":"0009-0004-5164-4911","last_name":"Srivastava","id":"70066"},{"full_name":"Ali, Manzoor","last_name":"Ali","first_name":"Manzoor"},{"id":"65716","full_name":"Ngonga Ngomo, Axel-Cyrille","first_name":"Axel-Cyrille","last_name":"Ngonga Ngomo"},{"id":"67234","full_name":"Sherif, Mohamed","first_name":"Mohamed","last_name":"Sherif","orcid":"https://orcid.org/0000-0002-9927-2203"}],"status":"public","year":"2025","title":"NL2LS: LLM-based Automatic Linking of Knowledge Graphs","user_id":"76787","language":[{"iso":"eng"}],"_id":"62119","publisher":"ACM"},{"citation":{"ieee":"J. Weller and R. Dumitrescu, “Decision-Driven Analytics in Smart Factories: Enterprise Architecture Framework for Use Case Specification and Engineering (FUSE),” <i>Electronics</i>, vol. 14, no. 21, Art. no. 4271, 2025, doi: <a href=\"https://doi.org/10.3390/electronics14214271\">10.3390/electronics14214271</a>.","apa":"Weller, J., &#38; Dumitrescu, R. (2025). Decision-Driven Analytics in Smart Factories: Enterprise Architecture Framework for Use Case Specification and Engineering (FUSE). <i>Electronics</i>, <i>14</i>(21), Article 4271. <a href=\"https://doi.org/10.3390/electronics14214271\">https://doi.org/10.3390/electronics14214271</a>","short":"J. Weller, R. Dumitrescu, Electronics 14 (2025).","chicago":"Weller, Julian, and Roman Dumitrescu. “Decision-Driven Analytics in Smart Factories: Enterprise Architecture Framework for Use Case Specification and Engineering (FUSE).” <i>Electronics</i> 14, no. 21 (2025). <a href=\"https://doi.org/10.3390/electronics14214271\">https://doi.org/10.3390/electronics14214271</a>.","mla":"Weller, Julian, and Roman Dumitrescu. “Decision-Driven Analytics in Smart Factories: Enterprise Architecture Framework for Use Case Specification and Engineering (FUSE).” <i>Electronics</i>, vol. 14, no. 21, 4271, MDPI AG, 2025, doi:<a href=\"https://doi.org/10.3390/electronics14214271\">10.3390/electronics14214271</a>.","bibtex":"@article{Weller_Dumitrescu_2025, title={Decision-Driven Analytics in Smart Factories: Enterprise Architecture Framework for Use Case Specification and Engineering (FUSE)}, volume={14}, DOI={<a href=\"https://doi.org/10.3390/electronics14214271\">10.3390/electronics14214271</a>}, number={214271}, journal={Electronics}, publisher={MDPI AG}, author={Weller, Julian and Dumitrescu, Roman}, year={2025} }","ama":"Weller J, Dumitrescu R. Decision-Driven Analytics in Smart Factories: Enterprise Architecture Framework for Use Case Specification and Engineering (FUSE). <i>Electronics</i>. 2025;14(21). doi:<a href=\"https://doi.org/10.3390/electronics14214271\">10.3390/electronics14214271</a>"},"volume":14,"user_id":"15782","_id":"62138","publisher":"MDPI AG","status":"public","department":[{"_id":"563"}],"type":"journal_article","date_created":"2025-11-07T14:42:07Z","abstract":[{"text":"<jats:p>This paper presents a comprehensive design framework for Enterprise Architecture aimed at facilitating decision-driven analytics in smart factories. The motivation behind this research lies in challenges faced by manufacturing companies, such as skilled labor shortages and increasing global competition, alongside the imperative for sustainable production. This journal provides a novel approach for designing and documenting prescriptive analytics use cases in manufacturing environments. The framework addresses the need for effective integration of advanced data analytics and prescriptive analytics solutions within existing production environments, thereby enhancing operational efficiency and decision-making processes. A Design Science Research approach is used to iteratively derive a framework based on stakeholder needs and activities along the prescriptive analytics use case development cycle. The resulting framework is demonstrated and evaluated in an IoT Factory setup in a research facility. From a practical perspective, the framework supports manufacturing companies in systematically designing prescriptive analytics use cases. From a research perspective, it contributes to the body of knowledge on Enterprise Architecture Management (EAM) by operationalizing the design of prescriptive analytics use cases in manufacturing contexts. The main contributions of this study include the development of a framework that supports the planning, design, and integration of prescriptive analytics use cases. This framework fosters interdisciplinary collaboration and aids in managing the complexity of data-driven projects.</jats:p>","lang":"eng"}],"issue":"21","publication":"Electronics","doi":"10.3390/electronics14214271","language":[{"iso":"eng"}],"article_number":"4271","intvolume":"        14","publication_status":"published","date_updated":"2025-11-07T14:42:32Z","publication_identifier":{"issn":["2079-9292"]},"author":[{"full_name":"Weller, Julian","first_name":"Julian","last_name":"Weller"},{"id":"16190","last_name":"Dumitrescu","first_name":"Roman","full_name":"Dumitrescu, Roman"}],"title":"Decision-Driven Analytics in Smart Factories: Enterprise Architecture Framework for Use Case Specification and Engineering (FUSE)","year":"2025"},{"date_created":"2025-11-10T08:31:47Z","type":"journal_article","department":[{"_id":"58"}],"publication":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","citation":{"mla":"Sadiye, Babak, et al. “60-Gb/s 1:4 Demultiplexer in 22-Nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design.” <i>IEEE Transactions on Very Large Scale Integration (VLSI) Systems</i>, IEEE, 2025, doi:<a href=\"https://doi.org/10.1109/TVLSI.2025.3625787\">10.1109/TVLSI.2025.3625787</a>.","bibtex":"@article{Sadiye_Iftekhar_Müller_Scheytt_2025, title={60-Gb/s 1:4 Demultiplexer in 22-nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design}, DOI={<a href=\"https://doi.org/10.1109/TVLSI.2025.3625787\">10.1109/TVLSI.2025.3625787</a>}, journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems}, publisher={IEEE}, author={Sadiye, Babak and Iftekhar, Mohammed and Müller, Wolfgang and Scheytt, J. Christoph}, year={2025} }","ama":"Sadiye B, Iftekhar M, Müller W, Scheytt JC. 60-Gb/s 1:4 Demultiplexer in 22-nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design. <i>IEEE Transactions on Very Large Scale Integration (VLSI) Systems</i>. Published online 2025. doi:<a href=\"https://doi.org/10.1109/TVLSI.2025.3625787\">10.1109/TVLSI.2025.3625787</a>","ieee":"B. Sadiye, M. Iftekhar, W. Müller, and J. C. Scheytt, “60-Gb/s 1:4 Demultiplexer in 22-nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design,” <i>IEEE Transactions on Very Large Scale Integration (VLSI) Systems</i>, 2025, doi: <a href=\"https://doi.org/10.1109/TVLSI.2025.3625787\">10.1109/TVLSI.2025.3625787</a>.","apa":"Sadiye, B., Iftekhar, M., Müller, W., &#38; Scheytt, J. C. (2025). 60-Gb/s 1:4 Demultiplexer in 22-nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design. <i>IEEE Transactions on Very Large Scale Integration (VLSI) Systems</i>. <a href=\"https://doi.org/10.1109/TVLSI.2025.3625787\">https://doi.org/10.1109/TVLSI.2025.3625787</a>","short":"B. Sadiye, M. Iftekhar, W. Müller, J.C. Scheytt, IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2025).","chicago":"Sadiye, Babak, Mohammed Iftekhar, Wolfgang Müller, and J. Christoph Scheytt. “60-Gb/s 1:4 Demultiplexer in 22-Nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design.” <i>IEEE Transactions on Very Large Scale Integration (VLSI) Systems</i>, 2025. <a href=\"https://doi.org/10.1109/TVLSI.2025.3625787\">https://doi.org/10.1109/TVLSI.2025.3625787</a>."},"project":[{"name":"Scale4Edge: Skalierbare Infrastruktur für Edge-Computing","_id":"325"}],"_id":"62148","language":[{"iso":"eng"}],"publisher":"IEEE","doi":"10.1109/TVLSI.2025.3625787","user_id":"93634","status":"public","year":"2025","title":"60-Gb/s 1:4 Demultiplexer in 22-nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design","publication_identifier":{"issn":["1063-8210"]},"author":[{"full_name":"Sadiye, Babak","last_name":"Sadiye","first_name":"Babak","id":"93634"},{"first_name":"Mohammed","last_name":"Iftekhar","full_name":"Iftekhar, Mohammed","id":"47944"},{"id":"16243","last_name":"Müller","first_name":"Wolfgang","full_name":"Müller, Wolfgang"},{"orcid":"0000-0002-5950-6618 ","first_name":"J. Christoph","last_name":"Scheytt","full_name":"Scheytt, J. Christoph","id":"37144"}],"date_updated":"2025-11-10T08:38:07Z","publication_status":"published"},{"has_accepted_license":"1","conference":{"location":"Rotterdam","name":"Interspeech 2025"},"status":"public","user_id":"44393","ddc":["000"],"_id":"61079","project":[{"_id":"52","name":"Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"citation":{"bibtex":"@inproceedings{Cord-Landwehr_Gburrek_Deegen_Haeb-Umbach_2025, title={Spatio-spectral diarization of meetings by combining TDOA-based  segmentation and speaker embedding-based clustering}, DOI={<a href=\"https://doi.org/10.21437/Interspeech.2025-1663\">10.21437/Interspeech.2025-1663</a>}, booktitle={Proceedings of INTERSPEECH}, author={Cord-Landwehr, Tobias and Gburrek, Tobias and Deegen, Marc and Haeb-Umbach, Reinhold}, year={2025} }","ama":"Cord-Landwehr T, Gburrek T, Deegen M, Haeb-Umbach R. Spatio-spectral diarization of meetings by combining TDOA-based  segmentation and speaker embedding-based clustering. In: <i>Proceedings of INTERSPEECH</i>. ; 2025. doi:<a href=\"https://doi.org/10.21437/Interspeech.2025-1663\">10.21437/Interspeech.2025-1663</a>","mla":"Cord-Landwehr, Tobias, et al. “Spatio-Spectral Diarization of Meetings by Combining TDOA-Based  Segmentation and Speaker Embedding-Based Clustering.” <i>Proceedings of INTERSPEECH</i>, 2025, doi:<a href=\"https://doi.org/10.21437/Interspeech.2025-1663\">10.21437/Interspeech.2025-1663</a>.","chicago":"Cord-Landwehr, Tobias, Tobias Gburrek, Marc Deegen, and Reinhold Haeb-Umbach. “Spatio-Spectral Diarization of Meetings by Combining TDOA-Based  Segmentation and Speaker Embedding-Based Clustering.” In <i>Proceedings of INTERSPEECH</i>, 2025. <a href=\"https://doi.org/10.21437/Interspeech.2025-1663\">https://doi.org/10.21437/Interspeech.2025-1663</a>.","short":"T. Cord-Landwehr, T. Gburrek, M. Deegen, R. Haeb-Umbach, in: Proceedings of INTERSPEECH, 2025.","ieee":"T. Cord-Landwehr, T. Gburrek, M. Deegen, and R. Haeb-Umbach, “Spatio-spectral diarization of meetings by combining TDOA-based  segmentation and speaker embedding-based clustering,” presented at the Interspeech 2025, Rotterdam, 2025, doi: <a href=\"https://doi.org/10.21437/Interspeech.2025-1663\">10.21437/Interspeech.2025-1663</a>.","apa":"Cord-Landwehr, T., Gburrek, T., Deegen, M., &#38; Haeb-Umbach, R. (2025). Spatio-spectral diarization of meetings by combining TDOA-based  segmentation and speaker embedding-based clustering. <i>Proceedings of INTERSPEECH</i>. Interspeech 2025, Rotterdam. <a href=\"https://doi.org/10.21437/Interspeech.2025-1663\">https://doi.org/10.21437/Interspeech.2025-1663</a>"},"file_date_updated":"2025-08-29T09:43:32Z","oa":"1","external_id":{"arxiv":["2506.16228"]},"date_updated":"2025-11-10T09:06:47Z","author":[{"id":"44393","full_name":"Cord-Landwehr, Tobias","first_name":"Tobias","last_name":"Cord-Landwehr"},{"full_name":"Gburrek, Tobias","first_name":"Tobias","last_name":"Gburrek","id":"44006"},{"first_name":"Marc","last_name":"Deegen","full_name":"Deegen, Marc","id":"70272"},{"first_name":"Reinhold","last_name":"Haeb-Umbach","full_name":"Haeb-Umbach, Reinhold","id":"242"}],"title":"Spatio-spectral diarization of meetings by combining TDOA-based  segmentation and speaker embedding-based clustering","year":"2025","doi":"10.21437/Interspeech.2025-1663","language":[{"iso":"eng"}],"abstract":[{"text":"We propose a spatio-spectral, combined model-based and data-driven\r\ndiarization pipeline consisting of TDOA-based segmentation followed by\r\nembedding-based clustering. The proposed system requires neither access to\r\nmulti-channel training data nor prior knowledge about the number or placement\r\nof microphones. It works for both a compact microphone array and distributed\r\nmicrophones, with minor adjustments. Due to its superior handling of\r\noverlapping speech during segmentation, the proposed pipeline significantly\r\noutperforms the single-channel pyannote approach, both in a scenario with a\r\ncompact microphone array and in a setup with distributed microphones.\r\nAdditionally, we show that, unlike fully spatial diarization pipelines, the\r\nproposed system can correctly track speakers when they change positions.","lang":"eng"}],"publication":"Proceedings of INTERSPEECH","department":[{"_id":"54"}],"type":"conference","date_created":"2025-08-29T09:39:01Z","file":[{"file_name":"main.pdf","file_size":921918,"access_level":"open_access","relation":"main_file","date_updated":"2025-08-29T09:43:32Z","file_id":"61085","content_type":"application/pdf","creator":"cord","date_created":"2025-08-29T09:43:32Z"}]},{"user_id":"49871","doi":"10.21437/interspeech.2025-2190","publisher":"ISCA","_id":"62164","language":[{"iso":"eng"}],"publication_status":"published","date_updated":"2025-11-11T11:45:12Z","author":[{"id":"49871","first_name":"Michael","last_name":"Kuhlmann","full_name":"Kuhlmann, Michael"},{"full_name":"Seebauer, Fritz","first_name":"Fritz","last_name":"Seebauer"},{"id":"74505","full_name":"Wagner, Petra","first_name":"Petra","last_name":"Wagner"},{"first_name":"Reinhold","last_name":"Häb-Umbach","full_name":"Häb-Umbach, Reinhold","id":"242"}],"title":"Towards Frame-level Quality Predictions of Synthetic Speech","year":"2025","status":"public","department":[{"_id":"54"}],"type":"conference","date_created":"2025-11-11T11:43:20Z","citation":{"chicago":"Kuhlmann, Michael, Fritz Seebauer, Petra Wagner, and Reinhold Häb-Umbach. “Towards Frame-Level Quality Predictions of Synthetic Speech.” In <i>Interspeech 2025</i>. ISCA, 2025. <a href=\"https://doi.org/10.21437/interspeech.2025-2190\">https://doi.org/10.21437/interspeech.2025-2190</a>.","short":"M. Kuhlmann, F. Seebauer, P. Wagner, R. Häb-Umbach, in: Interspeech 2025, ISCA, 2025.","apa":"Kuhlmann, M., Seebauer, F., Wagner, P., &#38; Häb-Umbach, R. (2025). Towards Frame-level Quality Predictions of Synthetic Speech. <i>Interspeech 2025</i>. <a href=\"https://doi.org/10.21437/interspeech.2025-2190\">https://doi.org/10.21437/interspeech.2025-2190</a>","ieee":"M. Kuhlmann, F. Seebauer, P. Wagner, and R. Häb-Umbach, “Towards Frame-level Quality Predictions of Synthetic Speech,” 2025, doi: <a href=\"https://doi.org/10.21437/interspeech.2025-2190\">10.21437/interspeech.2025-2190</a>.","ama":"Kuhlmann M, Seebauer F, Wagner P, Häb-Umbach R. Towards Frame-level Quality Predictions of Synthetic Speech. In: <i>Interspeech 2025</i>. ISCA; 2025. doi:<a href=\"https://doi.org/10.21437/interspeech.2025-2190\">10.21437/interspeech.2025-2190</a>","bibtex":"@inproceedings{Kuhlmann_Seebauer_Wagner_Häb-Umbach_2025, title={Towards Frame-level Quality Predictions of Synthetic Speech}, DOI={<a href=\"https://doi.org/10.21437/interspeech.2025-2190\">10.21437/interspeech.2025-2190</a>}, booktitle={Interspeech 2025}, publisher={ISCA}, author={Kuhlmann, Michael and Seebauer, Fritz and Wagner, Petra and Häb-Umbach, Reinhold}, year={2025} }","mla":"Kuhlmann, Michael, et al. “Towards Frame-Level Quality Predictions of Synthetic Speech.” <i>Interspeech 2025</i>, ISCA, 2025, doi:<a href=\"https://doi.org/10.21437/interspeech.2025-2190\">10.21437/interspeech.2025-2190</a>."},"publication":"Interspeech 2025"},{"oa":"1","place":"Paderborn","citation":{"ieee":"S. Lange, <i>Analyse und Modellierung eines induktiven Ortungsprozesses unter Berücksichtigung der elektromagnetischen Wechselwirkungen planarer Spulensysteme</i>. Paderborn: Universitätsbibliothek Paderborn, 2025.","apa":"Lange, S. (2025). <i>Analyse und Modellierung eines induktiven Ortungsprozesses unter Berücksichtigung der elektromagnetischen Wechselwirkungen planarer Spulensysteme</i>. Universitätsbibliothek Paderborn. <a href=\"https://doi.org/10.17619/UNIPB/1-2436\">https://doi.org/10.17619/UNIPB/1-2436</a>","mla":"Lange, Sven. <i>Analyse und Modellierung eines induktiven Ortungsprozesses unter Berücksichtigung der elektromagnetischen Wechselwirkungen planarer Spulensysteme</i>. Universitätsbibliothek Paderborn, 2025, doi:<a href=\"https://doi.org/10.17619/UNIPB/1-2436\">10.17619/UNIPB/1-2436</a>.","bibtex":"@book{Lange_2025, place={Paderborn}, title={Analyse und Modellierung eines induktiven Ortungsprozesses unter Berücksichtigung der elektromagnetischen Wechselwirkungen planarer Spulensysteme}, DOI={<a href=\"https://doi.org/10.17619/UNIPB/1-2436\">10.17619/UNIPB/1-2436</a>}, publisher={Universitätsbibliothek Paderborn}, author={Lange, Sven}, year={2025} }","short":"S. Lange, Analyse und Modellierung eines induktiven Ortungsprozesses unter Berücksichtigung der elektromagnetischen Wechselwirkungen planarer Spulensysteme, Universitätsbibliothek Paderborn, Paderborn, 2025.","ama":"Lange S. <i>Analyse und Modellierung eines induktiven Ortungsprozesses unter Berücksichtigung der elektromagnetischen Wechselwirkungen planarer Spulensysteme</i>. Universitätsbibliothek Paderborn; 2025. doi:<a href=\"https://doi.org/10.17619/UNIPB/1-2436\">10.17619/UNIPB/1-2436</a>","chicago":"Lange, Sven. <i>Analyse und Modellierung eines induktiven Ortungsprozesses unter Berücksichtigung der elektromagnetischen Wechselwirkungen planarer Spulensysteme</i>. Paderborn: Universitätsbibliothek Paderborn, 2025. <a href=\"https://doi.org/10.17619/UNIPB/1-2436\">https://doi.org/10.17619/UNIPB/1-2436</a>."},"supervisor":[{"id":"158","full_name":"Förstner, Jens","orcid":"0000-0001-7059-9862","first_name":"Jens","last_name":"Förstner"},{"full_name":"Stiemer, Marcus","last_name":"Stiemer","first_name":"Marcus"}],"user_id":"38240","page":"247","publisher":"Universitätsbibliothek Paderborn","_id":"62167","status":"public","type":"dissertation","department":[{"_id":"59"},{"_id":"61"},{"_id":"485"}],"date_created":"2025-11-12T10:06:39Z","abstract":[{"text":"Diese Dissertation befasst sich mit der Entwicklung eines induktiv-basierten Lokalisierungsverfahrens mittels planarer Spulen, das auf magnetischer Kopplung beruht. Grundlage ist die elektromagnetische Induktion, bei der sich die entstehende Spannung proportional zur Gegeninduktivität verhält. Das Verfahren arbeitet im physikalischen Nahfeld und im Frequenzbereich von einigen kHz bis MHz, um eine effiziente Kopplung ohne Ausbreitung elektromagnetischer Wellen zu gewährleisten. Im Vergleich zu etablierten Verfahren wie GPS oder Ultraschall zeigt die induktive Ortung Vorteile bei kurzer Reichweite, insbesondere durch hohe Genauigkeit im Zentimeterbereich und geringe Materialabhängigkeit. Zudem lässt sie sich in bestehende Technologien wie bei der drahtlosen Energieübertragung integrieren und durch Sensorfusion mit anderen Verfahren kombinieren. Zur Modellierung und Optimierung werden physikalische Eigenschaften von planaren Spulen und EM-Feldern analysiert und elektrische Ersatzschaltbilder eingesetzt. Die geometriebasierte Berechnung der Gegeninduktivität ermöglicht die Entwicklung und Bewertung geeigneter Ortungsalgorithmen. Stochastische Filterverfahren verbessern zusätzlich die Robustheit gegenüber Umgebungseinflüssen. Abschließend wird eine modulare Simulationsplattform vorgestellt, die als Grundlage für die Generierung von Trainingsdaten sowie zur Weiterentwicklung von Mess-, Ortungs- und Filtermethoden dient.","lang":"eng"},{"lang":"eng","text":"This dissertation addresses the development of an inductively based localization method using planar coils, which relies on magnetic coupling. The underlying principle is electromagnetic induction, where the resulting voltage is proportional to the mutual inductance. The method operates in the physical near field and within a frequency range from a few kHz to MHz, ensuring efficient coupling without the propagation of electromagnetic waves. Compared to established methods such as GPS or ultrasound, inductive localization offers advantages at short range—particularly high accuracy in the centimeter range and low dependency on surrounding materials. Additionally, it can be integrated into existing technologies, such as wireless power transfer systems, and combined with other methods through sensor fusion. To support modeling and optimization, the physical properties of planar coils and electromagnetic fields are analyzed, and equivalent electrical circuit models are used. Geometry-based calculations of mutual inductance enable the development and evaluation of suitable localization algorithms. Stochastic filtering methods further enhance robustness against environmental influences. Finally, a modular simulation platform is presented, which serves as a foundation for generating training data as well as for the further development of measurement, localization, and filtering methods."}],"doi":"10.17619/UNIPB/1-2436","main_file_link":[{"url":"https://digital.ub.uni-paderborn.de/hs/content/titleinfo/8122147","open_access":"1"}],"language":[{"iso":"ger"}],"publication_status":"published","date_updated":"2025-11-12T10:15:29Z","year":"2025","title":"Analyse und Modellierung eines induktiven Ortungsprozesses unter Berücksichtigung der elektromagnetischen Wechselwirkungen planarer Spulensysteme","author":[{"last_name":"Lange","orcid":"0009-0007-9150-2266 ","first_name":"Sven","full_name":"Lange, Sven","id":"38240"}]},{"user_id":"15578","_id":"62247","language":[{"iso":"eng"}],"date_updated":"2025-11-19T09:15:02Z","author":[{"last_name":"Werner","first_name":"Felix","full_name":"Werner, Felix"}],"title":"Monoton erreichbarer Delaunaygraph","status":"public","year":"2025","department":[{"_id":"34"},{"_id":"7"},{"_id":"79"}],"type":"bachelorsthesis","date_created":"2025-11-19T09:13:37Z","citation":{"chicago":"Werner, Felix. <i>Monoton Erreichbarer Delaunaygraph</i>, 2025.","short":"F. Werner, Monoton Erreichbarer Delaunaygraph, 2025.","apa":"Werner, F. (2025). <i>Monoton erreichbarer Delaunaygraph</i>.","ieee":"F. Werner, <i>Monoton erreichbarer Delaunaygraph</i>. 2025.","ama":"Werner F. <i>Monoton Erreichbarer Delaunaygraph</i>.; 2025.","bibtex":"@book{Werner_2025, title={Monoton erreichbarer Delaunaygraph}, author={Werner, Felix}, year={2025} }","mla":"Werner, Felix. <i>Monoton Erreichbarer Delaunaygraph</i>. 2025."},"supervisor":[{"id":"20792","full_name":"Scheideler, Christian","first_name":"Christian","last_name":"Scheideler"}]},{"language":[{"iso":"eng"}],"_id":"62126","user_id":"47944","doi":"10.1109/NorCAS66540.2025.11231203","author":[{"id":"47944","last_name":"Iftekhar","first_name":"Mohammed","full_name":"Iftekhar, Mohammed"},{"id":"93634","first_name":"Babak","last_name":"Sadiye","full_name":"Sadiye, Babak"},{"id":"16243","full_name":"Müller, Wolfgang","first_name":"Wolfgang","last_name":"Müller"},{"id":"37144","last_name":"Scheytt","first_name":"J. Christoph","orcid":"0000-0002-5950-6618 ","full_name":"Scheytt, J. Christoph"}],"conference":{"location":"Riga, Latvia","name":"IEEE Nordic Circuits and Systems Conference (NORCAS)","start_date":"2025-10-28","end_date":"2025-10-29"},"status":"public","year":"2025","title":"A 50 Gbps Reference-less NRZ Full-rate Bang-Bang CDR with Automatic Frequency Acquisition in 130 nm SiGe:C BiCMOS Technology","date_updated":"2025-11-20T10:34:13Z","date_created":"2025-11-07T10:41:45Z","department":[{"_id":"58"}],"type":"conference","citation":{"apa":"Iftekhar, M., Sadiye, B., Müller, W., &#38; Scheytt, J. C. (2025). A 50 Gbps Reference-less NRZ Full-rate Bang-Bang CDR with Automatic Frequency Acquisition in 130 nm SiGe:C BiCMOS Technology. <i>IEEE Nordic Circuits and Systems Conference (NORCAS)</i>. IEEE Nordic Circuits and Systems Conference (NORCAS), Riga, Latvia. <a href=\"https://doi.org/10.1109/NorCAS66540.2025.11231203\">https://doi.org/10.1109/NorCAS66540.2025.11231203</a>","ieee":"M. Iftekhar, B. Sadiye, W. Müller, and J. C. Scheytt, “A 50 Gbps Reference-less NRZ Full-rate Bang-Bang CDR with Automatic Frequency Acquisition in 130 nm SiGe:C BiCMOS Technology,” presented at the IEEE Nordic Circuits and Systems Conference (NORCAS), Riga, Latvia, 2025, doi: <a href=\"https://doi.org/10.1109/NorCAS66540.2025.11231203\">10.1109/NorCAS66540.2025.11231203</a>.","short":"M. Iftekhar, B. Sadiye, W. Müller, J.C. Scheytt, in: IEEE Nordic Circuits and Systems Conference (NORCAS), 2025.","chicago":"Iftekhar, Mohammed, Babak Sadiye, Wolfgang Müller, and J. Christoph Scheytt. “A 50 Gbps Reference-Less NRZ Full-Rate Bang-Bang CDR with Automatic Frequency Acquisition in 130 Nm SiGe:C BiCMOS Technology.” In <i>IEEE Nordic Circuits and Systems Conference (NORCAS)</i>, 2025. <a href=\"https://doi.org/10.1109/NorCAS66540.2025.11231203\">https://doi.org/10.1109/NorCAS66540.2025.11231203</a>.","mla":"Iftekhar, Mohammed, et al. “A 50 Gbps Reference-Less NRZ Full-Rate Bang-Bang CDR with Automatic Frequency Acquisition in 130 Nm SiGe:C BiCMOS Technology.” <i>IEEE Nordic Circuits and Systems Conference (NORCAS)</i>, 2025, doi:<a href=\"https://doi.org/10.1109/NorCAS66540.2025.11231203\">10.1109/NorCAS66540.2025.11231203</a>.","ama":"Iftekhar M, Sadiye B, Müller W, Scheytt JC. A 50 Gbps Reference-less NRZ Full-rate Bang-Bang CDR with Automatic Frequency Acquisition in 130 nm SiGe:C BiCMOS Technology. In: <i>IEEE Nordic Circuits and Systems Conference (NORCAS)</i>. ; 2025. doi:<a href=\"https://doi.org/10.1109/NorCAS66540.2025.11231203\">10.1109/NorCAS66540.2025.11231203</a>","bibtex":"@inproceedings{Iftekhar_Sadiye_Müller_Scheytt_2025, title={A 50 Gbps Reference-less NRZ Full-rate Bang-Bang CDR with Automatic Frequency Acquisition in 130 nm SiGe:C BiCMOS Technology}, DOI={<a href=\"https://doi.org/10.1109/NorCAS66540.2025.11231203\">10.1109/NorCAS66540.2025.11231203</a>}, booktitle={IEEE Nordic Circuits and Systems Conference (NORCAS)}, author={Iftekhar, Mohammed and Sadiye, Babak and Müller, Wolfgang and Scheytt, J. Christoph}, year={2025} }"},"publication":"IEEE Nordic Circuits and Systems Conference (NORCAS)","project":[{"name":"Scale4Edge: Skalierbare Infrastruktur für Edge-Computing","_id":"325"}]},{"date_created":"2025-11-20T11:59:10Z","department":[{"_id":"58"}],"type":"conference","citation":{"ama":"Weizel M, Malavalli Nagaraju HG, Scheytt JC. A 128 GS/s 2x Time-Interleaved Track and Hold Amplifier in 130nm SiGe BiCMOS. In: <i>2025 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)</i>. IEEE; 2025. doi:<a href=\"https://doi.org/10.1109/bcicts63111.2025.11211462\">10.1109/bcicts63111.2025.11211462</a>","bibtex":"@inproceedings{Weizel_Malavalli Nagaraju_Scheytt_2025, title={A 128 GS/s 2x Time-Interleaved Track and Hold Amplifier in 130nm SiGe BiCMOS}, DOI={<a href=\"https://doi.org/10.1109/bcicts63111.2025.11211462\">10.1109/bcicts63111.2025.11211462</a>}, booktitle={2025 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)}, publisher={IEEE}, author={Weizel, Maxim and Malavalli Nagaraju, Harshan Gowda and Scheytt, J. Christoph}, year={2025} }","mla":"Weizel, Maxim, et al. “A 128 GS/s 2x Time-Interleaved Track and Hold Amplifier in 130nm SiGe BiCMOS.” <i>2025 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)</i>, IEEE, 2025, doi:<a href=\"https://doi.org/10.1109/bcicts63111.2025.11211462\">10.1109/bcicts63111.2025.11211462</a>.","short":"M. Weizel, H.G. Malavalli Nagaraju, J.C. Scheytt, in: 2025 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), IEEE, 2025.","chicago":"Weizel, Maxim, Harshan Gowda Malavalli Nagaraju, and J. Christoph Scheytt. “A 128 GS/s 2x Time-Interleaved Track and Hold Amplifier in 130nm SiGe BiCMOS.” In <i>2025 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)</i>. IEEE, 2025. <a href=\"https://doi.org/10.1109/bcicts63111.2025.11211462\">https://doi.org/10.1109/bcicts63111.2025.11211462</a>.","apa":"Weizel, M., Malavalli Nagaraju, H. G., &#38; Scheytt, J. C. (2025). A 128 GS/s 2x Time-Interleaved Track and Hold Amplifier in 130nm SiGe BiCMOS. <i>2025 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)</i>. <a href=\"https://doi.org/10.1109/bcicts63111.2025.11211462\">https://doi.org/10.1109/bcicts63111.2025.11211462</a>","ieee":"M. Weizel, H. G. Malavalli Nagaraju, and J. C. Scheytt, “A 128 GS/s 2x Time-Interleaved Track and Hold Amplifier in 130nm SiGe BiCMOS,” Phoenix, Arizona, USA, 2025, doi: <a href=\"https://doi.org/10.1109/bcicts63111.2025.11211462\">10.1109/bcicts63111.2025.11211462</a>."},"publication":"2025 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","project":[{"name":"SPP 2111; TP: Ultrabreitbandiger Photonisch-Elektronischer Analog-Digital-Wandler (PACE) - Phase 2","_id":"303"},{"name":"FOR 2863: Metrologie für die THz Kommunikation (Meteracom)","_id":"298"},{"name":"FOR 2863:  Metrologie für die THz Kommunikation, TP: Ultrabreitbandige Abtastung","_id":"308"},{"_id":"313","name":"FOR 2863:  Metrologie für die THz Kommunikation, TP C3: Skalierbares THz Transceiver Impairment Modell"}],"publisher":"IEEE","_id":"62270","language":[{"iso":"eng"}],"doi":"10.1109/bcicts63111.2025.11211462","user_id":"44271","conference":{"location":"Phoenix, Arizona, USA"},"author":[{"id":"44271","orcid":"0000-0003-2699-9839","first_name":"Maxim","last_name":"Weizel","full_name":"Weizel, Maxim"},{"first_name":"Harshan Gowda","last_name":"Malavalli Nagaraju","full_name":"Malavalli Nagaraju, Harshan Gowda","id":"84233"},{"last_name":"Scheytt","first_name":"J. Christoph","orcid":"0000-0002-5950-6618 ","full_name":"Scheytt, J. Christoph","id":"37144"}],"year":"2025","status":"public","title":"A 128 GS/s 2x Time-Interleaved Track and Hold Amplifier in 130nm SiGe BiCMOS","date_updated":"2025-11-20T12:02:26Z","publication_status":"published"},{"date_updated":"2025-11-20T12:46:44Z","author":[{"id":"63972","first_name":"Kai Arne","last_name":"Hannemann","full_name":"Hannemann, Kai Arne"},{"full_name":"Bütün, Hüseyin Berke","last_name":"Bütün","first_name":"Hüseyin Berke"},{"first_name":"Wolfgang","last_name":"Müller","full_name":"Müller, Wolfgang","id":"16243"},{"id":"37144","full_name":"Scheytt, J. Christoph","first_name":"J. Christoph","orcid":"0000-0002-5950-6618 ","last_name":"Scheytt"}],"publication_identifier":{"isbn":["978-3-8007-6515-7"]},"title":"Verilator and FireSim RTL Simulations on a HPC Cluster: A Comparative Case Study","status":"public","year":"2025","user_id":"16243","publisher":"VDE Verlag","_id":"58856","language":[{"iso":"eng"}],"project":[{"name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"citation":{"ama":"Hannemann KA, Bütün HB, Müller W, Scheytt JC. Verilator and FireSim RTL Simulations on a HPC Cluster: A Comparative Case Study. In: <i>MBMV 2025 - 28. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen</i>. VDE Verlag; 2025.","bibtex":"@inproceedings{Hannemann_Bütün_Müller_Scheytt_2025, place={Warnemünde}, title={Verilator and FireSim RTL Simulations on a HPC Cluster: A Comparative Case Study}, booktitle={MBMV 2025 - 28. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen}, publisher={VDE Verlag}, author={Hannemann, Kai Arne and Bütün, Hüseyin Berke and Müller, Wolfgang and Scheytt, J. Christoph}, year={2025} }","mla":"Hannemann, Kai Arne, et al. “Verilator and FireSim RTL Simulations on a HPC Cluster: A Comparative Case Study.” <i>MBMV 2025 - 28. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen</i>, VDE Verlag, 2025.","chicago":"Hannemann, Kai Arne, Hüseyin Berke Bütün, Wolfgang Müller, and J. Christoph Scheytt. “Verilator and FireSim RTL Simulations on a HPC Cluster: A Comparative Case Study.” In <i>MBMV 2025 - 28. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen</i>. Warnemünde: VDE Verlag, 2025.","short":"K.A. Hannemann, H.B. Bütün, W. Müller, J.C. Scheytt, in: MBMV 2025 - 28. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen, VDE Verlag, Warnemünde, 2025.","apa":"Hannemann, K. A., Bütün, H. B., Müller, W., &#38; Scheytt, J. C. (2025). Verilator and FireSim RTL Simulations on a HPC Cluster: A Comparative Case Study. <i>MBMV 2025 - 28. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen</i>.","ieee":"K. A. Hannemann, H. B. Bütün, W. Müller, and J. C. Scheytt, “Verilator and FireSim RTL Simulations on a HPC Cluster: A Comparative Case Study,” 2025."},"publication":"MBMV 2025 - 28. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen","department":[{"_id":"58"}],"type":"conference","place":"Warnemünde","date_created":"2025-02-26T14:33:18Z"},{"date_created":"2025-11-20T10:15:20Z","type":"mastersthesis","department":[{"_id":"78"}],"citation":{"bibtex":"@book{Bengaluru Amarnath_2025, title={Design and Integration of Intra-Process Communication for ROS 2 into ReconROS}, publisher={Paderborn University}, author={Bengaluru Amarnath, Prajwal}, year={2025} }","chicago":"Bengaluru Amarnath, Prajwal. <i>Design and Integration of Intra-Process Communication for ROS 2 into ReconROS</i>. Paderborn University, 2025.","short":"P. Bengaluru Amarnath, Design and Integration of Intra-Process Communication for ROS 2 into ReconROS, Paderborn University, 2025.","ama":"Bengaluru Amarnath P. <i>Design and Integration of Intra-Process Communication for ROS 2 into ReconROS</i>. Paderborn University; 2025.","ieee":"P. Bengaluru Amarnath, <i>Design and Integration of Intra-Process Communication for ROS 2 into ReconROS</i>. Paderborn University, 2025.","apa":"Bengaluru Amarnath, P. (2025). <i>Design and Integration of Intra-Process Communication for ROS 2 into ReconROS</i>. Paderborn University.","mla":"Bengaluru Amarnath, Prajwal. <i>Design and Integration of Intra-Process Communication for ROS 2 into ReconROS</i>. Paderborn University, 2025."},"supervisor":[{"full_name":"Platzner, Marco","first_name":"Marco","last_name":"Platzner","id":"398"},{"id":"68801","full_name":"Nowosad, Alexander Philipp","last_name":"Nowosad","orcid":"0009-0009-3783-3843","first_name":"Alexander Philipp"}],"_id":"62268","language":[{"iso":"eng"}],"publisher":"Paderborn University","user_id":"68801","year":"2025","status":"public","title":"Design and Integration of Intra-Process Communication for ROS 2 into ReconROS","author":[{"full_name":"Bengaluru Amarnath, Prajwal","first_name":"Prajwal","last_name":"Bengaluru Amarnath"}],"date_updated":"2025-11-20T10:17:09Z"},{"citation":{"apa":"Jagnow, J., Stöhr, B., Bernijazov, R., Koldewey, C., &#38; Dumitrescu, R. (2025). Circular product design: a literature-based identification of challenges from the perspective of product designers. <i>Proceedings of the Design Society</i>, <i>5</i>, 931–940. <a href=\"https://doi.org/10.1017/pds.2025.10107\">https://doi.org/10.1017/pds.2025.10107</a>","ieee":"J. Jagnow, B. Stöhr, R. Bernijazov, C. Koldewey, and R. Dumitrescu, “Circular product design: a literature-based identification of challenges from the perspective of product designers,” in <i>Proceedings of the Design Society</i>, 2025, vol. 5, pp. 931–940, doi: <a href=\"https://doi.org/10.1017/pds.2025.10107\">10.1017/pds.2025.10107</a>.","short":"J. Jagnow, B. Stöhr, R. Bernijazov, C. Koldewey, R. Dumitrescu, in: Proceedings of the Design Society, Cambridge University Press (CUP), 2025, pp. 931–940.","chicago":"Jagnow, Jan, Bernd Stöhr, Ruslan Bernijazov, Christian Koldewey, and Roman Dumitrescu. “Circular Product Design: A Literature-Based Identification of Challenges from the Perspective of Product Designers.” In <i>Proceedings of the Design Society</i>, 5:931–40. Cambridge University Press (CUP), 2025. <a href=\"https://doi.org/10.1017/pds.2025.10107\">https://doi.org/10.1017/pds.2025.10107</a>.","mla":"Jagnow, Jan, et al. “Circular Product Design: A Literature-Based Identification of Challenges from the Perspective of Product Designers.” <i>Proceedings of the Design Society</i>, vol. 5, Cambridge University Press (CUP), 2025, pp. 931–40, doi:<a href=\"https://doi.org/10.1017/pds.2025.10107\">10.1017/pds.2025.10107</a>.","ama":"Jagnow J, Stöhr B, Bernijazov R, Koldewey C, Dumitrescu R. Circular product design: a literature-based identification of challenges from the perspective of product designers. In: <i>Proceedings of the Design Society</i>. Vol 5. Cambridge University Press (CUP); 2025:931-940. doi:<a href=\"https://doi.org/10.1017/pds.2025.10107\">10.1017/pds.2025.10107</a>","bibtex":"@inproceedings{Jagnow_Stöhr_Bernijazov_Koldewey_Dumitrescu_2025, title={Circular product design: a literature-based identification of challenges from the perspective of product designers}, volume={5}, DOI={<a href=\"https://doi.org/10.1017/pds.2025.10107\">10.1017/pds.2025.10107</a>}, booktitle={Proceedings of the Design Society}, publisher={Cambridge University Press (CUP)}, author={Jagnow, Jan and Stöhr, Bernd and Bernijazov, Ruslan and Koldewey, Christian and Dumitrescu, Roman}, year={2025}, pages={931–940} }"},"status":"public","user_id":"15782","volume":5,"page":"931-940","_id":"61950","publisher":"Cambridge University Press (CUP)","abstract":[{"text":"<jats:title>ABSTRACT:</jats:title><jats:p>The importance of the circular economy as an alternative to today’s prevailing linear economy is recognised in both industry and research. Product designers are having a major influence on this transition by adapting the characteristics of physical products in the early phases of the product development process. However, most products follow a linear approach and are far from being circular. This paper aims to identify the challenges that product designers face when designing circular products. Building on a developed understanding of related terms in circular product design, an exploratory literature review is conducted. The results help to gain an overview and understanding of the challenges that need to be addressed. Therefore, further research directions are derived to support the transition from linear to circular products in the long term.</jats:p>","lang":"eng"}],"publication":"Proceedings of the Design Society","type":"conference","department":[{"_id":"563"}],"date_created":"2025-10-24T06:20:40Z","date_updated":"2025-11-21T10:57:39Z","publication_status":"published","intvolume":"         5","title":"Circular product design: a literature-based identification of challenges from the perspective of product designers","year":"2025","publication_identifier":{"issn":["2732-527X"]},"author":[{"id":"86809","last_name":"Jagnow","first_name":"Jan","full_name":"Jagnow, Jan"},{"id":"92892","full_name":"Stöhr, Bernd","last_name":"Stöhr","first_name":"Bernd"},{"full_name":"Bernijazov, Ruslan","last_name":"Bernijazov","first_name":"Ruslan"},{"id":"43136","full_name":"Koldewey, Christian","first_name":"Christian","orcid":"https://orcid.org/0000-0001-7992-6399","last_name":"Koldewey"},{"full_name":"Dumitrescu, Roman","last_name":"Dumitrescu","first_name":"Roman","id":"16190"}],"doi":"10.1017/pds.2025.10107","language":[{"iso":"eng"}]}]