--- _id: '17044' author: - first_name: Thomas full_name: Leitz, Thomas last_name: Leitz - first_name: Sina full_name: Ober-Blöbaum, Sina last_name: Ober-Blöbaum - first_name: Sigrid full_name: Leyendecker, Sigrid last_name: Leyendecker citation: ama: 'Leitz T, Ober-Blöbaum S, Leyendecker S. Variational Lie Group Formulation of Geometrically Exact Beam Dynamics: Synchronous and Asynchronous Integration. In: Terze Z, ed. Multibody Dynamics. Cham: Springer; 2014. doi:10.1007/978-3-319-07260-9' apa: 'Leitz, T., Ober-Blöbaum, S., & Leyendecker, S. (2014). Variational Lie Group Formulation of Geometrically Exact Beam Dynamics: Synchronous and Asynchronous Integration. In Z. Terze (Ed.), Multibody Dynamics. Cham: Springer. https://doi.org/10.1007/978-3-319-07260-9' bibtex: '@inbook{Leitz_Ober-Blöbaum_Leyendecker_2014, place={Cham}, title={Variational Lie Group Formulation of Geometrically Exact Beam Dynamics: Synchronous and Asynchronous Integration}, DOI={10.1007/978-3-319-07260-9}, booktitle={Multibody Dynamics}, publisher={Springer}, author={Leitz, Thomas and Ober-Blöbaum, Sina and Leyendecker, Sigrid}, editor={Terze, ZdravkoEditor}, year={2014} }' chicago: 'Leitz, Thomas, Sina Ober-Blöbaum, and Sigrid Leyendecker. “Variational Lie Group Formulation of Geometrically Exact Beam Dynamics: Synchronous and Asynchronous Integration.” In Multibody Dynamics, edited by Zdravko Terze. Cham: Springer, 2014. https://doi.org/10.1007/978-3-319-07260-9.' ieee: 'T. Leitz, S. Ober-Blöbaum, and S. Leyendecker, “Variational Lie Group Formulation of Geometrically Exact Beam Dynamics: Synchronous and Asynchronous Integration,” in Multibody Dynamics, Z. Terze, Ed. Cham: Springer, 2014.' mla: 'Leitz, Thomas, et al. “Variational Lie Group Formulation of Geometrically Exact Beam Dynamics: Synchronous and Asynchronous Integration.” Multibody Dynamics, edited by Zdravko Terze, Springer, 2014, doi:10.1007/978-3-319-07260-9.' short: 'T. Leitz, S. Ober-Blöbaum, S. Leyendecker, in: Z. Terze (Ed.), Multibody Dynamics, Springer, Cham, 2014.' date_created: 2020-05-20T08:28:09Z date_updated: 2022-01-06T06:53:03Z department: - _id: '101' doi: 10.1007/978-3-319-07260-9 editor: - first_name: Zdravko full_name: Terze, Zdravko last_name: Terze language: - iso: eng place: Cham publication: Multibody Dynamics publication_identifier: isbn: - '9783319072593' - '9783319072609' issn: - 1871-3033 publication_status: published publisher: Springer status: public title: 'Variational Lie Group Formulation of Geometrically Exact Beam Dynamics: Synchronous and Asynchronous Integration' type: book_chapter user_id: '47427' year: '2014' ... --- _id: '17045' author: - first_name: Tobias full_name: Gail, Tobias last_name: Gail - first_name: Sigrid full_name: Leyendecker, Sigrid last_name: Leyendecker - first_name: Sina full_name: Ober-Blöbaum, Sina last_name: Ober-Blöbaum citation: ama: 'Gail T, Leyendecker S, Ober-Blöbaum S. On the role of quadrature rules and system dimensions in variational multirateintegrators. In: The 3rdJoint International Conference on Multibody System Dynamics. ; 2014.' apa: Gail, T., Leyendecker, S., & Ober-Blöbaum, S. (2014). On the role of quadrature rules and system dimensions in variational multirateintegrators. In The 3rdJoint International Conference on Multibody System Dynamics. bibtex: '@inproceedings{Gail_Leyendecker_Ober-Blöbaum_2014, title={On the role of quadrature rules and system dimensions in variational multirateintegrators}, booktitle={The 3rdJoint International Conference on Multibody System Dynamics}, author={Gail, Tobias and Leyendecker, Sigrid and Ober-Blöbaum, Sina}, year={2014} }' chicago: Gail, Tobias, Sigrid Leyendecker, and Sina Ober-Blöbaum. “On the Role of Quadrature Rules and System Dimensions in Variational Multirateintegrators.” In The 3rdJoint International Conference on Multibody System Dynamics, 2014. ieee: T. Gail, S. Leyendecker, and S. Ober-Blöbaum, “On the role of quadrature rules and system dimensions in variational multirateintegrators,” in The 3rdJoint International Conference on Multibody System Dynamics, 2014. mla: Gail, Tobias, et al. “On the Role of Quadrature Rules and System Dimensions in Variational Multirateintegrators.” The 3rdJoint International Conference on Multibody System Dynamics, 2014. short: 'T. Gail, S. Leyendecker, S. Ober-Blöbaum, in: The 3rdJoint International Conference on Multibody System Dynamics, 2014.' date_created: 2020-05-20T08:32:33Z date_updated: 2022-01-06T06:53:03Z department: - _id: '101' language: - iso: eng publication: The 3rdJoint International Conference on Multibody System Dynamics status: public title: On the role of quadrature rules and system dimensions in variational multirateintegrators type: conference user_id: '47427' year: '2014' ... --- _id: '17046' author: - first_name: Sina full_name: Ober-Blöbaum, Sina last_name: Ober-Blöbaum - first_name: Henning full_name: Lindhorst, Henning last_name: Lindhorst citation: ama: 'Ober-Blöbaum S, Lindhorst H. Variational formulation and structure-preserving discretization ofnonlinear electric circuits. In: 21st International Symposium on Mathematical Theory of Networks and Systems. ; 2014.' apa: Ober-Blöbaum, S., & Lindhorst, H. (2014). Variational formulation and structure-preserving discretization ofnonlinear electric circuits. In 21st International Symposium on Mathematical Theory of Networks and Systems. bibtex: '@inproceedings{Ober-Blöbaum_Lindhorst_2014, title={Variational formulation and structure-preserving discretization ofnonlinear electric circuits}, booktitle={21st International Symposium on Mathematical Theory of Networks and Systems}, author={Ober-Blöbaum, Sina and Lindhorst, Henning}, year={2014} }' chicago: Ober-Blöbaum, Sina, and Henning Lindhorst. “Variational Formulation and Structure-Preserving Discretization Ofnonlinear Electric Circuits.” In 21st International Symposium on Mathematical Theory of Networks and Systems, 2014. ieee: S. Ober-Blöbaum and H. Lindhorst, “Variational formulation and structure-preserving discretization ofnonlinear electric circuits,” in 21st International Symposium on Mathematical Theory of Networks and Systems, 2014. mla: Ober-Blöbaum, Sina, and Henning Lindhorst. “Variational Formulation and Structure-Preserving Discretization Ofnonlinear Electric Circuits.” 21st International Symposium on Mathematical Theory of Networks and Systems, 2014. short: 'S. Ober-Blöbaum, H. Lindhorst, in: 21st International Symposium on Mathematical Theory of Networks and Systems, 2014.' date_created: 2020-05-20T08:34:17Z date_updated: 2022-01-06T06:53:03Z department: - _id: '101' language: - iso: eng publication: 21st International Symposium on Mathematical Theory of Networks and Systems status: public title: Variational formulation and structure-preserving discretization ofnonlinear electric circuits type: conference user_id: '47427' year: '2014' ... --- _id: '10602' author: - first_name: Lars full_name: Schaefers, Lars last_name: Schaefers - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: Schaefers L, Platzner M. A Novel Technique and its Application to Computer Go. IEEE Transactions on Computational Intelligence and AI in Games. 2014;6(3):361-374. doi:10.1109/TCIAIG.2014.2346997 apa: Schaefers, L., & Platzner, M. (2014). A Novel Technique and its Application to Computer Go. IEEE Transactions on Computational Intelligence and AI in Games, 6(3), 361–374. https://doi.org/10.1109/TCIAIG.2014.2346997 bibtex: '@article{Schaefers_Platzner_2014, title={A Novel Technique and its Application to Computer Go}, volume={6}, DOI={10.1109/TCIAIG.2014.2346997}, number={3}, journal={IEEE Transactions on Computational Intelligence and AI in Games}, author={Schaefers, Lars and Platzner, Marco}, year={2014}, pages={361–374} }' chicago: 'Schaefers, Lars, and Marco Platzner. “A Novel Technique and Its Application to Computer Go.” IEEE Transactions on Computational Intelligence and AI in Games 6, no. 3 (2014): 361–74. https://doi.org/10.1109/TCIAIG.2014.2346997.' ieee: L. Schaefers and M. Platzner, “A Novel Technique and its Application to Computer Go,” IEEE Transactions on Computational Intelligence and AI in Games, vol. 6, no. 3, pp. 361–374, 2014. mla: Schaefers, Lars, and Marco Platzner. “A Novel Technique and Its Application to Computer Go.” IEEE Transactions on Computational Intelligence and AI in Games, vol. 6, no. 3, 2014, pp. 361–74, doi:10.1109/TCIAIG.2014.2346997. short: L. Schaefers, M. Platzner, IEEE Transactions on Computational Intelligence and AI in Games 6 (2014) 361–374. date_created: 2019-07-10T09:22:43Z date_updated: 2022-01-06T06:50:47Z department: - _id: '78' doi: 10.1109/TCIAIG.2014.2346997 intvolume: ' 6' issue: '3' language: - iso: eng page: 361-374 publication: IEEE Transactions on Computational Intelligence and AI in Games status: public title: A Novel Technique and its Application to Computer Go type: journal_article user_id: '3118' volume: 6 year: '2014' ... --- _id: '10603' author: - first_name: Heiner full_name: Giefers, Heiner last_name: Giefers - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: Giefers H, Platzner M. An FPGA-based Reconfigurable Mesh Many-Core. IEEE Transactions on Computers. 2014;63(12):2919-2932. doi:10.1109/TC.2013.174 apa: Giefers, H., & Platzner, M. (2014). An FPGA-based Reconfigurable Mesh Many-Core. IEEE Transactions on Computers, 63(12), 2919–2932. https://doi.org/10.1109/TC.2013.174 bibtex: '@article{Giefers_Platzner_2014, title={An FPGA-based Reconfigurable Mesh Many-Core}, volume={63}, DOI={10.1109/TC.2013.174}, number={12}, journal={IEEE Transactions on Computers}, author={Giefers, Heiner and Platzner, Marco}, year={2014}, pages={2919–2932} }' chicago: 'Giefers, Heiner, and Marco Platzner. “An FPGA-Based Reconfigurable Mesh Many-Core.” IEEE Transactions on Computers 63, no. 12 (2014): 2919–32. https://doi.org/10.1109/TC.2013.174.' ieee: H. Giefers and M. Platzner, “An FPGA-based Reconfigurable Mesh Many-Core,” IEEE Transactions on Computers, vol. 63, no. 12, pp. 2919–2932, 2014. mla: Giefers, Heiner, and Marco Platzner. “An FPGA-Based Reconfigurable Mesh Many-Core.” IEEE Transactions on Computers, vol. 63, no. 12, 2014, pp. 2919–32, doi:10.1109/TC.2013.174. short: H. Giefers, M. Platzner, IEEE Transactions on Computers 63 (2014) 2919–2932. date_created: 2019-07-10T09:22:44Z date_updated: 2022-01-06T06:50:47Z department: - _id: '78' doi: 10.1109/TC.2013.174 intvolume: ' 63' issue: '12' language: - iso: eng page: 2919 - 2932 publication: IEEE Transactions on Computers status: public title: An FPGA-based Reconfigurable Mesh Many-Core type: journal_article user_id: '398' volume: 63 year: '2014' ... --- _id: '10621' author: - first_name: Jahanzeb full_name: Anwer, Jahanzeb last_name: Anwer - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner - first_name: Sebastian full_name: Meisner, Sebastian last_name: Meisner citation: ama: 'Anwer J, Platzner M, Meisner S. FPGA Redundancy Configurations: An Automated Design Space Exploration. In: Reconfigurable Architectures Workshop (RAW). RAW. ; 2014. doi:10.1109/IPDPSW.2014.37' apa: 'Anwer, J., Platzner, M., & Meisner, S. (2014). FPGA Redundancy Configurations: An Automated Design Space Exploration. In Reconfigurable Architectures Workshop (RAW). https://doi.org/10.1109/IPDPSW.2014.37' bibtex: '@inproceedings{Anwer_Platzner_Meisner_2014, series={RAW}, title={FPGA Redundancy Configurations: An Automated Design Space Exploration}, DOI={10.1109/IPDPSW.2014.37}, booktitle={Reconfigurable Architectures Workshop (RAW)}, author={Anwer, Jahanzeb and Platzner, Marco and Meisner, Sebastian}, year={2014}, collection={RAW} }' chicago: 'Anwer, Jahanzeb, Marco Platzner, and Sebastian Meisner. “FPGA Redundancy Configurations: An Automated Design Space Exploration.” In Reconfigurable Architectures Workshop (RAW). RAW, 2014. https://doi.org/10.1109/IPDPSW.2014.37.' ieee: 'J. Anwer, M. Platzner, and S. Meisner, “FPGA Redundancy Configurations: An Automated Design Space Exploration,” in Reconfigurable Architectures Workshop (RAW), 2014.' mla: 'Anwer, Jahanzeb, et al. “FPGA Redundancy Configurations: An Automated Design Space Exploration.” Reconfigurable Architectures Workshop (RAW), 2014, doi:10.1109/IPDPSW.2014.37.' short: 'J. Anwer, M. Platzner, S. Meisner, in: Reconfigurable Architectures Workshop (RAW), 2014.' date_created: 2019-07-10T09:32:58Z date_updated: 2022-01-06T06:50:48Z department: - _id: '78' doi: 10.1109/IPDPSW.2014.37 language: - iso: eng publication: Reconfigurable Architectures Workshop (RAW) series_title: RAW status: public title: 'FPGA Redundancy Configurations: An Automated Design Space Exploration' type: conference user_id: '3118' year: '2014' ... --- _id: '10627' author: - first_name: Arne full_name: Bockhorn, Arne last_name: Bockhorn citation: ama: Bockhorn A. Echtzeit Klassifikation von SEMG Signalen Mit Einem Low-Cost DSP Evaluation Board. Paderborn University; 2014. apa: Bockhorn, A. (2014). Echtzeit Klassifikation von sEMG Signalen mit einem low-cost DSP Evaluation Board. Paderborn University. bibtex: '@book{Bockhorn_2014, title={Echtzeit Klassifikation von sEMG Signalen mit einem low-cost DSP Evaluation Board}, publisher={Paderborn University}, author={Bockhorn, Arne}, year={2014} }' chicago: Bockhorn, Arne. Echtzeit Klassifikation von SEMG Signalen Mit Einem Low-Cost DSP Evaluation Board. Paderborn University, 2014. ieee: A. Bockhorn, Echtzeit Klassifikation von sEMG Signalen mit einem low-cost DSP Evaluation Board. Paderborn University, 2014. mla: Bockhorn, Arne. Echtzeit Klassifikation von SEMG Signalen Mit Einem Low-Cost DSP Evaluation Board. Paderborn University, 2014. short: A. Bockhorn, Echtzeit Klassifikation von SEMG Signalen Mit Einem Low-Cost DSP Evaluation Board, Paderborn University, 2014. date_created: 2019-07-10T09:40:25Z date_updated: 2022-01-06T06:50:48Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public supervisor: - first_name: Alexander full_name: Boschmann, Alexander last_name: Boschmann title: Echtzeit Klassifikation von sEMG Signalen mit einem low-cost DSP Evaluation Board type: bachelorsthesis user_id: '3118' year: '2014' ... --- _id: '10632' author: - first_name: Alexander full_name: Boschmann, Alexander last_name: Boschmann - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Boschmann A, Platzner M. A computer vision-based approach to high density EMG pattern recognition using structural similarity. In: Proc. MyoElectric Controls Symposium (MEC). ; 2014.' apa: Boschmann, A., & Platzner, M. (2014). A computer vision-based approach to high density EMG pattern recognition using structural similarity. In Proc. MyoElectric Controls Symposium (MEC). bibtex: '@inproceedings{Boschmann_Platzner_2014, title={A computer vision-based approach to high density EMG pattern recognition using structural similarity}, booktitle={Proc. MyoElectric Controls Symposium (MEC)}, author={Boschmann, Alexander and Platzner, Marco}, year={2014} }' chicago: Boschmann, Alexander, and Marco Platzner. “A Computer Vision-Based Approach to High Density EMG Pattern Recognition Using Structural Similarity.” In Proc. MyoElectric Controls Symposium (MEC), 2014. ieee: A. Boschmann and M. Platzner, “A computer vision-based approach to high density EMG pattern recognition using structural similarity,” in Proc. MyoElectric Controls Symposium (MEC), 2014. mla: Boschmann, Alexander, and Marco Platzner. “A Computer Vision-Based Approach to High Density EMG Pattern Recognition Using Structural Similarity.” Proc. MyoElectric Controls Symposium (MEC), 2014. short: 'A. Boschmann, M. Platzner, in: Proc. MyoElectric Controls Symposium (MEC), 2014.' date_created: 2019-07-10T11:02:58Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' language: - iso: eng publication: Proc. MyoElectric Controls Symposium (MEC) status: public title: A computer vision-based approach to high density EMG pattern recognition using structural similarity type: conference user_id: '3118' year: '2014' ... --- _id: '10633' author: - first_name: Alexander full_name: Boschmann, Alexander last_name: Boschmann - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Boschmann A, Platzner M. Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity. In: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC). ; 2014.' apa: 'Boschmann, A., & Platzner, M. (2014). Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity. In Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC).' bibtex: '@inproceedings{Boschmann_Platzner_2014, title={Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity}, booktitle={Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC)}, author={Boschmann, Alexander and Platzner, Marco}, year={2014} }' chicago: 'Boschmann, Alexander, and Marco Platzner. “Towards Robust HD EMG Pattern Recognition: Reducing Electrode Displacement Effect Using Structural Similarity.” In Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2014.' ieee: 'A. Boschmann and M. Platzner, “Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity,” in Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2014.' mla: 'Boschmann, Alexander, and Marco Platzner. “Towards Robust HD EMG Pattern Recognition: Reducing Electrode Displacement Effect Using Structural Similarity.” Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2014.' short: 'A. Boschmann, M. Platzner, in: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2014.' date_created: 2019-07-10T11:02:59Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' language: - iso: eng publication: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC) status: public title: 'Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity' type: conference user_id: '3118' year: '2014' ... --- _id: '10640' author: - first_name: Marcel full_name: Brand, Marcel last_name: Brand citation: ama: Brand M. A Generalized Loop Accelerator Implemented as a Coarse-Grained Array. Paderborn University; 2014. apa: Brand, M. (2014). A Generalized Loop Accelerator Implemented as a Coarse-Grained Array. Paderborn University. bibtex: '@book{Brand_2014, title={A Generalized Loop Accelerator Implemented as a Coarse-Grained Array}, publisher={Paderborn University}, author={Brand, Marcel}, year={2014} }' chicago: Brand, Marcel. A Generalized Loop Accelerator Implemented as a Coarse-Grained Array. Paderborn University, 2014. ieee: M. Brand, A Generalized Loop Accelerator Implemented as a Coarse-Grained Array. Paderborn University, 2014. mla: Brand, Marcel. A Generalized Loop Accelerator Implemented as a Coarse-Grained Array. Paderborn University, 2014. short: M. Brand, A Generalized Loop Accelerator Implemented as a Coarse-Grained Array, Paderborn University, 2014. date_created: 2019-07-10T11:03:41Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public title: A Generalized Loop Accelerator Implemented as a Coarse-Grained Array type: mastersthesis user_id: '3118' year: '2014' ... --- _id: '10645' author: - first_name: Marvin full_name: Damschen, Marvin last_name: Damschen citation: ama: Damschen M. Easy-to-Use-on-the-Fly Binary Program Acceleration on Many-Cores. Paderborn University; 2014. apa: Damschen, M. (2014). Easy-to-use-on-the-fly binary program acceleration on many-cores. Paderborn University. bibtex: '@book{Damschen_2014, title={Easy-to-use-on-the-fly binary program acceleration on many-cores}, publisher={Paderborn University}, author={Damschen, Marvin}, year={2014} }' chicago: Damschen, Marvin. Easy-to-Use-on-the-Fly Binary Program Acceleration on Many-Cores. Paderborn University, 2014. ieee: M. Damschen, Easy-to-use-on-the-fly binary program acceleration on many-cores. Paderborn University, 2014. mla: Damschen, Marvin. Easy-to-Use-on-the-Fly Binary Program Acceleration on Many-Cores. Paderborn University, 2014. short: M. Damschen, Easy-to-Use-on-the-Fly Binary Program Acceleration on Many-Cores, Paderborn University, 2014. date_created: 2019-07-10T11:08:47Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public title: Easy-to-use-on-the-fly binary program acceleration on many-cores type: mastersthesis user_id: '3118' year: '2014' ... --- _id: '10654' author: - first_name: Kyrre full_name: Glette, Kyrre last_name: Glette - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann citation: ama: 'Glette K, Kaufmann P. Lookup Table Partial Reconfiguration for an Evolvable Hardware Classifier System. In: IEEE Congress on Evolutionary Computation (CEC). ; 2014.' apa: Glette, K., & Kaufmann, P. (2014). Lookup Table Partial Reconfiguration for an Evolvable Hardware Classifier System. In IEEE Congress on Evolutionary Computation (CEC). bibtex: '@inproceedings{Glette_Kaufmann_2014, title={Lookup Table Partial Reconfiguration for an Evolvable Hardware Classifier System}, booktitle={IEEE Congress on Evolutionary Computation (CEC)}, author={Glette, Kyrre and Kaufmann, Paul}, year={2014} }' chicago: Glette, Kyrre, and Paul Kaufmann. “Lookup Table Partial Reconfiguration for an Evolvable Hardware Classifier System.” In IEEE Congress on Evolutionary Computation (CEC), 2014. ieee: K. Glette and P. Kaufmann, “Lookup Table Partial Reconfiguration for an Evolvable Hardware Classifier System,” in IEEE Congress on Evolutionary Computation (CEC), 2014. mla: Glette, Kyrre, and Paul Kaufmann. “Lookup Table Partial Reconfiguration for an Evolvable Hardware Classifier System.” IEEE Congress on Evolutionary Computation (CEC), 2014. short: 'K. Glette, P. Kaufmann, in: IEEE Congress on Evolutionary Computation (CEC), 2014.' date_created: 2019-07-10T11:13:14Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' publication: IEEE Congress on Evolutionary Computation (CEC) status: public title: Lookup Table Partial Reconfiguration for an Evolvable Hardware Classifier System type: conference user_id: '3118' year: '2014' ... --- _id: '10665' author: - first_name: Christoph full_name: Hagedorn, Christoph last_name: Hagedorn citation: ama: Hagedorn C. Entwicklung Einer Codegrößenoptimierten Softwarebibliothek Für 8-Bit Mikrocontroller in Netzunabhängigen Notleuchten. Paderborn University; 2014. apa: Hagedorn, C. (2014). Entwicklung einer codegrößenoptimierten Softwarebibliothek für 8-Bit Mikrocontroller in netzunabhängigen Notleuchten. Paderborn University. bibtex: '@book{Hagedorn_2014, title={Entwicklung einer codegrößenoptimierten Softwarebibliothek für 8-Bit Mikrocontroller in netzunabhängigen Notleuchten}, publisher={Paderborn University}, author={Hagedorn, Christoph}, year={2014} }' chicago: Hagedorn, Christoph. Entwicklung Einer Codegrößenoptimierten Softwarebibliothek Für 8-Bit Mikrocontroller in Netzunabhängigen Notleuchten. Paderborn University, 2014. ieee: C. Hagedorn, Entwicklung einer codegrößenoptimierten Softwarebibliothek für 8-Bit Mikrocontroller in netzunabhängigen Notleuchten. Paderborn University, 2014. mla: Hagedorn, Christoph. Entwicklung Einer Codegrößenoptimierten Softwarebibliothek Für 8-Bit Mikrocontroller in Netzunabhängigen Notleuchten. Paderborn University, 2014. short: C. Hagedorn, Entwicklung Einer Codegrößenoptimierten Softwarebibliothek Für 8-Bit Mikrocontroller in Netzunabhängigen Notleuchten, Paderborn University, 2014. date_created: 2019-07-10T11:15:09Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public supervisor: - first_name: Sebastian full_name: Meisner, Sebastian last_name: Meisner title: Entwicklung einer codegrößenoptimierten Softwarebibliothek für 8-Bit Mikrocontroller in netzunabhängigen Notleuchten type: bachelorsthesis user_id: '3118' year: '2014' ... --- _id: '10674' author: - first_name: Nam full_name: Ho, Nam last_name: Ho - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Ho N, Kaufmann P, Platzner M. A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms. In: 24th Intl. Conf. on Field Programmable Logic and Applications (FPL). ; 2014:1-4. doi:10.1109/FPL.2014.6927437' apa: Ho, N., Kaufmann, P., & Platzner, M. (2014). A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms. In 24th Intl. Conf. on Field Programmable Logic and Applications (FPL) (pp. 1–4). https://doi.org/10.1109/FPL.2014.6927437 bibtex: '@inproceedings{Ho_Kaufmann_Platzner_2014, title={A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms}, DOI={10.1109/FPL.2014.6927437}, booktitle={24th Intl. Conf. on Field Programmable Logic and Applications (FPL)}, author={Ho, Nam and Kaufmann, Paul and Platzner, Marco}, year={2014}, pages={1–4} }' chicago: Ho, Nam, Paul Kaufmann, and Marco Platzner. “A Hardware/Software Infrastructure for Performance Monitoring on LEON3 Multicore Platforms.” In 24th Intl. Conf. on Field Programmable Logic and Applications (FPL), 1–4, 2014. https://doi.org/10.1109/FPL.2014.6927437. ieee: N. Ho, P. Kaufmann, and M. Platzner, “A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms,” in 24th Intl. Conf. on Field Programmable Logic and Applications (FPL), 2014, pp. 1–4. mla: Ho, Nam, et al. “A Hardware/Software Infrastructure for Performance Monitoring on LEON3 Multicore Platforms.” 24th Intl. Conf. on Field Programmable Logic and Applications (FPL), 2014, pp. 1–4, doi:10.1109/FPL.2014.6927437. short: 'N. Ho, P. Kaufmann, M. Platzner, in: 24th Intl. Conf. on Field Programmable Logic and Applications (FPL), 2014, pp. 1–4.' date_created: 2019-07-10T11:18:01Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' doi: 10.1109/FPL.2014.6927437 keyword: - Linux - hardware-software codesign - multiprocessing systems - parallel processing - LEON3 multicore platform - Linux kernel - PMU - hardware counters - hardware-software infrastructure - high performance embedded computing - perf_event - performance monitoring unit - Computer architecture - Hardware - Monitoring - Phasor measurement units - Radiation detectors - Registers - Software language: - iso: eng page: 1-4 project: - _id: '31' grant_number: '257906' name: Engineering Proprioception in Computing Systems publication: 24th Intl. Conf. on Field Programmable Logic and Applications (FPL) status: public title: A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms type: conference user_id: '3118' year: '2014' ... --- _id: '10677' author: - first_name: Nam full_name: Ho, Nam last_name: Ho - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Ho N, Kaufmann P, Platzner M. Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure. In: 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES). ; 2014:31-37. doi:10.1109/ICES.2014.7008719' apa: 'Ho, N., Kaufmann, P., & Platzner, M. (2014). Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure. In 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES) (pp. 31–37). https://doi.org/10.1109/ICES.2014.7008719' bibtex: '@inproceedings{Ho_Kaufmann_Platzner_2014, title={Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure}, DOI={10.1109/ICES.2014.7008719}, booktitle={2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES)}, author={Ho, Nam and Kaufmann, Paul and Platzner, Marco}, year={2014}, pages={31–37} }' chicago: 'Ho, Nam, Paul Kaufmann, and Marco Platzner. “Towards Self-Adaptive Caches: A Run-Time Reconfigurable Multi-Core Infrastructure.” In 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES), 31–37, 2014. https://doi.org/10.1109/ICES.2014.7008719.' ieee: 'N. Ho, P. Kaufmann, and M. Platzner, “Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure,” in 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES), 2014, pp. 31–37.' mla: 'Ho, Nam, et al. “Towards Self-Adaptive Caches: A Run-Time Reconfigurable Multi-Core Infrastructure.” 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES), 2014, pp. 31–37, doi:10.1109/ICES.2014.7008719.' short: 'N. Ho, P. Kaufmann, M. Platzner, in: 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES), 2014, pp. 31–37.' date_created: 2019-07-10T11:23:00Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' doi: 10.1109/ICES.2014.7008719 keyword: - Linux - cache storage - embedded systems - granular computing - multiprocessing systems - reconfigurable architectures - Leon3 SPARe processor - custom logic events - evolvable-self-adaptable processor cache - fine granular profiling - integer unit events - measurement infrastructure - microarchitectural events - multicore embedded system - perf_event standard Linux performance measurement interface - processor properties - run-time reconfigurable memory-to-cache address mapping engine - run-time reconfigurable multicore infrastructure - split-level caching - Field programmable gate arrays - Frequency locked loops - Irrigation - Phasor measurement units - Registers - Weaving language: - iso: eng page: 31-37 publication: 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES) status: public title: 'Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure' type: conference user_id: '3118' year: '2014' ... --- _id: '10679' author: - first_name: Fabian full_name: König, Fabian last_name: König citation: ama: König F. EMG-Basierte Simultane Und Proportionale Online-Steuerung Einer Virtuellen Prothese. Paderborn University; 2014. apa: König, F. (2014). EMG-basierte simultane und proportionale Online-Steuerung einer virtuellen Prothese. Paderborn University. bibtex: '@book{König_2014, title={EMG-basierte simultane und proportionale Online-Steuerung einer virtuellen Prothese}, publisher={Paderborn University}, author={König, Fabian}, year={2014} }' chicago: König, Fabian. EMG-Basierte Simultane Und Proportionale Online-Steuerung Einer Virtuellen Prothese. Paderborn University, 2014. ieee: F. König, EMG-basierte simultane und proportionale Online-Steuerung einer virtuellen Prothese. Paderborn University, 2014. mla: König, Fabian. EMG-Basierte Simultane Und Proportionale Online-Steuerung Einer Virtuellen Prothese. Paderborn University, 2014. short: F. König, EMG-Basierte Simultane Und Proportionale Online-Steuerung Einer Virtuellen Prothese, Paderborn University, 2014. date_created: 2019-07-10T11:23:20Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public supervisor: - first_name: Alexander full_name: Boschmann, Alexander last_name: Boschmann title: EMG-basierte simultane und proportionale Online-Steuerung einer virtuellen Prothese type: bachelorsthesis user_id: '3118' year: '2014' ... --- _id: '10701' author: - first_name: Benjamin full_name: Koch, Benjamin last_name: Koch citation: ama: Koch B. Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University; 2014. apa: Koch, B. (2014). Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University. bibtex: '@book{Koch_2014, title={Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA}, publisher={Paderborn University}, author={Koch, Benjamin}, year={2014} }' chicago: Koch, Benjamin. Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University, 2014. ieee: B. Koch, Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University, 2014. mla: Koch, Benjamin. Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University, 2014. short: B. Koch, Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014. date_created: 2019-07-10T11:38:27Z date_updated: 2022-01-06T06:50:50Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public supervisor: - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner title: Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA type: mastersthesis user_id: '3118' year: '2014' ... --- _id: '10715' author: - first_name: Robert full_name: Mittendorf, Robert last_name: Mittendorf citation: ama: Mittendorf R. Advanced AES-Key Recovery from Decayed RAM Using Multi-Threading and FPGAs. Paderborn University; 2014. apa: Mittendorf, R. (2014). Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs. Paderborn University. bibtex: '@book{Mittendorf_2014, title={Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs}, publisher={Paderborn University}, author={Mittendorf, Robert}, year={2014} }' chicago: Mittendorf, Robert. Advanced AES-Key Recovery from Decayed RAM Using Multi-Threading and FPGAs. Paderborn University, 2014. ieee: R. Mittendorf, Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs. Paderborn University, 2014. mla: Mittendorf, Robert. Advanced AES-Key Recovery from Decayed RAM Using Multi-Threading and FPGAs. Paderborn University, 2014. short: R. Mittendorf, Advanced AES-Key Recovery from Decayed RAM Using Multi-Threading and FPGAs, Paderborn University, 2014. date_created: 2019-07-10T11:48:26Z date_updated: 2022-01-06T06:50:50Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public title: Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs type: mastersthesis user_id: '3118' year: '2014' ... --- _id: '10732' author: - first_name: Christoph full_name: Rüthing, Christoph last_name: Rüthing citation: ama: Rüthing C. The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores. Paderborn University; 2014. apa: Rüthing, C. (2014). The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores. Paderborn University. bibtex: '@book{Rüthing_2014, title={The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores}, publisher={Paderborn University}, author={Rüthing, Christoph}, year={2014} }' chicago: Rüthing, Christoph. The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores. Paderborn University, 2014. ieee: C. Rüthing, The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores. Paderborn University, 2014. mla: Rüthing, Christoph. The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores. Paderborn University, 2014. short: C. Rüthing, The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores, Paderborn University, 2014. date_created: 2019-07-10T11:58:05Z date_updated: 2022-01-06T06:50:50Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public title: The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores type: bachelorsthesis user_id: '3118' year: '2014' ... --- _id: '10733' abstract: - lang: eng text: "Monte-Carlo Tree Search (MCTS) is a class of simulation-based search algorithms. It brought about great success in the past few years regarding the evaluation of deterministic two-player games such as the Asian board game Go.\r\n\r\nIn this thesis, we present a parallelization of the most popular MCTS variant for large HPC compute clusters that efficiently shares a single game tree representation in a distributed memory environment and scales up to 128 compute nodes and 2048 cores. It is hereby one of the most powerful MCTS parallelizations to date.\r\n\r\nIn order to measure the impact of our parallelization on the search quality and remain comparable to the most advanced MCTS implementations to date, we implemented it in a state-of-the-art Go engine Gomorra, making it competitive with the strongest Go programs in the world.\r\n\r\nWe further present an empirical comparison of different Bayesian ranking systems when being used for predicting expert moves for the game of Go and introduce a novel technique for automated detection and analysis of evaluation uncertainties that show up during MCTS searches." author: - first_name: Lars full_name: Schäfers, Lars last_name: Schäfers citation: ama: 'Schäfers L. Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go. Berlin: Logos Verlag Berlin GmbH; 2014.' apa: 'Schäfers, L. (2014). Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go. Berlin: Logos Verlag Berlin GmbH.' bibtex: '@book{Schäfers_2014, place={Berlin}, title={Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go}, publisher={Logos Verlag Berlin GmbH}, author={Schäfers, Lars}, year={2014} }' chicago: 'Schäfers, Lars. Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go. Berlin: Logos Verlag Berlin GmbH, 2014.' ieee: 'L. Schäfers, Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go. Berlin: Logos Verlag Berlin GmbH, 2014.' mla: Schäfers, Lars. Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go. Logos Verlag Berlin GmbH, 2014. short: L. Schäfers, Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go, Logos Verlag Berlin GmbH, Berlin, 2014. date_created: 2019-07-10T11:58:06Z date_updated: 2022-01-06T06:50:50Z department: - _id: '78' language: - iso: eng page: '133' place: Berlin publication_identifier: isbn: - 978-3-8325-3748-7 publication_status: published publisher: Logos Verlag Berlin GmbH status: public supervisor: - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner title: Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go type: dissertation user_id: '3118' year: '2014' ...