@inproceedings{13008,
  author       = {{Hellebrand, Sybille and Wunderlich, Hans-Joachim and N. Yarmolik, Vyacheslav}},
  booktitle    = {{Design Automation and Test in Europe (DATE'98)}},
  pages        = {{173--179}},
  title        = {{{Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs}}},
  doi          = {{10.1109/date.1998.655853}},
  year         = {{1998}},
}

@inproceedings{13063,
  author       = {{N. Yarmolik, Vyacheslav and V. Klimets, Yuri and Hellebrand, Sybille and Wunderlich, Hans-Joachim}},
  booktitle    = {{Design & Diagnostics of Electronic Circuits & Systems (DDECS'98)}},
  pages        = {{27--33}},
  title        = {{{New Transparent RAM BIST Based on Self-Adjusting Output Data Compression}}},
  year         = {{1998}},
}

@misc{13089,
  author       = {{Tsai, Kun-Han and Hellebrand, Sybille and Rajski, Janusz and Marek-Sadowska, Malgorzata}},
  keywords     = {{WORKSHOP}},
  title        = {{{STARBIST: Scan Autocorrelated Random Pattern Generation}}},
  year         = {{1997}},
}

@misc{13090,
  author       = {{Hertwig, Andre and Hellebrand, Sybille and Wunderlich, Hans-Joachim}},
  keywords     = {{WORKSHOP}},
  title        = {{{Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications}}},
  year         = {{1997}},
}

@inproceedings{13009,
  author       = {{Tsai, Kun-Han and Hellebrand, Sybille and Marek-Sadowska, Malgorzata and Rajski, Janusz}},
  booktitle    = {{34th ACM/IEEE Design Automation Conference (DAC'97)}},
  publisher    = {{IEEE}},
  title        = {{{STARBIST: Scan Autocorrelated Random Pattern Generation}}},
  doi          = {{10.1109/dac.1997.597194}},
  year         = {{1997}},
}

@misc{13087,
  author       = {{Hellebrand, Sybille and Wunderlich, Hans-Joachim}},
  keywords     = {{WORKSHOP}},
  title        = {{{Using Embedded Processors for BIST}}},
  year         = {{1996}},
}

@misc{13088,
  author       = {{Hellebrand, Sybille and Wunderlich, Hans-Joachim and Hertwig, Andre}},
  keywords     = {{WORKSHOP}},
  title        = {{{Mixed-Mode BIST Using Embedded Processors}}},
  year         = {{1996}},
}

@inproceedings{13010,
  author       = {{Hellebrand, Sybille and Wunderlich, Hans-Joachim and Hertwig, Andre}},
  booktitle    = {{IEEE International Test Conference (ITC'96)}},
  pages        = {{195--204}},
  publisher    = {{IEEE}},
  title        = {{{Mixed-Mode BIST Using Embedded Processors}}},
  doi          = {{10.1109/test.1996.556962}},
  year         = {{1996}},
}

@techreport{13026,
  author       = {{Hellebrand, Sybille and Wunderlich, Hans-Joachim}},
  title        = {{{Synthesis Procedures for Self-Testable Controllers}}},
  year         = {{1995}},
}

@techreport{13027,
  author       = {{Hellebrand, Sybille and Wunderlich, Hans-Joachim and Goncalves, F. and Paulo Teixeira, Joao}},
  title        = {{{Evaluation of Self-Testable Controller Architectures Based on Realistic Fault Analysis}}},
  year         = {{1995}},
}

@techreport{13028,
  author       = {{Hellebrand, Sybille and Herzog, Maik and Wunderlich, Hans-Joachim}},
  title        = {{{Partitioning of CMOS-Circuits for On-Chip IDDQ-Testing}}},
  year         = {{1995}},
}

@misc{13086,
  author       = {{Hellebrand, Sybille and Reeb, Birgit and Tarnick, Steffen and Wunderlich, Hans-Joachim}},
  keywords     = {{WORKSHOP}},
  title        = {{{Pattern Generation for a Deterministic BIST Scheme}}},
  year         = {{1995}},
}

@article{13011,
  author       = {{Hellebrand, Sybille and Rajski, Janusz and Tarnick, Steffen and Venkataraman, Srikanth and Courtois, B.}},
  journal      = {{IEEE Transactions on Computers}},
  number       = {{2}},
  pages        = {{223--233}},
  publisher    = {{IEEE}},
  title        = {{{Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers}}},
  doi          = {{10.1109/12.364534}},
  volume       = {{44}},
  year         = {{1995}},
}

@inproceedings{13012,
  author       = {{Hellebrand, Sybille and Reeb, Birgit and Tarnick, Steffen and Wunderlich, Hans-Joachim}},
  booktitle    = {{ACM/IEEE International Conference on Computer Aided Design (ICCAD'95)}},
  pages        = {{88--94}},
  publisher    = {{IEEE}},
  title        = {{{Pattern Generation for a Deterministic BIST Scheme}}},
  doi          = {{10.1109/iccad.1995.479997}},
  year         = {{1995}},
}

@techreport{13024,
  author       = {{Hellebrand, Sybille and Juergensen, Arne and Wunderlich, Hans-Joachim}},
  title        = {{{Synthesis for Off-line Testability}}},
  year         = {{1994}},
}

@techreport{13025,
  author       = {{Hellebrand, Sybille and Juergensen, Arne and Stroele, Albrecht and Wunderlich, Hans-Joachim}},
  title        = {{{Chip Level Test Planning for Controlling the Tradeoff between Hardware Overhead and Test Time}}},
  year         = {{1994}},
}

@misc{13083,
  author       = {{Venkataraman, Srikanth and Rajski, Janusz and Hellebrand, Sybille and Tarnick, Steffen}},
  keywords     = {{WORKSHOP}},
  title        = {{{Effiziente Testsatzkodierung für Prüfpfad-basierte Selbsttestarchitekturen}}},
  year         = {{1994}},
}

@misc{13084,
  author       = {{Hellebrand, Sybille and Wunderlich, Hans-Joachim}},
  keywords     = {{WORKSHOP}},
  title        = {{{Ein Verfahren zur testfreundlichen Steuerwerkssynthese}}},
  year         = {{1994}},
}

@misc{13085,
  author       = {{Hellebrand, Sybille and Paulo Teixeira, Joao and Wunderlich, Hans-Joachim}},
  keywords     = {{WORKSHOP}},
  title        = {{{Synthesis for Testability - the ARCHIMEDES Approach}}},
  year         = {{1994}},
}

@inproceedings{13014,
  author       = {{Hellebrand, Sybille and Wunderlich, Hans-Joachim}},
  booktitle    = {{ACM/IEEE International Conference on Computer-Aided Design (ICCAD'94)}},
  pages        = {{110--116}},
  publisher    = {{IEEE}},
  title        = {{{An Efficient Procedure for the Synthesis of Fast Self-Testable Controller Structures}}},
  doi          = {{10.1109/iccad.1994.629752}},
  year         = {{1994}},
}