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Hellebrand, <i>Power Consumption Versus Error Correcting Capabilities in Embedded DRAMs - A Case Study</i>. 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Innsbruck, Austria, 2005."},"title":"Power Consumption Versus Error Correcting Capabilities in Embedded DRAMs - A Case Study","date_updated":"2022-01-06T06:51:28Z","date_created":"2019-08-28T12:23:10Z","author":[{"last_name":"Oehler","full_name":"Oehler, Philipp","first_name":"Philipp"},{"first_name":"Sybille","id":"209","full_name":"Hellebrand, Sybille","orcid":"0000-0002-3717-3939","last_name":"Hellebrand"}]},{"publication":"IEEE International Conference on Microelectronics (ICM'05)","type":"conference","status":"public","_id":"12999","department":[{"_id":"48"}],"user_id":"209","language":[{"iso":"eng"}],"place":"Islamabad, Pakistan","year":"2005","citation":{"apa":"Ali, M., Welzl, M., Zwicknagl, M., &#38; Hellebrand, S. (2005). Considerations for Fault-Tolerant Networks on Chips. <i>IEEE International Conference on Microelectronics (ICM’05)</i>. <a href=\"https://doi.org/10.1109/icm.2005.1590063\">https://doi.org/10.1109/icm.2005.1590063</a>","short":"M. Ali, M. Welzl, M. Zwicknagl, S. Hellebrand, in: IEEE International Conference on Microelectronics (ICM’05), IEEE, Islamabad, Pakistan, 2005.","mla":"Ali, Muhammad, et al. “Considerations for Fault-Tolerant Networks on Chips.” <i>IEEE International Conference on Microelectronics (ICM’05)</i>, IEEE, 2005, doi:<a href=\"https://doi.org/10.1109/icm.2005.1590063\">10.1109/icm.2005.1590063</a>.","bibtex":"@inproceedings{Ali_Welzl_Zwicknagl_Hellebrand_2005, place={Islamabad, Pakistan}, title={Considerations for Fault-Tolerant Networks on Chips}, DOI={<a href=\"https://doi.org/10.1109/icm.2005.1590063\">10.1109/icm.2005.1590063</a>}, booktitle={IEEE International Conference on Microelectronics (ICM’05)}, publisher={IEEE}, author={Ali, Muhammad and Welzl, Michael and Zwicknagl, Martin and Hellebrand, Sybille}, year={2005} }","ama":"Ali M, Welzl M, Zwicknagl M, Hellebrand S. Considerations for Fault-Tolerant Networks on Chips. In: <i>IEEE International Conference on Microelectronics (ICM’05)</i>. IEEE; 2005. doi:<a href=\"https://doi.org/10.1109/icm.2005.1590063\">10.1109/icm.2005.1590063</a>","ieee":"M. Ali, M. Welzl, M. Zwicknagl, and S. Hellebrand, “Considerations for Fault-Tolerant Networks on Chips,” 2005, doi: <a href=\"https://doi.org/10.1109/icm.2005.1590063\">10.1109/icm.2005.1590063</a>.","chicago":"Ali, Muhammad, Michael Welzl, Martin Zwicknagl, and Sybille Hellebrand. “Considerations for Fault-Tolerant Networks on Chips.” In <i>IEEE International Conference on Microelectronics (ICM’05)</i>. Islamabad, Pakistan: IEEE, 2005. <a href=\"https://doi.org/10.1109/icm.2005.1590063\">https://doi.org/10.1109/icm.2005.1590063</a>."},"date_updated":"2022-05-11T16:39:50Z","publisher":"IEEE","date_created":"2019-08-28T10:20:55Z","author":[{"first_name":"Muhammad","last_name":"Ali","full_name":"Ali, Muhammad"},{"first_name":"Michael","full_name":"Welzl, Michael","last_name":"Welzl"},{"first_name":"Martin","full_name":"Zwicknagl, Martin","last_name":"Zwicknagl"},{"first_name":"Sybille","id":"209","full_name":"Hellebrand, Sybille","last_name":"Hellebrand","orcid":"0000-0002-3717-3939"}],"title":"Considerations for Fault-Tolerant Networks on Chips","doi":"10.1109/icm.2005.1590063"},{"year":"2005","place":"Tallinn, Estonia","citation":{"ama":"Oehler P, Hellebrand S. Low Power Embedded DRAMs with High Quality Error Correcting Capabilities. In: <i>10th IEEE European Test Symposium (ETS’05)</i>. IEEE; 2005:148-153. doi:<a href=\"https://doi.org/10.1109/ets.2005.28\">10.1109/ets.2005.28</a>","chicago":"Oehler, Philipp, and Sybille Hellebrand. “Low Power Embedded DRAMs with High Quality Error Correcting Capabilities.” In <i>10th IEEE European Test Symposium (ETS’05)</i>, 148–53. Tallinn, Estonia: IEEE, 2005. <a href=\"https://doi.org/10.1109/ets.2005.28\">https://doi.org/10.1109/ets.2005.28</a>.","ieee":"P. Oehler and S. Hellebrand, “Low Power Embedded DRAMs with High Quality Error Correcting Capabilities,” in <i>10th IEEE European Test Symposium (ETS’05)</i>, 2005, pp. 148–153, doi: <a href=\"https://doi.org/10.1109/ets.2005.28\">10.1109/ets.2005.28</a>.","apa":"Oehler, P., &#38; Hellebrand, S. (2005). Low Power Embedded DRAMs with High Quality Error Correcting Capabilities. <i>10th IEEE European Test Symposium (ETS’05)</i>, 148–153. <a href=\"https://doi.org/10.1109/ets.2005.28\">https://doi.org/10.1109/ets.2005.28</a>","mla":"Oehler, Philipp, and Sybille Hellebrand. “Low Power Embedded DRAMs with High Quality Error Correcting Capabilities.” <i>10th IEEE European Test Symposium (ETS’05)</i>, IEEE, 2005, pp. 148–53, doi:<a href=\"https://doi.org/10.1109/ets.2005.28\">10.1109/ets.2005.28</a>.","bibtex":"@inproceedings{Oehler_Hellebrand_2005, place={Tallinn, Estonia}, title={Low Power Embedded DRAMs with High Quality Error Correcting Capabilities}, DOI={<a href=\"https://doi.org/10.1109/ets.2005.28\">10.1109/ets.2005.28</a>}, booktitle={10th IEEE European Test Symposium (ETS’05)}, publisher={IEEE}, author={Oehler, Philipp and Hellebrand, Sybille}, year={2005}, pages={148–153} }","short":"P. Oehler, S. Hellebrand, in: 10th IEEE European Test Symposium (ETS’05), IEEE, Tallinn, Estonia, 2005, pp. 148–153."},"page":"148-153","title":"Low Power Embedded DRAMs with High Quality Error Correcting Capabilities","doi":"10.1109/ets.2005.28","date_updated":"2022-05-11T16:40:36Z","publisher":"IEEE","author":[{"first_name":"Philipp","full_name":"Oehler, Philipp","last_name":"Oehler"},{"id":"209","full_name":"Hellebrand, Sybille","orcid":"0000-0002-3717-3939","last_name":"Hellebrand","first_name":"Sybille"}],"date_created":"2019-08-28T10:20:56Z","status":"public","type":"conference","publication":"10th IEEE European Test Symposium (ETS'05)","language":[{"iso":"eng"}],"_id":"13000","user_id":"209","department":[{"_id":"48"}]}]