[{"main_file_link":[{"url":"https://dl.acm.org/doi/10.1145/3576200","open_access":"1"}],"type":"journal_article","year":"2023","citation":{"apa":"Meyer, M., Kenter, T., & Plessl, C. (2023). Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks. ACM Transactions on Reconfigurable Technology and Systems. https://doi.org/10.1145/3576200","ama":"Meyer M, Kenter T, Plessl C. Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks. ACM Transactions on Reconfigurable Technology and Systems. Published online 2023. doi:10.1145/3576200","chicago":"Meyer, Marius, Tobias Kenter, and Christian Plessl. “Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks.” ACM Transactions on Reconfigurable Technology and Systems, 2023. https://doi.org/10.1145/3576200.","bibtex":"@article{Meyer_Kenter_Plessl_2023, title={Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks}, DOI={10.1145/3576200}, journal={ACM Transactions on Reconfigurable Technology and Systems}, publisher={Association for Computing Machinery (ACM)}, author={Meyer, Marius and Kenter, Tobias and Plessl, Christian}, year={2023} }","mla":"Meyer, Marius, et al. “Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks.” ACM Transactions on Reconfigurable Technology and Systems, Association for Computing Machinery (ACM), 2023, doi:10.1145/3576200.","short":"M. Meyer, T. Kenter, C. Plessl, ACM Transactions on Reconfigurable Technology and Systems (2023).","ieee":"M. Meyer, T. Kenter, and C. Plessl, “Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks,” ACM Transactions on Reconfigurable Technology and Systems, 2023, doi: 10.1145/3576200."},"_id":"38041","publisher":"Association for Computing Machinery (ACM)","quality_controlled":"1","author":[{"last_name":"Meyer","id":"40778","first_name":"Marius","full_name":"Meyer, Marius"},{"last_name":"Kenter","id":"3145","first_name":"Tobias","full_name":"Kenter, Tobias"},{"last_name":"Plessl","id":"16153","first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian"}],"publication":"ACM Transactions on Reconfigurable Technology and Systems","keyword":["General Computer Science"],"status":"public","date_created":"2023-01-23T08:40:42Z","abstract":[{"lang":"eng","text":"While FPGA accelerator boards and their respective high-level design tools are maturing, there is still a lack of multi-FPGA applications, libraries, and not least, benchmarks and reference implementations towards sustained HPC usage of these devices. As in the early days of GPUs in HPC, for workloads that can reasonably be decoupled into loosely coupled working sets, multi-accelerator support can be achieved by using standard communication interfaces like MPI on the host side. However, for performance and productivity, some applications can profit from a tighter coupling of the accelerators. FPGAs offer unique opportunities here when extending the dataflow characteristics to their communication interfaces.\r\n In this work, we extend the HPCC FPGA benchmark suite by multi-FPGA support and three missing benchmarks that particularly characterize or stress inter-device communication: b_eff, PTRANS, and LINPACK. With all benchmarks implemented for current boards with Intel and Xilinx FPGAs, we established a baseline for multi-FPGA performance. Additionally, for the communication-centric benchmarks, we explored the potential of direct FPGA-to-FPGA communication with a circuit-switched inter-FPGA network that is currently only available for one of the boards. The evaluation with parallel execution on up to 26 FPGA boards makes use of one of the largest academic FPGA installations."}],"user_id":"24135","language":[{"iso":"eng"}],"date_updated":"2023-07-28T08:02:05Z","oa":"1","doi":"10.1145/3576200","department":[{"_id":"27"},{"_id":"518"}],"project":[{"_id":"52","name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing"},{"name":"SFB 901 - C: SFB 901 - Project Area C","_id":"4"},{"name":"SFB 901: SFB 901","grant_number":"160364472","_id":"1"},{"name":"SFB 901 - C2: SFB 901 - Subproject C2","grant_number":"160364472","_id":"14"}],"publication_status":"published","publication_identifier":{"issn":["1936-7406","1936-7414"]},"title":"Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks"},{"user_id":"3145","ddc":["004"],"file":[{"access_level":"open_access","file_name":"C2-Chapter-SFB-Buch-Final.pdf","date_created":"2023-07-07T08:15:35Z","relation":"main_file","content_type":"application/pdf","date_updated":"2023-07-07T11:17:33Z","creator":"florida","file_id":"45894","file_size":2288788}],"publisher":"Heinz Nixdorf Institut, Universität Paderborn","author":[{"last_name":"Hansmeier","id":"49992","first_name":"Tim","orcid":"0000-0003-1377-3339","full_name":"Hansmeier, Tim"},{"id":"3145","last_name":"Kenter","full_name":"Kenter, Tobias","first_name":"Tobias"},{"last_name":"Meyer","id":"40778","first_name":"Marius","full_name":"Meyer, Marius"},{"last_name":"Riebler","id":"8961","first_name":"Heinrich","full_name":"Riebler, Heinrich"},{"full_name":"Platzner, Marco","first_name":"Marco","id":"398","last_name":"Platzner"},{"full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian","id":"16153","last_name":"Plessl"}],"publication":"On-The-Fly Computing -- Individualized IT-services in dynamic markets","file_date_updated":"2023-07-07T11:17:33Z","has_accepted_license":"1","status":"public","date_created":"2023-07-07T08:15:45Z","volume":412,"intvolume":" 412","_id":"45893","year":"2023","type":"book_chapter","citation":{"apa":"Hansmeier, T., Kenter, T., Meyer, M., Riebler, H., Platzner, M., & Plessl, C. (2023). Compute Centers I: Heterogeneous Execution Environments. In C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, & H. Wehrheim (Eds.), On-The-Fly Computing -- Individualized IT-services in dynamic markets (Vol. 412, pp. 165–182). Heinz Nixdorf Institut, Universität Paderborn. https://doi.org/10.5281/zenodo.8068642","ama":"Hansmeier T, Kenter T, Meyer M, Riebler H, Platzner M, Plessl C. Compute Centers I: Heterogeneous Execution Environments. In: Haake C-J, Meyer auf der Heide F, Platzner M, Wachsmuth H, Wehrheim H, eds. On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets. Vol 412. Verlagsschriftenreihe des Heinz Nixdorf Instituts. Heinz Nixdorf Institut, Universität Paderborn; 2023:165-182. doi:10.5281/zenodo.8068642","chicago":"Hansmeier, Tim, Tobias Kenter, Marius Meyer, Heinrich Riebler, Marco Platzner, and Christian Plessl. “Compute Centers I: Heterogeneous Execution Environments.” In On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets, edited by Claus-Jochen Haake, Friedhelm Meyer auf der Heide, Marco Platzner, Henning Wachsmuth, and Heike Wehrheim, 412:165–82. Verlagsschriftenreihe Des Heinz Nixdorf Instituts. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023. https://doi.org/10.5281/zenodo.8068642.","bibtex":"@inbook{Hansmeier_Kenter_Meyer_Riebler_Platzner_Plessl_2023, place={Paderborn}, series={Verlagsschriftenreihe des Heinz Nixdorf Instituts}, title={Compute Centers I: Heterogeneous Execution Environments}, volume={412}, DOI={10.5281/zenodo.8068642}, booktitle={On-The-Fly Computing -- Individualized IT-services in dynamic markets}, publisher={Heinz Nixdorf Institut, Universität Paderborn}, author={Hansmeier, Tim and Kenter, Tobias and Meyer, Marius and Riebler, Heinrich and Platzner, Marco and Plessl, Christian}, editor={Haake, Claus-Jochen and Meyer auf der Heide, Friedhelm and Platzner, Marco and Wachsmuth, Henning and Wehrheim, Heike}, year={2023}, pages={165–182}, collection={Verlagsschriftenreihe des Heinz Nixdorf Instituts} }","mla":"Hansmeier, Tim, et al. “Compute Centers I: Heterogeneous Execution Environments.” On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets, edited by Claus-Jochen Haake et al., vol. 412, Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 165–82, doi:10.5281/zenodo.8068642.","short":"T. Hansmeier, T. Kenter, M. Meyer, H. Riebler, M. Platzner, C. Plessl, in: C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, H. Wehrheim (Eds.), On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets, Heinz Nixdorf Institut, Universität Paderborn, Paderborn, 2023, pp. 165–182.","ieee":"T. Hansmeier, T. Kenter, M. Meyer, H. Riebler, M. Platzner, and C. Plessl, “Compute Centers I: Heterogeneous Execution Environments,” in On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 165–182."},"page":"165-182","place":"Paderborn","title":"Compute Centers I: Heterogeneous Execution Environments","department":[{"_id":"7"},{"_id":"27"},{"_id":"518"}],"project":[{"grant_number":"160364472","name":"SFB 901: SFB 901: On-The-Fly Computing - Individualisierte IT-Dienstleistungen in dynamischen Märkten ","_id":"1"},{"name":"SFB 901 - C: SFB 901 - Project Area C","_id":"4"},{"grant_number":"160364472","name":"SFB 901 - C2: SFB 901 - On-The-Fly Compute Centers I: Heterogene Ausführungsumgebungen (Subproject C2)","_id":"14"}],"editor":[{"first_name":"Claus-Jochen","full_name":"Haake, Claus-Jochen","last_name":"Haake"},{"first_name":"Friedhelm","full_name":"Meyer auf der Heide, Friedhelm","last_name":"Meyer auf der Heide"},{"full_name":"Platzner, Marco","first_name":"Marco","last_name":"Platzner"},{"first_name":"Henning","full_name":"Wachsmuth, Henning","last_name":"Wachsmuth"},{"first_name":"Heike","full_name":"Wehrheim, Heike","last_name":"Wehrheim"}],"date_updated":"2023-07-28T09:38:14Z","oa":"1","doi":"10.5281/zenodo.8068642","series_title":"Verlagsschriftenreihe des Heinz Nixdorf Instituts","language":[{"iso":"eng"}]},{"_id":"46190","date_updated":"2023-07-28T09:58:06Z","oa":"1","doi":"10.1145/3597031.3597050","main_file_link":[{"url":"https://dl.acm.org/doi/pdf/10.1145/3597031.3597050","open_access":"1"}],"language":[{"iso":"eng"}],"year":"2023","citation":{"short":"J.-O. Opdenhövel, C. Plessl, T. Kenter, in: Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, ACM, 2023.","ieee":"J.-O. Opdenhövel, C. Plessl, and T. Kenter, “Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation,” 2023, doi: 10.1145/3597031.3597050.","apa":"Opdenhövel, J.-O., Plessl, C., & Kenter, T. (2023). Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation. Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. https://doi.org/10.1145/3597031.3597050","ama":"Opdenhövel J-O, Plessl C, Kenter T. Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation. In: Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. ACM; 2023. doi:10.1145/3597031.3597050","chicago":"Opdenhövel, Jan-Oliver, Christian Plessl, and Tobias Kenter. “Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation.” In Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. ACM, 2023. https://doi.org/10.1145/3597031.3597050.","bibtex":"@inproceedings{Opdenhövel_Plessl_Kenter_2023, title={Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation}, DOI={10.1145/3597031.3597050}, booktitle={Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies}, publisher={ACM}, author={Opdenhövel, Jan-Oliver and Plessl, Christian and Kenter, Tobias}, year={2023} }","mla":"Opdenhövel, Jan-Oliver, et al. “Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation.” Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, ACM, 2023, doi:10.1145/3597031.3597050."},"type":"conference","user_id":"3145","title":"Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation","department":[{"_id":"27"},{"_id":"518"}],"publication":"Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies","quality_controlled":"1","author":[{"last_name":"Opdenhövel","first_name":"Jan-Oliver","full_name":"Opdenhövel, Jan-Oliver"},{"orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","first_name":"Christian","id":"16153","last_name":"Plessl"},{"id":"3145","last_name":"Kenter","full_name":"Kenter, Tobias","first_name":"Tobias"}],"publisher":"ACM","date_created":"2023-07-28T09:49:23Z","project":[{"_id":"52","name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"status":"public","publication_status":"published"},{"year":"2023","type":"conference","citation":{"mla":"Faj, Jennifer, et al. “Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes.” Proceedings of the Platform for Advanced Scientific Computing Conference, ACM, 2023, doi:10.1145/3592979.3593407.","bibtex":"@inproceedings{Faj_Kenter_Faghih-Naini_Plessl_Aizinger_2023, title={Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes}, DOI={10.1145/3592979.3593407}, booktitle={Proceedings of the Platform for Advanced Scientific Computing Conference}, publisher={ACM}, author={Faj, Jennifer and Kenter, Tobias and Faghih-Naini, Sara and Plessl, Christian and Aizinger, Vadym}, year={2023} }","chicago":"Faj, Jennifer, Tobias Kenter, Sara Faghih-Naini, Christian Plessl, and Vadym Aizinger. “Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes.” In Proceedings of the Platform for Advanced Scientific Computing Conference. ACM, 2023. https://doi.org/10.1145/3592979.3593407.","ama":"Faj J, Kenter T, Faghih-Naini S, Plessl C, Aizinger V. Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes. In: Proceedings of the Platform for Advanced Scientific Computing Conference. ACM; 2023. doi:10.1145/3592979.3593407","apa":"Faj, J., Kenter, T., Faghih-Naini, S., Plessl, C., & Aizinger, V. (2023). Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes. Proceedings of the Platform for Advanced Scientific Computing Conference. https://doi.org/10.1145/3592979.3593407","ieee":"J. Faj, T. Kenter, S. Faghih-Naini, C. Plessl, and V. Aizinger, “Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes,” 2023, doi: 10.1145/3592979.3593407.","short":"J. Faj, T. Kenter, S. Faghih-Naini, C. Plessl, V. Aizinger, in: Proceedings of the Platform for Advanced Scientific Computing Conference, ACM, 2023."},"language":[{"iso":"eng"}],"main_file_link":[{"open_access":"1","url":"https://dl.acm.org/doi/pdf/10.1145/3592979.3593407"}],"doi":"10.1145/3592979.3593407","oa":"1","date_updated":"2023-07-28T09:48:19Z","_id":"46188","publication_status":"published","status":"public","project":[{"_id":"52","name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"date_created":"2023-07-28T09:42:14Z","publisher":"ACM","quality_controlled":"1","author":[{"first_name":"Jennifer","full_name":"Faj, Jennifer","last_name":"Faj","id":"78722"},{"full_name":"Kenter, Tobias","first_name":"Tobias","id":"3145","last_name":"Kenter"},{"first_name":"Sara","full_name":"Faghih-Naini, Sara","last_name":"Faghih-Naini"},{"id":"16153","last_name":"Plessl","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","first_name":"Christian"},{"first_name":"Vadym","full_name":"Aizinger, Vadym","last_name":"Aizinger"}],"publication":"Proceedings of the Platform for Advanced Scientific Computing Conference","department":[{"_id":"27"},{"_id":"518"}],"title":"Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes","user_id":"3145"},{"main_file_link":[{"open_access":"1","url":"https://dl.acm.org/doi/pdf/10.1145/3592979.3593419"}],"language":[{"iso":"eng"}],"citation":{"short":"C. Prouveur, M. Haefele, T. Kenter, N. Voss, in: Proceedings of the Platform for Advanced Scientific Computing Conference, ACM, 2023.","ieee":"C. Prouveur, M. Haefele, T. Kenter, and N. Voss, “FPGA Acceleration for HPC Supercapacitor Simulations,” 2023, doi: 10.1145/3592979.3593419.","ama":"Prouveur C, Haefele M, Kenter T, Voss N. FPGA Acceleration for HPC Supercapacitor Simulations. In: Proceedings of the Platform for Advanced Scientific Computing Conference. ACM; 2023. doi:10.1145/3592979.3593419","apa":"Prouveur, C., Haefele, M., Kenter, T., & Voss, N. (2023). FPGA Acceleration for HPC Supercapacitor Simulations. Proceedings of the Platform for Advanced Scientific Computing Conference. https://doi.org/10.1145/3592979.3593419","chicago":"Prouveur, Charles, Matthieu Haefele, Tobias Kenter, and Nils Voss. “FPGA Acceleration for HPC Supercapacitor Simulations.” In Proceedings of the Platform for Advanced Scientific Computing Conference. ACM, 2023. https://doi.org/10.1145/3592979.3593419.","bibtex":"@inproceedings{Prouveur_Haefele_Kenter_Voss_2023, title={FPGA Acceleration for HPC Supercapacitor Simulations}, DOI={10.1145/3592979.3593419}, booktitle={Proceedings of the Platform for Advanced Scientific Computing Conference}, publisher={ACM}, author={Prouveur, Charles and Haefele, Matthieu and Kenter, Tobias and Voss, Nils}, year={2023} }","mla":"Prouveur, Charles, et al. “FPGA Acceleration for HPC Supercapacitor Simulations.” Proceedings of the Platform for Advanced Scientific Computing Conference, ACM, 2023, doi:10.1145/3592979.3593419."},"type":"conference","year":"2023","_id":"46189","date_updated":"2023-07-28T09:58:16Z","oa":"1","doi":"10.1145/3592979.3593419","publication":"Proceedings of the Platform for Advanced Scientific Computing Conference","department":[{"_id":"27"},{"_id":"518"}],"quality_controlled":"1","publisher":"ACM","author":[{"last_name":"Prouveur","full_name":"Prouveur, Charles","first_name":"Charles"},{"full_name":"Haefele, Matthieu","first_name":"Matthieu","last_name":"Haefele"},{"full_name":"Kenter, Tobias","first_name":"Tobias","id":"3145","last_name":"Kenter"},{"last_name":"Voss","full_name":"Voss, Nils","first_name":"Nils"}],"project":[{"_id":"52","name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"date_created":"2023-07-28T09:46:25Z","status":"public","publication_status":"published","user_id":"3145","title":"FPGA Acceleration for HPC Supercapacitor Simulations"},{"title":"Computing and Compressing Electron Repulsion Integrals on FPGAs","user_id":"75963","external_id":{"arxiv":["2303.13632"]},"abstract":[{"text":"The computation of electron repulsion integrals (ERIs) over Gaussian-type orbitals (GTOs) is a challenging problem in quantum-mechanics-based atomistic simulations. In practical simulations, several trillions of ERIs may have to be\r\ncomputed for every time step.\r\nIn this work, we investigate FPGAs as accelerators for the ERI computation. We use template parameters, here within the Intel oneAPI tool flow, to create customized designs for 256 different ERI quartet classes, based on their orbitals. To maximize data reuse, all intermediates are buffered in FPGA on-chip memory with customized layout. The pre-calculation of intermediates also helps to overcome data dependencies caused by multi-dimensional recurrence\r\nrelations. The involved loop structures are partially or even fully unrolled for high throughput of FPGA kernels. Furthermore, a lossy compression algorithm utilizing arbitrary bitwidth integers is integrated in the FPGA kernels. To our\r\nbest knowledge, this is the first work on ERI computation on FPGAs that supports more than just the single most basic quartet class. Also, the integration of ERI computation and compression it a novelty that is not even covered by CPU or GPU libraries so far.\r\nOur evaluation shows that using 16-bit integer for the ERI compression, the fastest FPGA kernels exceed the performance of 10 GERIS ($10 \\times 10^9$ ERIs per second) on one Intel Stratix 10 GX 2800 FPGA, with maximum absolute errors around $10^{-7}$ - $10^{-5}$ Hartree. The measured throughput can be accurately explained by a performance model. The FPGA kernels deployed on 2 FPGAs outperform similar computations using the widely used libint reference on a two-socket server with 40 Xeon Gold 6148 CPU cores of the same process technology by factors up to 6.0x and on a new two-socket server with 128 EPYC 7713 CPU cores by up to 1.9x.","lang":"eng"}],"project":[{"_id":"52","name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"date_created":"2023-03-30T11:15:40Z","status":"public","department":[{"_id":"27"},{"_id":"518"}],"publication":"2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)","author":[{"full_name":"Wu, Xin","first_name":"Xin","id":"77439","last_name":"Wu"},{"id":"3145","last_name":"Kenter","full_name":"Kenter, Tobias","first_name":"Tobias"},{"full_name":"Schade, Robert","orcid":"0000-0002-6268-539","first_name":"Robert","id":"75963","last_name":"Schade"},{"last_name":"Kühne","id":"49079","first_name":"Thomas","full_name":"Kühne, Thomas"},{"first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","id":"16153"}],"quality_controlled":"1","doi":"10.1109/FCCM57271.2023.00026","_id":"43228","date_updated":"2023-08-02T15:05:42Z","page":"162-173","type":"conference","year":"2023","citation":{"ieee":"X. Wu, T. Kenter, R. Schade, T. Kühne, and C. Plessl, “Computing and Compressing Electron Repulsion Integrals on FPGAs,” in 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2023, pp. 162–173, doi: 10.1109/FCCM57271.2023.00026.","mla":"Wu, Xin, et al. “Computing and Compressing Electron Repulsion Integrals on FPGAs.” 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2023, pp. 162–73, doi:10.1109/FCCM57271.2023.00026.","bibtex":"@inproceedings{Wu_Kenter_Schade_Kühne_Plessl_2023, title={Computing and Compressing Electron Repulsion Integrals on FPGAs}, DOI={10.1109/FCCM57271.2023.00026}, booktitle={2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)}, author={Wu, Xin and Kenter, Tobias and Schade, Robert and Kühne, Thomas and Plessl, Christian}, year={2023}, pages={162–173} }","ama":"Wu X, Kenter T, Schade R, Kühne T, Plessl C. Computing and Compressing Electron Repulsion Integrals on FPGAs. In: 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). ; 2023:162-173. doi:10.1109/FCCM57271.2023.00026","short":"X. Wu, T. Kenter, R. Schade, T. Kühne, C. Plessl, in: 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2023, pp. 162–173.","apa":"Wu, X., Kenter, T., Schade, R., Kühne, T., & Plessl, C. (2023). Computing and Compressing Electron Repulsion Integrals on FPGAs. 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 162–173. https://doi.org/10.1109/FCCM57271.2023.00026","chicago":"Wu, Xin, Tobias Kenter, Robert Schade, Thomas Kühne, and Christian Plessl. “Computing and Compressing Electron Repulsion Integrals on FPGAs.” In 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 162–73, 2023. https://doi.org/10.1109/FCCM57271.2023.00026."},"language":[{"iso":"eng"}],"main_file_link":[{"url":"https://ieeexplore.ieee.org/document/10171537"}]},{"main_file_link":[{"open_access":"1","url":"https://journals.sagepub.com/doi/10.1177/10943420231177631"}],"type":"journal_article","year":"2023","citation":{"short":"R. Schade, T. Kenter, H. Elgabarty, M. Lass, T. Kühne, C. Plessl, The International Journal of High Performance Computing Applications (2023).","ama":"Schade R, Kenter T, Elgabarty H, Lass M, Kühne T, Plessl C. Breaking the exascale barrier for the electronic structure problem in ab-initio molecular dynamics. The International Journal of High Performance Computing Applications. Published online 2023. doi:10.1177/10943420231177631","apa":"Schade, R., Kenter, T., Elgabarty, H., Lass, M., Kühne, T., & Plessl, C. (2023). Breaking the exascale barrier for the electronic structure problem in ab-initio molecular dynamics. The International Journal of High Performance Computing Applications, Article 109434202311776. https://doi.org/10.1177/10943420231177631","chicago":"Schade, Robert, Tobias Kenter, Hossam Elgabarty, Michael Lass, Thomas Kühne, and Christian Plessl. “Breaking the Exascale Barrier for the Electronic Structure Problem in Ab-Initio Molecular Dynamics.” The International Journal of High Performance Computing Applications, 2023. https://doi.org/10.1177/10943420231177631.","ieee":"R. Schade, T. Kenter, H. Elgabarty, M. Lass, T. Kühne, and C. Plessl, “Breaking the exascale barrier for the electronic structure problem in ab-initio molecular dynamics,” The International Journal of High Performance Computing Applications, Art. no. 109434202311776, 2023, doi: 10.1177/10943420231177631.","mla":"Schade, Robert, et al. “Breaking the Exascale Barrier for the Electronic Structure Problem in Ab-Initio Molecular Dynamics.” The International Journal of High Performance Computing Applications, 109434202311776, SAGE Publications, 2023, doi:10.1177/10943420231177631.","bibtex":"@article{Schade_Kenter_Elgabarty_Lass_Kühne_Plessl_2023, title={Breaking the exascale barrier for the electronic structure problem in ab-initio molecular dynamics}, DOI={10.1177/10943420231177631}, number={109434202311776}, journal={The International Journal of High Performance Computing Applications}, publisher={SAGE Publications}, author={Schade, Robert and Kenter, Tobias and Elgabarty, Hossam and Lass, Michael and Kühne, Thomas and Plessl, Christian}, year={2023} }"},"_id":"45361","article_number":"109434202311776","publisher":"SAGE Publications","author":[{"first_name":"Robert","full_name":"Schade, Robert","orcid":"0000-0002-6268-539","last_name":"Schade","id":"75963"},{"first_name":"Tobias","full_name":"Kenter, Tobias","last_name":"Kenter","id":"3145"},{"first_name":"Hossam","orcid":"0000-0002-4945-1481","full_name":"Elgabarty, Hossam","last_name":"Elgabarty","id":"60250"},{"first_name":"Michael","full_name":"Lass, Michael","orcid":"0000-0002-5708-7632","last_name":"Lass","id":"24135"},{"first_name":"Thomas","full_name":"Kühne, Thomas","last_name":"Kühne","id":"49079"},{"first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","last_name":"Plessl","id":"16153"}],"quality_controlled":"1","keyword":["Hardware and Architecture","Theoretical Computer Science","Software"],"publication":"The International Journal of High Performance Computing Applications","status":"public","date_created":"2023-05-30T09:19:09Z","article_type":"original","abstract":[{"lang":"eng","text":" The non-orthogonal local submatrix method applied to electronic structure–based molecular dynamics simulations is shown to exceed 1.1 EFLOP/s in FP16/FP32-mixed floating-point arithmetic when using 4400 NVIDIA A100 GPUs of the Perlmutter system. This is enabled by a modification of the original method that pushes the sustained fraction of the peak performance to about 80%. Example calculations are performed for SARS-CoV-2 spike proteins with up to 83 million atoms. "}],"user_id":"75963","language":[{"iso":"eng"}],"date_updated":"2023-08-02T15:04:53Z","doi":"10.1177/10943420231177631","oa":"1","department":[{"_id":"27"},{"_id":"518"}],"publication_identifier":{"issn":["1094-3420","1741-2846"]},"publication_status":"published","project":[{"_id":"52","name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"title":"Breaking the exascale barrier for the electronic structure problem in ab-initio molecular dynamics"},{"doi":"10.1007/978-3-031-32041-5_5","_id":"46191","date_updated":"2024-01-22T09:58:49Z","year":"2023","type":"book_chapter","citation":{"ieee":"C. Alt et al., “Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline,” in Lecture Notes in Computer Science, Cham: Springer Nature Switzerland, 2023.","mla":"Alt, Christoph, et al. “Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline.” Lecture Notes in Computer Science, Springer Nature Switzerland, 2023, doi:10.1007/978-3-031-32041-5_5.","bibtex":"@inbook{Alt_Kenter_Faghih-Naini_Faj_Opdenhövel_Plessl_Aizinger_Hönig_Köstler_2023, place={Cham}, title={Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline}, DOI={10.1007/978-3-031-32041-5_5}, booktitle={Lecture Notes in Computer Science}, publisher={Springer Nature Switzerland}, author={Alt, Christoph and Kenter, Tobias and Faghih-Naini, Sara and Faj, Jennifer and Opdenhövel, Jan-Oliver and Plessl, Christian and Aizinger, Vadym and Hönig, Jan and Köstler, Harald}, year={2023} }","apa":"Alt, C., Kenter, T., Faghih-Naini, S., Faj, J., Opdenhövel, J.-O., Plessl, C., Aizinger, V., Hönig, J., & Köstler, H. (2023). Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline. In Lecture Notes in Computer Science. Springer Nature Switzerland. https://doi.org/10.1007/978-3-031-32041-5_5","short":"C. Alt, T. Kenter, S. Faghih-Naini, J. Faj, J.-O. Opdenhövel, C. Plessl, V. Aizinger, J. Hönig, H. Köstler, in: Lecture Notes in Computer Science, Springer Nature Switzerland, Cham, 2023.","ama":"Alt C, Kenter T, Faghih-Naini S, et al. Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline. In: Lecture Notes in Computer Science. Springer Nature Switzerland; 2023. doi:10.1007/978-3-031-32041-5_5","chicago":"Alt, Christoph, Tobias Kenter, Sara Faghih-Naini, Jennifer Faj, Jan-Oliver Opdenhövel, Christian Plessl, Vadym Aizinger, Jan Hönig, and Harald Köstler. “Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline.” In Lecture Notes in Computer Science. Cham: Springer Nature Switzerland, 2023. https://doi.org/10.1007/978-3-031-32041-5_5."},"language":[{"iso":"eng"}],"title":"Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline","user_id":"3145","place":"Cham","publication_identifier":{"isbn":["9783031320408","9783031320415"],"issn":["0302-9743","1611-3349"]},"publication_status":"published","status":"public","date_created":"2023-07-28T09:53:21Z","project":[{"_id":"52","name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"author":[{"last_name":"Alt","id":"100625","first_name":"Christoph","full_name":"Alt, Christoph"},{"last_name":"Kenter","id":"3145","first_name":"Tobias","full_name":"Kenter, Tobias"},{"full_name":"Faghih-Naini, Sara","first_name":"Sara","last_name":"Faghih-Naini"},{"full_name":"Faj, Jennifer","first_name":"Jennifer","id":"78722","last_name":"Faj"},{"last_name":"Opdenhövel","first_name":"Jan-Oliver","full_name":"Opdenhövel, Jan-Oliver"},{"first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","id":"16153"},{"last_name":"Aizinger","full_name":"Aizinger, Vadym","first_name":"Vadym"},{"last_name":"Hönig","full_name":"Hönig, Jan","first_name":"Jan"},{"first_name":"Harald","full_name":"Köstler, Harald","last_name":"Köstler"}],"publisher":"Springer Nature Switzerland","quality_controlled":"1","publication":"Lecture Notes in Computer Science","department":[{"_id":"27"},{"_id":"518"}]},{"type":"preprint","year":"2023","citation":{"short":"L. Van Hirtum, P. De Causmaecker, J. Goemaere, T. Kenter, H. Riebler, M. Lass, C. Plessl, ArXiv:2304.03039 (2023).","ieee":"L. Van Hirtum et al., “A computation of D(9) using FPGA Supercomputing,” arXiv:2304.03039. 2023.","ama":"Van Hirtum L, De Causmaecker P, Goemaere J, et al. A computation of D(9) using FPGA Supercomputing. arXiv:230403039. Published online 2023.","apa":"Van Hirtum, L., De Causmaecker, P., Goemaere, J., Kenter, T., Riebler, H., Lass, M., & Plessl, C. (2023). A computation of D(9) using FPGA Supercomputing. In arXiv:2304.03039.","chicago":"Van Hirtum, Lennart, Patrick De Causmaecker, Jens Goemaere, Tobias Kenter, Heinrich Riebler, Michael Lass, and Christian Plessl. “A Computation of D(9) Using FPGA Supercomputing.” ArXiv:2304.03039, 2023.","mla":"Van Hirtum, Lennart, et al. “A Computation of D(9) Using FPGA Supercomputing.” ArXiv:2304.03039, 2023.","bibtex":"@article{Van Hirtum_De Causmaecker_Goemaere_Kenter_Riebler_Lass_Plessl_2023, title={A computation of D(9) using FPGA Supercomputing}, journal={arXiv:2304.03039}, author={Van Hirtum, Lennart and De Causmaecker, Patrick and Goemaere, Jens and Kenter, Tobias and Riebler, Heinrich and Lass, Michael and Plessl, Christian}, year={2023} }"},"language":[{"iso":"eng"}],"_id":"43439","date_updated":"2024-01-22T09:56:42Z","status":"public","project":[{"_id":"52","name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"date_created":"2023-04-08T11:05:29Z","author":[{"full_name":"Van Hirtum, Lennart","first_name":"Lennart","last_name":"Van Hirtum"},{"last_name":"De Causmaecker","first_name":"Patrick","full_name":"De Causmaecker, Patrick"},{"last_name":"Goemaere","full_name":"Goemaere, Jens","first_name":"Jens"},{"first_name":"Tobias","full_name":"Kenter, Tobias","last_name":"Kenter","id":"3145"},{"full_name":"Riebler, Heinrich","first_name":"Heinrich","id":"8961","last_name":"Riebler"},{"last_name":"Lass","id":"24135","first_name":"Michael","orcid":"0000-0002-5708-7632","full_name":"Lass, Michael"},{"first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","id":"16153"}],"publication":"arXiv:2304.03039","department":[{"_id":"27"},{"_id":"518"}],"title":"A computation of D(9) using FPGA Supercomputing","user_id":"3145","abstract":[{"lang":"eng","text":"This preprint makes the claim of having computed the $9^{th}$ Dedekind\r\nNumber. This was done by building an efficient FPGA Accelerator for the core\r\noperation of the process, and parallelizing it on the Noctua 2 Supercluster at\r\nPaderborn University. The resulting value is\r\n286386577668298411128469151667598498812366. This value can be verified in two\r\nsteps. We have made the data file containing the 490M results available, each\r\nof which can be verified separately on CPU, and the whole file sums to our\r\nproposed value."}],"external_id":{"arxiv":["2304.03039"]}},{"status":"public","date_created":"2022-07-25T18:13:51Z","publisher":"Universität Paderborn","author":[{"full_name":"Lass, Michael","orcid":"0000-0002-5708-7632","first_name":"Michael","id":"24135","last_name":"Lass"}],"department":[{"_id":"27"},{"_id":"518"}],"user_id":"24135","title":"Bringing Massive Parallelism and Hardware Acceleration to Linear Scaling Density Functional Theory Through Targeted Approximations","place":"Paderborn","supervisor":[{"last_name":"Plessl","id":"16153","first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian"}],"language":[{"iso":"eng"}],"year":"2022","type":"dissertation","citation":{"ieee":"M. Lass, Bringing Massive Parallelism and Hardware Acceleration to Linear Scaling Density Functional Theory Through Targeted Approximations. Paderborn: Universität Paderborn, 2022.","short":"M. Lass, Bringing Massive Parallelism and Hardware Acceleration to Linear Scaling Density Functional Theory Through Targeted Approximations, Universität Paderborn, Paderborn, 2022.","mla":"Lass, Michael. Bringing Massive Parallelism and Hardware Acceleration to Linear Scaling Density Functional Theory Through Targeted Approximations. Universität Paderborn, 2022, doi:10.17619/UNIPB/1-1281.","bibtex":"@book{Lass_2022, place={Paderborn}, title={Bringing Massive Parallelism and Hardware Acceleration to Linear Scaling Density Functional Theory Through Targeted Approximations}, DOI={10.17619/UNIPB/1-1281}, publisher={Universität Paderborn}, author={Lass, Michael}, year={2022} }","chicago":"Lass, Michael. Bringing Massive Parallelism and Hardware Acceleration to Linear Scaling Density Functional Theory Through Targeted Approximations. Paderborn: Universität Paderborn, 2022. https://doi.org/10.17619/UNIPB/1-1281.","apa":"Lass, M. (2022). Bringing Massive Parallelism and Hardware Acceleration to Linear Scaling Density Functional Theory Through Targeted Approximations. Universität Paderborn. https://doi.org/10.17619/UNIPB/1-1281","ama":"Lass M. Bringing Massive Parallelism and Hardware Acceleration to Linear Scaling Density Functional Theory Through Targeted Approximations. Universität Paderborn; 2022. doi:10.17619/UNIPB/1-1281"},"doi":"10.17619/UNIPB/1-1281","date_updated":"2022-07-25T18:14:23Z","_id":"32414"},{"date_updated":"2023-07-28T08:03:41Z","_id":"33493","year":"2022","citation":{"ieee":"V. Gavini et al., “Roadmap on Electronic Structure Codes in the Exascale Era,” arXiv:2209.12747. 2022.","short":"V. Gavini, S. Baroni, V. Blum, D.R. Bowler, A. Buccheri, J.R. Chelikowsky, S. Das, W. Dawson, P. Delugas, M. Dogan, C. Draxl, G. Galli, L. Genovese, P. Giannozzi, M. Giantomassi, X. Gonze, M. Govoni, A. Gulans, F. Gygi, J.M. Herbert, S. Kokott, T. Kühne, K.-H. Liou, T. Miyazaki, P. Motamarri, A. Nakata, J.E. Pask, C. Plessl, L.E. Ratcliff, R.M. Richard, M. Rossi, R. Schade, M. Scheffler, O. Schütt, P. Suryanarayana, M. Torrent, L. Truflandier, T.L. Windus, Q. Xu, V.W.-Z. Yu, D. Perez, ArXiv:2209.12747 (2022).","bibtex":"@article{Gavini_Baroni_Blum_Bowler_Buccheri_Chelikowsky_Das_Dawson_Delugas_Dogan_et al._2022, title={Roadmap on Electronic Structure Codes in the Exascale Era}, journal={arXiv:2209.12747}, author={Gavini, Vikram and Baroni, Stefano and Blum, Volker and Bowler, David R. and Buccheri, Alexander and Chelikowsky, James R. and Das, Sambit and Dawson, William and Delugas, Pietro and Dogan, Mehmet and et al.}, year={2022} }","mla":"Gavini, Vikram, et al. “Roadmap on Electronic Structure Codes in the Exascale Era.” ArXiv:2209.12747, 2022.","chicago":"Gavini, Vikram, Stefano Baroni, Volker Blum, David R. Bowler, Alexander Buccheri, James R. Chelikowsky, Sambit Das, et al. “Roadmap on Electronic Structure Codes in the Exascale Era.” ArXiv:2209.12747, 2022.","apa":"Gavini, V., Baroni, S., Blum, V., Bowler, D. R., Buccheri, A., Chelikowsky, J. R., Das, S., Dawson, W., Delugas, P., Dogan, M., Draxl, C., Galli, G., Genovese, L., Giannozzi, P., Giantomassi, M., Gonze, X., Govoni, M., Gulans, A., Gygi, F., … Perez, D. (2022). Roadmap on Electronic Structure Codes in the Exascale Era. In arXiv:2209.12747.","ama":"Gavini V, Baroni S, Blum V, et al. Roadmap on Electronic Structure Codes in the Exascale Era. arXiv:220912747. Published online 2022."},"type":"preprint","language":[{"iso":"eng"}],"title":"Roadmap on Electronic Structure Codes in the Exascale Era","user_id":"24135","abstract":[{"lang":"eng","text":"Electronic structure calculations have been instrumental in providing many\r\nimportant insights into a range of physical and chemical properties of various\r\nmolecular and solid-state systems. Their importance to various fields,\r\nincluding materials science, chemical sciences, computational chemistry and\r\ndevice physics, is underscored by the large fraction of available public\r\nsupercomputing resources devoted to these calculations. As we enter the\r\nexascale era, exciting new opportunities to increase simulation numbers, sizes,\r\nand accuracies present themselves. In order to realize these promises, the\r\ncommunity of electronic structure software developers will however first have\r\nto tackle a number of challenges pertaining to the efficient use of new\r\narchitectures that will rely heavily on massive parallelism and hardware\r\naccelerators. This roadmap provides a broad overview of the state-of-the-art in\r\nelectronic structure calculations and of the various new directions being\r\npursued by the community. It covers 14 electronic structure codes, presenting\r\ntheir current status, their development priorities over the next five years,\r\nand their plans towards tackling the challenges and leveraging the\r\nopportunities presented by the advent of exascale computing."}],"external_id":{"arxiv":["2209.12747"]},"date_created":"2022-09-28T05:25:10Z","project":[{"name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"status":"public","publication":"arXiv:2209.12747","department":[{"_id":"27"},{"_id":"518"}],"author":[{"last_name":"Gavini","full_name":"Gavini, Vikram","first_name":"Vikram"},{"first_name":"Stefano","full_name":"Baroni, Stefano","last_name":"Baroni"},{"first_name":"Volker","full_name":"Blum, Volker","last_name":"Blum"},{"first_name":"David R.","full_name":"Bowler, David R.","last_name":"Bowler"},{"last_name":"Buccheri","full_name":"Buccheri, Alexander","first_name":"Alexander"},{"full_name":"Chelikowsky, James R.","first_name":"James R.","last_name":"Chelikowsky"},{"last_name":"Das","full_name":"Das, Sambit","first_name":"Sambit"},{"last_name":"Dawson","first_name":"William","full_name":"Dawson, William"},{"first_name":"Pietro","full_name":"Delugas, Pietro","last_name":"Delugas"},{"full_name":"Dogan, Mehmet","first_name":"Mehmet","last_name":"Dogan"},{"last_name":"Draxl","full_name":"Draxl, Claudia","first_name":"Claudia"},{"last_name":"Galli","first_name":"Giulia","full_name":"Galli, Giulia"},{"last_name":"Genovese","full_name":"Genovese, Luigi","first_name":"Luigi"},{"first_name":"Paolo","full_name":"Giannozzi, Paolo","last_name":"Giannozzi"},{"full_name":"Giantomassi, Matteo","first_name":"Matteo","last_name":"Giantomassi"},{"last_name":"Gonze","first_name":"Xavier","full_name":"Gonze, Xavier"},{"last_name":"Govoni","first_name":"Marco","full_name":"Govoni, Marco"},{"last_name":"Gulans","full_name":"Gulans, Andris","first_name":"Andris"},{"full_name":"Gygi, François","first_name":"François","last_name":"Gygi"},{"last_name":"Herbert","full_name":"Herbert, John M.","first_name":"John M."},{"last_name":"Kokott","first_name":"Sebastian","full_name":"Kokott, Sebastian"},{"full_name":"Kühne, Thomas","first_name":"Thomas","id":"49079","last_name":"Kühne"},{"last_name":"Liou","first_name":"Kai-Hsin","full_name":"Liou, Kai-Hsin"},{"last_name":"Miyazaki","full_name":"Miyazaki, Tsuyoshi","first_name":"Tsuyoshi"},{"last_name":"Motamarri","full_name":"Motamarri, Phani","first_name":"Phani"},{"full_name":"Nakata, Ayako","first_name":"Ayako","last_name":"Nakata"},{"first_name":"John E.","full_name":"Pask, John E.","last_name":"Pask"},{"orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","first_name":"Christian","id":"16153","last_name":"Plessl"},{"last_name":"Ratcliff","full_name":"Ratcliff, Laura E.","first_name":"Laura E."},{"first_name":"Ryan M.","full_name":"Richard, Ryan M.","last_name":"Richard"},{"last_name":"Rossi","first_name":"Mariana","full_name":"Rossi, Mariana"},{"id":"75963","last_name":"Schade","orcid":"0000-0002-6268-539","full_name":"Schade, Robert","first_name":"Robert"},{"last_name":"Scheffler","full_name":"Scheffler, Matthias","first_name":"Matthias"},{"full_name":"Schütt, Ole","first_name":"Ole","last_name":"Schütt"},{"last_name":"Suryanarayana","first_name":"Phanish","full_name":"Suryanarayana, Phanish"},{"first_name":"Marc","full_name":"Torrent, Marc","last_name":"Torrent"},{"last_name":"Truflandier","full_name":"Truflandier, Lionel","first_name":"Lionel"},{"first_name":"Theresa L.","full_name":"Windus, Theresa L.","last_name":"Windus"},{"first_name":"Qimen","full_name":"Xu, Qimen","last_name":"Xu"},{"last_name":"Yu","first_name":"Victor W. -Z.","full_name":"Yu, Victor W. -Z."},{"last_name":"Perez","full_name":"Perez, Danny","first_name":"Danny"}]},{"doi":"10.1145/3492805.3492808","oa":"1","_id":"46193","date_updated":"2023-07-28T11:53:15Z","citation":{"apa":"Karp, M., Podobas, A., Kenter, T., Jansson, N., Plessl, C., Schlatter, P., & Markidis, S. (2022). A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges. International Conference on High Performance Computing in Asia-Pacific Region. https://doi.org/10.1145/3492805.3492808","ama":"Karp M, Podobas A, Kenter T, et al. A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges. In: International Conference on High Performance Computing in Asia-Pacific Region. ACM; 2022. doi:10.1145/3492805.3492808","chicago":"Karp, Martin, Artur Podobas, Tobias Kenter, Niclas Jansson, Christian Plessl, Philipp Schlatter, and Stefano Markidis. “A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges.” In International Conference on High Performance Computing in Asia-Pacific Region. ACM, 2022. https://doi.org/10.1145/3492805.3492808.","mla":"Karp, Martin, et al. “A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges.” International Conference on High Performance Computing in Asia-Pacific Region, ACM, 2022, doi:10.1145/3492805.3492808.","bibtex":"@inproceedings{Karp_Podobas_Kenter_Jansson_Plessl_Schlatter_Markidis_2022, title={A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges}, DOI={10.1145/3492805.3492808}, booktitle={International Conference on High Performance Computing in Asia-Pacific Region}, publisher={ACM}, author={Karp, Martin and Podobas, Artur and Kenter, Tobias and Jansson, Niclas and Plessl, Christian and Schlatter, Philipp and Markidis, Stefano}, year={2022} }","short":"M. Karp, A. Podobas, T. Kenter, N. Jansson, C. Plessl, P. Schlatter, S. Markidis, in: International Conference on High Performance Computing in Asia-Pacific Region, ACM, 2022.","ieee":"M. Karp et al., “A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges,” 2022, doi: 10.1145/3492805.3492808."},"type":"conference","year":"2022","language":[{"iso":"eng"}],"main_file_link":[{"url":"https://dl.acm.org/doi/pdf/10.1145/3492805.3492808","open_access":"1"}],"title":"A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges","user_id":"3145","publication_status":"published","project":[{"name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"date_created":"2023-07-28T11:51:55Z","status":"public","department":[{"_id":"27"},{"_id":"518"}],"publication":"International Conference on High Performance Computing in Asia-Pacific Region","author":[{"first_name":"Martin","full_name":"Karp, Martin","last_name":"Karp"},{"last_name":"Podobas","first_name":"Artur","full_name":"Podobas, Artur"},{"id":"3145","last_name":"Kenter","full_name":"Kenter, Tobias","first_name":"Tobias"},{"last_name":"Jansson","full_name":"Jansson, Niclas","first_name":"Niclas"},{"last_name":"Plessl","id":"16153","first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982"},{"last_name":"Schlatter","full_name":"Schlatter, Philipp","first_name":"Philipp"},{"last_name":"Markidis","first_name":"Stefano","full_name":"Markidis, Stefano"}],"quality_controlled":"1","publisher":"ACM"},{"type":"preprint","citation":{"mla":"Kühne, Thomas, et al. “CP2K on the Road to Exascale.” ArXiv:2205.14741, 2022.","bibtex":"@article{Kühne_Plessl_Schade_Schütt_2022, title={CP2K on the road to exascale}, journal={arXiv:2205.14741}, author={Kühne, Thomas and Plessl, Christian and Schade, Robert and Schütt, Ole}, year={2022} }","apa":"Kühne, T., Plessl, C., Schade, R., & Schütt, O. (2022). CP2K on the road to exascale. In arXiv:2205.14741.","ama":"Kühne T, Plessl C, Schade R, Schütt O. CP2K on the road to exascale. arXiv:220514741. Published online 2022.","chicago":"Kühne, Thomas, Christian Plessl, Robert Schade, and Ole Schütt. “CP2K on the Road to Exascale.” ArXiv:2205.14741, 2022.","ieee":"T. Kühne, C. Plessl, R. Schade, and O. Schütt, “CP2K on the road to exascale,” arXiv:2205.14741. 2022.","short":"T. Kühne, C. Plessl, R. Schade, O. Schütt, ArXiv:2205.14741 (2022)."},"year":"2022","language":[{"iso":"eng"}],"main_file_link":[{"url":"https://arxiv.org/abs/2205.14741"}],"date_updated":"2023-08-02T14:55:35Z","_id":"32404","project":[{"name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"date_created":"2022-07-22T08:14:08Z","status":"public","department":[{"_id":"27"},{"_id":"518"},{"_id":"304"}],"publication":"arXiv:2205.14741","author":[{"full_name":"Kühne, Thomas","first_name":"Thomas","id":"49079","last_name":"Kühne"},{"id":"16153","last_name":"Plessl","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","first_name":"Christian"},{"orcid":"0000-0002-6268-539","full_name":"Schade, Robert","first_name":"Robert","id":"75963","last_name":"Schade"},{"last_name":"Schütt","first_name":"Ole","full_name":"Schütt, Ole"}],"title":"CP2K on the road to exascale","user_id":"75963","abstract":[{"text":"The CP2K program package, which can be considered as the swiss army knife of\r\natomistic simulations, is presented with a special emphasis on ab-initio\r\nmolecular dynamics using the second-generation Car-Parrinello method. After\r\noutlining current and near-term development efforts with regards to massively\r\nparallel low-scaling post-Hartree-Fock and eigenvalue solvers, novel approaches\r\non how we plan to take full advantage of future low-precision hardware\r\narchitectures are introduced. Our focus here is on combining our submatrix\r\nmethod with the approximate computing paradigm to address the immanent exascale\r\nera.","lang":"eng"}],"external_id":{"arxiv":["2205.14741"]}},{"publication":"Phys. Rev. Research","publisher":"American Physical Society","quality_controlled":"1","author":[{"first_name":"Robert","orcid":"0000-0002-6268-539","full_name":"Schade, Robert","last_name":"Schade","id":"75963"},{"full_name":"Bauer, Carsten","first_name":"Carsten","id":"90082","last_name":"Bauer"},{"id":"50177","last_name":"Tamoev","full_name":"Tamoev, Konstantin","first_name":"Konstantin"},{"last_name":"Mazur","id":"90492","first_name":"Lukas","full_name":"Mazur, Lukas","orcid":" 0000-0001-6304-7082"},{"last_name":"Plessl","id":"16153","first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian"},{"full_name":"Kühne, Thomas","first_name":"Thomas","id":"49079","last_name":"Kühne"}],"volume":4,"date_created":"2022-08-29T14:07:01Z","status":"public","abstract":[{"lang":"eng","text":"A parallel hybrid quantum-classical algorithm for the solution of the quantum-chemical ground-state energy problem on gate-based quantum computers is presented. This approach is based on the reduced density-matrix functional theory (RDMFT) formulation of the electronic structure problem. For that purpose, the density-matrix functional of the full system is decomposed into an indirectly coupled sum of density-matrix functionals for all its subsystems using the adaptive cluster approximation to RDMFT. The approximations involved in the decomposition and the adaptive cluster approximation itself can be systematically converged to the exact result. The solutions for the density-matrix functionals of the effective subsystems involves a constrained minimization over many-particle states that are approximated by parametrized trial states on the quantum computer similarly to the variational quantum eigensolver. The independence of the density-matrix functionals of the effective subsystems introduces a new level of parallelization and allows for the computational treatment of much larger molecules on a quantum computer with a given qubit count. In addition, for the proposed algorithm techniques are presented to reduce the qubit count, the number of quantum programs, as well as its depth. The evaluation of a density-matrix functional as the essential part of our approach is demonstrated for Hubbard-like systems on IBM quantum computers based on superconducting transmon qubits."}],"article_type":"original","user_id":"75963","main_file_link":[{"url":"https://journals.aps.org/prresearch/abstract/10.1103/PhysRevResearch.4.033160","open_access":"1"}],"page":"033160","citation":{"ieee":"R. Schade, C. Bauer, K. Tamoev, L. Mazur, C. Plessl, and T. Kühne, “Parallel quantum chemistry on noisy intermediate-scale quantum computers,” Phys. Rev. Research, vol. 4, p. 033160, 2022, doi: 10.1103/PhysRevResearch.4.033160.","bibtex":"@article{Schade_Bauer_Tamoev_Mazur_Plessl_Kühne_2022, title={Parallel quantum chemistry on noisy intermediate-scale quantum computers}, volume={4}, DOI={10.1103/PhysRevResearch.4.033160}, journal={Phys. Rev. Research}, publisher={American Physical Society}, author={Schade, Robert and Bauer, Carsten and Tamoev, Konstantin and Mazur, Lukas and Plessl, Christian and Kühne, Thomas}, year={2022}, pages={033160} }","mla":"Schade, Robert, et al. “Parallel Quantum Chemistry on Noisy Intermediate-Scale Quantum Computers.” Phys. Rev. Research, vol. 4, American Physical Society, 2022, p. 033160, doi:10.1103/PhysRevResearch.4.033160.","apa":"Schade, R., Bauer, C., Tamoev, K., Mazur, L., Plessl, C., & Kühne, T. (2022). Parallel quantum chemistry on noisy intermediate-scale quantum computers. Phys. Rev. Research, 4, 033160. https://doi.org/10.1103/PhysRevResearch.4.033160","ama":"Schade R, Bauer C, Tamoev K, Mazur L, Plessl C, Kühne T. Parallel quantum chemistry on noisy intermediate-scale quantum computers. Phys Rev Research. 2022;4:033160. doi:10.1103/PhysRevResearch.4.033160","short":"R. Schade, C. Bauer, K. Tamoev, L. Mazur, C. Plessl, T. Kühne, Phys. Rev. Research 4 (2022) 033160.","chicago":"Schade, Robert, Carsten Bauer, Konstantin Tamoev, Lukas Mazur, Christian Plessl, and Thomas Kühne. “Parallel Quantum Chemistry on Noisy Intermediate-Scale Quantum Computers.” Phys. Rev. Research 4 (2022): 033160. https://doi.org/10.1103/PhysRevResearch.4.033160."},"year":"2022","type":"journal_article","intvolume":" 4","_id":"33226","department":[{"_id":"27"},{"_id":"518"}],"publication_status":"published","project":[{"name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"title":"Parallel quantum chemistry on noisy intermediate-scale quantum computers","language":[{"iso":"eng"}],"date_updated":"2023-08-02T15:04:22Z","doi":"10.1103/PhysRevResearch.4.033160","oa":"1"},{"main_file_link":[{"open_access":"1","url":"https://www.sciencedirect.com/science/article/pii/S0167819122000242"}],"type":"journal_article","year":"2022","citation":{"short":"R. Schade, T. Kenter, H. Elgabarty, M. Lass, O. Schütt, A. Lazzaro, H. Pabst, S. Mohr, J. Hutter, T. Kühne, C. Plessl, Parallel Computing 111 (2022).","ieee":"R. Schade et al., “Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms,” Parallel Computing, vol. 111, Art. no. 102920, 2022, doi: 10.1016/j.parco.2022.102920.","chicago":"Schade, Robert, Tobias Kenter, Hossam Elgabarty, Michael Lass, Ole Schütt, Alfio Lazzaro, Hans Pabst, et al. “Towards Electronic Structure-Based Ab-Initio Molecular Dynamics Simulations with Hundreds of Millions of Atoms.” Parallel Computing 111 (2022). https://doi.org/10.1016/j.parco.2022.102920.","apa":"Schade, R., Kenter, T., Elgabarty, H., Lass, M., Schütt, O., Lazzaro, A., Pabst, H., Mohr, S., Hutter, J., Kühne, T., & Plessl, C. (2022). Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms. Parallel Computing, 111, Article 102920. https://doi.org/10.1016/j.parco.2022.102920","ama":"Schade R, Kenter T, Elgabarty H, et al. Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms. Parallel Computing. 2022;111. doi:10.1016/j.parco.2022.102920","mla":"Schade, Robert, et al. “Towards Electronic Structure-Based Ab-Initio Molecular Dynamics Simulations with Hundreds of Millions of Atoms.” Parallel Computing, vol. 111, 102920, Elsevier BV, 2022, doi:10.1016/j.parco.2022.102920.","bibtex":"@article{Schade_Kenter_Elgabarty_Lass_Schütt_Lazzaro_Pabst_Mohr_Hutter_Kühne_et al._2022, title={Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms}, volume={111}, DOI={10.1016/j.parco.2022.102920}, number={102920}, journal={Parallel Computing}, publisher={Elsevier BV}, author={Schade, Robert and Kenter, Tobias and Elgabarty, Hossam and Lass, Michael and Schütt, Ole and Lazzaro, Alfio and Pabst, Hans and Mohr, Stephan and Hutter, Jürg and Kühne, Thomas and et al.}, year={2022} }"},"intvolume":" 111","_id":"33684","article_number":"102920","publication":"Parallel Computing","keyword":["Artificial Intelligence","Computer Graphics and Computer-Aided Design","Computer Networks and Communications","Hardware and Architecture","Theoretical Computer Science","Software"],"quality_controlled":"1","publisher":"Elsevier BV","author":[{"first_name":"Robert","orcid":"0000-0002-6268-539","full_name":"Schade, Robert","last_name":"Schade","id":"75963"},{"last_name":"Kenter","id":"3145","first_name":"Tobias","full_name":"Kenter, Tobias"},{"id":"60250","last_name":"Elgabarty","orcid":"0000-0002-4945-1481","full_name":"Elgabarty, Hossam","first_name":"Hossam"},{"last_name":"Lass","id":"24135","first_name":"Michael","full_name":"Lass, Michael","orcid":"0000-0002-5708-7632"},{"last_name":"Schütt","full_name":"Schütt, Ole","first_name":"Ole"},{"full_name":"Lazzaro, Alfio","first_name":"Alfio","last_name":"Lazzaro"},{"last_name":"Pabst","first_name":"Hans","full_name":"Pabst, Hans"},{"first_name":"Stephan","full_name":"Mohr, Stephan","last_name":"Mohr"},{"last_name":"Hutter","full_name":"Hutter, Jürg","first_name":"Jürg"},{"full_name":"Kühne, Thomas","first_name":"Thomas","id":"49079","last_name":"Kühne"},{"first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian","last_name":"Plessl","id":"16153"}],"date_created":"2022-10-11T08:17:02Z","status":"public","volume":111,"user_id":"75963","language":[{"iso":"eng"}],"date_updated":"2023-08-02T15:03:55Z","oa":"1","doi":"10.1016/j.parco.2022.102920","department":[{"_id":"613"},{"_id":"27"},{"_id":"518"}],"project":[{"_id":"52","name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"publication_identifier":{"issn":["0167-8191"]},"publication_status":"published","title":"Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms"},{"user_id":"15278","title":"In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL","publication":"Journal of Parallel and Distributed Computing","department":[{"_id":"27"},{"_id":"518"}],"quality_controlled":"1","author":[{"full_name":"Meyer, Marius","first_name":"Marius","id":"40778","last_name":"Meyer"},{"first_name":"Tobias","full_name":"Kenter, Tobias","last_name":"Kenter","id":"3145"},{"id":"16153","last_name":"Plessl","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian"}],"date_created":"2021-11-10T14:36:27Z","project":[{"_id":"52","name":"Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"status":"public","publication_status":"published","publication_identifier":{"issn":["0743-7315"]},"date_updated":"2023-09-26T10:26:56Z","_id":"27364","doi":"10.1016/j.jpdc.2021.10.007","language":[{"iso":"eng"}],"type":"journal_article","citation":{"mla":"Meyer, Marius, et al. “In-Depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs Using OpenCL.” Journal of Parallel and Distributed Computing, 2022, doi:10.1016/j.jpdc.2021.10.007.","bibtex":"@article{Meyer_Kenter_Plessl_2022, title={In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL}, DOI={10.1016/j.jpdc.2021.10.007}, journal={Journal of Parallel and Distributed Computing}, author={Meyer, Marius and Kenter, Tobias and Plessl, Christian}, year={2022} }","ama":"Meyer M, Kenter T, Plessl C. In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL. Journal of Parallel and Distributed Computing. Published online 2022. doi:10.1016/j.jpdc.2021.10.007","apa":"Meyer, M., Kenter, T., & Plessl, C. (2022). In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL. Journal of Parallel and Distributed Computing. https://doi.org/10.1016/j.jpdc.2021.10.007","chicago":"Meyer, Marius, Tobias Kenter, and Christian Plessl. “In-Depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs Using OpenCL.” Journal of Parallel and Distributed Computing, 2022. https://doi.org/10.1016/j.jpdc.2021.10.007.","ieee":"M. Meyer, T. Kenter, and C. Plessl, “In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL,” Journal of Parallel and Distributed Computing, 2022, doi: 10.1016/j.jpdc.2021.10.007.","short":"M. Meyer, T. Kenter, C. Plessl, Journal of Parallel and Distributed Computing (2022)."},"year":"2022"},{"article_type":"original","abstract":[{"lang":"eng","text":"N-body methods are one of the essential algorithmic building blocks of high-performance and parallel computing. Previous research has shown promising performance for implementing n-body simulations with pairwise force calculations on FPGAs. However, to avoid challenges with accumulation and memory access patterns, the presented designs calculate each pair of forces twice, along with both force sums of the involved particles. Also, they require large problem instances with hundreds of thousands of particles to reach their respective peak performance, limiting the applicability for strong scaling scenarios. This work addresses both issues by presenting a novel FPGA design that uses each calculated force twice and overlaps data transfers and computations in a way that allows to reach peak performance even for small problem instances, outperforming previous single precision results even in double precision, and scaling linearly over multiple interconnected FPGAs. For a comparison across architectures, we provide an equally optimized CPU reference, which for large problems actually achieves higher peak performance per device, however, given the strong scaling advantages of the FPGA design, in parallel setups with few thousand particles per device, the FPGA platform achieves highest performance and power efficiency."}],"user_id":"3145","author":[{"last_name":"Menzel","first_name":"Johannes","full_name":"Menzel, Johannes"},{"last_name":"Plessl","id":"16153","first_name":"Christian","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982"},{"id":"3145","last_name":"Kenter","full_name":"Kenter, Tobias","first_name":"Tobias"}],"quality_controlled":"1","publication":"ACM Transactions on Reconfigurable Technology and Systems","status":"public","date_created":"2021-11-30T10:00:31Z","volume":15,"intvolume":" 15","_id":"28099","issue":"1","main_file_link":[{"url":"https://dl.acm.org/doi/10.1145/3491235","open_access":"1"}],"citation":{"chicago":"Menzel, Johannes, Christian Plessl, and Tobias Kenter. “The Strong Scaling Advantage of FPGAs in HPC for N-Body Simulations.” ACM Transactions on Reconfigurable Technology and Systems 15, no. 1 (2021): 1–30. https://doi.org/10.1145/3491235.","ama":"Menzel J, Plessl C, Kenter T. The Strong Scaling Advantage of FPGAs in HPC for N-body Simulations. ACM Transactions on Reconfigurable Technology and Systems. 2021;15(1):1-30. doi:10.1145/3491235","apa":"Menzel, J., Plessl, C., & Kenter, T. (2021). The Strong Scaling Advantage of FPGAs in HPC for N-body Simulations. ACM Transactions on Reconfigurable Technology and Systems, 15(1), 1–30. https://doi.org/10.1145/3491235","bibtex":"@article{Menzel_Plessl_Kenter_2021, title={The Strong Scaling Advantage of FPGAs in HPC for N-body Simulations}, volume={15}, DOI={10.1145/3491235}, number={1}, journal={ACM Transactions on Reconfigurable Technology and Systems}, author={Menzel, Johannes and Plessl, Christian and Kenter, Tobias}, year={2021}, pages={1–30} }","mla":"Menzel, Johannes, et al. “The Strong Scaling Advantage of FPGAs in HPC for N-Body Simulations.” ACM Transactions on Reconfigurable Technology and Systems, vol. 15, no. 1, 2021, pp. 1–30, doi:10.1145/3491235.","short":"J. Menzel, C. Plessl, T. Kenter, ACM Transactions on Reconfigurable Technology and Systems 15 (2021) 1–30.","ieee":"J. Menzel, C. Plessl, and T. Kenter, “The Strong Scaling Advantage of FPGAs in HPC for N-body Simulations,” ACM Transactions on Reconfigurable Technology and Systems, vol. 15, no. 1, pp. 1–30, 2021, doi: 10.1145/3491235."},"year":"2021","type":"journal_article","page":"1-30","title":"The Strong Scaling Advantage of FPGAs in HPC for N-body Simulations","department":[{"_id":"27"},{"_id":"518"}],"publication_identifier":{"issn":["1936-7406","1936-7414"]},"publication_status":"published","date_updated":"2022-01-06T06:57:51Z","oa":"1","doi":"10.1145/3491235","language":[{"iso":"eng"}]},{"title":"Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA","user_id":"3145","quality_controlled":"1","publisher":"ACM","author":[{"id":"3145","last_name":"Kenter","full_name":"Kenter, Tobias","first_name":"Tobias"},{"first_name":"Adesh","full_name":"Shambhu, Adesh","last_name":"Shambhu"},{"last_name":"Faghih-Naini","full_name":"Faghih-Naini, Sara","first_name":"Sara"},{"last_name":"Aizinger","full_name":"Aizinger, Vadym","first_name":"Vadym"}],"department":[{"_id":"27"},{"_id":"518"}],"publication":"Proceedings of the Platform for Advanced Scientific Computing Conference","publication_status":"published","status":"public","date_created":"2023-07-28T11:58:14Z","project":[{"name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"date_updated":"2023-07-28T12:03:19Z","_id":"46194","doi":"10.1145/3468267.3470617","oa":"1","main_file_link":[{"open_access":"1","url":"https://dl.acm.org/doi/pdf/10.1145/3468267.3470617"}],"citation":{"ieee":"T. Kenter, A. Shambhu, S. Faghih-Naini, and V. Aizinger, “Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA,” 2021, doi: 10.1145/3468267.3470617.","short":"T. Kenter, A. Shambhu, S. Faghih-Naini, V. Aizinger, in: Proceedings of the Platform for Advanced Scientific Computing Conference, ACM, 2021.","bibtex":"@inproceedings{Kenter_Shambhu_Faghih-Naini_Aizinger_2021, title={Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA}, DOI={10.1145/3468267.3470617}, booktitle={Proceedings of the Platform for Advanced Scientific Computing Conference}, publisher={ACM}, author={Kenter, Tobias and Shambhu, Adesh and Faghih-Naini, Sara and Aizinger, Vadym}, year={2021} }","mla":"Kenter, Tobias, et al. “Algorithm-Hardware Co-Design of a Discontinuous Galerkin Shallow-Water Model for a Dataflow Architecture on FPGA.” Proceedings of the Platform for Advanced Scientific Computing Conference, ACM, 2021, doi:10.1145/3468267.3470617.","apa":"Kenter, T., Shambhu, A., Faghih-Naini, S., & Aizinger, V. (2021). Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA. Proceedings of the Platform for Advanced Scientific Computing Conference. https://doi.org/10.1145/3468267.3470617","ama":"Kenter T, Shambhu A, Faghih-Naini S, Aizinger V. Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA. In: Proceedings of the Platform for Advanced Scientific Computing Conference. ACM; 2021. doi:10.1145/3468267.3470617","chicago":"Kenter, Tobias, Adesh Shambhu, Sara Faghih-Naini, and Vadym Aizinger. “Algorithm-Hardware Co-Design of a Discontinuous Galerkin Shallow-Water Model for a Dataflow Architecture on FPGA.” In Proceedings of the Platform for Advanced Scientific Computing Conference. ACM, 2021. https://doi.org/10.1145/3468267.3470617."},"type":"conference","year":"2021","language":[{"iso":"eng"}]},{"doi":"10.1109/ipdps49936.2021.00116","_id":"46195","date_updated":"2023-07-28T12:05:15Z","language":[{"iso":"eng"}],"citation":{"short":"M. Karp, A. Podobas, N. Jansson, T. Kenter, C. Plessl, P. Schlatter, S. Markidis, in: 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS), IEEE, 2021.","ieee":"M. Karp et al., “High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection,” 2021, doi: 10.1109/ipdps49936.2021.00116.","ama":"Karp M, Podobas A, Jansson N, et al. High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection. In: 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS). IEEE; 2021. doi:10.1109/ipdps49936.2021.00116","apa":"Karp, M., Podobas, A., Jansson, N., Kenter, T., Plessl, C., Schlatter, P., & Markidis, S. (2021). High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection. 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS). https://doi.org/10.1109/ipdps49936.2021.00116","chicago":"Karp, Martin, Artur Podobas, Niclas Jansson, Tobias Kenter, Christian Plessl, Philipp Schlatter, and Stefano Markidis. “High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection.” In 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS). IEEE, 2021. https://doi.org/10.1109/ipdps49936.2021.00116.","mla":"Karp, Martin, et al. “High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection.” 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS), IEEE, 2021, doi:10.1109/ipdps49936.2021.00116.","bibtex":"@inproceedings{Karp_Podobas_Jansson_Kenter_Plessl_Schlatter_Markidis_2021, title={High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection}, DOI={10.1109/ipdps49936.2021.00116}, booktitle={2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS)}, publisher={IEEE}, author={Karp, Martin and Podobas, Artur and Jansson, Niclas and Kenter, Tobias and Plessl, Christian and Schlatter, Philipp and Markidis, Stefano}, year={2021} }"},"year":"2021","type":"conference","user_id":"3145","title":"High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection","status":"public","date_created":"2023-07-28T12:04:27Z","publication_status":"published","author":[{"last_name":"Karp","full_name":"Karp, Martin","first_name":"Martin"},{"first_name":"Artur","full_name":"Podobas, Artur","last_name":"Podobas"},{"full_name":"Jansson, Niclas","first_name":"Niclas","last_name":"Jansson"},{"full_name":"Kenter, Tobias","first_name":"Tobias","id":"3145","last_name":"Kenter"},{"full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian","id":"16153","last_name":"Plessl"},{"last_name":"Schlatter","first_name":"Philipp","full_name":"Schlatter, Philipp"},{"first_name":"Stefano","full_name":"Markidis, Stefano","last_name":"Markidis"}],"quality_controlled":"1","publisher":"IEEE","department":[{"_id":"27"},{"_id":"518"}],"publication":"2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS)"},{"language":[{"iso":"eng"}],"date_updated":"2023-09-26T11:40:25Z","doi":"10.1007/978-3-030-71593-9_15","department":[{"_id":"61"},{"_id":"230"},{"_id":"429"},{"_id":"27"},{"_id":"518"}],"project":[{"name":"Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"publication_identifier":{"issn":["0302-9743","1611-3349"],"isbn":["9783030715922","9783030715939"]},"publication_status":"published","place":"Cham","title":"HighPerMeshes – A Domain-Specific Language for Numerical Algorithms on Unstructured Grids","citation":{"bibtex":"@inbook{Alhaddad_Förstner_Groth_Grünewald_Grynko_Hannig_Kenter_Pfreundt_Plessl_Schotte_et al._2021, place={Cham}, title={HighPerMeshes – A Domain-Specific Language for Numerical Algorithms on Unstructured Grids}, DOI={10.1007/978-3-030-71593-9_15}, booktitle={Euro-Par 2020: Parallel Processing Workshops}, author={Alhaddad, Samer and Förstner, Jens and Groth, Stefan and Grünewald, Daniel and Grynko, Yevgen and Hannig, Frank and Kenter, Tobias and Pfreundt, Franz-Josef and Plessl, Christian and Schotte, Merlind and et al.}, year={2021} }","mla":"Alhaddad, Samer, et al. “HighPerMeshes – A Domain-Specific Language for Numerical Algorithms on Unstructured Grids.” Euro-Par 2020: Parallel Processing Workshops, 2021, doi:10.1007/978-3-030-71593-9_15.","apa":"Alhaddad, S., Förstner, J., Groth, S., Grünewald, D., Grynko, Y., Hannig, F., Kenter, T., Pfreundt, F.-J., Plessl, C., Schotte, M., Steinke, T., Teich, J., Weiser, M., & Wende, F. (2021). HighPerMeshes – A Domain-Specific Language for Numerical Algorithms on Unstructured Grids. In Euro-Par 2020: Parallel Processing Workshops. https://doi.org/10.1007/978-3-030-71593-9_15","ama":"Alhaddad S, Förstner J, Groth S, et al. HighPerMeshes – A Domain-Specific Language for Numerical Algorithms on Unstructured Grids. In: Euro-Par 2020: Parallel Processing Workshops. ; 2021. doi:10.1007/978-3-030-71593-9_15","chicago":"Alhaddad, Samer, Jens Förstner, Stefan Groth, Daniel Grünewald, Yevgen Grynko, Frank Hannig, Tobias Kenter, et al. “HighPerMeshes – A Domain-Specific Language for Numerical Algorithms on Unstructured Grids.” In Euro-Par 2020: Parallel Processing Workshops. Cham, 2021. https://doi.org/10.1007/978-3-030-71593-9_15.","ieee":"S. Alhaddad et al., “HighPerMeshes – A Domain-Specific Language for Numerical Algorithms on Unstructured Grids,” in Euro-Par 2020: Parallel Processing Workshops, Cham, 2021.","short":"S. Alhaddad, J. Förstner, S. Groth, D. Grünewald, Y. Grynko, F. Hannig, T. Kenter, F.-J. Pfreundt, C. Plessl, M. Schotte, T. Steinke, J. Teich, M. Weiser, F. Wende, in: Euro-Par 2020: Parallel Processing Workshops, Cham, 2021."},"year":"2021","type":"book_chapter","_id":"21587","file":[{"creator":"fossie","file_id":"21588","file_size":564398,"success":1,"relation":"main_file","date_updated":"2021-03-31T19:42:52Z","content_type":"application/pdf","date_created":"2021-03-31T19:42:52Z","file_name":"2021-03 Alhaddad2021_Chapter_HighPerMeshesADomain-SpecificL.pdf","access_level":"closed"}],"keyword":["tet_topic_hpc"],"file_date_updated":"2021-03-31T19:42:52Z","publication":"Euro-Par 2020: Parallel Processing Workshops","quality_controlled":"1","author":[{"last_name":"Alhaddad","id":"42456","first_name":"Samer","full_name":"Alhaddad, Samer"},{"id":"158","last_name":"Förstner","orcid":"0000-0001-7059-9862","full_name":"Förstner, Jens","first_name":"Jens"},{"first_name":"Stefan","full_name":"Groth, Stefan","last_name":"Groth"},{"last_name":"Grünewald","full_name":"Grünewald, Daniel","first_name":"Daniel"},{"first_name":"Yevgen","full_name":"Grynko, Yevgen","last_name":"Grynko","id":"26059"},{"full_name":"Hannig, Frank","first_name":"Frank","last_name":"Hannig"},{"full_name":"Kenter, Tobias","first_name":"Tobias","id":"3145","last_name":"Kenter"},{"last_name":"Pfreundt","first_name":"Franz-Josef","full_name":"Pfreundt, Franz-Josef"},{"last_name":"Plessl","id":"16153","first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian"},{"last_name":"Schotte","full_name":"Schotte, Merlind","first_name":"Merlind"},{"last_name":"Steinke","first_name":"Thomas","full_name":"Steinke, Thomas"},{"last_name":"Teich","full_name":"Teich, Jürgen","first_name":"Jürgen"},{"full_name":"Weiser, Martin","first_name":"Martin","last_name":"Weiser"},{"full_name":"Wende, Florian","first_name":"Florian","last_name":"Wende"}],"date_created":"2021-03-31T19:39:42Z","has_accepted_license":"1","status":"public","abstract":[{"lang":"eng","text":"Solving partial differential equations on unstructured grids is a cornerstone of engineering and scientific computing. Nowadays, heterogeneous parallel platforms with CPUs, GPUs, and FPGAs enable energy-efficient and computationally demanding simulations. We developed the HighPerMeshes C++-embedded Domain-Specific Language (DSL) for bridging the abstraction gap between the mathematical and algorithmic formulation of mesh-based algorithms for PDE problems on the one hand and an increasing number of heterogeneous platforms with their different parallel programming and runtime models on the other hand. Thus, the HighPerMeshes DSL aims at higher productivity in the code development process for multiple target platforms. We introduce the concepts as well as the basic structure of the HighPerMeshes DSL, and demonstrate its usage with three examples, a Poisson and monodomain problem, respectively, solved by the continuous finite element method, and the discontinuous Galerkin method for Maxwell’s equation. The mapping of the abstract algorithmic description onto parallel hardware, including distributed memory compute clusters, is presented. Finally, the achievable performance and scalability are demonstrated for a typical example problem on a multi-core CPU cluster."}],"user_id":"15278","ddc":["004"]}]