@misc{24288, author = {{Adelt, Peer}}, publisher = {{Universität Paderborn, Fakultät EIM}}, title = {{{Analyse von Ausführungszeiten durch Integration einer statischen WCET-Analyse mit einer dynamischen Befehlssatzsimulation am Beispiel der TriCore-Architektur}}}, year = {{2015}}, } @inproceedings{24291, abstract = {{In this paper, a miniaturized 122 GHz ISM band FMCW radar is used to achieve micrometer accuracy. The radar consists of a SiGe single chip radar sensor and LCP off-chip antennas. The antennas are integrated in a QFN package. To increase the gain of the radar, an additional lens is used. A combined frequency and phase evaluation algorithm provides micrometer accuracy. The influence of the lens phase center on the beat frequency phase and hence, the overall accuracy is shown. Furthermore, accuracy limitations of the radar system over larger measurement distances are investigated. Accuracies of 200 μm and 2 μm are achieved over a distance of 1.9 m and 5 mm, respectively.}}, author = {{Scherr, Steffen and Göttel, Benjamin and Ayhan, Serdal and Bhutani, Akanksha and Pauli, Mario and Winkler, Wolfgang and Scheytt, Christoph and Zwick, Thomas}}, booktitle = {{European Microwave Week 2015}}, title = {{{Miniaturized 122 GHz ISM Band FMCW Radar with Micrometer Accuracy}}}, doi = {{10.1109/EuRAD.2015.7346291}}, year = {{2015}}, } @inproceedings{24289, author = {{Müller, Wolfgang and Wu, Liang and Scheytt, Christoph and Becker, Markus and Schoenberg, Sven}}, booktitle = {{Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems (REES 2014)}}, editor = {{Mueller-Gritschneder, Daniel and Müller, Wolfgang and Mitra, Subhasish}}, title = {{{On the Correlation of HW Faults and SW Errors}}}, year = {{2015}}, } @phdthesis{24298, abstract = {{This thesis investigates the design and realization of integrated planar antennas for millimeter-wave applications. The state-of-the-art antenna integration and packaging technologies are extensively studied, and an antenna design flow is proposed. A number of integrated antenna designs by applying different integration approaches and technologies, i.e. on printed circuit board (PCB), on-chip and in Benzocyclobutene (BCB) above-wafer process, are presented. The designs target not only high performance, but also the practical considerations of low-cost, feasibility, better reliability, and good reproducibility. They cover the industrial, medical, and scientific (ISM) bands of 60 GHz, 122 GHz, and 245 GHz in the millimeter-wave range with outstanding performance in a low-cost fashion by applying innovative, appropriate integration methods and sophisticated design. By applying the localized backside etching (LBE) process the presented on-chip antennas achieve measured peak gains of 6–8.4 dBi for above 100 GHz applications with simulated efficiencies of 54–75%. These figures are comparable to that of on-board or in-package antennas. To the best of my knowledge, the achieved gain of 7.5–8.4 dBi in the band of 124–134 GHz for the 130 GHz on-chip double folded dipole antenna is the highest reported result to date for planar on-chip antennas based on low-resistivity silicon technologies. System demonstrators with integrated antennas are realized and measured. The 60 GHz demonstrator with on-PCB differential bunny-ear antenna and a novel bond-wire compensation scheme achieves a data rate of 3.6 Gbit/s over a 15-meter distance, which was the best reported analog front-end without beamforming function in silicon technology regarding both the data rate and transmission distance at the time of its publication. A 245 GHz single-channel transmitter and a single-channel receiver with integrated on-chip antennas are also demonstrated. An effective isotropic radiated power (EIRP) of 7–8 dBm is achieved for the transmitter, which is the highest reported value at 245 GHz for a SiGe transmitter with a single antenna so far. Furthermore, the receiver has the highest reported integration level for any 245 GHz SiGe receiver. A 245 GHz 4-channel-transmitter array with integrated on-chip antenna array is also realized to achieve spatial power combining, which offers 11 dB higher EIRP than a single-channel transmitter. From the presented results of the thesis it is feasible to realize high performance integrated planar antennas in the entire millimeter-wave range and beyond in a cost-effective fashion. }}, author = {{Wang, Ruoyu}}, publisher = {{Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn}}, title = {{{Integrated Planar Antenna Designs and Technologies for Millimeter-Wave Applications}}}, volume = {{338}}, year = {{2015}}, } @inproceedings{24294, abstract = {{Parallel Sequence Spread Spectrum (PSSS) is a physical layer (PHY) baseband technology which is gaining interest for both wireless and wired multi-gigabit communication systems. PSSS is well suited for mixed signal transceiver implementation including channel equalization and allows for a reduction in power dissipation by avoiding high speed data converters. The architecture of a mixed signal baseband processor for 100 Gbps wireless communication is described that reduces the implementation complexity and results in a consequent reduction in power dissipation and chip area.}}, author = {{Javed, Abdul Rehman and Scheytt, Christoph and KrishneGowda, Karthik and Kraemer, Rolf}}, booktitle = {{Wireless and Microwave Technology Conference (WAMICON)}}, pages = {{1--4}}, publisher = {{IEEE}}, title = {{{System Design Considerations for a PSSS transceiver for 100Gbps wireless communication with emphasis on mixed Signal implementation}}}, doi = {{10.1109/WAMICON.2015.7120419}}, year = {{2015}}, } @inproceedings{24293, abstract = {{Parallel Sequence Spread Spectrum (PSSS) is a physical layer baseband technology wherein parallel data streams are transmitted simultaneously by spreading them using orthogonal codes. PSSS was selected for the wireless sensor network standard IEEE802.15.4-2006 to increase data rate and improve performance in fading channels for frequency bands below 1 GHz. Since then it has gained interest for both wireless and wired communication links.}}, author = {{Javed, Abdul Rehman and Scheytt, Christoph}}, booktitle = {{1st URSI Atlantic Radio Science Conference (URSI AT-RASC 2015)}}, title = {{{System Design and Simulation of a PSSS Based Mixed Signal Transceiver for a 20 Gbps Bandwidth Limited Communication Link}}}, doi = {{10.1109/URSI-AT-RASC.2015.7302987}}, year = {{2015}}, } @inproceedings{24292, author = {{Scheytt, Christoph and Javed, Abdul Rehman}}, booktitle = {{European Microwave Week 2015}}, title = {{{Mixed-Signal Baseband Processing for 100 Gbit/s Communications}}}, year = {{2015}}, } @inproceedings{24297, author = {{Javed, Abdul Rehman and Scheytt, Christoph and Kraemer, Rolf and Messinger, Tobias and Kallfass, Ingmar}}, location = {{Nürnberg, Germany}}, title = {{{Mixed-mode Baseband for 100 Gbit/s Wireless Communications}}}, year = {{2015}}, } @inproceedings{24296, author = {{Javed, Abdul Rehman}}, location = {{Nürnberg, Germany}}, title = {{{PSSS baseband receiver circuit design}}}, year = {{2015}}, } @misc{24295, author = {{Scheytt, Christoph and Javed, Abdul Rehman}}, booktitle = {{ForschungsForum Paderborn}}, number = {{18}}, pages = {{25--30}}, title = {{{100 Gigabit pro Sekunde und mehr für das drahtlose Hochgeschwindigkeits-Internet}}}, year = {{2015}}, } @inproceedings{24290, abstract = {{The recent rapid development of silicon photonics technology has spurred the process of on-chip integration of all kinds of opto-electronic components. One of the most common components of such type is the opto-electrical receiver. The monolithic implementation of the receiver could potentially have lower power consumption, higher sensitivity and bandwidth due to very short diode to amplifier connection length, which has very low parasitic capacitance and series resistance. The SiGe photodiode itself is also very compact, thus lowering the junction capacitance and improving its bandwidth. Among the different optical communication systems, coherent transmission lately received a lot of attention due to the rising requirements of the optical link capacity, and it was shown that this particular approach could benefit greatly from the monolithic integration, since the major component required for the demodulation on the receiver side – 90° optical hybrid – could be implemented fully passive and directly on the same chip as the receiver itself, together with digital post-processing circuitry. Despite the initial complexity of the modulation scheme, advanced silicon photonics components like this optical hybrid could make coherent transmission attractive even for short-range optical links. I would like to present the actual designs, implementation and measurement results of 90° fully passive optical hybrids, implemented in the IHP SG25PIC (passive photonics IC) technology. One of the designs is based on 4x4 multimode interferometer (MMI). The other one is based on two separate 2x2 MMIs with additional delay element. The final designs didn’t require any additional tuning after fabrication and have shown sufficient precision and performance for a coherent system design. The results of this work were later used for the design of monolithic coherent receiver.}}, author = {{Gudyriev, Sergiy and Scheytt, Christoph}}, booktitle = {{Kleinheubacher Tagung 2015}}, pages = {{18}}, title = {{{Silicon photonics 90° optical hybrid design for coherent receivers}}}, year = {{2015}}, } @book{53590, editor = {{Müller-Gridschneder, Daniel and Müller, Wolfgang and Mitra, Subhasish}}, title = {{{Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems}}}, year = {{2015}}, } @inproceedings{24300, author = {{Wessel, Jan and Schmalz, Klaus and Cahill, Brian and Scheytt, Christoph}}, booktitle = {{Elektrotechnisches Kolloquium}}, title = {{{Design of an Electrical Interferometer at 120 GHz for Contactless Permittivity Characterization}}}, year = {{2014}}, } @inproceedings{24305, abstract = {{Energy efficiency drives the development of more and more complex low-power designs. Based on dynamic power management techniques, multiple voltage islands as well as a huge amount of power states are specified that have to be tested carefully. In this context, low-power design should start at an early stage using state-of-the-art system-level modeling and simulation techniques. However, there is neither a programming language nor any modeling standard that reflects variable power together with its functional side effects in a well-suited abstract manner. To overcome this limitation, we present a modeling approach on top of SystemC TLM to capture low-power design characteristics at electronic system-level. We demonstrate the usability by means of an existing open-source low-power design. The experimental results show that appropriate TLM instrumentation cause only minimal simulation overhead, but offer sufficient details to identify common low-power design errors.}}, author = {{Mischkalla, Fabian and Müller, Wolfgang}}, booktitle = {{Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)}}, publisher = {{IEEE}}, title = {{{Architectural Low-Power Design Using Transaction-Based System Modeling and Simulation}}}, doi = {{10.1109/SAMOS.2014.6893219}}, year = {{2014}}, } @inproceedings{24308, abstract = {{A 115 GHz slow wave transmission line intended for phase detection based integrated biosensors is presented. The structure was fabricated in a 130 nm SiGe process. It achieved the targeted overall phase shift of 1° at 115 GHz. Moreover, the phase can be adjusted by 16 switches using Heterojunction Bipolar (HBT) transistors leading to a phase resolution of 0.125°. The change in input and output matching over all configurations of the switches is not higher than 0.8 dB and the transmission S 21 varies with less than 0.7 dB. To the authors knowledge, it is the first switchable slow wave structure using microstrip transmission lines along with a bipolar switch circuitry. Moreover, the presented structure provides a very powerful solution for real-time digital read-outs in integrated biosensors, without need of additional signal processing steps.}}, author = {{Wessel, Jan and Schmalz, Klaus and Scheytt, Christoph and Meliani, Chafik}}, booktitle = {{Microwave Symposium (IMS), 2014 IEEE MTT-S International}}, pages = {{1 -- 3}}, publisher = {{IEEE}}, title = {{{ Switchable slow wave transmission line in 130 nm SiGe technology at 115 GHz for phase detection based biosensors}}}, doi = {{10.1109/MWSYM.2014.6848446}}, year = {{2014}}, } @inproceedings{24303, abstract = {{A calibration technique as well as measurement results for a 7 GHz Biosensor are presented. It is shown that the applied sensor structure can be calibrated by adjusting the phase of a sensing element's transmission S21. This is realized by slowing down the wave traveling a microstrip line serving as a reference in the differential sensor structure. The dielectric properties along with certain physical boundaries of an obstacle covering parts of the microstrip line evoke that effect. Measurements with an ethanol serious along with simulation results showed that sensitivity can be increased substantially with this calibration technique. A change of the real part of the sample's permittivity of 48 leads to a 18 MHz frequency shift.}}, author = {{Wessel, Jan and Schmalz, Klaus and Scheytt, Christoph and Meliani, Chafik and Cahill, Brian}}, booktitle = {{European Microwave Conference (EuMC)}}, pages = {{699 -- 702}}, publisher = {{IEEE}}, title = {{{A 7 GHz biosensor for permittivity change with enhanced sensitivity through phase compensation}}}, doi = {{10.1109/EuMC.2014.6986530}}, volume = {{44th}}, year = {{2014}}, } @inproceedings{24307, abstract = {{There is a continuous increase of bandwidth-demanding services such as ultra HDTV, 3D TV, etc. which will require data rates up to 100-400 Gb/s for short range wireless communication. This paper introduces a novel mixed-mode design where both analog and digital domain design is considered, which helps in the reduction of power consumption. Parallel Sequence Spread Spectrum (PSSS) is used for physical layer (PHY) baseband technology, which considerably alleviates both transmitter and receiver design.}}, author = {{Kraemer, Rolf and Wolf, Andreas and Scheytt, Christoph and Kallfass, Ingmar and KrishneGowda, Karthik}}, booktitle = {{2014 IEEE 15th Annual IEEE Wireless and Microwave Technology Conference (WAMICON)}}, publisher = {{IEEE}}, title = {{{Wireless 100 Gb/s: PHY layer Overview and Challenges in THz freqency band}}}, doi = {{10.1109/WAMICON.2014.6857743}}, year = {{2014}}, } @article{24302, abstract = {{In this paper, we present an efficient approach to virtual platform modeling for TriCore-based SoCs by combining fast and open software emulation with IEEE-1666 Standard SystemC simulation. For evaluation we consider Infineon's recently introduced AURIX processor family as a target platform, which utilizes multiple CPU cores operating in lockstep mode, memories, hierarchical buses, and a rich set of peripherals. For SoC prototyping, we integrate the fast and open instruction accurate QEMU software emulator with the TLMu library for SystemC co-verification. This article reports our most recent efforts of the implementation of the TriCore instruction set for QEMU. The experimental results demonstrate the functional correctness and performance of our TriCore implementation.}}, author = {{Koppelmann, Bastian and Messidat, Bernd and Becker, Markus and Kuznik, Christoph and Müller, Wolfgang and Scheytt, Christoph}}, journal = {{Design and Verification Conference (DVCON EUROPE)}}, location = {{München, Germany}}, title = {{{Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU}}}, year = {{2014}}, } @article{24309, abstract = {{Verific-MM is an approach to systematize and accelerate the coverage plan engineering as well as the verification environment’s (functional) metric code generation -- usually a time-consuming and error-prone task -- in particular by (i) improving automation via assisted model-based approaches, utilizing recent industry standards such as UCIS and (ii) a supporting methodology suitable for various target (functional coverage) languages (IEEE-1800 SystemVerilog, IEEE-1647 e, IEEE-1666 SystemC).}}, author = {{Kuznik, Christoph and Müller, Wolfgang}}, journal = {{Design, Automation and Test in Europe DATE, University Booth, Dresden}}, title = {{{Verific-MM: Systematized Verification Metrics Generation with UCIS for Improved Automation on Verification Closure}}}, year = {{2014}}, } @inproceedings{24304, author = {{Scheytt, Christoph}}, booktitle = {{Analog 2014,14. Fachtagung der Gesellschaft für Mikroelektronik, Mikrosystemtechnik und Feinwerktechnik des VDE und VDI}}, title = {{{System-on-Chip Design für Funkfrequenzen oberhalb von 100 GHz-Herausforderungen und potenzielle Anwendungen}}}, year = {{2014}}, }