Architectural Low-Power Design Using Transaction-Based System Modeling and Simulation - Mischkalla, Fabian; Müller, Wolfgang (Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV))
Energy efficiency drives the development of more and more complex low-power designs. Based on dynamic power management techniques, multiple voltage islands as well as a huge amount of power states are specified that have to be tested carefully. In this context, low-power design should start at an early stage using state-of-the-art system-level modeling and simulation techniques. However, there is neither a programming language nor any modeling standard that reflects variable power together with its functional side effects in a well-suited abstract manner. To overcome this limitation, we present a modeling approach on top of SystemC TLM to capture low-power design characteristics at electronic system-level. We demonstrate the usability by means of an existing open-source low-power design. The experimental results show that appropriate TLM instrumentation cause only minimal simulation overhead, but offer sufficient details to identify common low-power design errors.

Switchable slow wave transmission line in 130 nm SiGe technology at 115 GHz for phase detection based biosensors - Wessel, Jan; Schmalz, Klaus; Scheytt, Christoph; Meliani, Chafik (Microwave Symposium (IMS), 2014 IEEE MTT-S International)
A 115 GHz slow wave transmission line intended for phase detection based integrated biosensors is presented. The structure was fabricated in a 130 nm SiGe process. It achieved the targeted overall phase shift of 1° at 115 GHz. Moreover, the phase can be adjusted by 16 switches using Heterojunction Bipolar (HBT) transistors leading to a phase resolution of 0.125°. The change in input and output matching over all configurations of the switches is not higher than 0.8 dB and the transmission S 21 varies with less than 0.7 dB. To the authors knowledge, it is the first switchable slow wave structure using microstrip transmission lines along with a bipolar switch circuitry. Moreover, the presented structure provides a very powerful solution for real-time digital read-outs in integrated biosensors, without need of additional signal processing steps.

A 7 GHz biosensor for permittivity change with enhanced sensitivity through phase compensation - Wessel, Jan; Schmalz, Klaus; Scheytt, Christoph; Meliani, Chafik; Cahill, Brian (European Microwave Conference (EuMC))
A calibration technique as well as measurement results for a 7 GHz Biosensor are presented. It is shown that the applied sensor structure can be calibrated by adjusting the phase of a sensing element's transmission S21. This is realized by slowing down the wave traveling a microstrip line serving as a reference in the differential sensor structure. The dielectric properties along with certain physical boundaries of an obstacle covering parts of the microstrip line evoke that effect. Measurements with an ethanol serious along with simulation results showed that sensitivity can be increased substantially with this calibration technique. A change of the real part of the sample's permittivity of 48 leads to a 18 MHz frequency shift.

Wireless 100 Gb/s: PHY layer Overview and Challenges in THz freqency band - Kraemer, Rolf; Wolf, Andreas; Scheytt, Christoph; Kallfass, Ingmar; KrishneGowda, Karthik (2014 IEEE 15th Annual IEEE Wireless and Microwave Technology Conference (WAMICON))
There is a continuous increase of bandwidth-demanding services such as ultra HDTV, 3D TV, etc. which will require data rates up to 100-400 Gb/s for short range wireless communication. This paper introduces a novel mixed-mode design where both analog and digital domain design is considered, which helps in the reduction of power consumption. Parallel Sequence Spread Spectrum (PSSS) is used for physical layer (PHY) baseband technology, which considerably alleviates both transmitter and receiver design.

Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU - Koppelmann, Bastian; Messidat, Bernd; Becker, Markus; Kuznik, Christoph; Müller, Wolfgang; Scheytt, Christoph (Design and Verification Conference (DVCON EUROPE))
In this paper, we present an efficient approach to virtual platform modeling for TriCore-based SoCs by combining fast and open software emulation with IEEE-1666 Standard SystemC simulation. For evaluation we consider Infineon's recently introduced AURIX processor family as a target platform, which utilizes multiple CPU cores operating in lockstep mode, memories, hierarchical buses, and a rich set of peripherals. For SoC prototyping, we integrate the fast and open instruction accurate QEMU software emulator with the TLMu library for SystemC co-verification. This article reports our most recent efforts of the implementation of the TriCore instruction set for QEMU. The experimental results demonstrate the functional correctness and performance of our TriCore implementation.

Verific-MM: Systematized Verification Metrics Generation with UCIS for Improved Automation on Verification Closure - Kuznik, Christoph; Müller, Wolfgang (Design, Automation and Test in Europe DATE, University Booth, Dresden)
Verific-MM is an approach to systematize and accelerate the coverage plan engineering as well as the verification environment’s (functional) metric code generation -- usually a time-consuming and error-prone task -- in particular by (i) improving automation via assisted model-based approaches, utilizing recent industry standards such as UCIS and (ii) a supporting methodology suitable for various target (functional coverage) languages (IEEE-1800 SystemVerilog, IEEE-1647 e, IEEE-1666 SystemC).

System-on-Chip Design für Funkfrequenzen oberhalb von 100 GHz-Herausforderungen und potenzielle Anwendungen - Scheytt, Christoph (Analog 2014,14. Fachtagung der Gesellschaft für Mikroelektronik, Mikrosystemtechnik und Feinwerktechnik des VDE und VDI)

A -Band Four-Element Butler Matrix in 0.13 µm SiGe BiCMOS Technology - Elkhouly, Mohamed; Mao, Yanfei; Meliani, Chafik; Scheytt, Christoph; Ellinger, Frank (IEEE JOURNAL OF SOLID-STATE CIRCUITS)

Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges - Oetjens, Jan-Hendrik; Becker, Markus; Kuznik, Christoph; Müller, Wolfgang; Bannow, Nico; Brinkmann, Oliver; Burger, Andreas; Chaari, Moomen; Chakraborty, Samarjit; Drechsler, R.; Ecker, Wolfgang; Grüttner, Kim; et al. (Design Automation Conference (DAC))
Intelligent automotive electronics significantly improved driving safety in the last decades. With the increasing complexity of automotive systems, dependability of the electronic components themselves and of their interaction must be assured to avoid any risk to driving safety due to unexpected failures caused by internal or external faults. Additionally, Virtual Prototypes (VPs) have been accepted in many areas of system development processes in the automotive industry as platforms for SW development, verification, and design space exploration. We believe that VPs will significantly contribute to the analysis of safety conditions for automotive electronics. This paper shows the advantages of such a methodology based on today's industrial needs, presents the current state of the art in this field, and outlines upcoming research challenges that need to be addressed to make this vision a reality.

mm-Wellen- und Electronic-Photonic System-on-Chip Design - Scheytt, Christoph (Fakultätskolloquium der Fakultät für Elektrotechnik und Informationstechnik)