---
_id: '24296'
author:
- first_name: Abdul Rehman
full_name: Javed, Abdul Rehman
last_name: Javed
citation:
ama: 'Javed AR. PSSS baseband receiver circuit design. In: ; 2015.'
apa: Javed, A. R. (2015). PSSS baseband receiver circuit design.
bibtex: '@inproceedings{Javed_2015, title={PSSS baseband receiver circuit design},
author={Javed, Abdul Rehman}, year={2015} }'
chicago: Javed, Abdul Rehman. “PSSS Baseband Receiver Circuit Design,” 2015.
ieee: A. R. Javed, “PSSS baseband receiver circuit design,” Nürnberg, Germany, 2015.
mla: Javed, Abdul Rehman. PSSS Baseband Receiver Circuit Design. 2015.
short: 'A.R. Javed, in: 2015.'
conference:
location: Nürnberg, Germany
date_created: 2021-09-14T07:06:40Z
date_updated: 2022-02-17T12:12:53Z
department:
- _id: '58'
language:
- iso: eng
status: public
title: PSSS baseband receiver circuit design
type: conference
user_id: '15931'
year: '2015'
...
---
_id: '24295'
author:
- first_name: Christoph
full_name: Scheytt, Christoph
id: '37144'
last_name: Scheytt
- first_name: Abdul Rehman
full_name: Javed, Abdul Rehman
last_name: Javed
citation:
ama: Scheytt C, Javed AR. 100 Gigabit pro Sekunde und mehr für das drahtlose Hochgeschwindigkeits-Internet.
ForschungsForum Paderborn. 2015:25-30.
apa: Scheytt, C., & Javed, A. R. (2015). 100 Gigabit pro Sekunde und mehr für
das drahtlose Hochgeschwindigkeits-Internet. ForschungsForum Paderborn,
18, 25–30.
bibtex: '@article{Scheytt_Javed_2015, title={100 Gigabit pro Sekunde und mehr für
das drahtlose Hochgeschwindigkeits-Internet}, number={18}, journal={ForschungsForum
Paderborn}, author={Scheytt, Christoph and Javed, Abdul Rehman}, year={2015},
pages={25–30} }'
chicago: Scheytt, Christoph, and Abdul Rehman Javed. “100 Gigabit pro Sekunde Und
Mehr Für Das Drahtlose Hochgeschwindigkeits-Internet.” ForschungsForum Paderborn,
2015.
ieee: C. Scheytt and A. R. Javed, “100 Gigabit pro Sekunde und mehr für das drahtlose
Hochgeschwindigkeits-Internet,” ForschungsForum Paderborn, no. 18, pp.
25–30, 2015.
mla: Scheytt, Christoph, and Abdul Rehman Javed. “100 Gigabit pro Sekunde Und Mehr
Für Das Drahtlose Hochgeschwindigkeits-Internet.” ForschungsForum Paderborn,
no. 18, 2015, pp. 25–30.
short: C. Scheytt, A.R. Javed, ForschungsForum Paderborn (2015) 25–30.
date_created: 2021-09-14T07:06:39Z
date_updated: 2022-02-17T14:20:38Z
department:
- _id: '58'
issue: '18'
language:
- iso: eng
page: 25-30
publication: ForschungsForum Paderborn
publication_date: 01.03.2015
related_material:
link:
- relation: confirmation
url: https://kw.uni-paderborn.de/fileadmin/medienwissenschaften/digitale-kulturwissenschaften/presse/upb/UPB_Forschungsforum_18-2015
status: public
title: 100 Gigabit pro Sekunde und mehr für das drahtlose Hochgeschwindigkeits-Internet
type: newspaper_article
user_id: '15931'
year: '2015'
...
---
_id: '24290'
abstract:
- lang: eng
text: "The recent rapid development of silicon photonics technology has spurred
the process of on-chip \r\nintegration of all kinds of opto-electronic components.
One of the most common components of such type \r\nis the opto-electrical receiver.
The monolithic implementation of the receiver could potentially have lower \r\npower
consumption, higher sensitivity and bandwidth due to very short diode to amplifier
connection \r\nlength, which has very low parasitic capacitance and series resistance.
The SiGe photodiode itself is also \r\nvery compact, thus lowering the junction
capacitance and improving its bandwidth. Among the different optical communication
systems, coherent transmission lately received a lot of \r\nattention due to the
rising requirements of the optical link capacity, and it was shown that this particular
\r\napproach could benefit greatly from the monolithic integration, since the
major component required for the \r\ndemodulation on the receiver side – 90° optical
hybrid – could be implemented fully passive and directly \r\non the same chip
as the receiver itself, together with digital post-processing circuitry. Despite
the initial \r\ncomplexity of the modulation scheme, advanced silicon photonics
components like this optical hybrid \r\ncould make coherent transmission attractive
even for short-range optical links. I would like to present the actual designs,
implementation and measurement results of 90° fully passive \r\noptical hybrids,
implemented in the IHP SG25PIC (passive photonics IC) technology. One of the designs
\r\nis based on 4x4 multimode interferometer (MMI). The other one is based on
two separate 2x2 MMIs with \r\nadditional delay element. The final designs didn’t
require any additional tuning after fabrication and have \r\nshown sufficient
precision and performance for a coherent system design. The results of this work
were \r\nlater used for the design of monolithic coherent receiver."
author:
- first_name: Sergiy
full_name: Gudyriev, Sergiy
last_name: Gudyriev
- first_name: Christoph
full_name: Scheytt, Christoph
id: '37144'
last_name: Scheytt
orcid: https://orcid.org/0000-0002-5950-6618
citation:
ama: 'Gudyriev S, Scheytt C. Silicon photonics 90° optical hybrid design for coherent
receivers. In: Kleinheubacher Tagung 2015. ; 2015:18.'
apa: Gudyriev, S., & Scheytt, C. (2015). Silicon photonics 90° optical hybrid
design for coherent receivers. Kleinheubacher Tagung 2015, 18.
bibtex: '@inproceedings{Gudyriev_Scheytt_2015, place={Miltenberg; Germany}, title={Silicon
photonics 90° optical hybrid design for coherent receivers}, booktitle={Kleinheubacher
Tagung 2015}, author={Gudyriev, Sergiy and Scheytt, Christoph}, year={2015}, pages={18}
}'
chicago: Gudyriev, Sergiy, and Christoph Scheytt. “Silicon Photonics 90° Optical
Hybrid Design for Coherent Receivers.” In Kleinheubacher Tagung 2015, 18.
Miltenberg; Germany, 2015.
ieee: S. Gudyriev and C. Scheytt, “Silicon photonics 90° optical hybrid design for
coherent receivers,” in Kleinheubacher Tagung 2015, 2015, p. 18.
mla: Gudyriev, Sergiy, and Christoph Scheytt. “Silicon Photonics 90° Optical Hybrid
Design for Coherent Receivers.” Kleinheubacher Tagung 2015, 2015, p. 18.
short: 'S. Gudyriev, C. Scheytt, in: Kleinheubacher Tagung 2015, Miltenberg; Germany,
2015, p. 18.'
date_created: 2021-09-14T07:06:32Z
date_updated: 2023-01-10T12:50:06Z
department:
- _id: '58'
- _id: '230'
language:
- iso: eng
page: '18'
place: Miltenberg; Germany
publication: Kleinheubacher Tagung 2015
related_material:
link:
- relation: confirmation
url: https://www.kh2015.de/KH2015_book_of_abstracts.pdf
status: public
title: Silicon photonics 90° optical hybrid design for coherent receivers
type: conference
user_id: '15931'
year: '2015'
...
---
_id: '53590'
citation:
ama: Müller-Gridschneder D, Müller W, Mitra S, eds. Proceedings of the 1st International
Workshop on Resiliency in Embedded Electronic Systems.; 2015.
apa: Müller-Gridschneder, D., Müller, W., & Mitra, S. (Eds.). (2015). Proceedings
of the 1st International Workshop on Resiliency in Embedded Electronic Systems.
bibtex: '@book{Müller-Gridschneder_Müller_Mitra_2015, place={Amsterdam, Netherlands},
title={Proceedings of the 1st International Workshop on Resiliency in Embedded
Electronic Systems}, year={2015} }'
chicago: Müller-Gridschneder, Daniel, Wolfgang Müller, and Subhasish Mitra, eds.
Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic
Systems. Amsterdam, Netherlands, 2015.
ieee: D. Müller-Gridschneder, W. Müller, and S. Mitra, Eds., Proceedings of the
1st International Workshop on Resiliency in Embedded Electronic Systems. Amsterdam,
Netherlands, 2015.
mla: Müller-Gridschneder, Daniel, et al., editors. Proceedings of the 1st International
Workshop on Resiliency in Embedded Electronic Systems. 2015.
short: D. Müller-Gridschneder, W. Müller, S. Mitra, eds., Proceedings of the 1st
International Workshop on Resiliency in Embedded Electronic Systems, Amsterdam,
Netherlands, 2015.
date_created: 2024-04-18T21:37:18Z
date_updated: 2024-04-18T22:13:15Z
department:
- _id: '58'
editor:
- first_name: Daniel
full_name: Müller-Gridschneder, Daniel
last_name: Müller-Gridschneder
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
- first_name: Subhasish
full_name: Mitra, Subhasish
last_name: Mitra
language:
- iso: eng
place: Amsterdam, Netherlands
status: public
title: Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic
Systems
type: book_editor
user_id: '16243'
year: '2015'
...
---
_id: '24300'
author:
- first_name: Jan
full_name: Wessel, Jan
last_name: Wessel
- first_name: Klaus
full_name: Schmalz, Klaus
last_name: Schmalz
- first_name: Brian
full_name: Cahill, Brian
last_name: Cahill
- first_name: Christoph
full_name: Scheytt, Christoph
id: '37144'
last_name: Scheytt
citation:
ama: 'Wessel J, Schmalz K, Cahill B, Scheytt C. Design of an Electrical Interferometer
at 120 GHz for Contactless Permittivity Characterization. In: Elektrotechnisches
Kolloquium. ; 2014.'
apa: Wessel, J., Schmalz, K., Cahill, B., & Scheytt, C. (2014). Design of an
Electrical Interferometer at 120 GHz for Contactless Permittivity Characterization.
Elektrotechnisches Kolloquium.
bibtex: '@inproceedings{Wessel_Schmalz_Cahill_Scheytt_2014, title={Design of an
Electrical Interferometer at 120 GHz for Contactless Permittivity Characterization},
booktitle={Elektrotechnisches Kolloquium}, author={Wessel, Jan and Schmalz, Klaus
and Cahill, Brian and Scheytt, Christoph}, year={2014} }'
chicago: Wessel, Jan, Klaus Schmalz, Brian Cahill, and Christoph Scheytt. “Design
of an Electrical Interferometer at 120 GHz for Contactless Permittivity Characterization.”
In Elektrotechnisches Kolloquium, 2014.
ieee: J. Wessel, K. Schmalz, B. Cahill, and C. Scheytt, “Design of an Electrical
Interferometer at 120 GHz for Contactless Permittivity Characterization,” 2014.
mla: Wessel, Jan, et al. “Design of an Electrical Interferometer at 120 GHz for
Contactless Permittivity Characterization.” Elektrotechnisches Kolloquium,
2014.
short: 'J. Wessel, K. Schmalz, B. Cahill, C. Scheytt, in: Elektrotechnisches Kolloquium,
2014.'
date_created: 2021-09-14T07:06:45Z
date_updated: 2022-02-17T12:31:22Z
department:
- _id: '58'
language:
- iso: eng
publication: Elektrotechnisches Kolloquium
status: public
title: Design of an Electrical Interferometer at 120 GHz for Contactless Permittivity
Characterization
type: conference
user_id: '15931'
year: '2014'
...
---
_id: '24305'
abstract:
- lang: eng
text: Energy efficiency drives the development of more and more complex low-power
designs. Based on dynamic power management techniques, multiple voltage islands
as well as a huge amount of power states are specified that have to be tested
carefully. In this context, low-power design should start at an early stage using
state-of-the-art system-level modeling and simulation techniques. However, there
is neither a programming language nor any modeling standard that reflects variable
power together with its functional side effects in a well-suited abstract manner.
To overcome this limitation, we present a modeling approach on top of SystemC
TLM to capture low-power design characteristics at electronic system-level. We
demonstrate the usability by means of an existing open-source low-power design.
The experimental results show that appropriate TLM instrumentation cause only
minimal simulation overhead, but offer sufficient details to identify common low-power
design errors.
author:
- first_name: Fabian
full_name: Mischkalla, Fabian
last_name: Mischkalla
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Mischkalla F, Müller W. Architectural Low-Power Design Using Transaction-Based
System Modeling and Simulation. In: Embedded Computer Systems: Architectures,
Modeling, and Simulation (SAMOS XIV). IEEE; 2014. doi:10.1109/SAMOS.2014.6893219'
apa: 'Mischkalla, F., & Müller, W. (2014). Architectural Low-Power Design Using
Transaction-Based System Modeling and Simulation. Embedded Computer Systems:
Architectures, Modeling, and Simulation (SAMOS XIV). https://doi.org/10.1109/SAMOS.2014.6893219'
bibtex: '@inproceedings{Mischkalla_Müller_2014, place={Greece}, title={Architectural
Low-Power Design Using Transaction-Based System Modeling and Simulation}, DOI={10.1109/SAMOS.2014.6893219},
booktitle={Embedded Computer Systems: Architectures, Modeling, and Simulation
(SAMOS XIV)}, publisher={IEEE}, author={Mischkalla, Fabian and Müller, Wolfgang},
year={2014} }'
chicago: 'Mischkalla, Fabian, and Wolfgang Müller. “Architectural Low-Power Design
Using Transaction-Based System Modeling and Simulation.” In Embedded Computer
Systems: Architectures, Modeling, and Simulation (SAMOS XIV). Greece: IEEE,
2014. https://doi.org/10.1109/SAMOS.2014.6893219.'
ieee: 'F. Mischkalla and W. Müller, “Architectural Low-Power Design Using Transaction-Based
System Modeling and Simulation,” 2014, doi: 10.1109/SAMOS.2014.6893219.'
mla: 'Mischkalla, Fabian, and Wolfgang Müller. “Architectural Low-Power Design Using
Transaction-Based System Modeling and Simulation.” Embedded Computer Systems:
Architectures, Modeling, and Simulation (SAMOS XIV), IEEE, 2014, doi:10.1109/SAMOS.2014.6893219.'
short: 'F. Mischkalla, W. Müller, in: Embedded Computer Systems: Architectures,
Modeling, and Simulation (SAMOS XIV), IEEE, Greece, 2014.'
conference:
end_date: 2014.07.17
start_date: 2014.07.14
date_created: 2021-09-14T07:06:51Z
date_updated: 2022-02-17T12:46:32Z
department:
- _id: '58'
doi: 10.1109/SAMOS.2014.6893219
language:
- iso: eng
place: Greece
publication: 'Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS
XIV)'
publication_identifier:
eisbn:
- 978-1-4799-3770-7
publisher: IEEE
related_material:
link:
- relation: confirmation
url: https://ieeexplore.ieee.org/document/6893219
status: public
title: Architectural Low-Power Design Using Transaction-Based System Modeling and
Simulation
type: conference
user_id: '15931'
year: '2014'
...
---
_id: '24308'
abstract:
- lang: eng
text: A 115 GHz slow wave transmission line intended for phase detection based integrated
biosensors is presented. The structure was fabricated in a 130 nm SiGe process.
It achieved the targeted overall phase shift of 1° at 115 GHz. Moreover, the phase
can be adjusted by 16 switches using Heterojunction Bipolar (HBT) transistors
leading to a phase resolution of 0.125°. The change in input and output matching
over all configurations of the switches is not higher than 0.8 dB and the transmission
S 21 varies with less than 0.7 dB. To the authors knowledge, it is the first switchable
slow wave structure using microstrip transmission lines along with a bipolar switch
circuitry. Moreover, the presented structure provides a very powerful solution
for real-time digital read-outs in integrated biosensors, without need of additional
signal processing steps.
author:
- first_name: Jan
full_name: Wessel, Jan
last_name: Wessel
- first_name: Klaus
full_name: Schmalz, Klaus
last_name: Schmalz
- first_name: Christoph
full_name: Scheytt, Christoph
id: '37144'
last_name: Scheytt
- first_name: Chafik
full_name: Meliani, Chafik
last_name: Meliani
citation:
ama: 'Wessel J, Schmalz K, Scheytt C, Meliani C. Switchable slow wave transmission
line in 130 nm SiGe technology at 115 GHz for phase detection based biosensors.
In: Microwave Symposium (IMS), 2014 IEEE MTT-S International. IEEE; 2014:1-3.
doi:10.1109/MWSYM.2014.6848446'
apa: Wessel, J., Schmalz, K., Scheytt, C., & Meliani, C. (2014). Switchable
slow wave transmission line in 130 nm SiGe technology at 115 GHz for phase detection
based biosensors. Microwave Symposium (IMS), 2014 IEEE MTT-S International,
1–3. https://doi.org/10.1109/MWSYM.2014.6848446
bibtex: '@inproceedings{Wessel_Schmalz_Scheytt_Meliani_2014, place={Tampa, FL, USA},
title={ Switchable slow wave transmission line in 130 nm SiGe technology at 115
GHz for phase detection based biosensors}, DOI={10.1109/MWSYM.2014.6848446},
booktitle={Microwave Symposium (IMS), 2014 IEEE MTT-S International}, publisher={IEEE},
author={Wessel, Jan and Schmalz, Klaus and Scheytt, Christoph and Meliani, Chafik},
year={2014}, pages={1–3} }'
chicago: 'Wessel, Jan, Klaus Schmalz, Christoph Scheytt, and Chafik Meliani. “ Switchable
Slow Wave Transmission Line in 130 Nm SiGe Technology at 115 GHz for Phase Detection
Based Biosensors.” In Microwave Symposium (IMS), 2014 IEEE MTT-S International,
1–3. Tampa, FL, USA: IEEE, 2014. https://doi.org/10.1109/MWSYM.2014.6848446.'
ieee: 'J. Wessel, K. Schmalz, C. Scheytt, and C. Meliani, “ Switchable slow wave
transmission line in 130 nm SiGe technology at 115 GHz for phase detection based
biosensors,” in Microwave Symposium (IMS), 2014 IEEE MTT-S International,
2014, pp. 1–3, doi: 10.1109/MWSYM.2014.6848446.'
mla: Wessel, Jan, et al. “ Switchable Slow Wave Transmission Line in 130 Nm SiGe
Technology at 115 GHz for Phase Detection Based Biosensors.” Microwave Symposium
(IMS), 2014 IEEE MTT-S International, IEEE, 2014, pp. 1–3, doi:10.1109/MWSYM.2014.6848446.
short: 'J. Wessel, K. Schmalz, C. Scheytt, C. Meliani, in: Microwave Symposium (IMS),
2014 IEEE MTT-S International, IEEE, Tampa, FL, USA, 2014, pp. 1–3.'
conference:
end_date: 2014.06.01
start_date: 2014.06.01
date_created: 2021-09-14T07:06:55Z
date_updated: 2022-02-17T13:12:18Z
department:
- _id: '58'
doi: 10.1109/MWSYM.2014.6848446
language:
- iso: eng
page: 1 - 3
place: Tampa, FL, USA
publication: Microwave Symposium (IMS), 2014 IEEE MTT-S International
publication_identifier:
eisbn:
- 978-1-4799-3869-8
publisher: IEEE
related_material:
link:
- relation: confirmation
url: https://ieeexplore.ieee.org/document/6848446
status: public
title: ' Switchable slow wave transmission line in 130 nm SiGe technology at 115 GHz
for phase detection based biosensors'
type: conference
user_id: '15931'
year: '2014'
...
---
_id: '24303'
abstract:
- lang: eng
text: A calibration technique as well as measurement results for a 7 GHz Biosensor
are presented. It is shown that the applied sensor structure can be calibrated
by adjusting the phase of a sensing element's transmission S21. This is realized
by slowing down the wave traveling a microstrip line serving as a reference in
the differential sensor structure. The dielectric properties along with certain
physical boundaries of an obstacle covering parts of the microstrip line evoke
that effect. Measurements with an ethanol serious along with simulation results
showed that sensitivity can be increased substantially with this calibration technique.
A change of the real part of the sample's permittivity of 48 leads to a 18 MHz
frequency shift.
author:
- first_name: Jan
full_name: Wessel, Jan
last_name: Wessel
- first_name: Klaus
full_name: Schmalz, Klaus
last_name: Schmalz
- first_name: Christoph
full_name: Scheytt, Christoph
id: '37144'
last_name: Scheytt
- first_name: Chafik
full_name: Meliani, Chafik
last_name: Meliani
- first_name: Brian
full_name: Cahill, Brian
last_name: Cahill
citation:
ama: 'Wessel J, Schmalz K, Scheytt C, Meliani C, Cahill B. A 7 GHz biosensor for
permittivity change with enhanced sensitivity through phase compensation. In:
European Microwave Conference (EuMC). Vol 44th. IEEE; 2014:699-702. doi:10.1109/EuMC.2014.6986530'
apa: Wessel, J., Schmalz, K., Scheytt, C., Meliani, C., & Cahill, B. (2014).
A 7 GHz biosensor for permittivity change with enhanced sensitivity through phase
compensation. European Microwave Conference (EuMC), 44th, 699–702.
https://doi.org/10.1109/EuMC.2014.6986530
bibtex: '@inproceedings{Wessel_Schmalz_Scheytt_Meliani_Cahill_2014, place={Fiera,
Roma}, title={A 7 GHz biosensor for permittivity change with enhanced sensitivity
through phase compensation}, volume={44th}, DOI={10.1109/EuMC.2014.6986530},
booktitle={European Microwave Conference (EuMC)}, publisher={IEEE}, author={Wessel,
Jan and Schmalz, Klaus and Scheytt, Christoph and Meliani, Chafik and Cahill,
Brian}, year={2014}, pages={699–702} }'
chicago: 'Wessel, Jan, Klaus Schmalz, Christoph Scheytt, Chafik Meliani, and Brian
Cahill. “A 7 GHz Biosensor for Permittivity Change with Enhanced Sensitivity through
Phase Compensation.” In European Microwave Conference (EuMC), 44th:699–702.
Fiera, Roma: IEEE, 2014. https://doi.org/10.1109/EuMC.2014.6986530.'
ieee: 'J. Wessel, K. Schmalz, C. Scheytt, C. Meliani, and B. Cahill, “A 7 GHz biosensor
for permittivity change with enhanced sensitivity through phase compensation,”
in European Microwave Conference (EuMC), 2014, vol. 44th, pp. 699–702,
doi: 10.1109/EuMC.2014.6986530.'
mla: Wessel, Jan, et al. “A 7 GHz Biosensor for Permittivity Change with Enhanced
Sensitivity through Phase Compensation.” European Microwave Conference (EuMC),
vol. 44th, IEEE, 2014, pp. 699–702, doi:10.1109/EuMC.2014.6986530.
short: 'J. Wessel, K. Schmalz, C. Scheytt, C. Meliani, B. Cahill, in: European Microwave
Conference (EuMC), IEEE, Fiera, Roma, 2014, pp. 699–702.'
conference:
end_date: 2014.10.09
start_date: 2014.10.06
date_created: 2021-09-14T07:06:49Z
date_updated: 2022-02-17T12:38:21Z
department:
- _id: '58'
doi: 10.1109/EuMC.2014.6986530
language:
- iso: eng
page: 699 - 702
place: Fiera, Roma
publication: European Microwave Conference (EuMC)
publication_identifier:
eisbn:
- 978-2-8748-7035-4
publisher: IEEE
related_material:
link:
- relation: confirmation
url: https://ieeexplore.ieee.org/document/6986530/authors#authors
status: public
title: A 7 GHz biosensor for permittivity change with enhanced sensitivity through
phase compensation
type: conference
user_id: '15931'
volume: 44th
year: '2014'
...
---
_id: '24307'
abstract:
- lang: eng
text: There is a continuous increase of bandwidth-demanding services such as ultra
HDTV, 3D TV, etc. which will require data rates up to 100-400 Gb/s for short range
wireless communication. This paper introduces a novel mixed-mode design where
both analog and digital domain design is considered, which helps in the reduction
of power consumption. Parallel Sequence Spread Spectrum (PSSS) is used for physical
layer (PHY) baseband technology, which considerably alleviates both transmitter
and receiver design.
author:
- first_name: Rolf
full_name: Kraemer, Rolf
last_name: Kraemer
- first_name: Andreas
full_name: Wolf, Andreas
last_name: Wolf
- first_name: Christoph
full_name: Scheytt, Christoph
id: '37144'
last_name: Scheytt
- first_name: Ingmar
full_name: Kallfass, Ingmar
last_name: Kallfass
- first_name: Karthik
full_name: KrishneGowda, Karthik
last_name: KrishneGowda
citation:
ama: 'Kraemer R, Wolf A, Scheytt C, Kallfass I, KrishneGowda K. Wireless 100 Gb/s:
PHY layer Overview and Challenges in THz freqency band. In: 2014 IEEE 15th
Annual IEEE Wireless and Microwave Technology Conference (WAMICON). IEEE;
2014. doi:10.1109/WAMICON.2014.6857743'
apa: 'Kraemer, R., Wolf, A., Scheytt, C., Kallfass, I., & KrishneGowda, K. (2014).
Wireless 100 Gb/s: PHY layer Overview and Challenges in THz freqency band. 2014
IEEE 15th Annual IEEE Wireless and Microwave Technology Conference (WAMICON).
https://doi.org/10.1109/WAMICON.2014.6857743'
bibtex: '@inproceedings{Kraemer_Wolf_Scheytt_Kallfass_KrishneGowda_2014, place={Marriott
Waterside Hotel and Marina Tampa, FL, USA}, title={Wireless 100 Gb/s: PHY layer
Overview and Challenges in THz freqency band}, DOI={10.1109/WAMICON.2014.6857743},
booktitle={2014 IEEE 15th Annual IEEE Wireless and Microwave Technology Conference
(WAMICON)}, publisher={IEEE}, author={Kraemer, Rolf and Wolf, Andreas and Scheytt,
Christoph and Kallfass, Ingmar and KrishneGowda, Karthik}, year={2014} }'
chicago: 'Kraemer, Rolf, Andreas Wolf, Christoph Scheytt, Ingmar Kallfass, and Karthik
KrishneGowda. “Wireless 100 Gb/s: PHY Layer Overview and Challenges in THz Freqency
Band.” In 2014 IEEE 15th Annual IEEE Wireless and Microwave Technology Conference
(WAMICON). Marriott Waterside Hotel and Marina Tampa, FL, USA: IEEE, 2014.
https://doi.org/10.1109/WAMICON.2014.6857743.'
ieee: 'R. Kraemer, A. Wolf, C. Scheytt, I. Kallfass, and K. KrishneGowda, “Wireless
100 Gb/s: PHY layer Overview and Challenges in THz freqency band,” 2014, doi:
10.1109/WAMICON.2014.6857743.'
mla: 'Kraemer, Rolf, et al. “Wireless 100 Gb/s: PHY Layer Overview and Challenges
in THz Freqency Band.” 2014 IEEE 15th Annual IEEE Wireless and Microwave Technology
Conference (WAMICON), IEEE, 2014, doi:10.1109/WAMICON.2014.6857743.'
short: 'R. Kraemer, A. Wolf, C. Scheytt, I. Kallfass, K. KrishneGowda, in: 2014
IEEE 15th Annual IEEE Wireless and Microwave Technology Conference (WAMICON),
IEEE, Marriott Waterside Hotel and Marina Tampa, FL, USA, 2014.'
conference:
start_date: 2014.06.06
date_created: 2021-09-14T07:06:54Z
date_updated: 2022-02-17T13:10:12Z
department:
- _id: '58'
doi: 10.1109/WAMICON.2014.6857743
language:
- iso: eng
place: Marriott Waterside Hotel and Marina Tampa, FL, USA
publication: 2014 IEEE 15th Annual IEEE Wireless and Microwave Technology Conference
(WAMICON)
publication_identifier:
eisbn:
- 978-1-4799-4608-2
publisher: IEEE
related_material:
link:
- relation: confirmation
url: https://ieeexplore.ieee.org/abstract/document/6857743
status: public
title: 'Wireless 100 Gb/s: PHY layer Overview and Challenges in THz freqency band'
type: conference
user_id: '15931'
year: '2014'
...
---
_id: '24302'
abstract:
- lang: eng
text: In this paper, we present an efficient approach to virtual platform modeling
for TriCore-based SoCs by combining fast and open software emulation with IEEE-1666
Standard SystemC simulation. For evaluation we consider Infineon's recently introduced
AURIX processor family as a target platform, which utilizes multiple CPU cores
operating in lockstep mode, memories, hierarchical buses, and a rich set of peripherals.
For SoC prototyping, we integrate the fast and open instruction accurate QEMU
software emulator with the TLMu library for SystemC co-verification. This article
reports our most recent efforts of the implementation of the TriCore instruction
set for QEMU. The experimental results demonstrate the functional correctness
and performance of our TriCore implementation.
author:
- first_name: Bastian
full_name: Koppelmann, Bastian
id: '25260'
last_name: Koppelmann
- first_name: Bernd
full_name: Messidat, Bernd
last_name: Messidat
- first_name: Markus
full_name: Becker, Markus
last_name: Becker
- first_name: Christoph
full_name: Kuznik, Christoph
last_name: Kuznik
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
- first_name: Christoph
full_name: Scheytt, Christoph
id: '37144'
last_name: Scheytt
citation:
ama: Koppelmann B, Messidat B, Becker M, Kuznik C, Müller W, Scheytt C. Fast and
Open Virtual Platforms for TriCore-based SoCs Using QEMU. Design and Verification
Conference (DVCON EUROPE). Published online 2014.
apa: Koppelmann, B., Messidat, B., Becker, M., Kuznik, C., Müller, W., & Scheytt,
C. (2014). Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU.
Design and Verification Conference (DVCON EUROPE).
bibtex: '@article{Koppelmann_Messidat_Becker_Kuznik_Müller_Scheytt_2014, title={Fast
and Open Virtual Platforms for TriCore-based SoCs Using QEMU}, journal={Design
and Verification Conference (DVCON EUROPE)}, author={Koppelmann, Bastian and Messidat,
Bernd and Becker, Markus and Kuznik, Christoph and Müller, Wolfgang and Scheytt,
Christoph}, year={2014} }'
chicago: Koppelmann, Bastian, Bernd Messidat, Markus Becker, Christoph Kuznik, Wolfgang
Müller, and Christoph Scheytt. “Fast and Open Virtual Platforms for TriCore-Based
SoCs Using QEMU.” Design and Verification Conference (DVCON EUROPE), 2014.
ieee: B. Koppelmann, B. Messidat, M. Becker, C. Kuznik, W. Müller, and C. Scheytt,
“Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU,” Design
and Verification Conference (DVCON EUROPE), 2014.
mla: Koppelmann, Bastian, et al. “Fast and Open Virtual Platforms for TriCore-Based
SoCs Using QEMU.” Design and Verification Conference (DVCON EUROPE), 2014.
short: B. Koppelmann, B. Messidat, M. Becker, C. Kuznik, W. Müller, C. Scheytt,
Design and Verification Conference (DVCON EUROPE) (2014).
conference:
location: München, Germany
start_date: 2014.10.14
date_created: 2021-09-14T07:06:47Z
date_updated: 2022-02-17T12:34:27Z
department:
- _id: '58'
language:
- iso: eng
publication: Design and Verification Conference (DVCON EUROPE)
related_material:
link:
- relation: confirmation
url: http://dvcon-europe.org/conference/dvcon-europe-2014/
status: public
title: Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU
type: journal_article
user_id: '15931'
year: '2014'
...
---
_id: '24309'
abstract:
- lang: eng
text: Verific-MM is an approach to systematize and accelerate the coverage plan
engineering as well as the verification environment’s (functional) metric code
generation -- usually a time-consuming and error-prone task -- in particular by
(i) improving automation via assisted model-based approaches, utilizing recent
industry standards such as UCIS and (ii) a supporting methodology suitable for
various target (functional coverage) languages (IEEE-1800 SystemVerilog, IEEE-1647
e, IEEE-1666 SystemC).
author:
- first_name: Christoph
full_name: Kuznik, Christoph
last_name: Kuznik
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Kuznik C, Müller W. Verific-MM: Systematized Verification Metrics Generation
with UCIS for Improved Automation on Verification Closure. Design, Automation
and Test in Europe DATE, University Booth, Dresden. Published online 2014.'
apa: 'Kuznik, C., & Müller, W. (2014). Verific-MM: Systematized Verification
Metrics Generation with UCIS for Improved Automation on Verification Closure.
Design, Automation and Test in Europe DATE, University Booth, Dresden.'
bibtex: '@article{Kuznik_Müller_2014, title={Verific-MM: Systematized Verification
Metrics Generation with UCIS for Improved Automation on Verification Closure},
journal={Design, Automation and Test in Europe DATE, University Booth, Dresden},
author={Kuznik, Christoph and Müller, Wolfgang}, year={2014} }'
chicago: 'Kuznik, Christoph, and Wolfgang Müller. “Verific-MM: Systematized Verification
Metrics Generation with UCIS for Improved Automation on Verification Closure.”
Design, Automation and Test in Europe DATE, University Booth, Dresden,
2014.'
ieee: 'C. Kuznik and W. Müller, “Verific-MM: Systematized Verification Metrics Generation
with UCIS for Improved Automation on Verification Closure,” Design, Automation
and Test in Europe DATE, University Booth, Dresden, 2014.'
mla: 'Kuznik, Christoph, and Wolfgang Müller. “Verific-MM: Systematized Verification
Metrics Generation with UCIS for Improved Automation on Verification Closure.”
Design, Automation and Test in Europe DATE, University Booth, Dresden,
2014.'
short: C. Kuznik, W. Müller, Design, Automation and Test in Europe DATE, University
Booth, Dresden (2014).
conference:
start_date: 2014.03.25
date_created: 2021-09-14T07:06:56Z
date_updated: 2022-02-17T13:14:13Z
department:
- _id: '58'
language:
- iso: eng
publication: Design, Automation and Test in Europe DATE, University Booth, Dresden
related_material:
link:
- relation: confirmation
url: https://www.edacentrum.de/effektiv/content/verific-mm-systematized-verification-metrics-generation-ucis-improved-automation-verificatio
status: public
title: 'Verific-MM: Systematized Verification Metrics Generation with UCIS for Improved
Automation on Verification Closure'
type: journal_article
user_id: '15931'
year: '2014'
...
---
_id: '24304'
author:
- first_name: Christoph
full_name: Scheytt, Christoph
id: '37144'
last_name: Scheytt
citation:
ama: 'Scheytt C. System-on-Chip Design für Funkfrequenzen oberhalb von 100 GHz-Herausforderungen
und potenzielle Anwendungen. In: Analog 2014,14. Fachtagung Der Gesellschaft
Für Mikroelektronik, Mikrosystemtechnik Und Feinwerktechnik Des VDE Und VDI.
; 2014.'
apa: Scheytt, C. (2014). System-on-Chip Design für Funkfrequenzen oberhalb von 100
GHz-Herausforderungen und potenzielle Anwendungen. Analog 2014,14. Fachtagung
Der Gesellschaft Für Mikroelektronik, Mikrosystemtechnik Und Feinwerktechnik Des
VDE Und VDI.
bibtex: '@inproceedings{Scheytt_2014, title={System-on-Chip Design für Funkfrequenzen
oberhalb von 100 GHz-Herausforderungen und potenzielle Anwendungen}, booktitle={Analog
2014,14. Fachtagung der Gesellschaft für Mikroelektronik, Mikrosystemtechnik und
Feinwerktechnik des VDE und VDI}, author={Scheytt, Christoph}, year={2014} }'
chicago: Scheytt, Christoph. “System-on-Chip Design Für Funkfrequenzen Oberhalb
von 100 GHz-Herausforderungen Und Potenzielle Anwendungen.” In Analog 2014,14.
Fachtagung Der Gesellschaft Für Mikroelektronik, Mikrosystemtechnik Und Feinwerktechnik
Des VDE Und VDI, 2014.
ieee: C. Scheytt, “System-on-Chip Design für Funkfrequenzen oberhalb von 100 GHz-Herausforderungen
und potenzielle Anwendungen,” 2014.
mla: Scheytt, Christoph. “System-on-Chip Design Für Funkfrequenzen Oberhalb von
100 GHz-Herausforderungen Und Potenzielle Anwendungen.” Analog 2014,14. Fachtagung
Der Gesellschaft Für Mikroelektronik, Mikrosystemtechnik Und Feinwerktechnik Des
VDE Und VDI, 2014.
short: 'C. Scheytt, in: Analog 2014,14. Fachtagung Der Gesellschaft Für Mikroelektronik,
Mikrosystemtechnik Und Feinwerktechnik Des VDE Und VDI, 2014.'
date_created: 2021-09-14T07:06:50Z
date_updated: 2022-02-17T12:42:23Z
department:
- _id: '58'
language:
- iso: eng
publication: Analog 2014,14. Fachtagung der Gesellschaft für Mikroelektronik, Mikrosystemtechnik
und Feinwerktechnik des VDE und VDI
related_material:
link:
- relation: confirmation
url: https://conference.vde.com/analog2014/Pages/Programm.aspx
status: public
title: System-on-Chip Design für Funkfrequenzen oberhalb von 100 GHz-Herausforderungen
und potenzielle Anwendungen
type: conference
user_id: '15931'
year: '2014'
...
---
_id: '24306'
author:
- first_name: Mohamed
full_name: Elkhouly, Mohamed
last_name: Elkhouly
- first_name: Yanfei
full_name: Mao, Yanfei
last_name: Mao
- first_name: Chafik
full_name: Meliani, Chafik
last_name: Meliani
- first_name: Christoph
full_name: Scheytt, Christoph
id: '37144'
last_name: Scheytt
- first_name: Frank
full_name: Ellinger, Frank
last_name: Ellinger
citation:
ama: Elkhouly M, Mao Y, Meliani C, Scheytt C, Ellinger F. A -Band Four-Element Butler
Matrix in 0.13 µm SiGe BiCMOS Technology. IEEE JOURNAL OF SOLID-STATE CIRCUITS.
2014;49(9).
apa: Elkhouly, M., Mao, Y., Meliani, C., Scheytt, C., & Ellinger, F. (2014).
A -Band Four-Element Butler Matrix in 0.13 µm SiGe BiCMOS Technology. IEEE
JOURNAL OF SOLID-STATE CIRCUITS, 49(9).
bibtex: '@article{Elkhouly_Mao_Meliani_Scheytt_Ellinger_2014, title={A -Band Four-Element
Butler Matrix in 0.13 µm SiGe BiCMOS Technology}, volume={49}, number={9}, journal={IEEE
JOURNAL OF SOLID-STATE CIRCUITS}, author={Elkhouly, Mohamed and Mao, Yanfei and
Meliani, Chafik and Scheytt, Christoph and Ellinger, Frank}, year={2014} }'
chicago: Elkhouly, Mohamed, Yanfei Mao, Chafik Meliani, Christoph Scheytt, and Frank
Ellinger. “A -Band Four-Element Butler Matrix in 0.13 Μm SiGe BiCMOS Technology.”
IEEE JOURNAL OF SOLID-STATE CIRCUITS 49, no. 9 (2014).
ieee: M. Elkhouly, Y. Mao, C. Meliani, C. Scheytt, and F. Ellinger, “A -Band Four-Element
Butler Matrix in 0.13 µm SiGe BiCMOS Technology,” IEEE JOURNAL OF SOLID-STATE
CIRCUITS, vol. 49, no. 9, 2014.
mla: Elkhouly, Mohamed, et al. “A -Band Four-Element Butler Matrix in 0.13 Μm SiGe
BiCMOS Technology.” IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 49, no.
9, 2014.
short: M. Elkhouly, Y. Mao, C. Meliani, C. Scheytt, F. Ellinger, IEEE JOURNAL OF
SOLID-STATE CIRCUITS 49 (2014).
date_created: 2021-09-14T07:06:52Z
date_updated: 2022-02-17T12:48:32Z
department:
- _id: '58'
intvolume: ' 49'
issue: '9'
language:
- iso: eng
publication: IEEE JOURNAL OF SOLID-STATE CIRCUITS
status: public
title: A -Band Four-Element Butler Matrix in 0.13 µm SiGe BiCMOS Technology
type: journal_article
user_id: '15931'
volume: 49
year: '2014'
...
---
_id: '24311'
abstract:
- lang: eng
text: Intelligent automotive electronics significantly improved driving safety in
the last decades. With the increasing complexity of automotive systems, dependability
of the electronic components themselves and of their interaction must be assured
to avoid any risk to driving safety due to unexpected failures caused by internal
or external faults. Additionally, Virtual Prototypes (VPs) have been accepted
in many areas of system development processes in the automotive industry as platforms
for SW development, verification, and design space exploration. We believe that
VPs will significantly contribute to the analysis of safety conditions for automotive
electronics. This paper shows the advantages of such a methodology based on today's
industrial needs, presents the current state of the art in this field, and outlines
upcoming research challenges that need to be addressed to make this vision a reality.
author:
- first_name: Jan-Hendrik
full_name: Oetjens, Jan-Hendrik
last_name: Oetjens
- first_name: Markus
full_name: Becker, Markus
last_name: Becker
- first_name: Christoph
full_name: Kuznik, Christoph
last_name: Kuznik
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
- first_name: Nico
full_name: Bannow, Nico
last_name: Bannow
- first_name: Oliver
full_name: Brinkmann, Oliver
last_name: Brinkmann
- first_name: Andreas
full_name: Burger, Andreas
last_name: Burger
- first_name: Moomen
full_name: Chaari, Moomen
last_name: Chaari
- first_name: Samarjit
full_name: Chakraborty, Samarjit
last_name: Chakraborty
- first_name: R.
full_name: Drechsler, R.
last_name: Drechsler
- first_name: Wolfgang
full_name: Ecker, Wolfgang
last_name: Ecker
- first_name: Kim
full_name: Grüttner, Kim
last_name: Grüttner
- first_name: Thomas
full_name: Kruse, Thomas
last_name: Kruse
- first_name: Hoang M
full_name: Le, Hoang M
last_name: Le
- first_name: M.
full_name: Mauderer, M.
last_name: Mauderer
- first_name: Daniel
full_name: Mueller-Gritschneider, Daniel
last_name: Mueller-Gritschneider
- first_name: Frank
full_name: Poppen, Frank
last_name: Poppen
- first_name: Hendrik
full_name: Post, Hendrik
last_name: Post
- first_name: SEbastian
full_name: Reiter, SEbastian
last_name: Reiter
- first_name: Wolfgang
full_name: Rosenstiel, Wolfgang
last_name: Rosenstiel
- first_name: 'S. '
full_name: 'Roth, S. '
last_name: Roth
- first_name: Ulf
full_name: Schlichtmann, Ulf
last_name: Schlichtmann
- first_name: Andreas
full_name: Von Schwerin, Andreas
last_name: Von Schwerin
- first_name: Bogdan Andrei
full_name: Tabacaru, Bogdan Andrei
last_name: Tabacaru
- first_name: Alexander
full_name: Viehl, Alexander
last_name: Viehl
citation:
ama: 'Oetjens J-H, Becker M, Kuznik C, et al. Safety Evaluation of Automotive Electronics
Using Virtual Prototypes: State of the Art and Research Challenges. In: Design
Automation Conference (DAC). ; 2014. doi:10.1145/2593069.2602976'
apa: 'Oetjens, J.-H., Becker, M., Kuznik, C., Müller, W., Bannow, N., Brinkmann,
O., Burger, A., Chaari, M., Chakraborty, S., Drechsler, R., Ecker, W., Grüttner,
K., Kruse, T., Le, H. M., Mauderer, M., Mueller-Gritschneider, D., Poppen, F.,
Post, H., Reiter, Se., … Viehl, A. (2014). Safety Evaluation of Automotive Electronics
Using Virtual Prototypes: State of the Art and Research Challenges. Design
Automation Conference (DAC). https://doi.org/10.1145/2593069.2602976'
bibtex: '@inproceedings{Oetjens_Becker_Kuznik_Müller_Bannow_Brinkmann_Burger_Chaari_Chakraborty_Drechsler_et
al._2014, title={Safety Evaluation of Automotive Electronics Using Virtual Prototypes:
State of the Art and Research Challenges}, DOI={10.1145/2593069.2602976},
booktitle={Design Automation Conference (DAC)}, author={Oetjens, Jan-Hendrik and
Becker, Markus and Kuznik, Christoph and Müller, Wolfgang and Bannow, Nico and
Brinkmann, Oliver and Burger, Andreas and Chaari, Moomen and Chakraborty, Samarjit
and Drechsler, R. and et al.}, year={2014} }'
chicago: 'Oetjens, Jan-Hendrik, Markus Becker, Christoph Kuznik, Wolfgang Müller,
Nico Bannow, Oliver Brinkmann, Andreas Burger, et al. “Safety Evaluation of Automotive
Electronics Using Virtual Prototypes: State of the Art and Research Challenges.”
In Design Automation Conference (DAC), 2014. https://doi.org/10.1145/2593069.2602976.'
ieee: 'J.-H. Oetjens et al., “Safety Evaluation of Automotive Electronics
Using Virtual Prototypes: State of the Art and Research Challenges,” 2014, doi:
10.1145/2593069.2602976.'
mla: 'Oetjens, Jan-Hendrik, et al. “Safety Evaluation of Automotive Electronics
Using Virtual Prototypes: State of the Art and Research Challenges.” Design
Automation Conference (DAC), 2014, doi:10.1145/2593069.2602976.'
short: 'J.-H. Oetjens, M. Becker, C. Kuznik, W. Müller, N. Bannow, O. Brinkmann,
A. Burger, M. Chaari, S. Chakraborty, R. Drechsler, W. Ecker, K. Grüttner, T.
Kruse, H.M. Le, M. Mauderer, D. Mueller-Gritschneider, F. Poppen, H. Post, Se.
Reiter, W. Rosenstiel, S. Roth, U. Schlichtmann, A. Von Schwerin, B.A. Tabacaru,
A. Viehl, in: Design Automation Conference (DAC), 2014.'
date_created: 2021-09-14T07:06:59Z
date_updated: 2022-02-17T13:47:16Z
department:
- _id: '58'
doi: 10.1145/2593069.2602976
language:
- iso: eng
publication: Design Automation Conference (DAC)
related_material:
link:
- relation: confirmation
url: https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=6881440
status: public
title: 'Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State
of the Art and Research Challenges'
type: conference
user_id: '15931'
year: '2014'
...
---
_id: '24301'
author:
- first_name: Christoph
full_name: Scheytt, Christoph
id: '37144'
last_name: Scheytt
orcid: https://orcid.org/0000-0002-5950-6618
citation:
ama: 'Scheytt C. mm-Wellen- und Electronic-Photonic System-on-Chip Design. In: Fakultätskolloquium
Der Fakultät Für Elektrotechnik Und Informationstechnik. ; 2014.'
apa: Scheytt, C. (2014). mm-Wellen- und Electronic-Photonic System-on-Chip Design.
Fakultätskolloquium Der Fakultät Für Elektrotechnik Und Informationstechnik.
bibtex: '@inproceedings{Scheytt_2014, place={Institut für Technologie, Karlsruhe},
title={mm-Wellen- und Electronic-Photonic System-on-Chip Design}, booktitle={Fakultätskolloquium
der Fakultät für Elektrotechnik und Informationstechnik}, author={Scheytt, Christoph},
year={2014} }'
chicago: Scheytt, Christoph. “Mm-Wellen- Und Electronic-Photonic System-on-Chip
Design.” In Fakultätskolloquium Der Fakultät Für Elektrotechnik Und Informationstechnik.
Institut für Technologie, Karlsruhe, 2014.
ieee: C. Scheytt, “mm-Wellen- und Electronic-Photonic System-on-Chip Design,” 2014.
mla: Scheytt, Christoph. “Mm-Wellen- Und Electronic-Photonic System-on-Chip Design.”
Fakultätskolloquium Der Fakultät Für Elektrotechnik Und Informationstechnik,
2014.
short: 'C. Scheytt, in: Fakultätskolloquium Der Fakultät Für Elektrotechnik Und
Informationstechnik, Institut für Technologie, Karlsruhe, 2014.'
date_created: 2021-09-14T07:06:46Z
date_updated: 2023-01-10T12:48:54Z
department:
- _id: '58'
- _id: '230'
language:
- iso: eng
place: Institut für Technologie, Karlsruhe
publication: Fakultätskolloquium der Fakultät für Elektrotechnik und Informationstechnik
status: public
title: mm-Wellen- und Electronic-Photonic System-on-Chip Design
type: conference
user_id: '15931'
year: '2014'
...
---
_id: '25120'
author:
- first_name: Fabian
full_name: Mischkalla, Fabian
last_name: Mischkalla
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Mischkalla F, Müller W. Architectural Low-Power Design Using Transaction-Based
System Simulation. In: Embedded Computer Systems: Architectures, Modeling,
and Simulation (SAMOS XIV). IEEE; 2014.'
apa: 'Mischkalla, F., & Müller, W. (2014). Architectural Low-Power Design Using
Transaction-Based System Simulation. Embedded Computer Systems: Architectures,
Modeling, and Simulation (SAMOS XIV).'
bibtex: '@inproceedings{Mischkalla_Müller_2014, title={Architectural Low-Power Design
Using Transaction-Based System Simulation}, booktitle={Embedded Computer Systems:
Architectures, Modeling, and Simulation (SAMOS XIV)}, publisher={IEEE}, author={Mischkalla,
Fabian and Müller, Wolfgang}, year={2014} }'
chicago: 'Mischkalla, Fabian, and Wolfgang Müller. “Architectural Low-Power Design
Using Transaction-Based System Simulation.” In Embedded Computer Systems: Architectures,
Modeling, and Simulation (SAMOS XIV). IEEE, 2014.'
ieee: F. Mischkalla and W. Müller, “Architectural Low-Power Design Using Transaction-Based
System Simulation,” Greece, Sep. 2014, IEEE, 2014.
mla: 'Mischkalla, Fabian, and Wolfgang Müller. “Architectural Low-Power Design Using
Transaction-Based System Simulation.” Embedded Computer Systems: Architectures,
Modeling, and Simulation (SAMOS XIV), IEEE, 2014.'
short: 'F. Mischkalla, W. Müller, in: Embedded Computer Systems: Architectures,
Modeling, and Simulation (SAMOS XIV), IEEE, 2014.'
conference:
location: Greece, Sep. 2014, IEEE
date_created: 2021-09-29T12:06:12Z
date_updated: 2023-01-16T11:29:24Z
department:
- _id: '58'
language:
- iso: eng
publication: 'Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS
XIV)'
publisher: IEEE
status: public
title: Architectural Low-Power Design Using Transaction-Based System Simulation
type: conference
user_id: '5786'
year: '2014'
...
---
_id: '25146'
author:
- first_name: M. tech. Mabel Mary
full_name: Joy, M. tech. Mabel Mary
last_name: Joy
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
- first_name: Franz-Josef
full_name: Rammig, Franz-Josef
last_name: Rammig
citation:
ama: 'Joy M tech. MM, Müller W, Rammig F-J. Source code annotated memory leak detection
for soft real time embedded systems with resource constraints. In: 12th IEEE
International Conference on Embedded Computing. ; 2014.'
apa: Joy, M. tech. M. M., Müller, W., & Rammig, F.-J. (2014). Source code annotated
memory leak detection for soft real time embedded systems with resource constraints.
12th IEEE International Conference on Embedded Computing.
bibtex: '@inproceedings{Joy_Müller_Rammig_2014, title={Source code annotated memory
leak detection for soft real time embedded systems with resource constraints},
booktitle={12th IEEE International conference on Embedded Computing}, author={Joy,
M. tech. Mabel Mary and Müller, Wolfgang and Rammig, Franz-Josef}, year={2014}
}'
chicago: Joy, M. tech. Mabel Mary, Wolfgang Müller, and Franz-Josef Rammig. “Source
Code Annotated Memory Leak Detection for Soft Real Time Embedded Systems with
Resource Constraints.” In 12th IEEE International Conference on Embedded Computing,
2014.
ieee: M. tech. M. M. Joy, W. Müller, and F.-J. Rammig, “Source code annotated memory
leak detection for soft real time embedded systems with resource constraints,”
2014.
mla: Joy, M. tech. Mabel Mary, et al. “Source Code Annotated Memory Leak Detection
for Soft Real Time Embedded Systems with Resource Constraints.” 12th IEEE International
Conference on Embedded Computing, 2014.
short: 'M. tech. M.M. Joy, W. Müller, F.-J. Rammig, in: 12th IEEE International
Conference on Embedded Computing, 2014.'
date_created: 2021-09-30T07:18:43Z
date_updated: 2023-01-16T11:36:02Z
department:
- _id: '58'
language:
- iso: eng
publication: 12th IEEE International conference on Embedded Computing
status: public
title: Source code annotated memory leak detection for soft real time embedded systems
with resource constraints
type: conference
user_id: '5786'
year: '2014'
...
---
_id: '25144'
author:
- first_name: Fabian
full_name: Mischkalla, Fabian
last_name: Mischkalla
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Mischkalla F, Müller W. Advanced SoC Virtual Prototyping for System-Level
Power Planning and Validation. In: PATMOS 2014. ; 2014.'
apa: Mischkalla, F., & Müller, W. (2014). Advanced SoC Virtual Prototyping for
System-Level Power Planning and Validation. PATMOS 2014.
bibtex: '@inproceedings{Mischkalla_Müller_2014, place={Palma de Mallorca, Spain},
title={Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation},
booktitle={PATMOS 2014}, author={Mischkalla, Fabian and Müller, Wolfgang}, year={2014}
}'
chicago: Mischkalla, Fabian, and Wolfgang Müller. “Advanced SoC Virtual Prototyping
for System-Level Power Planning and Validation.” In PATMOS 2014. Palma
de Mallorca, Spain, 2014.
ieee: F. Mischkalla and W. Müller, “Advanced SoC Virtual Prototyping for System-Level
Power Planning and Validation,” 2014.
mla: Mischkalla, Fabian, and Wolfgang Müller. “Advanced SoC Virtual Prototyping
for System-Level Power Planning and Validation.” PATMOS 2014, 2014.
short: 'F. Mischkalla, W. Müller, in: PATMOS 2014, Palma de Mallorca, Spain, 2014.'
date_created: 2021-09-30T07:13:17Z
date_updated: 2023-01-16T11:28:39Z
department:
- _id: '58'
language:
- iso: eng
place: Palma de Mallorca, Spain
publication: PATMOS 2014
status: public
title: Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation
type: conference
user_id: '5786'
year: '2014'
...
---
_id: '36918'
abstract:
- lang: eng
text: This paper presents an advanced eight levels spanning SystemC based virtual
platform methodology and framework - referred to as HeroeS 3 - providing smooth
application to platform mapping and continuous co-refinement of a virtual prototype
with its physical environment model. For heterogeneity support, various SystemC
extensions are combined covering continuous/discrete models of computation and
different communication abstractions, such as analog mixed-signal models, abstract
RTOS/HAL/middleware models, TLM bus models, and QEMU wrappers. We enable dependability
assessment by Fault Effect Modeling (FEM) at the virtual prototype in order to
avoid risking physical injury or damage. Also, simulation results are deterministic
and can be evaluated interactively or offline. We apply FEM to both the physical
environment model and the different abstractions of the virtual prototype. Currently,
we focus on sensor failures and application control flow errors.
author:
- first_name: Markus
full_name: Becker, Markus
last_name: Becker
- first_name: Christoph
full_name: Kuznik, Christoph
last_name: Kuznik
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Becker M, Kuznik C, Müller W. Fault Effect Modeling in a Heterogeneous SystemC
Based Virtual Platform Framework for Cyber Physical Systems. In: IEEE; 2014. doi:10.1109/ICCPS.2014.6843726'
apa: Becker, M., Kuznik, C., & Müller, W. (2014). Fault Effect Modeling in
a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems.
ACM/IEEE International Conference on Cyber-Physical Systems (ICCPS), Berlin. https://doi.org/10.1109/ICCPS.2014.6843726
bibtex: '@inproceedings{Becker_Kuznik_Müller_2014, place={Berlin}, title={Fault
Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for
Cyber Physical Systems}, DOI={10.1109/ICCPS.2014.6843726},
publisher={IEEE}, author={Becker, Markus and Kuznik, Christoph and Müller, Wolfgang},
year={2014} }'
chicago: 'Becker, Markus, Christoph Kuznik, and Wolfgang Müller. “Fault Effect Modeling
in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical
Systems.” Berlin: IEEE, 2014. https://doi.org/10.1109/ICCPS.2014.6843726.'
ieee: 'M. Becker, C. Kuznik, and W. Müller, “Fault Effect Modeling in a Heterogeneous
SystemC Based Virtual Platform Framework for Cyber Physical Systems,” presented
at the ACM/IEEE International Conference on Cyber-Physical Systems (ICCPS), Berlin,
2014, doi: 10.1109/ICCPS.2014.6843726.'
mla: Becker, Markus, et al. Fault Effect Modeling in a Heterogeneous SystemC
Based Virtual Platform Framework for Cyber Physical Systems. IEEE, 2014, doi:10.1109/ICCPS.2014.6843726.
short: 'M. Becker, C. Kuznik, W. Müller, in: IEEE, Berlin, 2014.'
conference:
location: Berlin
name: ACM/IEEE International Conference on Cyber-Physical Systems (ICCPS)
date_created: 2023-01-16T11:57:08Z
date_updated: 2023-01-16T11:57:22Z
department:
- _id: '58'
doi: 10.1109/ICCPS.2014.6843726
keyword:
- Computational modeling
- Finite element analysis
- Prototypes
- Abstracts
- Software
- Fault tolerance
- Fault tolerant systems
language:
- iso: eng
place: Berlin
publisher: IEEE
status: public
title: Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework
for Cyber Physical Systems
type: conference
user_id: '5786'
year: '2014'
...
---
_id: '36917'
abstract:
- lang: eng
text: The ever-increasing complexity of heterogeneous electronic systems demand
for intensified abstraction and automation efforts to improve design, verification
and validation productivity, especially in earlier phases of system engineering.
Within the verification activity various metrics can be applied to determine functional
correctness or the overall progress. Here, a supporting verification methodology
defining high-level verification planning down to the actual metric code development
is essential. Moreover, an advanced assistance for the designer, such as a tooling
infrastructure to automatize and accelerate the metric code implementation, is
needed to minimize the influence of errorprone manual coding. In this article
we present a single-source verification metric code-generation methodology for
improved coverage automation. We determine (i) a suitable metric model for model-based
capture of verification metrics as well as (ii) an assisted model-based processing
and generation flow of the verification environment and metric skeletons. We apply
our method to a SystemC case-study, in doing so, targeting metric code implementation
productivity and consistency enhancement.
author:
- first_name: Christoph
full_name: Kuznik, Christoph
last_name: Kuznik
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
- first_name: Gilles Bertrand
full_name: Defo, Gilles Bertrand
last_name: Defo
citation:
ama: 'Kuznik C, Müller W, Defo GB. An Assisted Single Source Verification Metric
Model Code Generation Methodology. In: ; 2014.'
apa: Kuznik, C., Müller, W., & Defo, G. B. (2014). An Assisted Single Source
Verification Metric Model Code Generation Methodology. Proceedings of the
Electronic System Level Synthesis Conference (ESLSyn).
bibtex: '@inproceedings{Kuznik_Müller_Defo_2014, place={San Francisco, USA}, title={An
Assisted Single Source Verification Metric Model Code Generation Methodology},
author={Kuznik, Christoph and Müller, Wolfgang and Defo, Gilles Bertrand}, year={2014}
}'
chicago: Kuznik, Christoph, Wolfgang Müller, and Gilles Bertrand Defo. “An Assisted
Single Source Verification Metric Model Code Generation Methodology.” San Francisco,
USA, 2014.
ieee: C. Kuznik, W. Müller, and G. B. Defo, “An Assisted Single Source Verification
Metric Model Code Generation Methodology,” presented at the Proceedings of the
Electronic System Level Synthesis Conference (ESLSyn), 2014.
mla: Kuznik, Christoph, et al. An Assisted Single Source Verification Metric
Model Code Generation Methodology. 2014.
short: 'C. Kuznik, W. Müller, G.B. Defo, in: San Francisco, USA, 2014.'
conference:
name: Proceedings of the Electronic System Level Synthesis Conference (ESLSyn)
date_created: 2023-01-16T11:43:50Z
date_updated: 2023-01-16T11:44:06Z
department:
- _id: '58'
keyword:
- System Design
- Verification
language:
- iso: eng
place: San Francisco, USA
status: public
title: An Assisted Single Source Verification Metric Model Code Generation Methodology
type: conference
user_id: '5786'
year: '2014'
...