@inproceedings{61998, author = {{Disselkamp, Jan-Philipp and Lick, Jonas and Azem, Ghayth and Grothe, Robin and Ptock, Lukas and Meyer, Matthias and Kürpick, Dominik and Hovemann, Aschot and Dumitrescu, Roman}}, booktitle = {{Proceedings of the Conference on Production Systems and Logistics: CPSL 2025}}, editor = {{Herberger, David and Hübner, Marco}}, pages = {{640--649}}, publisher = {{publish-Ing.}}, title = {{{Generating An Automated Assembly Graph On The Basis Of The 3D-Geometry Of A Product Assembly Group}}}, year = {{2025}}, } @inproceedings{61997, author = {{Disselkamp, Jan-Philipp and Lick, Jonas and Ptock, Lukas and Zacke, Julian and Wilk, Marcel and Ostendorf, Jona and Meyer, Matthias and Westphal, Svenja and Kürpick, Dominik and Hovemann, Aschot and Dumitrescu, Roman}}, booktitle = {{Proceedings of the Conference on Production Systems and Logistics : CPSL 2025}}, editor = {{Herberger, David and Hübner, Marco }}, publisher = {{publish-Ing.}}, title = {{{Case Study For Introducing Digital Cardboard Engineering}}}, year = {{2025}}, } @inproceedings{61953, author = {{Grigoryan, Khoren and Bauer, Eliana and Fichtler, Timm and Asmar, Laban and Kühn, Arno and Dumitrescu, Roman}}, booktitle = {{2025 IEEE International Conference on Engineering, Technology, and Innovation (ICE/ITMC)}}, publisher = {{IEEE}}, title = {{{A Structured Tool Landscape for Data-Driven ProductManagernent}}}, doi = {{10.1109/ice/itmc65658.2025.11106543}}, year = {{2025}}, } @article{62020, author = {{Awais, Muhammad and Mohammadi, Hassan Ghasemzadeh and Platzner, Marco}}, issn = {{1063-8210}}, journal = {{IEEE Transactions on Very Large Scale Integration (VLSI) Systems}}, number = {{9}}, pages = {{2395--2405}}, publisher = {{Institute of Electrical and Electronics Engineers (IEEE)}}, title = {{{Design Space Exploration for Approximate Circuits via Checkpointing and DNN-Based Estimators}}}, doi = {{10.1109/tvlsi.2025.3559377}}, volume = {{33}}, year = {{2025}}, } @inproceedings{62019, author = {{Hadipour, Amir Hossein and Jafari, Atousa and Awais, Muhammad and Platzner, Marco}}, booktitle = {{2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)}}, publisher = {{IEEE}}, title = {{{A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation}}}, doi = {{10.1109/ddecs63720.2025.11006769}}, year = {{2025}}, } @inproceedings{61102, author = {{Hebrok, Sven and Storm, Tim Leonhard and Cramer, Felix Matthias and Radoy, Maximilian and Somorovsky, Juraj}}, booktitle = {{34th USENIX Security Symposium (USENIX Security 25)}}, pages = {{8017–8034}}, title = {{{STEK Sharing is Not Caring: Bypassing TLS Authentication in Web Servers using Session Tickets}}}, year = {{2025}}, } @article{62051, author = {{Hinnenthal, Kristian and Liedtke, David Jan and Scheideler, Christian}}, issn = {{0304-3975}}, journal = {{Theoretical Computer Science}}, publisher = {{Elsevier BV}}, title = {{{Efficient shape formation by 3D hybrid programmable matter: An algorithm for low diameter intermediate structures}}}, doi = {{10.1016/j.tcs.2025.115552}}, volume = {{1057}}, year = {{2025}}, } @article{62064, abstract = {{SYCL is an open standard for targeting heterogeneous hardware from C++. In this work, we evaluate a SYCL implementation for a discontinuous Galerkin discretization of the 2D shallow water equations targeting CPUs, GPUs, and also FPGAs. The discretization uses polynomial orders zero to two on unstructured triangular meshes. Separating memory accesses from the numerical code allow us to optimize data accesses for the target architecture. A performance analysis shows good portability across x86 and ARM CPUs, GPUs from different vendors, and even two variants of Intel Stratix 10 FPGAs. Measuring the energy to solution shows that GPUs yield an up to 10x higher energy efficiency in terms of degrees of freedom per joule compared to CPUs. With custom designed caches, FPGAs offer a meaningful complement to the other architectures with particularly good computational performance on smaller meshes. FPGAs with High Bandwidth Memory are less affected by bandwidth issues and have similar energy efficiency as latest generation CPUs.}}, author = {{Büttner, Markus and Alt, Christoph and Kenter, Tobias and Köstler, Harald and Plessl, Christian and Aizinger, Vadym}}, issn = {{1573-0484}}, journal = {{The Journal of Supercomputing}}, number = {{6}}, publisher = {{Springer Science and Business Media LLC}}, title = {{{Analyzing performance portability for a SYCL implementation of the 2D shallow water equations}}}, doi = {{10.1007/s11227-025-07063-7}}, volume = {{81}}, year = {{2025}}, } @inproceedings{62066, abstract = {{In the context of high-performance computing (HPC) for distributed workloads, individual field-programmable gate arrays (FPGAs) need efficient ways to exchange data, which requires network infrastructure and software abstractions. Dedicated multi-FPGA clusters provide inter-FPGA networks for direct device to device communication. The oneAPI high-level synthesis toolchain offers I/O pipes to allow user kernels to interact with the networking ports of the FPGA board. In this work, we evaluate using oneAPI I/O pipes for direct FPGA-to-FPGA communication by scaling a SYCL implementation of a Jacobi solver on up to 25 FPGAs in the Noctua 2 cluster. We see good results in weak and strong scaling experiments.}}, author = {{Alt, Christoph and Plessl, Christian and Kenter, Tobias}}, booktitle = {{Proceedings of the 13th International Workshop on OpenCL and SYCL}}, isbn = {{9798400713606}}, keywords = {{Multi-FPGA, High-level Synthesis, oneAPI, FPGA}}, publisher = {{Association for Computing Machinery}}, title = {{{Evaluating oneAPI I/O Pipes in a Case Study of Scaling a SYCL Jacobi Solver to multiple FPGAs}}}, doi = {{10.1145/3731125.3731131}}, year = {{2025}}, } @inproceedings{62065, author = {{Sundriyal, Shivam and Büttner, Markus and Alt, Christoph and Kenter, Tobias and Aizinger, Vadym}}, booktitle = {{2025 IEEE High Performance Extreme Computing Conference (HPEC)}}, publisher = {{IEEE}}, title = {{{Adaptive Spectral Block Floating Point for Discontinuous Galerkin Methods}}}, doi = {{10.1109/hpec67600.2025.11196195}}, year = {{2025}}, } @inproceedings{62119, author = {{Ihtassine, Reda and Firmansyah, Asep Fajar and Srivastava, Nikit and Ali, Manzoor and Ngonga Ngomo, Axel-Cyrille and Sherif, Mohamed}}, booktitle = {{Proceedings of the 12th Knowledge Capture Conference 2025, {K-CAP} 2025, The Thirteenth International Conference on Knowledge Capture, December 10 - 12, 2025, Dayton, Ohio, USA}}, keywords = {{Srivastava ali dice enexa firmansyah ihtassine ngonga sailproject sherif whale}}, publisher = {{ACM}}, title = {{{NL2LS: LLM-based Automatic Linking of Knowledge Graphs}}}, year = {{2025}}, } @article{62138, abstract = {{This paper presents a comprehensive design framework for Enterprise Architecture aimed at facilitating decision-driven analytics in smart factories. The motivation behind this research lies in challenges faced by manufacturing companies, such as skilled labor shortages and increasing global competition, alongside the imperative for sustainable production. This journal provides a novel approach for designing and documenting prescriptive analytics use cases in manufacturing environments. The framework addresses the need for effective integration of advanced data analytics and prescriptive analytics solutions within existing production environments, thereby enhancing operational efficiency and decision-making processes. A Design Science Research approach is used to iteratively derive a framework based on stakeholder needs and activities along the prescriptive analytics use case development cycle. The resulting framework is demonstrated and evaluated in an IoT Factory setup in a research facility. From a practical perspective, the framework supports manufacturing companies in systematically designing prescriptive analytics use cases. From a research perspective, it contributes to the body of knowledge on Enterprise Architecture Management (EAM) by operationalizing the design of prescriptive analytics use cases in manufacturing contexts. The main contributions of this study include the development of a framework that supports the planning, design, and integration of prescriptive analytics use cases. This framework fosters interdisciplinary collaboration and aids in managing the complexity of data-driven projects.}}, author = {{Weller, Julian and Dumitrescu, Roman}}, issn = {{2079-9292}}, journal = {{Electronics}}, number = {{21}}, publisher = {{MDPI AG}}, title = {{{Decision-Driven Analytics in Smart Factories: Enterprise Architecture Framework for Use Case Specification and Engineering (FUSE)}}}, doi = {{10.3390/electronics14214271}}, volume = {{14}}, year = {{2025}}, } @misc{62247, author = {{Werner, Felix}}, title = {{{Monoton erreichbarer Delaunaygraph}}}, year = {{2025}}, } @misc{62268, author = {{Bengaluru Amarnath, Prajwal}}, publisher = {{Paderborn University}}, title = {{{Design and Integration of Intra-Process Communication for ROS 2 into ReconROS}}}, year = {{2025}}, } @inproceedings{61950, abstract = {{ABSTRACT:The importance of the circular economy as an alternative to today’s prevailing linear economy is recognised in both industry and research. Product designers are having a major influence on this transition by adapting the characteristics of physical products in the early phases of the product development process. However, most products follow a linear approach and are far from being circular. This paper aims to identify the challenges that product designers face when designing circular products. Building on a developed understanding of related terms in circular product design, an exploratory literature review is conducted. The results help to gain an overview and understanding of the challenges that need to be addressed. Therefore, further research directions are derived to support the transition from linear to circular products in the long term.}}, author = {{Jagnow, Jan and Stöhr, Bernd and Bernijazov, Ruslan and Koldewey, Christian and Dumitrescu, Roman}}, booktitle = {{Proceedings of the Design Society}}, issn = {{2732-527X}}, pages = {{931--940}}, publisher = {{Cambridge University Press (CUP)}}, title = {{{Circular product design: a literature-based identification of challenges from the perspective of product designers}}}, doi = {{10.1017/pds.2025.10107}}, volume = {{5}}, year = {{2025}}, } @inproceedings{61928, abstract = {{ABSTRACT:Well-designed products are crucial to a company's business success. Management support is a critical success factor in ensuring that design-related aspects are given appropriate attention during product development. Despite the importance of management, the literature doesn't provide a clear picture of what characterizes a competent manager in product design. This gap impedes competence development and explains why organizations struggle to leverage the benefits of well-designed products. This research aims to address this gap by synthesizing important findings from the literature into a model of managerial competence. The model provides initial insight into the individual competencies managers need to meet their responsibility for good product design in organizations.}}, author = {{Stöhr, Bernd and Koldewey, Christian and Bernijazov, Ruslan and Dumitrescu, Roman}}, booktitle = {{Proceedings of the Design Society}}, issn = {{2732-527X}}, pages = {{1425--1434}}, publisher = {{Cambridge University Press (CUP)}}, title = {{{Effective management support for design: towards a model of managerial competence}}}, doi = {{10.1017/pds.2025.10156}}, volume = {{5}}, year = {{2025}}, } @inproceedings{61991, author = {{Seidenberg, Tobias and Stöhr, Bernd and Eckertz, Daniel and Jagnow, Jan and Dumitrescu, Roman}}, booktitle = {{Proceedings of the 2024 9th International Conference on Information Systems Engineering}}, publisher = {{ACM}}, title = {{{HD Mapping as enabler for autonomous systems on airports}}}, doi = {{10.1145/3711954.3711967}}, year = {{2025}}, } @inbook{62701, abstract = {{Learning continuous vector representations for knowledge graphs has significantly improved state-of-the-art performances in many challenging tasks. Yet, deep-learning-based models are only post-hoc and locally explainable. In contrast, learning Web Ontology Language (OWL) class expressions in Description Logics (DLs) is ante-hoc and globally explainable. However, state-of-the-art learners have two well-known lim-itations: scaling to large knowledge graphs and handling missing infor-mation. Here, we present a decision-tree-based learner (tDL) to learn Web Ontology Languages (OWLs) class expressions over large knowl-edge graphs, while imputing missing triples. Given positive and negative example individuals, tDL firstly constructs unique OWL expressions in .SHOIN from concise bounded descriptions of individuals. Each OWL class expression is used as a feature in a binary classification problem to represent input individuals. Thereafter, tDL fits a CART decision tree to learn Boolean decision rules distinguishing positive examples from nega-tive examples. A final OWL expression in.SHOIN is built by traversing the built CART decision tree from the root node to leaf nodes for each positive example. By this, tDL can learn OWL class expressions without exploration, i.e., the number of queries to a knowledge graph is bounded by the number of input individuals. Our empirical results show that tDL outperforms the current state-of-the-art models across datasets. Impor-tantly, our experiments over a large knowledge graph (DBpedia with 1.1 billion triples) show that tDL can effectively learn accurate OWL class expressions, while the state-of-the-art models fail to return any results. Finally, expressions learned by tDL can be seamlessly translated into natural language explanations using a pre-trained large language model and a DL verbalizer.}}, author = {{Demir, Caglar and Yekini, Moshood and Röder, Michael and Mahmood, Yasir and Ngonga Ngomo, Axel-Cyrille}}, booktitle = {{Lecture Notes in Computer Science}}, isbn = {{9783032060655}}, issn = {{0302-9743}}, keywords = {{Decision Tree, OWL Class Expression Learning, Description Logic, Knowledge Graph, Large Language Model, Verbalizer}}, location = {{Porto, Portugal}}, publisher = {{Springer Nature Switzerland}}, title = {{{Tree-Based OWL Class Expression Learner over Large Graphs}}}, doi = {{10.1007/978-3-032-06066-2_29}}, year = {{2025}}, } @inproceedings{61041, abstract = {{Large Language Models (LLMs) are increasingly deployed in real-world applications that require access to up-to-date knowledge. However, retraining LLMs is computationally expensive. Therefore, knowledge editing techniques are crucial for maintaining current information and correcting erroneous assertions within pre-trained models. Current benchmarks for knowledge editing primarily focus on recalling edited facts, often neglecting their logical consequences. To address this limitation, we introduce a new benchmark designed to evaluate how knowledge editing methods handle the logical consequences of a single fact edit. Our benchmark extracts relevant logical rules from a knowledge graph for a given edit. Then, it generates multi-hop questions based on these rules to assess the impact on logical consequences. Our findings indicate that while existing knowledge editing approaches can accurately insert direct assertions into LLMs, they frequently fail to inject entailed knowledge. Specifically, experiments with popular methods like ROME and FT reveal a substantial performance gap, up to 24%, between evaluations on directly edited knowledge and on entailed knowledge. This highlights the critical need for semantics-aware evaluation frameworks in knowledge editing.}}, author = {{Moteu Ngoli, Tatiana and Kouagou, N'Dah Jean and Zahera, Hamada Mohamed Abdelsamee and Ngonga Ngomo, Axel-Cyrille}}, booktitle = {{Proceedings of the 24th International Semantic Web Conference (ISWC 2025)}}, isbn = {{978-3-032-09530-5}}, keywords = {{dice sailproject moteu kouagou zahera ngonga}}, location = {{Nara, Japan}}, pages = {{pp 41--56}}, publisher = {{Springer, Cham}}, title = {{{Benchmarking Knowledge Editing using Logical Rules}}}, doi = {{https://doi.org/10.1007/978-3-032-09530-5_3}}, year = {{2025}}, } @inproceedings{62007, abstract = {{Ensemble methods are widely employed to improve generalization in machine learning. This has also prompted the adoption of ensemble learning for the knowledge graph embedding (KGE) models in performing link prediction. Typical approaches to this end train multiple models as part of the ensemble, and the diverse predictions are then averaged. However, this approach has some significant drawbacks. For instance, the computational overhead of training multiple models increases latency and memory overhead. In contrast, model merging approaches offer a promising alternative that does not require training multiple models. In this work, we introduce model merging, specifically weighted averaging, in KGE models. Herein, a running average of model parameters from a training epoch onward is maintained and used for predictions. To address this, we additionally propose an approach that selectively updates the running average of the ensemble model parameters only when the generalization performance improves on a validation dataset. We evaluate these two different weighted averaging approaches on link prediction tasks, comparing the state-of-the-art benchmark ensemble approach. Additionally, we evaluate the weighted averaging approach considering literal-augmented KGE models and multi-hop query answering tasks as well. The results demonstrate that the proposed weighted averaging approach consistently improves performance across diverse evaluation settings.}}, author = {{Sapkota, Rupesh and Demir, Caglar and Sharma, Arnab and Ngonga Ngomo, Axel-Cyrille}}, booktitle = {{Proceedings of the Thirteenth International Conference on Knowledge Capture(K-CAP 2025)}}, keywords = {{Knowledge Graphs, Embeddings, Ensemble Learning}}, location = {{Dayton, OH, USA}}, publisher = {{ACM}}, title = {{{Parameter Averaging in Link Prediction}}}, doi = {{https://doi.org/10.1145/3731443.3771365}}, year = {{2025}}, }