@inproceedings{3362,
  abstract     = {{Profiling applications on a heterogeneous compute node is challenging since the way to retrieve data from the resources and interpret them varies between resource types and manufacturers. This holds especially true for measuring the energy consumption. In this paper we present Ampehre, a novel open source measurement framework that allows developers to gather comparable measurements from heterogeneous compute nodes, e.g., nodes comprising CPU, GPU, and FPGA. We explain the architecture of Ampehre and detail the measurement process on the example of energy measurements on CPU and GPU. To characterize the probing effect, we quantitatively analyze the trade-off between the accuracy of measurements and the CPU load imposed by Ampehre. Based on this analysis, we are able to specify reasonable combinations of sampling periods for the different resource types of a compute node.}},
  author       = {{Lösch, Achim and Wiens, Alex and Platzner, Marco}},
  booktitle    = {{Proceedings of the International Conference on Architecture of Computing Systems (ARCS)}},
  isbn         = {{9783319776095}},
  issn         = {{0302-9743}},
  pages        = {{73--84}},
  publisher    = {{Springer International Publishing}},
  title        = {{{Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes}}},
  doi          = {{10.1007/978-3-319-77610-1_6}},
  volume       = {{10793}},
  year         = {{2018}},
}

@misc{3365,
  author       = {{Schnuer, Jan-Philip}},
  publisher    = {{Universität Paderborn}},
  title        = {{{Static Scheduling Algorithms for Heterogeneous Compute Nodes}}},
  year         = {{2018}},
}

@misc{3366,
  author       = {{Croce, Marcel}},
  publisher    = {{Universität Paderborn}},
  title        = {{{Evaluation of OpenCL-based Compilation for FPGAs}}},
  year         = {{2018}},
}

@inproceedings{3373,
  abstract     = {{Modern Boolean satisfiability solvers can emit proofs of unsatisfiability. There is substantial interest in being able to verify such proofs and also in using them for further computations. In this paper, we present an FPGA accelerator for checking resolution proofs, a popular proof format. Our accelerator exploits parallelism at the low level by implementing the basic resolution step in hardware, and at the high level by instantiating a number of parallel modules for proof checking. Since proof checking involves highly irregular memory accesses, we employ Hybrid Memory Cube technology for accelerator memory. The results show that while the accelerator is scalable and achieves speedups for all benchmark proofs, performance improvements are currently limited by the overhead of transitioning the proof into the accelerator memory.}},
  author       = {{Hansmeier, Tim and Platzner, Marco and Andrews, David}},
  booktitle    = {{ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications}},
  isbn         = {{9783319788890}},
  issn         = {{0302-9743}},
  location     = {{Santorini, Greece}},
  pages        = {{153--165}},
  publisher    = {{Springer International Publishing}},
  title        = {{{An FPGA/HMC-Based Accelerator for Resolution Proof Checking}}},
  doi          = {{10.1007/978-3-319-78890-6_13}},
  volume       = {{10824}},
  year         = {{2018}},
}

@article{3402,
  abstract     = {{In machine learning, so-called nested dichotomies are utilized as a reduction technique, i.e., to decompose a multi-class classification problem into a set of binary problems, which are solved using a simple binary classifier as a base learner. The performance of the (multi-class) classifier thus produced strongly depends on the structure of the decomposition. In this paper, we conduct an empirical study, in which we compare existing heuristics for selecting a suitable structure in the form of a nested dichotomy. Moreover, we propose two additional heuristics as natural completions. One of them is the Best-of-K heuristic, which picks the (presumably) best among K randomly generated nested dichotomies. Surprisingly, and in spite of its simplicity, it turns out to outperform the state of the art.}},
  author       = {{Melnikov, Vitalik and Hüllermeier, Eyke}},
  issn         = {{1573-0565}},
  journal      = {{Machine Learning}},
  title        = {{{On the effectiveness of heuristics for learning nested dichotomies: an empirical analysis}}},
  doi          = {{10.1007/s10994-018-5733-1}},
  year         = {{2018}},
}

@inproceedings{3414,
  abstract     = {{Over the years, Design by Contract (DbC) has evolved as a
powerful concept for program documentation, testing, and verification.
Contracts formally specify assertions on (mostly) object-oriented programs:
pre- and postconditions of methods, class invariants, allowed call
orders, etc. Missing in the long list of properties specifiable by contracts
are, however, method correlations: DbC languages fall short on stating
assertions relating methods.
In this paper, we propose the novel concept of inter-method contract,
allowing precisely for expressing method correlations.We present JMC as
a language for specifying and JMCTest as a tool for dynamically checking
inter-method contracts on Java programs. JMCTest fully automatically
generates objects on which the contracted methods are called and
the validity of the contract is checked. Using JMCTest, we detected
that large Java code bases (e.g. JBoss, Java RT) frequently violate standard
inter-method contracts. In comparison to other verification tools
inspecting (some) inter-method contracts, JMCTest can find bugs that
remain undetected by those tools.}},
  author       = {{Börding, Paul and Haltermann, Jan Frederik and Jakobs, Marie-Christine and Wehrheim, Heike}},
  booktitle    = {{Proceedings of the IFIP International Conference on Testing Software and Systems (ICTSS 2018)}},
  location     = {{Cádiz, Spain}},
  pages        = {{39----55}},
  publisher    = {{Springer}},
  title        = {{{JMCTest: Automatically Testing Inter-Method Contracts in Java}}},
  volume       = {{11146}},
  year         = {{2018}},
}

@inproceedings{3422,
  abstract     = {{We study the consensus problem in a synchronous distributed system of n nodes under an adaptive adversary that has a slightly outdated view of the system and can block all incoming and outgoing communication of a constant fraction of the nodes in each round. Motivated by a result of Ben-Or and Bar-Joseph (1998), showing that any consensus algorithm that is resilient against a linear number of crash faults requires $\tilde \Omega(\sqrt n)$ rounds in an n-node network against an adaptive adversary, we consider a late adaptive adversary, who has full knowledge of the network state at the beginning of the previous round and unlimited computational power, but is oblivious to the current state of the nodes. 

Our main contributions are randomized distributed algorithms that achieve consensus with high probability among all except a small constant fraction of the nodes (i.e., "almost-everywhere'') against a late adaptive adversary who can block up to ε n$ nodes in each round, for a small constant ε >0$. Our first protocol achieves binary almost-everywhere consensus and also guarantees a decision on the majority input value, thus ensuring plurality consensus. We also present an algorithm that achieves the same time complexity for multi-value consensus. Both of our algorithms succeed in $O(log n)$ rounds with high probability, thus showing an exponential gap to the $\tilde\Omega(\sqrt n)$ lower bound of Ben-Or and Bar-Joseph for strongly adaptive crash-failure adversaries, which can be strengthened to $\Omega(n)$ when allowing the adversary to block nodes instead of permanently crashing them. Our algorithms are scalable to large systems as each node contacts only an (amortized) constant number of peers in each communication round. We show that our algorithms are optimal up to constant (resp.\ sub-logarithmic) factors by proving that every almost-everywhere consensus protocol takes $\Omega(log_d n)$ rounds in the worst case, where d is an upper bound on the number of communication requests initiated per node in each round. We complement our theoretical results with an experimental evaluation of the binary almost-everywhere consensus protocol revealing a short convergence time even against an adversary blocking a large fraction of nodes.}},
  author       = {{Robinson, Peter and Scheideler, Christian and Setzer, Alexander}},
  booktitle    = {{Proceedings of the 30th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA)}},
  isbn         = {{978-1-4503-5799-9/18/07}},
  keywords     = {{distributed consensus, randomized algorithm, adaptive adversary, complexity lower bound}},
  location     = {{Wien}},
  title        = {{{Breaking the $\tilde\Omega(\sqrt{n})$ Barrier: Fast Consensus under a Late Adversary}}},
  doi          = {{10.1145/3210377.3210399}},
  year         = {{2018}},
}

@article{3510,
  abstract     = {{Automated machine learning (AutoML) seeks to automatically select, compose, and parametrize machine learning algorithms, so as to achieve optimal performance on a given task (dataset). Although current approaches to AutoML have already produced impressive results, the field is still far from mature, and new techniques are still being developed. In this paper, we present ML-Plan, a new approach to AutoML based on hierarchical planning. To highlight the potential of this approach, we compare ML-Plan to the state-of-the-art frameworks Auto-WEKA, auto-sklearn, and TPOT. In an extensive series of experiments, we show that ML-Plan is highly competitive and often outperforms existing approaches.}},
  author       = {{Mohr, Felix and Wever, Marcel Dominik and Hüllermeier, Eyke}},
  issn         = {{1573-0565}},
  journal      = {{Machine Learning}},
  keywords     = {{AutoML, Hierarchical Planning, HTN planning, ML-Plan}},
  location     = {{Dublin, Ireland}},
  pages        = {{1495--1515}},
  publisher    = {{Springer}},
  title        = {{{ML-Plan: Automated Machine Learning via Hierarchical Planning}}},
  doi          = {{10.1007/s10994-018-5735-z}},
  year         = {{2018}},
}

@inbook{3536,
  author       = {{Schellhorn, Gerhard and Wedel, Monika and Travkin, Oleg and König, Jürgen and Wehrheim, Heike}},
  booktitle    = {{Software Engineering and Formal Methods}},
  isbn         = {{9783319929699}},
  issn         = {{0302-9743}},
  pages        = {{105--120}},
  publisher    = {{Springer International Publishing}},
  title        = {{{FastLane Is Opaque – a Case Study in Mechanized Proofs of Opacity}}},
  doi          = {{10.1007/978-3-319-92970-5_7}},
  year         = {{2018}},
}

@inproceedings{3550,
  abstract     = {{Nowadays companies like Apple create ecosystems of third- party providers and users around their software platforms. Often online stores like Apple App Store are created to directly market third-party solutions. We call such ecosystems store-oriented software ecosystems. While the architecture of these ecosystems is mainly derived from busi- ness decisions of their owners, ecosystems with greatly different archi- tectural designs have been created. This diversity makes it challenging for future ecosystem providers to understand which architectural design is suitable to fulfill certain business decisions. In turn, opening a plat- form becomes risky while endangering intellectual property or scarifying quality of services. In this paper, we identify three main design options of store-oriented software ecosystems by classifying existing ecosystems based on similarities in their business decisions. We elaborate on the design options, discuss their main contributions, and provide exemplary ecosystems. Our work provides aspiring ecosystem providers with the reusable knowledge of existing ecosystems and helps them to take more informed architectural decisions and reduce risks in future.}},
  author       = {{Jazayeri, Bahar and Zimmermann, Olaf and Engels, Gregor and Küster, Jochen and Kundisch, Dennis and Szopinski, Daniel}},
  booktitle    = {{Proceeding of International Symposium on Business Modeling and Software Design}},
  isbn         = {{9783319942131}},
  issn         = {{1865-1348}},
  pages        = {{390--400}},
  publisher    = {{Springer}},
  title        = {{{Design Options of Store-Oriented Software Ecosystems: An Investigation of Business Decisions}}},
  doi          = {{10.1007/978-3-319-94214-8_30}},
  volume       = {{319}},
  year         = {{2018}},
}

@article{3551,
  author       = {{König, Jürgen and Mäcker, Alexander and Meyer auf der Heide, Friedhelm and Riechers, Sören}},
  journal      = {{Journal of Combinatorial Optimization}},
  number       = {{4}},
  pages        = {{1356--1379}},
  title        = {{{Scheduling with interjob communication on parallel processors}}},
  doi          = {{10.1007/s10878-018-0325-3}},
  volume       = {{36}},
  year         = {{2018}},
}

@inproceedings{3552,
  author       = {{Mohr, Felix and Wever, Marcel Dominik and Hüllermeier, Eyke}},
  booktitle    = {{Proceedings of the Symposium on Intelligent Data Analysis}},
  location     = {{‘s-Hertogenbosch, the Netherlands}},
  title        = {{{Reduction Stumps for Multi-Class Classification}}},
  doi          = {{10.1007/978-3-030-01768-2_19}},
  year         = {{2018}},
}

@unpublished{3586,
  abstract     = {{Existing approaches and tools for the generation of approximate circuits often lack generality and are restricted to certain circuit types, approximation techniques, and quality assurance methods. Moreover, only few tools are publicly available. This hinders the development and evaluation of new techniques for approximating circuits and their comparison to previous approaches. In this paper, we ﬁrst analyze and classify related approaches and then present CIRCA, our ﬂexible framework for search-based approximate circuit generation. CIRCA is developed with a focus on modularity and extensibility. We present the architecture of CIRCA with its clear separation into stages and functional blocks, report on the current prototype, and show initial experiments.}},
  author       = {{Witschen, Linus Matthias and Wiersema, Tobias and Ghasemzadeh Mohammadi, Hassan and Awais, Muhammad and Platzner, Marco}},
  booktitle    = {{Third Workshop on Approximate Computing (AxC 2018)}},
  keywords     = {{Approximate Computing, Framework, Pareto Front, Accuracy}},
  pages        = {{6}},
  title        = {{{CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation}}},
  year         = {{2018}},
}

@phdthesis{3720,
  abstract     = {{Traditional cache design uses a consolidated block of memory address bits to index a cache set, equivalent to the use of modulo functions. While this module-based mapping scheme is widely used in contemporary cache structures due to the simplicity of its hardware design and its good performance for sequences of consecutive addresses, its use may not be satisfactory for a variety of application domains having different characteristics.This thesis presents a new type of cache mapping scheme, motivated by programmable capabilities combined with Nature-inspired optimization of reconfigurable hardware. This research has focussed on an FPGA-based evolvable cache structure of the first level cache in a multi-core processor architecture, able to dynamically change cache indexing. To solve the challenge of reconfigurable cache mappings, a programmable Boolean circuit based on a combination of Look-up Table (LUT) memory elements is proposed. Focusing on optimization aspects at the system level, a Performance Measurement Infrastructure is introduced that is able to monitor the underlying microarchitectural metrics, and an adaptive evaluation strategy is presented that leverages on Evolutionary Algorithms, that is not only capable of evolving application-specific address-to-cache-index mappings for level one split caches but also of reducing optimization times. Putting this all together and prototyping in an FPGA for a LEON3/Linux-based multi-core processor, the creation of a system architecture reduces cache misses and improves performance over the use of conventional caches.}},
  author       = {{Ho, Nam}},
  pages        = {{139}},
  publisher    = {{Universität Paderborn}},
  title        = {{{FPGA-based Reconfigurable Cache Mapping Schemes: Design and Optimization}}},
  doi          = {{10.17619/UNIPB/1-376}},
  year         = {{2018}},
}

@inproceedings{3804,
  author       = {{Al Khatib, Khalid and Wachsmuth, Henning and Lang, Kevin and Herpel, Jakob and Hagen, Matthias and Stein, Benno}},
  booktitle    = {{Proceedings of the 56th Annual Meeting of the Association for Computational Linguistics (Volume 1: Long Papers)}},
  pages        = {{2545--2555}},
  title        = {{{Modeling Deliberative Argumentation Strategies on Wikipedia}}},
  year         = {{2018}},
}

@inproceedings{3806,
  author       = {{Habernal, Ivan and Wachsmuth, Henning and Gurevych, Iryna and Stein, Benno}},
  booktitle    = {{Proceedings of the 2018 Conference of the North American Chapter of the Association for Computational Linguistics: Human Language Technologies, Volume 1 (Long Papers)}},
  pages        = {{386--396}},
  title        = {{{Before Name-Calling: Dynamics and Triggers of Ad Hominem Fallacies in Web Argumentation}}},
  year         = {{2018}},
}

@inproceedings{3807,
  author       = {{Habernal, Ivan and Wachsmuth, Henning and Gurevych, Iryna and Stein, Benno}},
  booktitle    = {{Proceedings of The 12th International Workshop on Semantic Evaluation}},
  pages        = {{763--772}},
  title        = {{{SemEval-2018 Task 12: The Argument Reasoning Comprehension Task}}},
  year         = {{2018}},
}

@inproceedings{3821,
  author       = {{Wachsmuth, Henning and Syed, Shahbaz and Stein, Benno}},
  booktitle    = {{Proceedings of the 56th Annual Meeting of the Association for Computational Linguistics (Volume 1: Long Papers)}},
  pages        = {{241--251}},
  title        = {{{Retrieval of the Best Counterargument without Prior Topic Knowledge}}},
  year         = {{2018}},
}

@misc{3851,
  author       = {{Koop, Samuel}},
  publisher    = {{Universität Paderborn}},
  title        = {{{Congestion Games mit gewichteten Strategien}}},
  year         = {{2018}},
}

@inproceedings{3852,
  abstract     = {{In automated machine learning (AutoML), the process of engineering machine learning applications with respect to a specific problem is (partially) automated.
Various AutoML tools have already been introduced to provide out-of-the-box machine learning functionality.
More specifically, by selecting machine learning algorithms and optimizing their hyperparameters, these tools produce a machine learning pipeline tailored to the problem at hand.
Except for TPOT, all of these tools restrict the maximum number of processing steps of such a pipeline.
However, as TPOT follows an evolutionary approach, it suffers from performance issues when dealing with larger datasets.
In this paper, we present an alternative approach leveraging a hierarchical planning to configure machine learning pipelines that are unlimited in length.
We evaluate our approach and find its performance to be competitive with other AutoML tools, including TPOT.}},
  author       = {{Wever, Marcel Dominik and Mohr, Felix and Hüllermeier, Eyke}},
  booktitle    = {{ICML 2018 AutoML Workshop}},
  keywords     = {{automated machine learning, complex pipelines, hierarchical planning}},
  location     = {{Stockholm, Sweden}},
  title        = {{{ML-Plan for Unlimited-Length Machine Learning Pipelines}}},
  year         = {{2018}},
}

