@inproceedings{46406,
  abstract     = {{We present methods to answer two basic questions that arise when benchmarking optimization algorithms. The first one is: which algorithm is the 'best' one? and the second one: which algorithm should I use for my real world problem? Both are connected and neither is easy to answer. We present methods which can be used to analyse the raw data of a benchmark experiment and derive some insight regarding the answers to these questions. We employ the presented methods to analyse the BBOB'09 benchmark results and present some initial findings.}},
  author       = {{Mersmann, O and Trautmann, Heike and Naujoks, B and Weihs, C}},
  booktitle    = {{Learning and Intelligent Optimization, 4$^th$ International Conference, LION 4, Venice, Italy}},
  editor       = {{Blum, C and Battiti, R}},
  pages        = {{333–337}},
  publisher    = {{Springer}},
  title        = {{{On the Distribution of EMOA Hypervolumes}}},
  volume       = {{6073}},
  year         = {{2010}},
}

@inproceedings{46407,
  abstract     = {{Choosing and tuning an optimization procedure for a given class of nonlinear optimization problems is not an easy task. One way to proceed is to consider this as a tournament, where each procedure will compete in different ‘disciplines’. Here, disciplines could either be different functions, which we want to optimize, or specific performance measures of the optimization procedure. We would then be interested in the algorithm that performs best in a majority of cases or whose average performance is maximal. We will focus on evolutionary multiobjective optimization algorithms (EMOA), and will present a novel approach to the design and analysis of evolutionary multiobjective benchmark experiments based on similar work from the context of machine learning. We focus on deriving a consensus among several benchmarks over different test problems and illustrate the methodology by reanalyzing the results of the CEC 2007 EMOA competition.}},
  author       = {{Mersmann, Olaf and Trautmann, Heike and Naujoks, Boris and Weihs, Claus}},
  booktitle    = {{IEEE Congress on Evolutionary Computation}},
  issn         = {{1941-0026}},
  pages        = {{1--8}},
  title        = {{{Benchmarking evolutionary multiobjective optimization algorithms}}},
  doi          = {{10.1109/CEC.2010.5586241}},
  year         = {{2010}},
}

@inproceedings{46404,
  author       = {{Ding, J and Wessing, S and Trautmann, Heike and Mehnen, J and Naujoks, B}},
  booktitle    = {{Proceedings of the 7$^th$ CIRP International Seminar on Intelligent Computation in Manufacturing Engineering (CIRP ICME ’10)}},
  editor       = {{Teti, R}},
  publisher    = {{Copyright C.O.C. Com. org. Conv.}},
  title        = {{{Sequential Parameter Optimisation for Multi-Objective Evolutionary Optimisation of Additive Layer Manufacturing}}},
  year         = {{2010}},
}

@inproceedings{46409,
  abstract     = {{Since many real-world optimization problems are noisy, vector optimization algorithms that can cope with noise and uncertainty are required. We propose new, robust selection strategies for evolutionary multi-objective optimization in the presence of noise. We apply new measures of uncertainty for estimating the recently introduced Pareto-dominance for uncertain and noisy environments (PDU). The first measure is the inter-quartile range of the outcomes of repeated function evaluations. The second is based on axis-aligned bounding boxes around the upper and lower quantiles of the sampled fitness values in objective space. Experiments on real and artificial problems show promising results.}},
  author       = {{Voß, Thomas and Trautmann, Heike and Igel, Christian}},
  booktitle    = {{Parallel Problem Solving from Nature, PPSN XI}},
  editor       = {{Schaefer, Robert and Cotta, Carlos and Kołodziej, Joanna and Rudolph, Günter}},
  isbn         = {{978-3-642-15871-1}},
  pages        = {{260–269}},
  publisher    = {{Springer Berlin Heidelberg}},
  title        = {{{New Uncertainty Handling Strategies in Multi-objective Evolutionary Optimization}}},
  doi          = {{https://doi.org/10.1007/978-3-642-15871-1_27}},
  year         = {{2010}},
}

@article{46412,
  abstract     = {{In this paper, a concept for efficiently approximating the practically relevant regions of the Pareto front (PF) is introduced. Instead of the original objectives, desirability functions (DFs) of the objectives are optimized, which express the preferences of the decision maker. The original problem formulation and the optimization algorithm do not have to be modified. DFs map an objective to the domain [0, 1] and nonlinearly increase with better objective quality. By means of this mapping, values of different objectives and units become comparable. A biased distribution of the solutions in the PF approximation based on different scalings of the objectives is prevented. Thus, we propose the integration of DFs into the S-metric selection evolutionary multiobjective algorithm. The transformation ensures the meaning of the hypervolumes internally computed. Furthermore, it is shown that the reference point for the hypervolume calculation can be set intuitively. The approach is analyzed using standard test problems. Moreover, a practical validation by means of the optimization of a turning process is performed.}},
  author       = {{Wagner, Tobias and Trautmann, Heike}},
  issn         = {{1941-0026}},
  journal      = {{IEEE Transactions on Evolutionary Computation}},
  number       = {{5}},
  pages        = {{688--701}},
  title        = {{{Integration of Preferences in Hypervolume-Based Multiobjective Evolutionary Algorithms by Means of Desirability Functions}}},
  doi          = {{10.1109/TEVC.2010.2058119}},
  volume       = {{14}},
  year         = {{2010}},
}

@article{46411,
  abstract     = {{The paper presents a framework to optimise the design of work roll based on the cooling performance. The framework develops meta-models from a set of finite element analyses (FEA) of the roll cooling. A design of experiment technique is used to identify the FEA runs. The research also identifies sources of uncertainties in the design process. A robust evolutionary multi-objective evaluation technique is applied to the design optimisation in constrained problems with real life uncertainty. The approach handles uncertainties associated both with design variables and fitness functions. Constraints violation within the neighbourhood of a design is considered as part of a measurement for degree of feasibility and robustness of a solution.}},
  author       = {{Azene, Y.T. and Roy, R. and Farrugia, D. and Onisa, C. and Mehnen, J. and Trautmann, Heike}},
  issn         = {{1755-5817}},
  journal      = {{CIRP Journal of Manufacturing Science and Technology}},
  keywords     = {{Roll cooling design, Uncertainty, Design optimisation, Multi-objective optimisation, Constraint in design}},
  number       = {{4}},
  pages        = {{290--298}},
  title        = {{{Work roll cooling system design optimisation in presence of uncertainty and constrains}}},
  doi          = {{https://doi.org/10.1016/j.cirpj.2010.06.001}},
  volume       = {{2}},
  year         = {{2010}},
}

@inproceedings{46410,
  abstract     = {{The design and application of termination criteria has become an important aspect in evolutionary multi-objective optimization. Online convergence detection (OCD) determines when further generations are no longer promising based on statistical tests on a set of performance indicators. The behavior of OCD mainly depends on two parameters, the number of preceding generations considered in the statistical tests and the desired variance limit. In this paper, guidelines for selecting appropriate combinations of these parameters are empirically derived based on design-of-experiment methods. Furthermore, a variant of OCD is introduced which directly operates on the hypervolume indicator - the internal measure of the SMS-EMOA. This allows a separated analysis of the variance criterion and reduces the complexity of OCD. Based on the experimental design, a systematic comparison with the classical OCD approach is performed and differences between the appropriate parameterizations of both variants are highlighted.}},
  author       = {{Wagner, Tobias and Trautmann, Heike}},
  booktitle    = {{IEEE Congress on Evolutionary Computation}},
  issn         = {{1941-0026}},
  pages        = {{1--8}},
  title        = {{{Online convergence detection for evolutionary multi-objective algorithms revisited}}},
  doi          = {{10.1109/CEC.2010.5586474}},
  year         = {{2010}},
}

@inproceedings{37007,
  abstract     = {{UML is widely applied for the specification and modeling of software and some studies have demonstrated that it is applicable for HW/SW codesign. However, in this area there is still a big gap from UML modeling to SystemC-based verification and synthesis environments. This paper presents an efficient approach to bridge this gap in the context of Systems-on-a-Chip (SoC) design. We propose a framework for the seamless integration of a customized SysML entry with code generation for HW/SW cosimulation and high-level FPGA synthesis. For this, we extended the SysML UML profile by SystemC and synthesis capabilities. Two case studies demonstrate the applicability of our approach.}},
  author       = {{Mischkalla, Fabian and He, Da and Müller, Wolfgang}},
  booktitle    = {{Proceedings of DATE’10}},
  keywords     = {{Unified modeling language, Field programmable gate arrays, Bridges, Helium, Real time systems, Operating systems, Documentation, Application software, XML, Space exploration}},
  location     = {{Dresden}},
  publisher    = {{IEEE}},
  title        = {{{Closing the Gap between UML-based Modeling and Simulation of Combined HW/SW Systems}}},
  doi          = {{10.1109/DATE.2010.5456990}},
  year         = {{2010}},
}

@inproceedings{37009,
  abstract     = {{Today, mobile and embedded real time systems have to cope with the migration and allocation of multiple software tasks running on top of a real time operating system (RTOS) residing on one or several processors. For scaling of each task set and processor configuration, instruction set simulation and worst case timing analysis are typically applied. This paper presents a complementary approach for the verification of RTOS properties based on an abstract RTOS-Model in SystemC. We apply IEEE P1850 PSL for which we present an approach and first experiences for the assertion-based verification of RTOS properties.}},
  author       = {{Oliveira, Marcio F. S. and Zabel, Henning and Müller, Wolfgang}},
  booktitle    = {{Proceedings of DATE’10}},
  keywords     = {{Operating systems, Real time systems, Timing, Hardware, Analytical models, Embedded software, Software systems, Processor scheduling, Software performance, Performance analysis}},
  location     = {{Dresden}},
  publisher    = {{IEEE}},
  title        = {{{Assertion-Based Verification of RTOS Properties}}},
  doi          = {{10.1109/DATE.2010.5457130}},
  year         = {{2010}},
}

@inproceedings{37011,
  abstract     = {{Safety-critical automotive systems must fulfill hard real-time constraints for reliability and safety. This paper presents a case study for the application of an AUTOSAR-based language for timing modeling and analysis. We present and apply the Timing Augmented Description Language (TADL) and demonstrate a methodology for the development of a speed-adaptive steer-by-wire system. We examine the impact of TADL and the methodology on the development process and the suitability and interoperability of the applied tools with respect to the AUTOSAR-based tool chain in the context of our case study.}},
  author       = {{Klobedanz, Kay and Kuznik, Christoph and Thuy, Andre and Müller, Wolfgang}},
  booktitle    = {{Proceedings of DATE’10, Dresden}},
  keywords     = {{Timing, Programming, Automotive engineering, Application software, Hardware, Computer architecture, Communication system software, Software architecture, Delay, Software standards}},
  location     = {{Dresden}},
  publisher    = {{IEEE}},
  title        = {{{Timing Modeling and Analysis for AUTOSAR-Based Software Development - A Case Study}}},
  doi          = {{10.1109/DATE.2010.5457125}},
  year         = {{2010}},
}

@inproceedings{37037,
  abstract     = {{Today we can identify a big gap between requirement specification and the generation of test environments. This article extends the Classification Tree Method for Embedded Systems (CTM/ES) to fill this gap by new concepts for the precise specification of stimuli for operational ranges of continuous control systems. It introduces novel means for continuous acceptance criteria definition and for functional coverage definition.}},
  author       = {{Krupp, Alexander and Müller, Wolfgang}},
  booktitle    = {{Proceedings of DATE’10}},
  keywords     = {{System testing, Automatic testing, Object oriented modeling, Classification tree analysis, Automotive engineering, Mathematical model, Embedded system, Control systems, Electronic equipment testing, Software testing}},
  location     = {{Dresden}},
  publisher    = {{IEEE}},
  title        = {{{A Systematic Approach to Combined HW/SW System Test}}},
  doi          = {{10.1109/DATE.2010.5457186}},
  year         = {{2010}},
}

@inproceedings{37040,
  abstract     = {{Refinement of untimed TLM models into a timed HW/SW platform is a step by step design process which is a trade-off between timing accuracy of the used models and correct estimation of the final timing performance. The use of an RTOS on the target platform is mandatory in the case real-time properties must be guaranteed. Thus, the question is when the RTOS must be introduced in this step by step refinement process. This paper proposes a four-level RTOS-aware refinement methodology that, starting from an untimed TLM SystemC description of the whole system, progressively introduce HW/SW partitioning, timing, device driver and RTOS functionalities, till to obtain an accurate model of the final platform, where SW tasks run upon an RTOS hosted by QEMU and HW components are modeled by cycle accurate TLM descriptions. Each refinement level allows the designer to estimate more and more accurate timing properties, thus anticipating design decisions without being constrained to leave timing analysis to the final step of the refinement. The effectiveness of the methodology has been evaluated in the design of two complex platforms.}},
  author       = {{Becker, Markus and Di Guglielmo, Giuseppe and Fummi, Franco and Müller, Wolfgang and Pravadelli, Graziano and Xie, Tao}},
  booktitle    = {{Proceedings of DATE’10}},
  keywords     = {{Timing, Hardware, Operating systems, Process design, Accuracy, Standards development, Context modeling, Real time systems, Communication channels, Microprogramming}},
  location     = {{Dresden}},
  publisher    = {{IEEE}},
  title        = {{{RTOS-Aware Refinement for TLM2.0-based HW/SW Design}}},
  doi          = {{10.1109/DATE.2010.5456965}},
  year         = {{2010}},
}

@inproceedings{37046,
  abstract     = {{In this article, we present a flexible simulation environment for embedded real-time software refinement by a mixed level cosimulation. For this, we combine the native speed of an abstract real-time operating system (RTOS) model in SystemC with dynamic binary translation for fast Instruction Set Simulation (ISS) by QEMU. In order to support stepwise RTOS software refinement from system level to the target software, each task can be separately migrated between the native execution and the ISS. By adapting the dynamic binary translation approach to an efficient but yet very accurate synchronization scheme the overhead of QEMU user mode execution is only factor two compared to native SystemC. Furthermore, the simulation speed increases almost linearly according to the utilization of the task set abstracted by the native execution. Hereby, the simulation time can be considerably reduced by cosimulating just a subset of tasks on QEMU.}},
  author       = {{Becker, Markus and Zabel, Henning and Müller, Wolfgang}},
  editor       = {{Kleinjohann, L. and Kleinjohann, B.}},
  isbn         = {{978-3-642-15233-7}},
  keywords     = {{Application Programming Interface     User Mode     Kernel Space     System Level Design     Mixed Level}},
  publisher    = {{Springer Verlag}},
  title        = {{{A Mixed Level Simulation Environment for Stepwise RTOS Software Refinement}}},
  doi          = {{10.1007/978-3-642-15234-4_15}},
  year         = {{2010}},
}

@inproceedings{37044,
  abstract     = {{In this paper we present new concepts to resolve ECU (Electronic Control Unit) failures in FlexRay networks. Our approach extends the FlexRay bus schedule by redundant slots with modifications in the communication and slot assignment. We introduce additional backup nodes to replace faulty nodes. To reduce the required memory resources of the backup nodes, we distribute redundant tasks over different nodes and propose the migration of tasks to the backup node at runtime. We investigate different solutions to migrate the redundant tasks to the backup node by time-triggered and event-triggered transmissions.}},
  author       = {{Klobedanz, Kay and Defo, Gilles B. and Zabel, Henning and Müller, Wolfgang and Zhi, Yuan}},
  editor       = {{Kleinjohann, L. and Kleinjohann, B.}},
  isbn         = {{978-3-642-15233-7}},
  keywords     = {{Faulty Node     Static Segment     Slot Assignment     Task Migration     Communication Controller}},
  publisher    = {{Springer Verlag}},
  title        = {{{Task Migration for Fault-Tolerant FlexRay Networks}}},
  doi          = {{10.1007/978-3-642-15234-4_7}},
  year         = {{2010}},
}

@inproceedings{37042,
  abstract     = {{It's wide application in the area of software engineering, UML is still not fully accepted for other engineering domains like for electronic systems design. The main obstacle is due to a major gap in the design flow between UML-based modeling and verification. To overcome this gap, we introduce a UML profile for synthesizable SystemC and C and present its implementation in the context of the advanced SysML modeling environment of ARTiSAN Studio. We demonstrate how to customize Studio for SystemC/C comodeling so that it can serve as a verification and synthesis front-end.}},
  author       = {{Mischkalla, Fabian and Müller, Wolfgang and He, Da}},
  booktitle    = {{Proceedings of the M-BED Workshop}},
  title        = {{{A UML Profile for SysML-Based Comodeling for Embedded Systems Simulation and Synthesis}}},
  year         = {{2010}},
}

@inproceedings{37043,
  author       = {{Bol, Alexander and Müller, Wolfgang and Krupp, Alexander}},
  booktitle    = {{Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)}},
  title        = {{{Eine strukturierte Methode zur Generierung von SystemVerilog-Testumgebungen aus textuellen Anforderungsbeschreibungen}}},
  year         = {{2010}},
}

@inproceedings{37050,
  abstract     = {{The main obstacle for the wide acceptance of UML and SysML in the design of electronic systems is due to a major gap in the design flow between UML-based modeling and SystemC-based verification. To overcome this gap, we present an approach developed in the SATURN project which introduces UML profiles for the co-modeling of SystemC and C with code generation support in the context of the SysML tool suite ARTiSAN Studio®. We finally discuss the evaluation of the approach by two case studies.}},
  author       = {{Müller, Wolfgang and He, Da and Mischkalla, Fabian and Wegele, Arthur and Larkham, Adrian and Whiston, Paul and Penil, Pablo and Villar, Eugenio and Mitas, Nikolaos and Kritharidis, Dimitros and Azcarate, Florent and Carballeda, Manuel}},
  booktitle    = {{Proceedings of the IEEE Computer Society Annual Symposium on VLSI}},
  keywords     = {{Communicate Sequential Process     Virtual Platform     Smart Camera     Synchronous Data Flow     Artisan Studio}},
  title        = {{{The SATURN Approach to SysML-based HW/SW Codesign}}},
  doi          = {{10.1007/978-94-007-1488-5_9}},
  year         = {{2010}},
}

@inproceedings{37048,
  abstract     = {{We introduce a structured methodology for the generation of executable test environments from textual requirement specifications via UML class diagrams and the application of the classification tree methodology for embedded systems. The first phase is a stepwise transformation from unstructured English text into a textual normal form (TNF), which is automatically translated into UML class diagrams. After annotations of the class diagrams and the definition of test cases by sequence diagrams, both are converted into classification trees. From the classification trees we can finally generate SystemVerilog code. The methodology is introduced and evaluated by the example of an Adaptive Cruise Controller.}},
  author       = {{Müller, Wolfgang and Bol, Alexander and Krupp, Alexander and Lundkvist, Ola}},
  editor       = {{Kleinjohann, L. and Kleinjohann, B.}},
  isbn         = {{978-3-642-15233-7}},
  keywords     = {{Natural Language     UML     SystemVerilog     Testbenches}},
  publisher    = {{Springer Verlag}},
  title        = {{{Generation of Executable Testbenches from Natural Language Requirement Specifications for Embedded Real-Time Systems}}},
  doi          = {{10.1007/978-3-642-15234-4_9}},
  year         = {{2010}},
}

@inproceedings{37049,
  author       = {{Xie, Tao and Letombe, Florian and Müller, Wolfgang}},
  editor       = {{Kleinjohann, L. and Kleinjohann, B.}},
  publisher    = {{Springer Verlag}},
  title        = {{{Mutation-Analysis Directed Constrained Random Verification}}},
  year         = {{2010}},
}

@inproceedings{37051,
  author       = {{Xie, Tao and Defo, Gilles B. and Müller, Wolfgang}},
  location     = {{Paris}},
  title        = {{{An Eclipse-based Framework for the IP-XACT-enabled Assembly of Mixed-Level IPs}}},
  year         = {{2010}},
}

