@article{10610,
  author       = {{Platzner, Marco and Rinner, Bernhard and Weiss, Reinhold}},
  journal      = {{J.UCS Journal of Universal Computer Science}},
  pages        = {{811--820}},
  publisher    = {{Springer}},
  title        = {{{Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation}}},
  volume       = {{12}},
  year         = {{1995}},
}

@inproceedings{15294,
  author       = {{Hüllermeier, Eyke}},
  booktitle    = {{in Proceedings EUFIT-95 3rd European Congress on Intelligent Techniques and Soft Computing, Aachen, Germany}},
  editor       = {{Zimmermann, H.J.}},
  pages        = {{150--154}},
  title        = {{{Towards modelling of fuzzy functions}}},
  year         = {{1995}},
}

@inproceedings{15295,
  author       = {{Hüllermeier, Eyke}},
  booktitle    = {{in Proceedings ISFL-95 International Symposium on Logic, Zürich}},
  pages        = {{B49--B56}},
  publisher    = {{ICSC Academic Press}},
  title        = {{{Rule-based modelling in fuzzy simulation}}},
  year         = {{1995}},
}

@inproceedings{15305,
  author       = {{Hüllermeier, Eyke}},
  booktitle    = {{in Proceedings IMACS Symposium on Systems Analysis and Simulation, Berlin}},
  pages        = {{401--404}},
  publisher    = {{Gordon and Breach Publishers}},
  title        = {{{Fuzzy polynomial and spline interpolation}}},
  year         = {{1995}},
}

@inproceedings{15272,
  author       = {{Domik-Kienegger, Gitta and Owen, GS}},
  booktitle    = {{Proceedings of the Third Eurographics Workshop on Graphics and Visualization}},
  title        = {{{Education for Visualization-Activities of the ACM-SIGGRAPH Education Committee}}},
  year         = {{1995}},
}

@inbook{16236,
  author       = {{Hüllermeier, Eyke}},
  booktitle    = {{Moderne Makroökonomie-Eine kritische Bestandsaufnahme}},
  editor       = {{Flemmig, J.}},
  pages        = {{413--454}},
  publisher    = {{Metropolis}},
  title        = {{{Konjunkturzyklen aufgrund von Investitionsinterdependenzen:  Simulation und empirische Überprüfung}}},
  year         = {{1995}},
}

@inproceedings{13469,
  author       = {{Platzner, Marco and Rinner, Bernhard and Weiss, Reinhold }},
  booktitle    = {{Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing }},
  pages        = {{311--318}},
  publisher    = {{IEEE CS Press}},
  title        = {{{A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs}}},
  year         = {{1995}},
}

@inproceedings{13470,
  author       = {{Brenner, Eugen and Ginthör-Kalcsics, Robert and Hranitzky, Robert and Platzner, Marco and Rinner, Bernhard  and Steger, Christian  and Weiss, Reinhold}},
  booktitle    = {{Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference}},
  title        = {{{High-Performance Simulators Based on Multi-TMS320C40}}},
  year         = {{1995}},
}

@inproceedings{13471,
  author       = {{Friedl, Gerald and Platzner, Marco and Rinner, Bernhard}},
  booktitle    = {{Proceedings of the EURO-PAR'95 International Conference on Parallel Processing}},
  pages        = {{695--698}},
  publisher    = {{Springer International Publishing}},
  title        = {{{A Special-Purpose Coprocessor for Qualitative Simulation}}},
  year         = {{1995}},
}

@inproceedings{13472,
  author       = {{Platzner, Marco and Rinner, Bernhard and Weiss, Reinhold }},
  booktitle    = {{Proceedings of the EUROSIM Congress}},
  pages        = {{231--236}},
  publisher    = {{Elsevier}},
  title        = {{{Parallel Qualitative Simulation}}},
  year         = {{1995}},
}

@inproceedings{13473,
  author       = {{Platzner, Marco and Rinner, Bernhard}},
  booktitle    = {{Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems}},
  pages        = {{494--501}},
  publisher    = {{ISCA}},
  title        = {{{Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture}}},
  year         = {{1995}},
}

@inproceedings{13474,
  author       = {{Platzner, Marco and Rinner, Bernhard}},
  booktitle    = {{Proceedings of the 6th International Conference on Signal Processing Applications & Technology (ICSPAT)}},
  title        = {{{High-Performance Qualitative Simulation on a Multi-DSP Architecture}}},
  year         = {{1995}},
}

@inproceedings{13484,
  author       = {{Hranitzky, Robert and Platzner, Marco}},
  booktitle    = {{Proceedings of the 6th International Conference on Signal Processing Applications & Technology (ICSPAT)}},
  title        = {{{Design and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System}}},
  year         = {{1995}},
}

@inbook{34448,
  abstract     = {{We present a rigorous but transparent semantic definition for VHDL corresponding to the IEEE VHDL’ 93 standard [68, 9, 84]. Our definition covers the full behavior of signal and variable assignments as well as the behavior of the various wait statements including delta, time, and postponed cycles. We consider explicitly declared signals, ports, local variables, and shared variables. Our specification defines an abstract VHDL ’ 93 interpreter in the form of transition rules for an evolving algebra machine (EA-Machine) [60]. It faithfully reflects and supports the view of simulation given in the IEEE VHDL ’ 93 standard language reference manual. The definition can be understood without any prior formal training. We illustrate our definition by running the example VHDL program set out in the Introduction to this volume.}},
  author       = {{Börger, Egon and Glässer, Uwe and Müller, Wolfgang}},
  booktitle    = {{Semantics of VHDL}},
  editor       = {{Delgado Kloos, C. and Breuer, Peter T.}},
  isbn         = {{978-1-4615-2237-9}},
  keywords     = {{Transition Rule     Formal Verification     Variable Assignment     Kernel Process     Simulation Cycle}},
  pages        = {{107 -- 139}},
  publisher    = {{Kluwer Academic Publishers}},
  title        = {{{A Formal Definition of an Abstract VHDL'93 Simulator by EA-Machines}}},
  doi          = {{10.1007/978-1-4615-2237-9_5}},
  year         = {{1995}},
}

@inproceedings{39532,
  author       = {{Lehrenfeld, Georg and Müller, Wolfgang and Wiechers, N.}},
  booktitle    = {{Proceedings of the 4th EXPRESS User's Group}},
  title        = {{{Conformance Tests of Very Large STEP Files}}},
  year         = {{1995}},
}

@inproceedings{39535,
  author       = {{Zhao, R. and Kaufmann, H. J. and Kern, T. and Müller, Wolfgang}},
  location     = {{Tokyo, Japan}},
  title        = {{{Pen-based Interfaces for Engineering Environments}}},
  year         = {{1995}},
}

@inproceedings{39541,
  abstract     = {{We investigate a translation of SDL diagrams into the complete visual representation of Pictorial Janus (PJ) programs in order to analyze the specification by visual debugging and animation. We additionally introduce timing concepts to PJ (Timed PJ) for a mapping of the SDL timing statements. The concepts transforming SDL interaction and process diagrams into Timed PJ are outlined by an example sketching the transformation of an Ethernet CSMA/CD protocol specification.}},
  author       = {{Lehrenfeld, Georg and Müller, Wolfgang and Tahedl, C.}},
  booktitle    = {{Proceedings of Symposium on Visual Languages}},
  isbn         = {{0-8186-7045-2}},
  keywords     = {{Animation, Timing, Debugging, Ethernet networks, Multiaccess communication, Protocols, Computer languages, Prototypes, Environmental management, Visualization}},
  title        = {{{Transforming SDL Diagrams Into a Complete Visual Representation}}},
  doi          = {{10.1109/VL.1995.520803}},
  year         = {{1995}},
}

@inproceedings{39546,
  author       = {{Müller, Wolfgang and Lehrenfeld, Georg and Wiechers, N.}},
  title        = {{{Validation of EXPRESS Models}}},
  year         = {{1995}},
}

@inproceedings{39531,
  abstract     = {{Greenville, South Carolina}},
  author       = {{Müller, Wolfgang and Felser, W. and Buijs, F.}},
  booktitle    = {{Proceedings of the 4th EXPRESS User's Group}},
  title        = {{{Guide to EXPRESS-P}}},
  year         = {{1995}},
}

@inproceedings{39538,
  abstract     = {{This article discusses the application of Pictorial Janus (PJ) for the rapid development and analysis of protocols by animation and complete visualization. In order to make PJ applicable in the context of hardware description we first extend PJ by timing facilities (Timed PJ) and introduce an approach for integrating VHDL models into this visual framework preserving the simulation semantics of VHDL. We finally give the example of the specification and animation of a non interlocked protocol.}},
  author       = {{Müller, Wolfgang and Lehrenfeld, Georg and Tahedl, C.}},
  booktitle    = {{Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair}},
  isbn         = {{4-930813-67-0}},
  keywords     = {{Animation, Protocols, Timing, Computer languages, Electronic mail, Context modeling, Visualization, Control systems, Flow graphs, Trademarks}},
  title        = {{{Complete Visual Specification and Animations of Protocols}}},
  doi          = {{10.1109/ASPDAC.1995.486383}},
  year         = {{1995}},
}

