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A Stitch in Time: Supporting Android Developers in Writing Secure Code. <i>Proceedings of the 2017 ACM SIGSAC Conference on Computer and Communications Security</i>. <a href=\"https://doi.org/10.1145/3133956.3133977\">https://doi.org/10.1145/3133956.3133977</a>"},"date_updated":"2024-06-05T13:12:56Z","publisher":"ACM","author":[{"first_name":"Duc Cuong","last_name":"Nguyen","full_name":"Nguyen, Duc Cuong"},{"last_name":"Wermke","full_name":"Wermke, Dominik","first_name":"Dominik"},{"last_name":"Acar","full_name":"Acar, Yasemin","id":"94636","first_name":"Yasemin"},{"last_name":"Backes","full_name":"Backes, Michael","first_name":"Michael"},{"last_name":"Weir","full_name":"Weir, Charles","first_name":"Charles"},{"last_name":"Fahl","full_name":"Fahl, Sascha","first_name":"Sascha"}],"date_created":"2023-09-22T12:50:51Z","title":"A Stitch in Time: Supporting Android Developers in Writing Secure Code","doi":"10.1145/3133956.3133977"},{"publisher":"IEEE","date_updated":"2024-06-05T13:11:41Z","author":[{"id":"94636","full_name":"Acar, Yasemin","last_name":"Acar","first_name":"Yasemin"},{"first_name":"Christian","full_name":"Stransky, Christian","last_name":"Stransky"},{"first_name":"Dominik","full_name":"Wermke, Dominik","last_name":"Wermke"},{"full_name":"Weir, Charles","last_name":"Weir","first_name":"Charles"},{"first_name":"Michelle L.","last_name":"Mazurek","full_name":"Mazurek, Michelle L."},{"last_name":"Fahl","full_name":"Fahl, Sascha","first_name":"Sascha"}],"date_created":"2023-09-22T12:50:12Z","title":"Developers Need Support, Too: A Survey of Security Advice for Software Developers","doi":"10.1109/secdev.2017.17","publication_status":"published","year":"2017","citation":{"mla":"Acar, Yasemin, et al. “Developers Need Support, Too: A Survey of Security Advice for Software Developers.” <i>2017 IEEE Cybersecurity Development (SecDev)</i>, IEEE, 2017, doi:<a href=\"https://doi.org/10.1109/secdev.2017.17\">10.1109/secdev.2017.17</a>.","short":"Y. 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IEEE; 2017. doi:<a href=\"https://doi.org/10.1109/secdev.2017.17\">10.1109/secdev.2017.17</a>"},"_id":"47248","user_id":"14931","department":[{"_id":"34"},{"_id":"858"}],"language":[{"iso":"eng"}],"extern":"1","type":"conference","publication":"2017 IEEE Cybersecurity Development (SecDev)","status":"public"},{"publisher":"IEEE","date_updated":"2024-06-05T13:13:34Z","date_created":"2023-09-22T12:42:23Z","author":[{"first_name":"Yasemin","last_name":"Acar","id":"94636","full_name":"Acar, Yasemin"},{"full_name":"Fahl, Sascha","last_name":"Fahl","first_name":"Sascha"},{"first_name":"Michelle L.","last_name":"Mazurek","full_name":"Mazurek, Michelle L."}],"title":"You are Not Your Developer, Either: A Research Agenda for Usable Security and Privacy Research Beyond End Users","doi":"10.1109/secdev.2016.013","publication_status":"published","year":"2017","citation":{"ama":"Acar Y, Fahl S, Mazurek ML. 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Acar, M. Backes, S. Fahl, S. Garfinkel, D. Kim, M.L. Mazurek, C. Stransky, in: 2017 IEEE Symposium on Security and Privacy (SP), IEEE, 2017.","bibtex":"@inproceedings{Acar_Backes_Fahl_Garfinkel_Kim_Mazurek_Stransky_2017, title={Comparing the Usability of Cryptographic APIs}, DOI={<a href=\"https://doi.org/10.1109/sp.2017.52\">10.1109/sp.2017.52</a>}, booktitle={2017 IEEE Symposium on Security and Privacy (SP)}, publisher={IEEE}, author={Acar, Yasemin and Backes, Michael and Fahl, Sascha and Garfinkel, Simson and Kim, Doowon and Mazurek, Michelle L. and Stransky, Christian}, year={2017} }","mla":"Acar, Yasemin, et al. “Comparing the Usability of Cryptographic APIs.” <i>2017 IEEE Symposium on Security and Privacy (SP)</i>, IEEE, 2017, doi:<a href=\"https://doi.org/10.1109/sp.2017.52\">10.1109/sp.2017.52</a>.","apa":"Acar, Y., Backes, M., Fahl, S., Garfinkel, S., Kim, D., Mazurek, M. L., &#38; Stransky, C. (2017). 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IEEE; 2017. doi:<a href=\"https://doi.org/10.1109/sp.2017.52\">10.1109/sp.2017.52</a>"},"publication_status":"published"},{"publication":"Thirteenth Symposium on Usable Privacy and Security, SOUPS 2017, Santa Clara, CA, USA, July 12-14, 2017","type":"conference","status":"public","department":[{"_id":"34"},{"_id":"858"}],"user_id":"14931","_id":"47244","extern":"1","language":[{"iso":"eng"}],"page":"81–95","citation":{"ieee":"Y. Acar, C. Stransky, D. Wermke, M. L. Mazurek, and S. Fahl, “Security Developer Studies with GitHub Users: Exploring a Convenience Sample,” in <i>Thirteenth Symposium on Usable Privacy and Security, SOUPS 2017, Santa Clara, CA, USA, July 12-14, 2017</i>, 2017, pp. 81–95.","chicago":"Acar, Yasemin, Christian Stransky, Dominik Wermke, Michelle L. Mazurek, and Sascha Fahl. “Security Developer Studies with GitHub Users: Exploring a Convenience Sample.” In <i>Thirteenth Symposium on Usable Privacy and Security, SOUPS 2017, Santa Clara, CA, USA, July 12-14, 2017</i>, 81–95. USENIX Association, 2017.","ama":"Acar Y, Stransky C, Wermke D, Mazurek ML, Fahl S. Security Developer Studies with GitHub Users: Exploring a Convenience Sample. In: <i>Thirteenth Symposium on Usable Privacy and Security, SOUPS 2017, Santa Clara, CA, USA, July 12-14, 2017</i>. USENIX Association; 2017:81–95.","bibtex":"@inproceedings{Acar_Stransky_Wermke_Mazurek_Fahl_2017, title={Security Developer Studies with GitHub Users: Exploring a Convenience Sample}, booktitle={Thirteenth Symposium on Usable Privacy and Security, SOUPS 2017, Santa Clara, CA, USA, July 12-14, 2017}, publisher={USENIX Association}, author={Acar, Yasemin and Stransky, Christian and Wermke, Dominik and Mazurek, Michelle L. and Fahl, Sascha}, year={2017}, pages={81–95} }","mla":"Acar, Yasemin, et al. “Security Developer Studies with GitHub Users: Exploring a Convenience Sample.” <i>Thirteenth Symposium on Usable Privacy and Security, SOUPS 2017, Santa Clara, CA, USA, July 12-14, 2017</i>, USENIX Association, 2017, pp. 81–95.","short":"Y. Acar, C. Stransky, D. Wermke, M.L. Mazurek, S. Fahl, in: Thirteenth Symposium on Usable Privacy and Security, SOUPS 2017, Santa Clara, CA, USA, July 12-14, 2017, USENIX Association, 2017, pp. 81–95.","apa":"Acar, Y., Stransky, C., Wermke, D., Mazurek, M. L., &#38; Fahl, S. (2017). Security Developer Studies with GitHub Users: Exploring a Convenience Sample. <i>Thirteenth Symposium on Usable Privacy and Security, SOUPS 2017, Santa Clara, CA, USA, July 12-14, 2017</i>, 81–95."},"year":"2017","date_created":"2023-09-22T12:45:33Z","author":[{"first_name":"Yasemin","full_name":"Acar, Yasemin","id":"94636","last_name":"Acar"},{"full_name":"Stransky, Christian","last_name":"Stransky","first_name":"Christian"},{"full_name":"Wermke, Dominik","last_name":"Wermke","first_name":"Dominik"},{"first_name":"Michelle L.","full_name":"Mazurek, Michelle L.","last_name":"Mazurek"},{"full_name":"Fahl, Sascha","last_name":"Fahl","first_name":"Sascha"}],"publisher":"USENIX Association","date_updated":"2024-06-05T13:14:32Z","title":"Security Developer Studies with GitHub Users: Exploring a Convenience Sample"},{"citation":{"ieee":"E. M. Redmiles, Y. Acar, S. Fahl, and M. L. Mazurek, <i>A Summary of Survey Methodology Best Practices for Security and Privacy Researchers</i>. University of Maryland Computer Science Department, 2017.","chicago":"Redmiles, Elissa M., Yasemin Acar, Sascha Fahl, and Michelle L. Mazurek. <i>A Summary of Survey Methodology Best Practices for Security and Privacy Researchers</i>. University of Maryland Computer Science Department, 2017. <a href=\"https://doi.org/10.13016/M22K2W\">https://doi.org/10.13016/M22K2W</a>.","bibtex":"@book{Redmiles_Acar_Fahl_Mazurek_2017, title={A Summary of Survey Methodology Best Practices for Security and Privacy Researchers}, DOI={<a href=\"https://doi.org/10.13016/M22K2W\">10.13016/M22K2W</a>}, publisher={University of Maryland Computer Science Department}, author={Redmiles, Elissa M. and Acar, Yasemin and Fahl, Sascha and Mazurek, Michelle L.}, year={2017} }","short":"E.M. Redmiles, Y. Acar, S. Fahl, M.L. Mazurek, A Summary of Survey Methodology Best Practices for Security and Privacy Researchers, University of Maryland Computer Science Department, 2017.","mla":"Redmiles, Elissa M., et al. <i>A Summary of Survey Methodology Best Practices for Security and Privacy Researchers</i>. University of Maryland Computer Science Department, 2017, doi:<a href=\"https://doi.org/10.13016/M22K2W\">10.13016/M22K2W</a>.","ama":"Redmiles EM, Acar Y, Fahl S, Mazurek ML. <i>A Summary of Survey Methodology Best Practices for Security and Privacy Researchers</i>. University of Maryland Computer Science Department; 2017. doi:<a href=\"https://doi.org/10.13016/M22K2W\">10.13016/M22K2W</a>","apa":"Redmiles, E. M., Acar, Y., Fahl, S., &#38; Mazurek, M. L. (2017). <i>A Summary of Survey Methodology Best Practices for Security and Privacy Researchers</i>. University of Maryland Computer Science Department. <a href=\"https://doi.org/10.13016/M22K2W\">https://doi.org/10.13016/M22K2W</a>"},"year":"2017","doi":"10.13016/M22K2W","title":"A Summary of Survey Methodology Best Practices for Security and Privacy Researchers","author":[{"first_name":"Elissa M.","last_name":"Redmiles","full_name":"Redmiles, Elissa M."},{"first_name":"Yasemin","id":"94636","full_name":"Acar, Yasemin","last_name":"Acar"},{"last_name":"Fahl","full_name":"Fahl, Sascha","first_name":"Sascha"},{"full_name":"Mazurek, Michelle L.","last_name":"Mazurek","first_name":"Michelle L."}],"date_created":"2023-10-09T13:16:14Z","publisher":"University of Maryland Computer Science Department","date_updated":"2024-06-05T13:10:02Z","status":"public","type":"report","extern":"1","language":[{"iso":"eng"}],"department":[{"_id":"34"},{"_id":"858"}],"user_id":"14931","_id":"47873"},{"language":[{"iso":"eng"}],"keyword":["coldboot"],"ddc":["000"],"publication":"ACM Transactions on Reconfigurable Technology and Systems (TRETS)","file":[{"success":1,"relation":"main_file","content_type":"application/pdf","file_size":2131617,"file_id":"5322","access_level":"closed","file_name":"a24-riebler.pdf","date_updated":"2018-11-02T16:04:14Z","date_created":"2018-11-02T16:04:14Z","creator":"ups"}],"abstract":[{"text":"Branch and bound (B&B) algorithms structure the search space as a tree and eliminate infeasible solutions early by pruning subtrees that cannot lead to a valid or optimal solution. Custom hardware designs significantly accelerate the execution of these algorithms. In this article, we demonstrate a high-performance B&B implementation on FPGAs. First, we identify general elements of B&B algorithms and describe their implementation as a finite state machine. Then, we introduce workers that autonomously cooperate using work stealing to allow parallel execution and full utilization of the target FPGA. Finally, we explore advantages of instance-specific designs that target a specific problem instance to improve performance.\r\n\r\nWe evaluate our concepts by applying them to a branch and bound problem, the reconstruction of corrupted AES keys obtained from cold-boot attacks. The evaluation shows that our work stealing approach is scalable with the available resources and provides speedups proportional to the number of workers. Instance-specific designs allow us to achieve an overall speedup of 47 × compared to the fastest implementation of AES key reconstruction so far. Finally, we demonstrate how instance-specific designs can be generated just-in-time such that the provided speedups outweigh the additional time required for design synthesis.","lang":"eng"}],"date_created":"2017-07-25T14:17:32Z","publisher":"Association for Computing Machinery (ACM)","title":"Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs","issue":"3","quality_controlled":"1","year":"2017","department":[{"_id":"27"},{"_id":"518"}],"user_id":"15278","_id":"18","project":[{"_id":"1","name":"SFB 901","grant_number":"160364472"},{"name":"SFB 901 - Project Area C","_id":"4"},{"grant_number":"160364472","_id":"14","name":"SFB 901 - Subproject C2"},{"grant_number":"610996","_id":"34","name":"Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures"},{"name":"Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"file_date_updated":"2018-11-02T16:04:14Z","type":"journal_article","status":"public","volume":10,"author":[{"first_name":"Heinrich","full_name":"Riebler, Heinrich","id":"8961","last_name":"Riebler"},{"last_name":"Lass","orcid":"0000-0002-5708-7632","id":"24135","full_name":"Lass, Michael","first_name":"Michael"},{"last_name":"Mittendorf","full_name":"Mittendorf, Robert","first_name":"Robert"},{"first_name":"Thomas","last_name":"Löcke","full_name":"Löcke, Thomas"},{"first_name":"Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","full_name":"Plessl, Christian","id":"16153"}],"date_updated":"2023-09-26T13:23:58Z","doi":"10.1145/3053687","publication_identifier":{"issn":["1936-7406"]},"has_accepted_license":"1","publication_status":"published","intvolume":"        10","page":"24:1-24:23","citation":{"ieee":"H. Riebler, M. Lass, R. Mittendorf, T. Löcke, and C. Plessl, “Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs,” <i>ACM Transactions on Reconfigurable Technology and Systems (TRETS)</i>, vol. 10, no. 3, p. 24:1-24:23, 2017, doi: <a href=\"https://doi.org/10.1145/3053687\">10.1145/3053687</a>.","chicago":"Riebler, Heinrich, Michael Lass, Robert Mittendorf, Thomas Löcke, and Christian Plessl. “Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs.” <i>ACM Transactions on Reconfigurable Technology and Systems (TRETS)</i> 10, no. 3 (2017): 24:1-24:23. <a href=\"https://doi.org/10.1145/3053687\">https://doi.org/10.1145/3053687</a>.","ama":"Riebler H, Lass M, Mittendorf R, Löcke T, Plessl C. Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs. <i>ACM Transactions on Reconfigurable Technology and Systems (TRETS)</i>. 2017;10(3):24:1-24:23. doi:<a href=\"https://doi.org/10.1145/3053687\">10.1145/3053687</a>","apa":"Riebler, H., Lass, M., Mittendorf, R., Löcke, T., &#38; Plessl, C. (2017). Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs. <i>ACM Transactions on Reconfigurable Technology and Systems (TRETS)</i>, <i>10</i>(3), 24:1-24:23. <a href=\"https://doi.org/10.1145/3053687\">https://doi.org/10.1145/3053687</a>","bibtex":"@article{Riebler_Lass_Mittendorf_Löcke_Plessl_2017, title={Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs}, volume={10}, DOI={<a href=\"https://doi.org/10.1145/3053687\">10.1145/3053687</a>}, number={3}, journal={ACM Transactions on Reconfigurable Technology and Systems (TRETS)}, publisher={Association for Computing Machinery (ACM)}, author={Riebler, Heinrich and Lass, Michael and Mittendorf, Robert and Löcke, Thomas and Plessl, Christian}, year={2017}, pages={24:1-24:23} }","short":"H. Riebler, M. Lass, R. Mittendorf, T. Löcke, C. Plessl, ACM Transactions on Reconfigurable Technology and Systems (TRETS) 10 (2017) 24:1-24:23.","mla":"Riebler, Heinrich, et al. “Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs.” <i>ACM Transactions on Reconfigurable Technology and Systems (TRETS)</i>, vol. 10, no. 3, Association for Computing Machinery (ACM), 2017, p. 24:1-24:23, doi:<a href=\"https://doi.org/10.1145/3053687\">10.1145/3053687</a>."}},{"publication":"Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)","abstract":[{"lang":"eng","text":"Compared to classical HDL designs, generating FPGA with high-level synthesis from an OpenCL specification promises easier exploration of different design alternatives and, through ready-to-use infrastructure and common abstractions for host and memory interfaces, easier portability between different FPGA families. In this work, we evaluate the extent of this promise. To this end, we present a parameterized FDTD implementation for photonic microcavity simulations. Our design can trade-off different forms of parallelism and works for two independent OpenCL-based FPGA design flows. Hence, we can target FPGAs from different vendors and different FPGA families. We describe how we used pre-processor macros to achieve this flexibility and to work around different shortcomings of the current tools. Choosing the right design configurations, we are able to present two extremely competitive solutions for very different FPGA targets, reaching up to 172 GFLOPS sustained performance. With the portability and flexibility demonstrated, code developers not only avoid vendor lock-in, but can even make best use of real trade-offs between different architectures."}],"file":[{"success":1,"relation":"main_file","content_type":"application/pdf","file_size":230235,"access_level":"closed","file_name":"08056844.pdf","file_id":"5291","date_updated":"2018-11-02T15:02:28Z","creator":"ups","date_created":"2018-11-02T15:02:28Z"}],"keyword":["tet_topic_hpc"],"ddc":["000"],"language":[{"iso":"eng"}],"quality_controlled":"1","year":"2017","publisher":"IEEE","date_created":"2018-03-22T11:10:23Z","title":"Flexible FPGA design for FDTD using OpenCL","type":"conference","status":"public","_id":"1592","project":[{"_id":"1","name":"SFB 901","grant_number":"160364472"},{"_id":"4","name":"SFB 901 - Project Area C"},{"name":"SFB 901 - Subproject C2","_id":"14","grant_number":"160364472"},{"grant_number":"01|H16005A","name":"HighPerMeshes","_id":"33"},{"_id":"32","name":"Performance and Efficiency in HPC with Custom Computing","grant_number":"PL 595/2-1 / 320898746"},{"_id":"52","name":"Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"department":[{"_id":"27"},{"_id":"518"},{"_id":"61"}],"user_id":"15278","file_date_updated":"2018-11-02T15:02:28Z","has_accepted_license":"1","citation":{"ama":"Kenter T, Förstner J, Plessl C. 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