[{"has_accepted_license":"1","citation":{"ama":"Kniesburges S, Koutsopoulos A, Scheideler C. A Deterministic Worst-Case Message Complexity Optimal Solution for Resource Discovery. In: <i>Proceedings of 20th International Colloqium on Structural Information and Communication Complexity (SIROCCO)</i>. Lecture Notes in Computer Science. ; 2013:165-176. doi:<a href=\"https://doi.org/10.1007/978-3-319-03578-9_14\">10.1007/978-3-319-03578-9_14</a>","ieee":"S. Kniesburges, A. Koutsopoulos, and C. Scheideler, “A Deterministic Worst-Case Message Complexity Optimal Solution for Resource Discovery,” in <i>Proceedings of 20th International Colloqium on Structural Information and Communication Complexity (SIROCCO)</i>, 2013, pp. 165–176.","chicago":"Kniesburges, Sebastian, Andreas Koutsopoulos, and Christian Scheideler. “A Deterministic Worst-Case Message Complexity Optimal Solution for Resource Discovery.” In <i>Proceedings of 20th International Colloqium on Structural Information and Communication Complexity (SIROCCO)</i>, 165–76. Lecture Notes in Computer Science, 2013. <a href=\"https://doi.org/10.1007/978-3-319-03578-9_14\">https://doi.org/10.1007/978-3-319-03578-9_14</a>.","short":"S. Kniesburges, A. Koutsopoulos, C. Scheideler, in: Proceedings of 20th International Colloqium on Structural Information and Communication Complexity (SIROCCO), 2013, pp. 165–176.","mla":"Kniesburges, Sebastian, et al. “A Deterministic Worst-Case Message Complexity Optimal Solution for Resource Discovery.” <i>Proceedings of 20th International Colloqium on Structural Information and Communication Complexity (SIROCCO)</i>, 2013, pp. 165–76, doi:<a href=\"https://doi.org/10.1007/978-3-319-03578-9_14\">10.1007/978-3-319-03578-9_14</a>.","bibtex":"@inproceedings{Kniesburges_Koutsopoulos_Scheideler_2013, series={Lecture Notes in Computer Science}, title={A Deterministic Worst-Case Message Complexity Optimal Solution for Resource Discovery}, DOI={<a href=\"https://doi.org/10.1007/978-3-319-03578-9_14\">10.1007/978-3-319-03578-9_14</a>}, booktitle={Proceedings of 20th International Colloqium on Structural Information and Communication Complexity (SIROCCO)}, author={Kniesburges, Sebastian and Koutsopoulos, Andreas and Scheideler, Christian}, year={2013}, pages={165–176}, collection={Lecture Notes in Computer Science} }","apa":"Kniesburges, S., Koutsopoulos, A., &#38; Scheideler, C. (2013). A Deterministic Worst-Case Message Complexity Optimal Solution for Resource Discovery. In <i>Proceedings of 20th International Colloqium on Structural Information and Communication Complexity (SIROCCO)</i> (pp. 165–176). <a href=\"https://doi.org/10.1007/978-3-319-03578-9_14\">https://doi.org/10.1007/978-3-319-03578-9_14</a>"},"page":"165-176","year":"2013","date_created":"2017-10-17T12:42:42Z","author":[{"first_name":"Sebastian","last_name":"Kniesburges","full_name":"Kniesburges, Sebastian"},{"last_name":"Koutsopoulos","full_name":"Koutsopoulos, Andreas","first_name":"Andreas"},{"id":"20792","full_name":"Scheideler, Christian","last_name":"Scheideler","first_name":"Christian"}],"date_updated":"2022-01-06T07:02:17Z","doi":"10.1007/978-3-319-03578-9_14","title":"A Deterministic Worst-Case Message Complexity Optimal Solution for Resource Discovery","type":"conference","publication":"Proceedings of 20th International Colloqium on Structural Information and Communication Complexity (SIROCCO)","file":[{"content_type":"application/pdf","relation":"main_file","success":1,"date_created":"2018-03-15T10:24:40Z","creator":"florida","date_updated":"2018-03-15T10:24:40Z","file_id":"1277","file_name":"564-SIROCCO13.pdf","access_level":"closed","file_size":168884}],"status":"public","abstract":[{"text":"We consider the problem of resource discovery in distributed systems. In particular we give an algorithm, such that each node in a network discovers the add ress of any other node in the network. We model the knowledge of the nodes as a virtual overlay network given by a directed graph such that complete knowledge of all nodes corresponds to a complete graph in the overlay network. Although there are several solutions for resource discovery, our solution is the first that achieves worst-case optimal work for each node, i.e. the number of addresses (O(n)) or bits (O(nlogn)) a node receives or sendscoincides with the lower bound, while ensuring only a linearruntime (O(n)) on the number of rounds.","lang":"eng"}],"series_title":"Lecture Notes in Computer Science","user_id":"15504","department":[{"_id":"79"}],"project":[{"_id":"1","name":"SFB 901"},{"_id":"5","name":"SFB 901 - Subprojekt A1"},{"_id":"2","name":"SFB 901 - Project Area A"}],"_id":"564","file_date_updated":"2018-03-15T10:24:40Z","ddc":["040"]},{"date_created":"2019-01-15T10:09:17Z","publisher":"Elsevier BV","title":"Relational semantics for full linear logic","issue":"1","year":"2013","language":[{"iso":"eng"}],"publication":"Journal of Applied Logic","volume":12,"author":[{"first_name":"Dion","full_name":"Coumans, Dion","last_name":"Coumans"},{"first_name":"Mai","full_name":"Gehrke, Mai","last_name":"Gehrke"},{"last_name":"van Rooijen","full_name":"van Rooijen, Lorijn","id":"58843","first_name":"Lorijn"}],"date_updated":"2022-01-06T07:03:17Z","doi":"10.1016/j.jal.2013.07.005","publication_identifier":{"issn":["1570-8683"]},"publication_status":"published","intvolume":"        12","page":"50-66","citation":{"chicago":"Coumans, Dion, Mai Gehrke, and Lorijn van Rooijen. “Relational Semantics for Full Linear Logic.” <i>Journal of Applied Logic</i> 12, no. 1 (2013): 50–66. <a href=\"https://doi.org/10.1016/j.jal.2013.07.005\">https://doi.org/10.1016/j.jal.2013.07.005</a>.","ieee":"D. Coumans, M. Gehrke, and L. van Rooijen, “Relational semantics for full linear logic,” <i>Journal of Applied Logic</i>, vol. 12, no. 1, pp. 50–66, 2013.","ama":"Coumans D, Gehrke M, van Rooijen L. Relational semantics for full linear logic. <i>Journal of Applied Logic</i>. 2013;12(1):50-66. doi:<a href=\"https://doi.org/10.1016/j.jal.2013.07.005\">10.1016/j.jal.2013.07.005</a>","apa":"Coumans, D., Gehrke, M., &#38; van Rooijen, L. (2013). Relational semantics for full linear logic. <i>Journal of Applied Logic</i>, <i>12</i>(1), 50–66. <a href=\"https://doi.org/10.1016/j.jal.2013.07.005\">https://doi.org/10.1016/j.jal.2013.07.005</a>","short":"D. Coumans, M. Gehrke, L. van Rooijen, Journal of Applied Logic 12 (2013) 50–66.","bibtex":"@article{Coumans_Gehrke_van Rooijen_2013, title={Relational semantics for full linear logic}, volume={12}, DOI={<a href=\"https://doi.org/10.1016/j.jal.2013.07.005\">10.1016/j.jal.2013.07.005</a>}, number={1}, journal={Journal of Applied Logic}, publisher={Elsevier BV}, author={Coumans, Dion and Gehrke, Mai and van Rooijen, Lorijn}, year={2013}, pages={50–66} }","mla":"Coumans, Dion, et al. “Relational Semantics for Full Linear Logic.” <i>Journal of Applied Logic</i>, vol. 12, no. 1, Elsevier BV, 2013, pp. 50–66, doi:<a href=\"https://doi.org/10.1016/j.jal.2013.07.005\">10.1016/j.jal.2013.07.005</a>."},"department":[{"_id":"66"}],"user_id":"58843","_id":"6729","extern":"1","type":"journal_article","status":"public"},{"status":"public","publication":"Annual Conference on Foundations of Software Technology and Theoretical Computer Science, (FSTTCS) 2013, December 12-14, 2013, Guwahati, India","type":"conference","extern":"1","language":[{"iso":"eng"}],"department":[{"_id":"66"}],"series_title":"LIPIcs","user_id":"58843","_id":"6730","intvolume":"        24","page":"363--375","citation":{"ama":"Place T, van Rooijen L, Zeitoun M. Separating Regular Languages by Locally Testable and Locally Threshold Testable Languages. In: <i>Annual Conference on Foundations of Software Technology and Theoretical Computer Science, (FSTTCS) 2013, December 12-14, 2013, Guwahati, India</i>. Vol 24. LIPIcs. Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik; 2013:363--375. doi:<a href=\"https://doi.org/10.4230/LIPICS.FSTTCS.2013.363\">10.4230/LIPICS.FSTTCS.2013.363</a>","ieee":"T. Place, L. van Rooijen, and M. Zeitoun, “Separating Regular Languages by Locally Testable and Locally Threshold Testable Languages,” in <i>Annual Conference on Foundations of Software Technology and Theoretical Computer Science, (FSTTCS) 2013, December 12-14, 2013, Guwahati, India</i>, 2013, vol. 24, pp. 363--375.","chicago":"Place, Thomas, Lorijn van Rooijen, and Marc Zeitoun. “Separating Regular Languages by Locally Testable and Locally Threshold Testable Languages.” In <i>Annual Conference on Foundations of Software Technology and Theoretical Computer Science, (FSTTCS) 2013, December 12-14, 2013, Guwahati, India</i>, 24:363--375. LIPIcs. Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, 2013. <a href=\"https://doi.org/10.4230/LIPICS.FSTTCS.2013.363\">https://doi.org/10.4230/LIPICS.FSTTCS.2013.363</a>.","short":"T. Place, L. van Rooijen, M. Zeitoun, in: Annual Conference on Foundations of Software Technology and Theoretical Computer Science, (FSTTCS) 2013, December 12-14, 2013, Guwahati, India, Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, 2013, pp. 363--375.","mla":"Place, Thomas, et al. “Separating Regular Languages by Locally Testable and Locally Threshold Testable Languages.” <i>Annual Conference on Foundations of Software Technology and Theoretical Computer Science, (FSTTCS) 2013, December 12-14, 2013, Guwahati, India</i>, vol. 24, Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, 2013, pp. 363--375, doi:<a href=\"https://doi.org/10.4230/LIPICS.FSTTCS.2013.363\">10.4230/LIPICS.FSTTCS.2013.363</a>.","bibtex":"@inproceedings{Place_van Rooijen_Zeitoun_2013, series={LIPIcs}, title={Separating Regular Languages by Locally Testable and Locally Threshold Testable Languages}, volume={24}, DOI={<a href=\"https://doi.org/10.4230/LIPICS.FSTTCS.2013.363\">10.4230/LIPICS.FSTTCS.2013.363</a>}, booktitle={Annual Conference on Foundations of Software Technology and Theoretical Computer Science, (FSTTCS) 2013, December 12-14, 2013, Guwahati, India}, publisher={Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik}, author={Place, Thomas and van Rooijen, Lorijn and Zeitoun, Marc}, year={2013}, pages={363--375}, collection={LIPIcs} }","apa":"Place, T., van Rooijen, L., &#38; Zeitoun, M. (2013). Separating Regular Languages by Locally Testable and Locally Threshold Testable Languages. In <i>Annual Conference on Foundations of Software Technology and Theoretical Computer Science, (FSTTCS) 2013, December 12-14, 2013, Guwahati, India</i> (Vol. 24, pp. 363--375). Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik. <a href=\"https://doi.org/10.4230/LIPICS.FSTTCS.2013.363\">https://doi.org/10.4230/LIPICS.FSTTCS.2013.363</a>"},"year":"2013","doi":"10.4230/LIPICS.FSTTCS.2013.363","title":"Separating Regular Languages by Locally Testable and Locally Threshold Testable Languages","volume":24,"date_created":"2019-01-15T10:10:14Z","author":[{"last_name":"Place","full_name":"Place, Thomas","first_name":"Thomas"},{"first_name":"Lorijn","last_name":"van Rooijen","full_name":"van Rooijen, Lorijn","id":"58843"},{"first_name":"Marc","last_name":"Zeitoun","full_name":"Zeitoun, Marc"}],"date_updated":"2022-01-06T07:03:17Z","publisher":"Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik"},{"date_created":"2019-01-15T10:23:36Z","author":[{"last_name":"Place","full_name":"Place, Thomas","first_name":"Thomas"},{"last_name":"van Rooijen","full_name":"van Rooijen, Lorijn","id":"58843","first_name":"Lorijn"},{"full_name":"Zeitoun, Marc","last_name":"Zeitoun","first_name":"Marc"}],"date_updated":"2022-01-06T07:03:17Z","publisher":"Springer Berlin Heidelberg","doi":"10.1007/978-3-642-40313-2_64","title":"Separating Regular Languages by Piecewise Testable and Unambiguous Languages","publication_identifier":{"issn":["0302-9743","1611-3349"],"isbn":["9783642403125","9783642403132"]},"publication_status":"published","page":"729-740","citation":{"chicago":"Place, Thomas, Lorijn van Rooijen, and Marc Zeitoun. “Separating Regular Languages by Piecewise Testable and Unambiguous Languages.” In <i>Mathematical Foundations of Computer Science 2013 - 38th International Symposium, (MFCS) 2013, Klosterneuburg, Austria, August 26-30, 2013</i>, 729–40. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. <a href=\"https://doi.org/10.1007/978-3-642-40313-2_64\">https://doi.org/10.1007/978-3-642-40313-2_64</a>.","ieee":"T. Place, L. van Rooijen, and M. Zeitoun, “Separating Regular Languages by Piecewise Testable and Unambiguous Languages,” in <i>Mathematical Foundations of Computer Science 2013 - 38th International Symposium, (MFCS) 2013, Klosterneuburg, Austria, August 26-30, 2013</i>, 2013, pp. 729–740.","ama":"Place T, van Rooijen L, Zeitoun M. Separating Regular Languages by Piecewise Testable and Unambiguous Languages. In: <i>Mathematical Foundations of Computer Science 2013 - 38th International Symposium, (MFCS) 2013, Klosterneuburg, Austria, August 26-30, 2013</i>. Berlin, Heidelberg: Springer Berlin Heidelberg; 2013:729-740. doi:<a href=\"https://doi.org/10.1007/978-3-642-40313-2_64\">10.1007/978-3-642-40313-2_64</a>","apa":"Place, T., van Rooijen, L., &#38; Zeitoun, M. (2013). Separating Regular Languages by Piecewise Testable and Unambiguous Languages. In <i>Mathematical Foundations of Computer Science 2013 - 38th International Symposium, (MFCS) 2013, Klosterneuburg, Austria, August 26-30, 2013</i> (pp. 729–740). Berlin, Heidelberg: Springer Berlin Heidelberg. <a href=\"https://doi.org/10.1007/978-3-642-40313-2_64\">https://doi.org/10.1007/978-3-642-40313-2_64</a>","short":"T. Place, L. van Rooijen, M. Zeitoun, in: Mathematical Foundations of Computer Science 2013 - 38th International Symposium, (MFCS) 2013, Klosterneuburg, Austria, August 26-30, 2013, Springer Berlin Heidelberg, Berlin, Heidelberg, 2013, pp. 729–740.","bibtex":"@inproceedings{Place_van Rooijen_Zeitoun_2013, place={Berlin, Heidelberg}, title={Separating Regular Languages by Piecewise Testable and Unambiguous Languages}, DOI={<a href=\"https://doi.org/10.1007/978-3-642-40313-2_64\">10.1007/978-3-642-40313-2_64</a>}, booktitle={Mathematical Foundations of Computer Science 2013 - 38th International Symposium, (MFCS) 2013, Klosterneuburg, Austria, August 26-30, 2013}, publisher={Springer Berlin Heidelberg}, author={Place, Thomas and van Rooijen, Lorijn and Zeitoun, Marc}, year={2013}, pages={729–740} }","mla":"Place, Thomas, et al. “Separating Regular Languages by Piecewise Testable and Unambiguous Languages.” <i>Mathematical Foundations of Computer Science 2013 - 38th International Symposium, (MFCS) 2013, Klosterneuburg, Austria, August 26-30, 2013</i>, Springer Berlin Heidelberg, 2013, pp. 729–40, doi:<a href=\"https://doi.org/10.1007/978-3-642-40313-2_64\">10.1007/978-3-642-40313-2_64</a>."},"year":"2013","place":"Berlin, Heidelberg","department":[{"_id":"66"}],"user_id":"58843","_id":"6732","extern":"1","language":[{"iso":"eng"}],"publication":"Mathematical Foundations of Computer Science 2013 - 38th International Symposium, (MFCS) 2013, Klosterneuburg, Austria, August 26-30, 2013","type":"conference","status":"public"},{"type":"journal_article","publication":"International Journal of Real-time Image Processing","status":"public","user_id":"398","department":[{"_id":"78"}],"_id":"10604","language":[{"iso":"eng"}],"issue":"1","citation":{"chicago":"Happe, Markus, Enno Lübbers, and Marco Platzner. “A Self-Adaptive Heterogeneous Multi-Core Architecture for Embedded Real-Time Video Object Tracking.” <i>International Journal of Real-Time Image Processing</i> 8, no. 1 (2013): 95–110. <a href=\"https://doi.org/doi:10.1007/s11554-011-0212-y\">https://doi.org/doi:10.1007/s11554-011-0212-y</a>.","ieee":"M. Happe, E. Lübbers, and M. Platzner, “A Self-adaptive Heterogeneous Multi-core Architecture for Embedded Real-time Video Object Tracking,” <i>International Journal of Real-time Image Processing</i>, vol. 8, no. 1, pp. 95–110, 2013.","ama":"Happe M, Lübbers E, Platzner M. A Self-adaptive Heterogeneous Multi-core Architecture for Embedded Real-time Video Object Tracking. <i>International Journal of Real-time Image Processing</i>. 2013;8(1):95-110. doi:<a href=\"https://doi.org/doi:10.1007/s11554-011-0212-y\">doi:10.1007/s11554-011-0212-y</a>","apa":"Happe, M., Lübbers, E., &#38; Platzner, M. (2013). A Self-adaptive Heterogeneous Multi-core Architecture for Embedded Real-time Video Object Tracking. <i>International Journal of Real-Time Image Processing</i>, <i>8</i>(1), 95–110. <a href=\"https://doi.org/doi:10.1007/s11554-011-0212-y\">https://doi.org/doi:10.1007/s11554-011-0212-y</a>","bibtex":"@article{Happe_Lübbers_Platzner_2013, title={A Self-adaptive Heterogeneous Multi-core Architecture for Embedded Real-time Video Object Tracking}, volume={8}, DOI={<a href=\"https://doi.org/doi:10.1007/s11554-011-0212-y\">doi:10.1007/s11554-011-0212-y</a>}, number={1}, journal={International Journal of Real-time Image Processing}, publisher={Springer}, author={Happe, Markus and Lübbers, Enno and Platzner, Marco}, year={2013}, pages={95–110} }","short":"M. Happe, E. Lübbers, M. Platzner, International Journal of Real-Time Image Processing 8 (2013) 95–110.","mla":"Happe, Markus, et al. “A Self-Adaptive Heterogeneous Multi-Core Architecture for Embedded Real-Time Video Object Tracking.” <i>International Journal of Real-Time Image Processing</i>, vol. 8, no. 1, Springer, 2013, pp. 95–110, doi:<a href=\"https://doi.org/doi:10.1007/s11554-011-0212-y\">doi:10.1007/s11554-011-0212-y</a>."},"intvolume":"         8","page":"95 - 110","year":"2013","author":[{"first_name":"Markus","last_name":"Happe","full_name":"Happe, Markus"},{"first_name":"Enno","full_name":"Lübbers, Enno","last_name":"Lübbers"},{"last_name":"Platzner","id":"398","full_name":"Platzner, Marco","first_name":"Marco"}],"date_created":"2019-07-10T09:22:45Z","volume":8,"publisher":"Springer","date_updated":"2022-01-06T06:50:47Z","doi":"doi:10.1007/s11554-011-0212-y","title":"A Self-adaptive Heterogeneous Multi-core Architecture for Embedded Real-time Video Object Tracking"},{"year":"2013","citation":{"apa":"Anwer, J., Meisner, S., &#38; Platzner, M. (2013). Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. In <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on</i> (pp. 1–6). <a href=\"https://doi.org/10.1109/ReConFig.2013.6732280\">https://doi.org/10.1109/ReConFig.2013.6732280</a>","bibtex":"@inproceedings{Anwer_Meisner_Platzner_2013, title={Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime}, DOI={<a href=\"https://doi.org/10.1109/ReConFig.2013.6732280\">10.1109/ReConFig.2013.6732280</a>}, booktitle={Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on}, author={Anwer, Jahanzeb and Meisner, Sebastian and Platzner, Marco}, year={2013}, pages={1–6} }","mla":"Anwer, Jahanzeb, et al. “Dynamic Reliability Management: Reconfiguring Reliability-Levels of Hardware Designs at Runtime.” <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On</i>, 2013, pp. 1–6, doi:<a href=\"https://doi.org/10.1109/ReConFig.2013.6732280\">10.1109/ReConFig.2013.6732280</a>.","short":"J. Anwer, S. Meisner, M. Platzner, in: Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On, 2013, pp. 1–6.","ama":"Anwer J, Meisner S, Platzner M. Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. In: <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On</i>. ; 2013:1-6. doi:<a href=\"https://doi.org/10.1109/ReConFig.2013.6732280\">10.1109/ReConFig.2013.6732280</a>","chicago":"Anwer, Jahanzeb, Sebastian Meisner, and Marco Platzner. “Dynamic Reliability Management: Reconfiguring Reliability-Levels of Hardware Designs at Runtime.” In <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On</i>, 1–6, 2013. <a href=\"https://doi.org/10.1109/ReConFig.2013.6732280\">https://doi.org/10.1109/ReConFig.2013.6732280</a>.","ieee":"J. Anwer, S. Meisner, and M. Platzner, “Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime,” in <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on</i>, 2013, pp. 1–6."},"page":"1-6","date_updated":"2022-01-06T06:50:48Z","author":[{"last_name":"Anwer","full_name":"Anwer, Jahanzeb","first_name":"Jahanzeb"},{"full_name":"Meisner, Sebastian","last_name":"Meisner","first_name":"Sebastian"},{"id":"398","full_name":"Platzner, Marco","last_name":"Platzner","first_name":"Marco"}],"date_created":"2019-07-10T09:32:57Z","title":"Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime","doi":"10.1109/ReConFig.2013.6732280","type":"conference","publication":"Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on","status":"public","_id":"10620","user_id":"3118","department":[{"_id":"78"}],"keyword":["fault tolerant computing","field programmable gate arrays","logic design","reliability","BYU-LANL tool","DRM tool flow","FPGA based hardware designs","avionic application","device technologies","dynamic reliability management","fault-tolerant operation","hardware designs","reconfiguring reliability levels","space applications","Field programmable gate arrays","Hardware","Redundancy","Reliability engineering","Runtime","Tunneling magnetoresistance"],"language":[{"iso":"eng"}]},{"type":"bachelorsthesis","status":"public","_id":"10626","user_id":"3118","department":[{"_id":"78"}],"language":[{"iso":"eng"}],"year":"2013","citation":{"ama":"Bick C. <i>Beschleunigung von Tiefenberechnung Aus Stereobildern Durch FPGA-Basierte Datenflussrechner</i>. Paderborn University; 2013.","chicago":"Bick, Christian. <i>Beschleunigung von Tiefenberechnung Aus Stereobildern Durch FPGA-Basierte Datenflussrechner</i>. Paderborn University, 2013.","ieee":"C. Bick, <i>Beschleunigung von Tiefenberechnung aus Stereobildern durch FPGA-basierte Datenflussrechner</i>. Paderborn University, 2013.","short":"C. Bick, Beschleunigung von Tiefenberechnung Aus Stereobildern Durch FPGA-Basierte Datenflussrechner, Paderborn University, 2013.","mla":"Bick, Christian. <i>Beschleunigung von Tiefenberechnung Aus Stereobildern Durch FPGA-Basierte Datenflussrechner</i>. Paderborn University, 2013.","bibtex":"@book{Bick_2013, title={Beschleunigung von Tiefenberechnung aus Stereobildern durch FPGA-basierte Datenflussrechner}, publisher={Paderborn University}, author={Bick, Christian}, year={2013} }","apa":"Bick, C. (2013). <i>Beschleunigung von Tiefenberechnung aus Stereobildern durch FPGA-basierte Datenflussrechner</i>. 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A fast TCAD-based methodology for Variation analysis of emerging nano-devices. In: <i>2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)</i>. IEEE; 2013:83-88. doi:<a href=\"https://doi.org/10.1109/DFT.2013.6653587\">10.1109/DFT.2013.6653587</a>","ieee":"H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, M. Yazdani, and G. De Micheli, “A fast TCAD-based methodology for Variation analysis of emerging nano-devices,” in <i>2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)</i>, 2013, pp. 83–88.","chicago":"Ghasemzadeh Mohammadi, Hassan, Pierre-Emmanuel Gaillardon, Majid Yazdani, and Giovanni De Micheli. “A Fast TCAD-Based Methodology for Variation Analysis of Emerging Nano-Devices.” In <i>2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)</i>, 83–88. IEEE, 2013. <a href=\"https://doi.org/10.1109/DFT.2013.6653587\">https://doi.org/10.1109/DFT.2013.6653587</a>.","apa":"Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., Yazdani, M., &#38; De Micheli, G. (2013). A fast TCAD-based methodology for Variation analysis of emerging nano-devices. In <i>2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)</i> (pp. 83–88). IEEE. <a href=\"https://doi.org/10.1109/DFT.2013.6653587\">https://doi.org/10.1109/DFT.2013.6653587</a>","short":"H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, M. Yazdani, G. De Micheli, in: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), IEEE, 2013, pp. 83–88.","bibtex":"@inproceedings{Ghasemzadeh Mohammadi_Gaillardon_Yazdani_De Micheli_2013, title={A fast TCAD-based methodology for Variation analysis of emerging nano-devices}, DOI={<a href=\"https://doi.org/10.1109/DFT.2013.6653587\">10.1109/DFT.2013.6653587</a>}, booktitle={2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)}, publisher={IEEE}, author={Ghasemzadeh Mohammadi, Hassan and Gaillardon, Pierre-Emmanuel and Yazdani, Majid and De Micheli, Giovanni}, year={2013}, pages={83–88} }","mla":"Ghasemzadeh Mohammadi, Hassan, et al. “A Fast TCAD-Based Methodology for Variation Analysis of Emerging Nano-Devices.” <i>2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)</i>, IEEE, 2013, pp. 83–88, doi:<a href=\"https://doi.org/10.1109/DFT.2013.6653587\">10.1109/DFT.2013.6653587</a>."},"page":"83-88","year":"2013"}]