---
_id: '46382'
abstract:
- lang: eng
text: The incorporation of expert knowledge into multiobjective optimization is
an important issue which in this paper is reflected in terms of an aspiration
set consisting of multiple reference points. The behaviour of the recently introduced
evolutionary multiobjective algorithm AS-EMOA is analysed in detail and comparatively
studied for bi-objective optimization problems w.r.t. R-NSGA2 and a respective
variant. It will be shown that the averaged Hausdorff distance, integrated into
AS-EMOA, is an efficient means to accurately approximate the desired aspiration
set.
author:
- first_name: G
full_name: Rudolph, G
last_name: Rudolph
- first_name: O
full_name: Schütze, O
last_name: Schütze
- first_name: C
full_name: Grimme, C
last_name: Grimme
- first_name: Heike
full_name: Trautmann, Heike
id: '100740'
last_name: Trautmann
orcid: 0000-0002-9788-8282
citation:
ama: 'Rudolph G, Schütze O, Grimme C, Trautmann H. A Multiobjective Evolutionary
Algorithm Guided by Averaged Hausdorff Distance to Aspiration Sets. In: Tantar
A, Tantar E, Sun J, et al., eds. EVOLVE — A Bridge between Probability, Set
Oriented Numerics, and Evolutionary Computation V. Vol 288. Advances in Intelligent
Systems and Computing. Springer International Publishing; 2014:261–273. doi:10.1007/978-3-319-07494-8_18'
apa: Rudolph, G., Schütze, O., Grimme, C., & Trautmann, H. (2014). A Multiobjective
Evolutionary Algorithm Guided by Averaged Hausdorff Distance to Aspiration Sets.
In A. Tantar, E. Tantar, J. Sun, W. Zhang, Q. Ding, O. Schütze, M. Emmerich, P.
Legrand, M. P. Del, & C. C. Coello (Eds.), EVOLVE — A Bridge between Probability,
Set Oriented Numerics, and Evolutionary Computation V (Vol. 288, pp. 261–273).
Springer International Publishing. https://doi.org/10.1007/978-3-319-07494-8_18
bibtex: '@inbook{Rudolph_Schütze_Grimme_Trautmann_2014, series={Advances in Intelligent
Systems and Computing}, title={A Multiobjective Evolutionary Algorithm Guided
by Averaged Hausdorff Distance to Aspiration Sets}, volume={288}, DOI={10.1007/978-3-319-07494-8_18},
booktitle={EVOLVE — A Bridge between Probability, Set Oriented Numerics, and Evolutionary
Computation V}, publisher={Springer International Publishing}, author={Rudolph,
G and Schütze, O and Grimme, C and Trautmann, Heike}, editor={Tantar, A and Tantar,
E and Sun, J and Zhang, W and Ding, Q and Schütze, O and Emmerich, M and Legrand,
P and Del, Moral P and Coello, Coello CA}, year={2014}, pages={261–273}, collection={Advances
in Intelligent Systems and Computing} }'
chicago: Rudolph, G, O Schütze, C Grimme, and Heike Trautmann. “A Multiobjective
Evolutionary Algorithm Guided by Averaged Hausdorff Distance to Aspiration Sets.”
In EVOLVE — A Bridge between Probability, Set Oriented Numerics, and Evolutionary
Computation V, edited by A Tantar, E Tantar, J Sun, W Zhang, Q Ding, O Schütze,
M Emmerich, P Legrand, Moral P Del, and Coello CA Coello, 288:261–273. Advances
in Intelligent Systems and Computing. Springer International Publishing, 2014.
https://doi.org/10.1007/978-3-319-07494-8_18.
ieee: G. Rudolph, O. Schütze, C. Grimme, and H. Trautmann, “A Multiobjective Evolutionary
Algorithm Guided by Averaged Hausdorff Distance to Aspiration Sets,” in EVOLVE
— A Bridge between Probability, Set Oriented Numerics, and Evolutionary Computation
V, vol. 288, A. Tantar, E. Tantar, J. Sun, W. Zhang, Q. Ding, O. Schütze,
M. Emmerich, P. Legrand, M. P. Del, and C. C. Coello, Eds. Springer International
Publishing, 2014, pp. 261–273.
mla: Rudolph, G., et al. “A Multiobjective Evolutionary Algorithm Guided by Averaged
Hausdorff Distance to Aspiration Sets.” EVOLVE — A Bridge between Probability,
Set Oriented Numerics, and Evolutionary Computation V, edited by A Tantar
et al., vol. 288, Springer International Publishing, 2014, pp. 261–273, doi:10.1007/978-3-319-07494-8_18.
short: 'G. Rudolph, O. Schütze, C. Grimme, H. Trautmann, in: A. Tantar, E. Tantar,
J. Sun, W. Zhang, Q. Ding, O. Schütze, M. Emmerich, P. Legrand, M.P. Del, C.C.
Coello (Eds.), EVOLVE — A Bridge between Probability, Set Oriented Numerics, and
Evolutionary Computation V, Springer International Publishing, 2014, pp. 261–273.'
date_created: 2023-08-04T15:33:57Z
date_updated: 2023-10-16T13:43:23Z
department:
- _id: '34'
- _id: '819'
doi: 10.1007/978-3-319-07494-8_18
editor:
- first_name: A
full_name: Tantar, A
last_name: Tantar
- first_name: E
full_name: Tantar, E
last_name: Tantar
- first_name: J
full_name: Sun, J
last_name: Sun
- first_name: W
full_name: Zhang, W
last_name: Zhang
- first_name: Q
full_name: Ding, Q
last_name: Ding
- first_name: O
full_name: Schütze, O
last_name: Schütze
- first_name: M
full_name: Emmerich, M
last_name: Emmerich
- first_name: P
full_name: Legrand, P
last_name: Legrand
- first_name: Moral P
full_name: Del, Moral P
last_name: Del
- first_name: Coello CA
full_name: Coello, Coello CA
last_name: Coello
intvolume: ' 288'
language:
- iso: eng
page: 261–273
publication: EVOLVE — A Bridge between Probability, Set Oriented Numerics, and Evolutionary
Computation V
publication_identifier:
isbn:
- 978-3-319-07493-1
publisher: Springer International Publishing
series_title: Advances in Intelligent Systems and Computing
status: public
title: A Multiobjective Evolutionary Algorithm Guided by Averaged Hausdorff Distance
to Aspiration Sets
type: book_chapter
user_id: '15504'
volume: 288
year: '2014'
...
---
_id: '46383'
abstract:
- lang: eng
text: We propose an evolutionary multiobjective algorithm that approximates multiple
reference points (the aspiration set) in a single run using the concept of the
averaged Hausdorff distance.
author:
- first_name: Günter
full_name: Rudolph, Günter
last_name: Rudolph
- first_name: Christian
full_name: Grimme, Christian
last_name: Grimme
- first_name: Oliver
full_name: Schütze, Oliver
last_name: Schütze
- first_name: Heike
full_name: Trautmann, Heike
id: '100740'
last_name: Trautmann
orcid: 0000-0002-9788-8282
citation:
ama: 'Rudolph G, Grimme C, Schütze O, Trautmann H. An Aspiration Set EMOA Based
on Averaged Hausdorff Distances. In: Proceedings of the Learning and Intelligent
OptimizatioN Conference (LION 8). Vol 8426. Lecture Notes in Computer Science.
Springer; 2014:153–156.'
apa: Rudolph, G., Grimme, C., Schütze, O., & Trautmann, H. (2014). An Aspiration
Set EMOA Based on Averaged Hausdorff Distances. Proceedings of the Learning
and Intelligent OptimizatioN Conference (LION 8), 8426, 153–156.
bibtex: '@inproceedings{Rudolph_Grimme_Schütze_Trautmann_2014, place={Gainesville,
Florida, USA}, series={Lecture Notes in Computer Science}, title={An Aspiration
Set EMOA Based on Averaged Hausdorff Distances}, volume={8426}, booktitle={Proceedings
of the Learning and Intelligent OptimizatioN Conference (LION 8)}, publisher={Springer},
author={Rudolph, Günter and Grimme, Christian and Schütze, Oliver and Trautmann,
Heike}, year={2014}, pages={153–156}, collection={Lecture Notes in Computer Science}
}'
chicago: 'Rudolph, Günter, Christian Grimme, Oliver Schütze, and Heike Trautmann.
“An Aspiration Set EMOA Based on Averaged Hausdorff Distances.” In Proceedings
of the Learning and Intelligent OptimizatioN Conference (LION 8), 8426:153–156.
Lecture Notes in Computer Science. Gainesville, Florida, USA: Springer, 2014.'
ieee: G. Rudolph, C. Grimme, O. Schütze, and H. Trautmann, “An Aspiration Set EMOA
Based on Averaged Hausdorff Distances,” in Proceedings of the Learning and
Intelligent OptimizatioN Conference (LION 8), 2014, vol. 8426, pp. 153–156.
mla: Rudolph, Günter, et al. “An Aspiration Set EMOA Based on Averaged Hausdorff
Distances.” Proceedings of the Learning and Intelligent OptimizatioN Conference
(LION 8), vol. 8426, Springer, 2014, pp. 153–156.
short: 'G. Rudolph, C. Grimme, O. Schütze, H. Trautmann, in: Proceedings of the
Learning and Intelligent OptimizatioN Conference (LION 8), Springer, Gainesville,
Florida, USA, 2014, pp. 153–156.'
date_created: 2023-08-04T15:34:44Z
date_updated: 2023-10-16T13:43:59Z
department:
- _id: '34'
- _id: '819'
intvolume: ' 8426'
language:
- iso: eng
page: 153–156
place: Gainesville, Florida, USA
publication: Proceedings of the Learning and Intelligent OptimizatioN Conference (LION
8)
publisher: Springer
series_title: Lecture Notes in Computer Science
status: public
title: An Aspiration Set EMOA Based on Averaged Hausdorff Distances
type: conference
user_id: '15504'
volume: 8426
year: '2014'
...
---
_id: '46384'
abstract:
- lang: eng
text: Multimodal optimization requires maintenance of a good search space coverage
and approximation of several optima at the same time. We analyze two constitutive
optimization algorithms and show that in many cases, a phase transition occurs
at some point, so that either diversity collapses or optimization stagnates. But
how to derive suitable stopping criteria for multimodal optimization? Experimental
results indicate that an algorithm’s population contains sufficient information
to estimate the point in time when several performance indicators reach their
optimum. Thus, stopping criteria are formulated based on summary characteristics
employing objective values and mutation strength.
author:
- first_name: S
full_name: Wessing, S
last_name: Wessing
- first_name: M
full_name: Preuss, M
last_name: Preuss
- first_name: Heike
full_name: Trautmann, Heike
id: '100740'
last_name: Trautmann
orcid: 0000-0002-9788-8282
citation:
ama: 'Wessing S, Preuss M, Trautmann H. Stopping Criteria for Multimodal Optimization.
In: Bartz-Beielstein T, Branke J, Filipic B, Smith J, eds. Proceedings of the
Parallel Problem Solving from Nature — PPSN XIII. Vol 8672. Lecture Notes
in Computer Science. Springer; 2014:141–150. doi:10.1007/978-3-319-10762-2_14'
apa: Wessing, S., Preuss, M., & Trautmann, H. (2014). Stopping Criteria for
Multimodal Optimization. In T. Bartz-Beielstein, J. Branke, B. Filipic, &
J. Smith (Eds.), Proceedings of the Parallel Problem Solving from Nature —
PPSN XIII (Vol. 8672, pp. 141–150). Springer. https://doi.org/10.1007/978-3-319-10762-2_14
bibtex: '@inproceedings{Wessing_Preuss_Trautmann_2014, place={Ljubljana, Slovenia},
series={Lecture Notes in Computer Science}, title={Stopping Criteria for Multimodal
Optimization}, volume={8672}, DOI={10.1007/978-3-319-10762-2_14},
booktitle={Proceedings of the Parallel Problem Solving from Nature — PPSN XIII},
publisher={Springer}, author={Wessing, S and Preuss, M and Trautmann, Heike},
editor={Bartz-Beielstein, T and Branke, J and Filipic, B and Smith, J}, year={2014},
pages={141–150}, collection={Lecture Notes in Computer Science} }'
chicago: 'Wessing, S, M Preuss, and Heike Trautmann. “Stopping Criteria for Multimodal
Optimization.” In Proceedings of the Parallel Problem Solving from Nature —
PPSN XIII, edited by T Bartz-Beielstein, J Branke, B Filipic, and J Smith,
8672:141–150. Lecture Notes in Computer Science. Ljubljana, Slovenia: Springer,
2014. https://doi.org/10.1007/978-3-319-10762-2_14.'
ieee: 'S. Wessing, M. Preuss, and H. Trautmann, “Stopping Criteria for Multimodal
Optimization,” in Proceedings of the Parallel Problem Solving from Nature —
PPSN XIII, 2014, vol. 8672, pp. 141–150, doi: 10.1007/978-3-319-10762-2_14.'
mla: Wessing, S., et al. “Stopping Criteria for Multimodal Optimization.” Proceedings
of the Parallel Problem Solving from Nature — PPSN XIII, edited by T Bartz-Beielstein
et al., vol. 8672, Springer, 2014, pp. 141–150, doi:10.1007/978-3-319-10762-2_14.
short: 'S. Wessing, M. Preuss, H. Trautmann, in: T. Bartz-Beielstein, J. Branke,
B. Filipic, J. Smith (Eds.), Proceedings of the Parallel Problem Solving from
Nature — PPSN XIII, Springer, Ljubljana, Slovenia, 2014, pp. 141–150.'
date_created: 2023-08-04T15:36:01Z
date_updated: 2023-10-16T13:44:15Z
department:
- _id: '34'
- _id: '819'
doi: 10.1007/978-3-319-10762-2_14
editor:
- first_name: T
full_name: Bartz-Beielstein, T
last_name: Bartz-Beielstein
- first_name: J
full_name: Branke, J
last_name: Branke
- first_name: B
full_name: Filipic, B
last_name: Filipic
- first_name: J
full_name: Smith, J
last_name: Smith
intvolume: ' 8672'
language:
- iso: eng
page: 141–150
place: Ljubljana, Slovenia
publication: Proceedings of the Parallel Problem Solving from Nature — PPSN XIII
publisher: Springer
series_title: Lecture Notes in Computer Science
status: public
title: Stopping Criteria for Multimodal Optimization
type: conference
user_id: '15504'
volume: 8672
year: '2014'
...
---
_id: '25164'
author:
- first_name: Markus
full_name: Becker, Markus
last_name: Becker
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
- first_name: Joachim
full_name: Stroop, Joachim
last_name: Stroop
- first_name: Ulrich
full_name: Kiffmeier, Ulrich
last_name: Kiffmeier
citation:
ama: Becker M, Müller W, Stroop J, Kiffmeier U. HeroeS - A Framework for Heterogeneous
Software-Intensive System Design with SystemC. Design, Automation and Test
in Europe DATE, University Booth, Dresden. Published online 2014.
apa: Becker, M., Müller, W., Stroop, J., & Kiffmeier, U. (2014). HeroeS - A
Framework for Heterogeneous Software-Intensive System Design with SystemC. Design,
Automation and Test in Europe DATE, University Booth, Dresden.
bibtex: '@article{Becker_Müller_Stroop_Kiffmeier_2014, title={HeroeS - A Framework
for Heterogeneous Software-Intensive System Design with SystemC}, journal={Design,
Automation and Test in Europe DATE, University Booth, Dresden}, author={Becker,
Markus and Müller, Wolfgang and Stroop, Joachim and Kiffmeier, Ulrich}, year={2014}
}'
chicago: Becker, Markus, Wolfgang Müller, Joachim Stroop, and Ulrich Kiffmeier.
“HeroeS - A Framework for Heterogeneous Software-Intensive System Design with
SystemC.” Design, Automation and Test in Europe DATE, University Booth, Dresden,
2014.
ieee: M. Becker, W. Müller, J. Stroop, and U. Kiffmeier, “HeroeS - A Framework for
Heterogeneous Software-Intensive System Design with SystemC,” Design, Automation
and Test in Europe DATE, University Booth, Dresden, 2014.
mla: Becker, Markus, et al. “HeroeS - A Framework for Heterogeneous Software-Intensive
System Design with SystemC.” Design, Automation and Test in Europe DATE, University
Booth, Dresden, 2014.
short: M. Becker, W. Müller, J. Stroop, U. Kiffmeier, Design, Automation and Test
in Europe DATE, University Booth, Dresden (2014).
date_created: 2021-09-30T10:17:43Z
date_updated: 2024-04-18T21:06:21Z
department:
- _id: '672'
language:
- iso: eng
publication: Design, Automation and Test in Europe DATE, University Booth, Dresden
status: public
title: HeroeS - A Framework for Heterogeneous Software-Intensive System Design with
SystemC
type: journal_article
user_id: '16243'
year: '2014'
...
---
_id: '47162'
alternative_title:
- a study on the root causes of SSL misconfigurations
author:
- first_name: Sascha
full_name: Fahl, Sascha
last_name: Fahl
- first_name: Yasemin
full_name: Acar, Yasemin
id: '94636'
last_name: Acar
- first_name: Henning
full_name: Perl, Henning
last_name: Perl
- first_name: Matthew
full_name: Smith, Matthew
last_name: Smith
citation:
ama: 'Fahl S, Acar Y, Perl H, Smith M. Why eve and mallory (also) love webmasters.
In: Proceedings of the 9th ACM Symposium on Information, Computer and Communications
Security. ACM; 2014. doi:10.1145/2590296.2590341'
apa: Fahl, S., Acar, Y., Perl, H., & Smith, M. (2014). Why eve and mallory (also)
love webmasters. Proceedings of the 9th ACM Symposium on Information, Computer
and Communications Security. https://doi.org/10.1145/2590296.2590341
bibtex: '@inproceedings{Fahl_Acar_Perl_Smith_2014, title={Why eve and mallory (also)
love webmasters}, DOI={10.1145/2590296.2590341},
booktitle={Proceedings of the 9th ACM symposium on Information, computer and communications
security}, publisher={ACM}, author={Fahl, Sascha and Acar, Yasemin and Perl, Henning
and Smith, Matthew}, year={2014} }'
chicago: Fahl, Sascha, Yasemin Acar, Henning Perl, and Matthew Smith. “Why Eve and
Mallory (Also) Love Webmasters.” In Proceedings of the 9th ACM Symposium on
Information, Computer and Communications Security. ACM, 2014. https://doi.org/10.1145/2590296.2590341.
ieee: 'S. Fahl, Y. Acar, H. Perl, and M. Smith, “Why eve and mallory (also) love
webmasters,” 2014, doi: 10.1145/2590296.2590341.'
mla: Fahl, Sascha, et al. “Why Eve and Mallory (Also) Love Webmasters.” Proceedings
of the 9th ACM Symposium on Information, Computer and Communications Security,
ACM, 2014, doi:10.1145/2590296.2590341.
short: 'S. Fahl, Y. Acar, H. Perl, M. Smith, in: Proceedings of the 9th ACM Symposium
on Information, Computer and Communications Security, ACM, 2014.'
date_created: 2023-09-22T11:56:00Z
date_updated: 2024-06-05T13:17:31Z
department:
- _id: '34'
- _id: '858'
doi: 10.1145/2590296.2590341
extern: '1'
language:
- iso: eng
publication: Proceedings of the 9th ACM symposium on Information, computer and communications
security
publication_status: published
publisher: ACM
status: public
title: Why eve and mallory (also) love webmasters
type: conference
user_id: '14931'
year: '2014'
...
---
_id: '8171'
abstract:
- lang: eng
text: "The polynomial hierarchy plays a central role in classical complexity theory.
Here, we define\r\na quantum generalization of the polynomial hierarchy, and initiate
its study. We show that\r\nnot only are there natural complete problems for the
second level of this quantum hierarchy, but that these problems are in fact hard
to approximate. Using the same techniques, we\r\nalso obtain hardness of approximation
for the class QCMA. Our approach is based on the\r\nuse of dispersers, and is
inspired by the classical results of Umans regarding hardness of approximation
for the second level of the classical polynomial hierarchy [Umans, FOCS 1999].\r\nThe
problems for which we prove hardness of approximation for include, among others,
a\r\nquantum version of the Succinct Set Cover problem, and a variant of the local
Hamiltonian\r\nproblem with hybrid classical-quantum ground states."
article_type: original
author:
- first_name: Sevag
full_name: Gharibian, Sevag
id: '71541'
last_name: Gharibian
orcid: 0000-0002-9992-3379
- first_name: Julia
full_name: Kempe, Julia
last_name: Kempe
citation:
ama: Gharibian S, Kempe J. Hardness of approximation for quantum problems. Quantum
Information & Computation. 2014;14(5-6):517-540.
apa: Gharibian, S., & Kempe, J. (2014). Hardness of approximation for quantum
problems. Quantum Information & Computation, 14(5–6), 517–540.
bibtex: '@article{Gharibian_Kempe_2014, title={Hardness of approximation for quantum
problems}, volume={14}, number={5–6}, journal={Quantum Information & Computation},
author={Gharibian, Sevag and Kempe, Julia}, year={2014}, pages={517–540} }'
chicago: 'Gharibian, Sevag, and Julia Kempe. “Hardness of Approximation for Quantum
Problems.” Quantum Information & Computation 14, no. 5–6 (2014): 517–40.'
ieee: S. Gharibian and J. Kempe, “Hardness of approximation for quantum problems,”
Quantum Information & Computation, vol. 14, no. 5–6, pp. 517–540, 2014.
mla: Gharibian, Sevag, and Julia Kempe. “Hardness of Approximation for Quantum Problems.”
Quantum Information & Computation, vol. 14, no. 5–6, 2014, pp. 517–40.
short: S. Gharibian, J. Kempe, Quantum Information & Computation 14 (2014) 517–540.
date_created: 2019-03-01T11:56:55Z
date_updated: 2023-02-28T11:02:47Z
department:
- _id: '623'
- _id: '7'
extern: '1'
external_id:
arxiv:
- '1209.1055'
intvolume: ' 14'
issue: 5-6
keyword:
- Hardness of approximation
- polynomial time hierarchy
- succinct set cover
- quantum complexity
language:
- iso: eng
main_file_link:
- open_access: '1'
url: https://arxiv.org/abs/1209.1055
oa: '1'
page: 517-540
publication: Quantum Information & Computation
publication_status: published
status: public
title: Hardness of approximation for quantum problems
type: journal_article
user_id: '71541'
volume: 14
year: '2014'
...
---
_id: '8172'
abstract:
- lang: eng
text: We show how to efficiently simulate continuous-time quantum query algorithms
that run in time T in a manner that preserves the query complexity (within a polylogarithmic
factor) while also incurring a small overhead cost in the total number of gates
between queries. By small overhead, we mean T within a factor that is polylogarithmic
in terms of T and a cost measure that reflects the cost of computing the driving
Hamiltonian. This permits any continuous-time quantum algorithm based on an efficiently
computable driving Hamiltonian to be converted into a gate-efficient algorithm
with similar running time.
article_type: original
author:
- first_name: Dominic
full_name: W. Berry, Dominic
last_name: W. Berry
- first_name: Richard
full_name: Cleve, Richard
last_name: Cleve
- first_name: Sevag
full_name: Gharibian, Sevag
id: '71541'
last_name: Gharibian
orcid: 0000-0002-9992-3379
citation:
ama: W. Berry D, Cleve R, Gharibian S. Gate-efficient discrete simulations of continuous-time
quantum query algorithms. Quantum Information & Computation. 2014;14(1-2):1-30.
apa: W. Berry, D., Cleve, R., & Gharibian, S. (2014). Gate-efficient discrete
simulations of continuous-time quantum query algorithms. Quantum Information
& Computation, 14(1–2), 1–30.
bibtex: '@article{W. Berry_Cleve_Gharibian_2014, title={Gate-efficient discrete
simulations of continuous-time quantum query algorithms}, volume={14}, number={1–2},
journal={Quantum Information & Computation}, author={W. Berry, Dominic and
Cleve, Richard and Gharibian, Sevag}, year={2014}, pages={1–30} }'
chicago: 'W. Berry, Dominic, Richard Cleve, and Sevag Gharibian. “Gate-Efficient
Discrete Simulations of Continuous-Time Quantum Query Algorithms.” Quantum
Information & Computation 14, no. 1–2 (2014): 1–30.'
ieee: D. W. Berry, R. Cleve, and S. Gharibian, “Gate-efficient discrete simulations
of continuous-time quantum query algorithms,” Quantum Information & Computation,
vol. 14, no. 1–2, pp. 1–30, 2014.
mla: W. Berry, Dominic, et al. “Gate-Efficient Discrete Simulations of Continuous-Time
Quantum Query Algorithms.” Quantum Information & Computation, vol.
14, no. 1–2, 2014, pp. 1–30.
short: D. W. Berry, R. Cleve, S. Gharibian, Quantum Information & Computation
14 (2014) 1–30.
date_created: 2019-03-01T11:59:24Z
date_updated: 2023-02-28T11:02:58Z
department:
- _id: '623'
- _id: '7'
extern: '1'
external_id:
arxiv:
- '1211.4637'
intvolume: ' 14'
issue: 1-2
language:
- iso: eng
main_file_link:
- open_access: '1'
url: https://arxiv.org/abs/1211.4637
oa: '1'
page: 1-30
publication: Quantum Information & Computation
publication_status: published
status: public
title: Gate-efficient discrete simulations of continuous-time quantum query algorithms
type: journal_article
user_id: '71541'
volume: 14
year: '2014'
...
---
_id: '335'
abstract:
- lang: eng
text: Im Bereich der Computersysteme ist die Festlegung der Grenze zwischen Hardware
und Software eine zentrale Problemstellung. Diese Grenze hat in den letzten Jahrzehnten
nicht nur die Entwicklung von Computersystemen bestimmt, sondern auch die Strukturierung
der Ausbildung in den Computerwissenschaften beeinflusst und sogar zur Entstehung
von neuen Forschungsrichtungen gef{\"u}hrt. In diesem Beitrag besch{\"a}ftigen
wir uns mit Verschiebungen an der Grenze zwischen Hardware und Software und diskutieren
insgesamt drei qualitativ unterschiedliche Formen solcher Verschiebungen. Wir
beginnen mit der Entwicklung von Computersystemen im letzten Jahrhundert und der
Entstehung dieser Grenze, die Hardware und Software erst als eigenst{\"a}ndige
Produkte differenziert. Dann widmen wir uns der Frage, welche Funktionen in einem
Computersystem besser in Hardware und welche besser in Software realisiert werden
sollten, eine Fragestellung die zu Beginn der 90er-Jahre zur Bildung einer eigenen
Forschungsrichtung, dem sogenannten Hardware/Software Co-design, gef{\"u}hrt hat.
Im Hardware/Software Co-design findet eine Verschiebung von Funktionen an der Grenze
zwischen Hardware und Software w{\"a}hrend der Entwicklung eines Produktes statt,
um Produkteigenschaften zu optimieren. Im fertig entwickelten und eingesetzten
Produkt hingegen k{\"o}nnen wir dann eine feste Grenze zwischen Hardware und Software
beobachten. Im dritten Teil dieses Beitrags stellen wir mit selbst-adaptiven Systemen
eine hochaktuelle Forschungsrichtung vor. In unserem Kontext bedeutet Selbstadaption,
dass ein System Verschiebungen von Funktionen an der Grenze zwischen Hardware
und Software autonom w{\"a}hrend der Betriebszeit vornimmt. Solche Systeme beruhen
auf rekonfigurierbarer Hardware, einer relativ neuen Technologie mit der die Hardware
eines Computers w{\"a}hrend der Laufzeit ver{\"a}ndert werden kann. Diese Technologie
f{\"u}hrt zu einer durchl{\"a}ssigen Grenze zwischen Hardware und Software bzw.
l{\"o}st sie die herk{\"o}mmliche Vorstellung einer festen Hardware und einer
flexiblen Software damit auf.
author:
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Platzner M, Plessl C. Verschiebungen an der Grenze zwischen Hardware und Software.
In: Künsemöller J, Eke NO, Foit L, Kaerlein T, eds. Logiken strukturbildender
Prozesse: Automatismen. Schriftenreihe des Graduiertenkollegs “Automatismen.”
Wilhelm Fink; 2014:123-144.'
apa: 'Platzner, M., & Plessl, C. (2014). Verschiebungen an der Grenze zwischen
Hardware und Software. In J. Künsemöller, N. O. Eke, L. Foit, & T. Kaerlein
(Eds.), Logiken strukturbildender Prozesse: Automatismen (pp. 123–144).
Wilhelm Fink.'
bibtex: '@inbook{Platzner_Plessl_2014, place={Paderborn}, series={Schriftenreihe
des Graduiertenkollegs “Automatismen”}, title={Verschiebungen an der Grenze zwischen
Hardware und Software}, booktitle={Logiken strukturbildender Prozesse: Automatismen},
publisher={Wilhelm Fink}, author={Platzner, Marco and Plessl, Christian}, editor={Künsemöller,
Jörn and Eke, Norber Otto and Foit, Lioba and Kaerlein, Timo}, year={2014}, pages={123–144},
collection={Schriftenreihe des Graduiertenkollegs “Automatismen”} }'
chicago: 'Platzner, Marco, and Christian Plessl. “Verschiebungen an der Grenze zwischen
Hardware und Software.” In Logiken strukturbildender Prozesse: Automatismen,
edited by Jörn Künsemöller, Norber Otto Eke, Lioba Foit, and Timo Kaerlein, 123–44.
Schriftenreihe des Graduiertenkollegs “Automatismen.” Paderborn: Wilhelm Fink,
2014.'
ieee: 'M. Platzner and C. Plessl, “Verschiebungen an der Grenze zwischen Hardware
und Software,” in Logiken strukturbildender Prozesse: Automatismen, J.
Künsemöller, N. O. Eke, L. Foit, and T. Kaerlein, Eds. Paderborn: Wilhelm Fink,
2014, pp. 123–144.'
mla: 'Platzner, Marco, and Christian Plessl. “Verschiebungen an der Grenze zwischen
Hardware und Software.” Logiken strukturbildender Prozesse: Automatismen,
edited by Jörn Künsemöller et al., Wilhelm Fink, 2014, pp. 123–44.'
short: 'M. Platzner, C. Plessl, in: J. Künsemöller, N.O. Eke, L. Foit, T. Kaerlein
(Eds.), Logiken strukturbildender Prozesse: Automatismen, Wilhelm Fink, Paderborn,
2014, pp. 123–144.'
date_created: 2017-10-17T12:41:57Z
date_updated: 2023-09-26T13:32:49Z
ddc:
- '040'
department:
- _id: '518'
- _id: '27'
- _id: '78'
editor:
- first_name: Jörn
full_name: Künsemöller, Jörn
last_name: Künsemöller
- first_name: Norber Otto
full_name: Eke, Norber Otto
last_name: Eke
- first_name: Lioba
full_name: Foit, Lioba
last_name: Foit
- first_name: Timo
full_name: Kaerlein, Timo
last_name: Kaerlein
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-20T07:29:58Z
date_updated: 2018-03-20T07:29:58Z
file_id: '1424'
file_name: 335-2014_plessl_automatismen.pdf
file_size: 2848154
relation: main_file
success: 1
file_date_updated: 2018-03-20T07:29:58Z
has_accepted_license: '1'
language:
- iso: ger
page: 123-144
place: Paderborn
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
publication: 'Logiken strukturbildender Prozesse: Automatismen'
publication_identifier:
isbn:
- 978-3-7705-5730-1
publication_status: published
publisher: Wilhelm Fink
quality_controlled: '1'
series_title: Schriftenreihe des Graduiertenkollegs "Automatismen"
status: public
title: Verschiebungen an der Grenze zwischen Hardware und Software
type: book_chapter
user_id: '15278'
year: '2014'
...
---
_id: '388'
abstract:
- lang: eng
text: In order to leverage the use of reconfigurable architectures in general-purpose
computing, quick and automated methods to find suitable accelerator designs are
required. We tackle this challenge in both regards. In order to avoid long synthesis
times, we target a vector copro- cessor, implemented on the FPGAs of a Convey
HC-1. Previous studies showed that existing tools were not able to accelerate
a real-world application with low effort. We present a toolflow to automatically
identify suitable loops for vectorization, generate a corresponding hardware/software
bipartition, and generate coprocessor code. Where applicable, we leverage outer-loop
vectorization. We evaluate our tools with a set of characteristic loops, systematically
analyzing different dependency and data layout properties.
author:
- first_name: Tobias
full_name: Kenter, Tobias
id: '3145'
last_name: Kenter
- first_name: Gavin Francis
full_name: Vaz, Gavin Francis
id: '30332'
last_name: Vaz
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Kenter T, Vaz GF, Plessl C. Partitioning and Vectorizing Binary Applications
for a Reconfigurable Vector Computer. In: Proceedings of the International
Symposium on Reconfigurable Computing: Architectures, Tools, and Applications
(ARC). Vol 8405. Lecture Notes in Computer Science (LNCS). Springer International
Publishing; 2014:144-155. doi:10.1007/978-3-319-05960-0_13'
apa: 'Kenter, T., Vaz, G. F., & Plessl, C. (2014). Partitioning and Vectorizing
Binary Applications for a Reconfigurable Vector Computer. Proceedings of the
International Symposium on Reconfigurable Computing: Architectures, Tools, and
Applications (ARC), 8405, 144–155. https://doi.org/10.1007/978-3-319-05960-0_13'
bibtex: '@inproceedings{Kenter_Vaz_Plessl_2014, place={Cham}, series={Lecture Notes
in Computer Science (LNCS)}, title={Partitioning and Vectorizing Binary Applications
for a Reconfigurable Vector Computer}, volume={8405}, DOI={10.1007/978-3-319-05960-0_13},
booktitle={Proceedings of the International Symposium on Reconfigurable Computing:
Architectures, Tools, and Applications (ARC)}, publisher={Springer International
Publishing}, author={Kenter, Tobias and Vaz, Gavin Francis and Plessl, Christian},
year={2014}, pages={144–155}, collection={Lecture Notes in Computer Science (LNCS)}
}'
chicago: 'Kenter, Tobias, Gavin Francis Vaz, and Christian Plessl. “Partitioning
and Vectorizing Binary Applications for a Reconfigurable Vector Computer.” In
Proceedings of the International Symposium on Reconfigurable Computing: Architectures,
Tools, and Applications (ARC), 8405:144–55. Lecture Notes in Computer Science
(LNCS). Cham: Springer International Publishing, 2014. https://doi.org/10.1007/978-3-319-05960-0_13.'
ieee: 'T. Kenter, G. F. Vaz, and C. Plessl, “Partitioning and Vectorizing Binary
Applications for a Reconfigurable Vector Computer,” in Proceedings of the International
Symposium on Reconfigurable Computing: Architectures, Tools, and Applications
(ARC), 2014, vol. 8405, pp. 144–155, doi: 10.1007/978-3-319-05960-0_13.'
mla: 'Kenter, Tobias, et al. “Partitioning and Vectorizing Binary Applications for
a Reconfigurable Vector Computer.” Proceedings of the International Symposium
on Reconfigurable Computing: Architectures, Tools, and Applications (ARC),
vol. 8405, Springer International Publishing, 2014, pp. 144–55, doi:10.1007/978-3-319-05960-0_13.'
short: 'T. Kenter, G.F. Vaz, C. Plessl, in: Proceedings of the International Symposium
on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), Springer
International Publishing, Cham, 2014, pp. 144–155.'
date_created: 2017-10-17T12:42:07Z
date_updated: 2023-09-26T13:34:08Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1007/978-3-319-05960-0_13
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-20T07:02:02Z
date_updated: 2018-03-20T07:02:02Z
file_id: '1387'
file_name: 388-plessl14_arc.pdf
file_size: 330193
relation: main_file
success: 1
file_date_updated: 2018-03-20T07:02:02Z
has_accepted_license: '1'
intvolume: ' 8405'
language:
- iso: eng
page: 144-155
place: Cham
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '34'
grant_number: '610996'
name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous
System Architectures
publication: 'Proceedings of the International Symposium on Reconfigurable Computing:
Architectures, Tools, and Applications (ARC)'
publisher: Springer International Publishing
quality_controlled: '1'
series_title: Lecture Notes in Computer Science (LNCS)
status: public
title: Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector
Computer
type: conference
user_id: '15278'
volume: 8405
year: '2014'
...
---
_id: '363'
abstract:
- lang: eng
text: Due to the continuously shrinking device structures and increasing densities
of FPGAs, thermal aspects have become the new focus for many research projects
over the last years. Most researchers rely on temperature simulations to evaluate
their novel thermal management techniques. However, these temperature simulations
require a high computational effort if a detailed thermal model is used and their
accuracies are often unclear. In contrast to simulations, the use of synthetic
heat sources allows for experimental evaluation of temperature management methods.
In this paper we investigate the creation of significant rises in temperature
on modern FPGAs to enable future evaluation of thermal management techniques based
on experiments. To that end, we have developed seven different heat-generating
cores that use different subsets of FPGA resources. Our experimental results show
that, according to external temperature probes connected to the FPGA’s heat sink,
we can increase the temperature by an average of 81 !C. This corresponds to an
average increase of 156.3 !C as measured by the built-in thermal diodes of our
Virtex-5 FPGAs in less than 30 min by only utilizing about 21 percent of the slices.
author:
- first_name: Andreas
full_name: Agne, Andreas
last_name: Agne
- first_name: Hendrik
full_name: Hangmann, Hendrik
last_name: Hangmann
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: Agne A, Hangmann H, Happe M, Platzner M, Plessl C. Seven Recipes for Setting
Your FPGA on Fire – A Cookbook on Heat Generators. Microprocessors and Microsystems.
2014;38(8, Part B):911-919. doi:10.1016/j.micpro.2013.12.001
apa: Agne, A., Hangmann, H., Happe, M., Platzner, M., & Plessl, C. (2014). Seven
Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators. Microprocessors
and Microsystems, 38(8, Part B), 911–919. https://doi.org/10.1016/j.micpro.2013.12.001
bibtex: '@article{Agne_Hangmann_Happe_Platzner_Plessl_2014, title={Seven Recipes
for Setting Your FPGA on Fire – A Cookbook on Heat Generators}, volume={38}, DOI={10.1016/j.micpro.2013.12.001},
number={8, Part B}, journal={Microprocessors and Microsystems}, publisher={Elsevier},
author={Agne, Andreas and Hangmann, Hendrik and Happe, Markus and Platzner, Marco
and Plessl, Christian}, year={2014}, pages={911–919} }'
chicago: 'Agne, Andreas, Hendrik Hangmann, Markus Happe, Marco Platzner, and Christian
Plessl. “Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators.”
Microprocessors and Microsystems 38, no. 8, Part B (2014): 911–19. https://doi.org/10.1016/j.micpro.2013.12.001.'
ieee: 'A. Agne, H. Hangmann, M. Happe, M. Platzner, and C. Plessl, “Seven Recipes
for Setting Your FPGA on Fire – A Cookbook on Heat Generators,” Microprocessors
and Microsystems, vol. 38, no. 8, Part B, pp. 911–919, 2014, doi: 10.1016/j.micpro.2013.12.001.'
mla: Agne, Andreas, et al. “Seven Recipes for Setting Your FPGA on Fire – A Cookbook
on Heat Generators.” Microprocessors and Microsystems, vol. 38, no. 8,
Part B, Elsevier, 2014, pp. 911–19, doi:10.1016/j.micpro.2013.12.001.
short: A. Agne, H. Hangmann, M. Happe, M. Platzner, C. Plessl, Microprocessors and
Microsystems 38 (2014) 911–919.
date_created: 2017-10-17T12:42:02Z
date_updated: 2023-09-26T13:33:06Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1016/j.micpro.2013.12.001
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-20T07:20:31Z
date_updated: 2018-03-20T07:20:31Z
file_id: '1408'
file_name: 363-plessl13_micpro.pdf
file_size: 1499996
relation: main_file
success: 1
file_date_updated: 2018-03-20T07:20:31Z
has_accepted_license: '1'
intvolume: ' 38'
issue: 8, Part B
language:
- iso: eng
page: 911-919
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: Microprocessors and Microsystems
publisher: Elsevier
quality_controlled: '1'
status: public
title: Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators
type: journal_article
user_id: '15278'
volume: 38
year: '2014'
...
---
_id: '377'
abstract:
- lang: eng
text: In this paper, we study how AES key schedules can be reconstructed from decayed
memory. This operation is a crucial and time consuming operation when trying to
break encryption systems with cold-boot attacks. In software, the reconstruction
of the AES master key can be performed using a recursive, branch-and-bound tree-search
algorithm that exploits redundancies in the key schedule for constraining the
search space. In this work, we investigate how this branch-and-bound algorithm
can be accelerated with FPGAs. We translated the recursive search procedure to
a state machine with an explicit stack for each recursion level and create optimized
datapaths to accelerate in particular the processing of the most frequently accessed
tree levels. We support two different decay models, of which especially the more
realistic non-idealized asymmetric decay model causes very high runtimes in software.
Our implementation on a Maxeler dataflow computing system outperforms a software
implementation for this model by up to 27x, which makes cold-boot attacks against
AES practical even for high error rates.
author:
- first_name: Heinrich
full_name: Riebler, Heinrich
id: '8961'
last_name: Riebler
- first_name: Tobias
full_name: Kenter, Tobias
id: '3145'
last_name: Kenter
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Christoph
full_name: Sorge, Christoph
last_name: Sorge
citation:
ama: 'Riebler H, Kenter T, Plessl C, Sorge C. Reconstructing AES Key Schedules from
Decayed Memory with FPGAs. In: Proceedings of Field-Programmable Custom Computing
Machines (FCCM). IEEE; 2014:222-229. doi:10.1109/FCCM.2014.67'
apa: Riebler, H., Kenter, T., Plessl, C., & Sorge, C. (2014). Reconstructing
AES Key Schedules from Decayed Memory with FPGAs. Proceedings of Field-Programmable
Custom Computing Machines (FCCM), 222–229. https://doi.org/10.1109/FCCM.2014.67
bibtex: '@inproceedings{Riebler_Kenter_Plessl_Sorge_2014, title={Reconstructing
AES Key Schedules from Decayed Memory with FPGAs}, DOI={10.1109/FCCM.2014.67},
booktitle={Proceedings of Field-Programmable Custom Computing Machines (FCCM)},
publisher={IEEE}, author={Riebler, Heinrich and Kenter, Tobias and Plessl, Christian
and Sorge, Christoph}, year={2014}, pages={222–229} }'
chicago: Riebler, Heinrich, Tobias Kenter, Christian Plessl, and Christoph Sorge.
“Reconstructing AES Key Schedules from Decayed Memory with FPGAs.” In Proceedings
of Field-Programmable Custom Computing Machines (FCCM), 222–29. IEEE, 2014.
https://doi.org/10.1109/FCCM.2014.67.
ieee: 'H. Riebler, T. Kenter, C. Plessl, and C. Sorge, “Reconstructing AES Key Schedules
from Decayed Memory with FPGAs,” in Proceedings of Field-Programmable Custom
Computing Machines (FCCM), 2014, pp. 222–229, doi: 10.1109/FCCM.2014.67.'
mla: Riebler, Heinrich, et al. “Reconstructing AES Key Schedules from Decayed Memory
with FPGAs.” Proceedings of Field-Programmable Custom Computing Machines (FCCM),
IEEE, 2014, pp. 222–29, doi:10.1109/FCCM.2014.67.
short: 'H. Riebler, T. Kenter, C. Plessl, C. Sorge, in: Proceedings of Field-Programmable
Custom Computing Machines (FCCM), IEEE, 2014, pp. 222–229.'
date_created: 2017-10-17T12:42:05Z
date_updated: 2023-09-26T13:33:50Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/FCCM.2014.67
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-20T07:14:20Z
date_updated: 2018-03-20T07:14:20Z
file_id: '1397'
file_name: 377-FCCM14.pdf
file_size: 1003907
relation: main_file
success: 1
file_date_updated: 2018-03-20T07:14:20Z
has_accepted_license: '1'
keyword:
- coldboot
language:
- iso: eng
page: 222-229
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '34'
grant_number: '610996'
name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous
System Architectures
publication: Proceedings of Field-Programmable Custom Computing Machines (FCCM)
publisher: IEEE
quality_controlled: '1'
status: public
title: Reconstructing AES Key Schedules from Decayed Memory with FPGAs
type: conference
user_id: '15278'
year: '2014'
...
---
_id: '365'
abstract:
- lang: eng
text: Self-aware computing is a paradigm for structuring and simplifying the design
and operation of computing systems that face unprecedented levels of system dynamics
and thus require novel forms of adaptivity. The generality of the paradigm makes
it applicable to many types of computing systems and, previously, researchers
started to introduce concepts of self-awareness to multicore architectures. In
our work we build on a recent reference architectural framework as a model for
self-aware computing and instantiate it for an FPGA-based heterogeneous multicore
running the ReconOS reconfigurable architecture and operating system. After presenting
the model for self-aware computing and ReconOS, we demonstrate with a case study
how a multicore application built on the principle of self-awareness, autonomously
adapts to changes in the workload and system state. Our work shows that the reference
architectural framework as a model for self-aware computing can be practically
applied and allows us to structure and simplify the design process, which is essential
for designing complex future computing systems.
article_number: '13'
author:
- first_name: Andreas
full_name: Agne, Andreas
last_name: Agne
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Achim
full_name: Lösch, Achim
id: '43646'
last_name: Lösch
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: Agne A, Happe M, Lösch A, Plessl C, Platzner M. Self-awareness as a Model for
Designing and Operating Heterogeneous Multicores. ACM Transactions on Reconfigurable
Technology and Systems (TRETS). 2014;7(2). doi:10.1145/2617596
apa: Agne, A., Happe, M., Lösch, A., Plessl, C., & Platzner, M. (2014). Self-awareness
as a Model for Designing and Operating Heterogeneous Multicores. ACM Transactions
on Reconfigurable Technology and Systems (TRETS), 7(2), Article 13.
https://doi.org/10.1145/2617596
bibtex: '@article{Agne_Happe_Lösch_Plessl_Platzner_2014, title={Self-awareness as
a Model for Designing and Operating Heterogeneous Multicores}, volume={7}, DOI={10.1145/2617596}, number={213}, journal={ACM
Transactions on Reconfigurable Technology and Systems (TRETS)}, publisher={ACM},
author={Agne, Andreas and Happe, Markus and Lösch, Achim and Plessl, Christian
and Platzner, Marco}, year={2014} }'
chicago: Agne, Andreas, Markus Happe, Achim Lösch, Christian Plessl, and Marco Platzner.
“Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores.”
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7, no.
2 (2014). https://doi.org/10.1145/2617596.
ieee: 'A. Agne, M. Happe, A. Lösch, C. Plessl, and M. Platzner, “Self-awareness
as a Model for Designing and Operating Heterogeneous Multicores,” ACM Transactions
on Reconfigurable Technology and Systems (TRETS), vol. 7, no. 2, Art. no.
13, 2014, doi: 10.1145/2617596.'
mla: Agne, Andreas, et al. “Self-Awareness as a Model for Designing and Operating
Heterogeneous Multicores.” ACM Transactions on Reconfigurable Technology and
Systems (TRETS), vol. 7, no. 2, 13, ACM, 2014, doi:10.1145/2617596.
short: A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, ACM Transactions on
Reconfigurable Technology and Systems (TRETS) 7 (2014).
date_created: 2017-10-17T12:42:03Z
date_updated: 2023-09-26T13:33:31Z
ddc:
- '040'
department:
- _id: '27'
- _id: '78'
- _id: '518'
doi: 10.1145/2617596
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-20T07:19:19Z
date_updated: 2018-03-20T07:19:19Z
file_id: '1406'
file_name: 365-plessl14_trets_01.pdf
file_size: 916052
relation: main_file
success: 1
file_date_updated: 2018-03-20T07:19:19Z
has_accepted_license: '1'
intvolume: ' 7'
issue: '2'
language:
- iso: eng
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: ACM Transactions on Reconfigurable Technology and Systems (TRETS)
publisher: ACM
quality_controlled: '1'
status: public
title: Self-awareness as a Model for Designing and Operating Heterogeneous Multicores
type: journal_article
user_id: '15278'
volume: 7
year: '2014'
...
---
_id: '328'
abstract:
- lang: eng
text: The ReconOS operating system for reconfigurable computing offers a unified
multi-threaded programming model and operating system services for threads executing
in software and threads mapped to reconfigurable hardware. The operating system
interface allows hardware threads to interact with software threads using well-known
mechanisms such as semaphores, mutexes, condition variables, and message queues.
By semantically integrating hardware accelerators into a standard operating system
environment, ReconOS allows for rapid design space exploration, supports a structured
application development process and improves the portability of applications
author:
- first_name: Andreas
full_name: Agne, Andreas
last_name: Agne
- first_name: Markus
full_name: Happe, Markus
last_name: Happe
- first_name: Ariane
full_name: Keller, Ariane
last_name: Keller
- first_name: Enno
full_name: Lübbers, Enno
last_name: Lübbers
- first_name: Bernhard
full_name: Plattner, Bernhard
last_name: Plattner
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: Agne A, Happe M, Keller A, et al. ReconOS - An Operating System Approach for
Reconfigurable Computing. IEEE Micro. 2014;34(1):60-71. doi:10.1109/MM.2013.110
apa: Agne, A., Happe, M., Keller, A., Lübbers, E., Plattner, B., Platzner, M., &
Plessl, C. (2014). ReconOS - An Operating System Approach for Reconfigurable Computing.
IEEE Micro, 34(1), 60–71. https://doi.org/10.1109/MM.2013.110
bibtex: '@article{Agne_Happe_Keller_Lübbers_Plattner_Platzner_Plessl_2014, title={ReconOS
- An Operating System Approach for Reconfigurable Computing}, volume={34}, DOI={10.1109/MM.2013.110}, number={1},
journal={IEEE Micro}, publisher={IEEE}, author={Agne, Andreas and Happe, Markus
and Keller, Ariane and Lübbers, Enno and Plattner, Bernhard and Platzner, Marco
and Plessl, Christian}, year={2014}, pages={60–71} }'
chicago: 'Agne, Andreas, Markus Happe, Ariane Keller, Enno Lübbers, Bernhard Plattner,
Marco Platzner, and Christian Plessl. “ReconOS - An Operating System Approach
for Reconfigurable Computing.” IEEE Micro 34, no. 1 (2014): 60–71. https://doi.org/10.1109/MM.2013.110.'
ieee: 'A. Agne et al., “ReconOS - An Operating System Approach for Reconfigurable
Computing,” IEEE Micro, vol. 34, no. 1, pp. 60–71, 2014, doi: 10.1109/MM.2013.110.'
mla: Agne, Andreas, et al. “ReconOS - An Operating System Approach for Reconfigurable
Computing.” IEEE Micro, vol. 34, no. 1, IEEE, 2014, pp. 60–71, doi:10.1109/MM.2013.110.
short: A. Agne, M. Happe, A. Keller, E. Lübbers, B. Plattner, M. Platzner, C. Plessl,
IEEE Micro 34 (2014) 60–71.
date_created: 2017-10-17T12:41:55Z
date_updated: 2023-09-26T13:32:31Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/MM.2013.110
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-20T07:31:40Z
date_updated: 2018-03-20T07:31:40Z
file_id: '1426'
file_name: 328-plessl14_micro_01.pdf
file_size: 1877185
relation: main_file
success: 1
file_date_updated: 2018-03-20T07:31:40Z
has_accepted_license: '1'
intvolume: ' 34'
issue: '1'
language:
- iso: eng
page: 60-71
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: IEEE Micro
publisher: IEEE
quality_controlled: '1'
status: public
title: ReconOS - An Operating System Approach for Reconfigurable Computing
type: journal_article
user_id: '15278'
volume: 34
year: '2014'
...
---
_id: '1778'
author:
- first_name: Gianluca
full_name: C. Durelli, Gianluca
last_name: C. Durelli
- first_name: Marcello
full_name: Pogliani, Marcello
last_name: Pogliani
- first_name: Antonio
full_name: Miele, Antonio
last_name: Miele
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Heinrich
full_name: Riebler, Heinrich
id: '8961'
last_name: Riebler
- first_name: Gavin Francis
full_name: Vaz, Gavin Francis
id: '30332'
last_name: Vaz
- first_name: Marco
full_name: D. Santambrogio, Marco
last_name: D. Santambrogio
- first_name: Cristiana
full_name: Bolchini, Cristiana
last_name: Bolchini
citation:
ama: 'C. Durelli G, Pogliani M, Miele A, et al. Runtime Resource Management in Heterogeneous
System Architectures: The SAVE Approach. In: Proc. Int. Symp. on Parallel and
Distributed Processing with Applications (ISPA). IEEE; 2014:142-149. doi:10.1109/ISPA.2014.27'
apa: 'C. Durelli, G., Pogliani, M., Miele, A., Plessl, C., Riebler, H., Vaz, G.
F., D. Santambrogio, M., & Bolchini, C. (2014). Runtime Resource Management
in Heterogeneous System Architectures: The SAVE Approach. Proc. Int. Symp.
on Parallel and Distributed Processing with Applications (ISPA), 142–149.
https://doi.org/10.1109/ISPA.2014.27'
bibtex: '@inproceedings{C. Durelli_Pogliani_Miele_Plessl_Riebler_Vaz_D. Santambrogio_Bolchini_2014,
title={Runtime Resource Management in Heterogeneous System Architectures: The
SAVE Approach}, DOI={10.1109/ISPA.2014.27},
booktitle={Proc. Int. Symp. on Parallel and Distributed Processing with Applications
(ISPA)}, publisher={IEEE}, author={C. Durelli, Gianluca and Pogliani, Marcello
and Miele, Antonio and Plessl, Christian and Riebler, Heinrich and Vaz, Gavin
Francis and D. Santambrogio, Marco and Bolchini, Cristiana}, year={2014}, pages={142–149}
}'
chicago: 'C. Durelli, Gianluca, Marcello Pogliani, Antonio Miele, Christian Plessl,
Heinrich Riebler, Gavin Francis Vaz, Marco D. Santambrogio, and Cristiana Bolchini.
“Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach.”
In Proc. Int. Symp. on Parallel and Distributed Processing with Applications
(ISPA), 142–49. IEEE, 2014. https://doi.org/10.1109/ISPA.2014.27.'
ieee: 'G. C. Durelli et al., “Runtime Resource Management in Heterogeneous
System Architectures: The SAVE Approach,” in Proc. Int. Symp. on Parallel and
Distributed Processing with Applications (ISPA), 2014, pp. 142–149, doi: 10.1109/ISPA.2014.27.'
mla: 'C. Durelli, Gianluca, et al. “Runtime Resource Management in Heterogeneous
System Architectures: The SAVE Approach.” Proc. Int. Symp. on Parallel and
Distributed Processing with Applications (ISPA), IEEE, 2014, pp. 142–49, doi:10.1109/ISPA.2014.27.'
short: 'G. C. Durelli, M. Pogliani, A. Miele, C. Plessl, H. Riebler, G.F. Vaz, M.
D. Santambrogio, C. Bolchini, in: Proc. Int. Symp. on Parallel and Distributed
Processing with Applications (ISPA), IEEE, 2014, pp. 142–149.'
date_created: 2018-03-26T13:40:14Z
date_updated: 2023-09-26T13:35:40Z
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/ISPA.2014.27
language:
- iso: eng
page: 142-149
project:
- _id: '34'
grant_number: '610996'
name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous
System Architectures
publication: Proc. Int. Symp. on Parallel and Distributed Processing with Applications
(ISPA)
publisher: IEEE
quality_controlled: '1'
status: public
title: 'Runtime Resource Management in Heterogeneous System Architectures: The SAVE
Approach'
type: conference
user_id: '15278'
year: '2014'
...
---
_id: '439'
abstract:
- lang: eng
text: Reconfigurable architectures provide an opportunityto accelerate a wide range
of applications, frequentlyby exploiting data-parallelism, where the same operations
arehomogeneously executed on a (large) set of data. However, whenthe sequential
code is executed on a host CPU and only dataparallelloops are executed on an FPGA
coprocessor, a sufficientlylarge number of loop iterations (trip counts) is required,
such thatthe control- and data-transfer overheads to the coprocessor canbe amortized.
However, the trip count of large data-parallel loopsis frequently not known at
compile time, but only at runtime justbefore entering a loop. Therefore, we propose
to generate codeboth for the CPU and the coprocessor, and to defer the decisionwhere
to execute the appropriate code to the runtime of theapplication when the trip
count of the loop can be determinedjust at runtime. We demonstrate how an LLVM
compiler basedtoolflow can automatically insert appropriate decision blocks intothe
application code. Analyzing popular benchmark suites, weshow that this kind of
runtime decisions is often applicable. Thepractical feasibility of our approach
is demonstrated by a toolflowthat automatically identifies loops suitable for
vectorization andgenerates code for the FPGA coprocessor of a Convey HC-1. Thetoolflow
adds decisions based on a comparison of the runtimecomputedtrip counts to thresholds
for specific loops and alsoincludes support to move just the required data to
the coprocessor.We evaluate the integrated toolflow with characteristic loopsexecuted
on different input data sizes.
author:
- first_name: Gavin Francis
full_name: Vaz, Gavin Francis
id: '30332'
last_name: Vaz
- first_name: Heinrich
full_name: Riebler, Heinrich
id: '8961'
last_name: Riebler
- first_name: Tobias
full_name: Kenter, Tobias
id: '3145'
last_name: Kenter
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Vaz GF, Riebler H, Kenter T, Plessl C. Deferring Accelerator Offloading Decisions
to Application Runtime. In: Proceedings of the International Conference on
ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2014:1-8. doi:10.1109/ReConFig.2014.7032509'
apa: Vaz, G. F., Riebler, H., Kenter, T., & Plessl, C. (2014). Deferring Accelerator
Offloading Decisions to Application Runtime. Proceedings of the International
Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2014.7032509
bibtex: '@inproceedings{Vaz_Riebler_Kenter_Plessl_2014, title={Deferring Accelerator
Offloading Decisions to Application Runtime}, DOI={10.1109/ReConFig.2014.7032509},
booktitle={Proceedings of the International Conference on ReConFigurable Computing
and FPGAs (ReConFig)}, publisher={IEEE}, author={Vaz, Gavin Francis and Riebler,
Heinrich and Kenter, Tobias and Plessl, Christian}, year={2014}, pages={1–8} }'
chicago: Vaz, Gavin Francis, Heinrich Riebler, Tobias Kenter, and Christian Plessl.
“Deferring Accelerator Offloading Decisions to Application Runtime.” In Proceedings
of the International Conference on ReConFigurable Computing and FPGAs (ReConFig),
1–8. IEEE, 2014. https://doi.org/10.1109/ReConFig.2014.7032509.
ieee: 'G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Deferring Accelerator Offloading
Decisions to Application Runtime,” in Proceedings of the International Conference
on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032509.'
mla: Vaz, Gavin Francis, et al. “Deferring Accelerator Offloading Decisions to Application
Runtime.” Proceedings of the International Conference on ReConFigurable Computing
and FPGAs (ReConFig), IEEE, 2014, pp. 1–8, doi:10.1109/ReConFig.2014.7032509.
short: 'G.F. Vaz, H. Riebler, T. Kenter, C. Plessl, in: Proceedings of the International
Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.'
date_created: 2017-10-17T12:42:17Z
date_updated: 2023-09-26T13:37:02Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/ReConFig.2014.7032509
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-16T11:29:52Z
date_updated: 2018-03-16T11:29:52Z
file_id: '1353'
file_name: 439-plessl14a_reconfig.pdf
file_size: 557362
relation: main_file
success: 1
file_date_updated: 2018-03-16T11:29:52Z
has_accepted_license: '1'
language:
- iso: eng
page: 1-8
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '34'
grant_number: '610996'
name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous
System Architectures
publication: Proceedings of the International Conference on ReConFigurable Computing
and FPGAs (ReConFig)
publisher: IEEE
quality_controlled: '1'
status: public
title: Deferring Accelerator Offloading Decisions to Application Runtime
type: conference
user_id: '15278'
year: '2014'
...
---
_id: '406'
abstract:
- lang: eng
text: Stereo-matching algorithms recently received a lot of attention from the FPGA
acceleration community. Presented solutions range from simple, very resource efficient
systems with modest matching quality for small embedded systems to sophisticated
algorithms with several processing steps, implemented on big FPGAs. In order to
achieve high throughput, most implementations strongly focus on pipelining and
data reuse between different computation steps. This approach leads to high efficiency,
but limits the supported computation patterns and due the high integration of
the implementation, adaptions to the algorithm are difficult. In this work, we
present a stereo-matching implementation, that starts by offloading individual
kernels from the CPU to the FPGA. Between subsequent compute steps on the FPGA,
data is stored off-chip in on-board memory of the FPGA accelerator card. This
enables us to accelerate the AD-census algorithm with cross-based aggregation
and scanline optimization for the first time without algorithmic changes and for
up to full HD image dimensions. Analyzing throughput and bandwidth requirements,
we outline some trade-offs that are involved with this approach, compared to tighter
integration of more kernel loops into one design.
author:
- first_name: Tobias
full_name: Kenter, Tobias
id: '3145'
last_name: Kenter
- first_name: Henning
full_name: Schmitz, Henning
last_name: Schmitz
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Kenter T, Schmitz H, Plessl C. Kernel-Centric Acceleration of High Accuracy
Stereo-Matching. In: Proceedings of the International Conference on ReConFigurable
Computing and FPGAs (ReConFig). IEEE; 2014:1-8. doi:10.1109/ReConFig.2014.7032535'
apa: Kenter, T., Schmitz, H., & Plessl, C. (2014). Kernel-Centric Acceleration
of High Accuracy Stereo-Matching. Proceedings of the International Conference
on ReConFigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2014.7032535
bibtex: '@inproceedings{Kenter_Schmitz_Plessl_2014, title={Kernel-Centric Acceleration
of High Accuracy Stereo-Matching}, DOI={10.1109/ReConFig.2014.7032535},
booktitle={Proceedings of the International Conference on ReConFigurable Computing
and FPGAs (ReConFig)}, publisher={IEEE}, author={Kenter, Tobias and Schmitz, Henning
and Plessl, Christian}, year={2014}, pages={1–8} }'
chicago: Kenter, Tobias, Henning Schmitz, and Christian Plessl. “Kernel-Centric
Acceleration of High Accuracy Stereo-Matching.” In Proceedings of the International
Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2014.
https://doi.org/10.1109/ReConFig.2014.7032535.
ieee: 'T. Kenter, H. Schmitz, and C. Plessl, “Kernel-Centric Acceleration of High
Accuracy Stereo-Matching,” in Proceedings of the International Conference on
ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032535.'
mla: Kenter, Tobias, et al. “Kernel-Centric Acceleration of High Accuracy Stereo-Matching.”
Proceedings of the International Conference on ReConFigurable Computing and
FPGAs (ReConFig), IEEE, 2014, pp. 1–8, doi:10.1109/ReConFig.2014.7032535.
short: 'T. Kenter, H. Schmitz, C. Plessl, in: Proceedings of the International Conference
on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.'
date_created: 2017-10-17T12:42:11Z
date_updated: 2023-09-26T13:36:40Z
ddc:
- '040'
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1109/ReConFig.2014.7032535
file:
- access_level: closed
content_type: application/pdf
creator: florida
date_created: 2018-03-16T11:37:42Z
date_updated: 2018-03-16T11:37:42Z
file_id: '1366'
file_name: 406-ReConFig14.pdf
file_size: 932852
relation: main_file
success: 1
file_date_updated: 2018-03-16T11:37:42Z
has_accepted_license: '1'
language:
- iso: eng
page: 1-8
project:
- _id: '1'
grant_number: '160364472'
name: SFB 901
- _id: '14'
grant_number: '160364472'
name: SFB 901 - Subprojekt C2
- _id: '4'
name: SFB 901 - Project Area C
- _id: '34'
grant_number: '610996'
name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous
System Architectures
publication: Proceedings of the International Conference on ReConFigurable Computing
and FPGAs (ReConFig)
publisher: IEEE
quality_controlled: '1'
status: public
title: Kernel-Centric Acceleration of High Accuracy Stereo-Matching
type: conference
user_id: '15278'
year: '2014'
...
---
_id: '1780'
author:
- first_name: Gianluca
full_name: C. Durelli, Gianluca
last_name: C. Durelli
- first_name: Marcello
full_name: Copolla, Marcello
last_name: Copolla
- first_name: Karim
full_name: Djafarian, Karim
last_name: Djafarian
- first_name: George
full_name: Koranaros, George
last_name: Koranaros
- first_name: Antonio
full_name: Miele, Antonio
last_name: Miele
- first_name: Michele
full_name: Paolino, Michele
last_name: Paolino
- first_name: Oliver
full_name: Pell, Oliver
last_name: Pell
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Marco
full_name: D. Santambrogio, Marco
last_name: D. Santambrogio
- first_name: Cristiana
full_name: Bolchini, Cristiana
last_name: Bolchini
citation:
ama: 'C. Durelli G, Copolla M, Djafarian K, et al. SAVE: Towards efficient resource
management in heterogeneous system architectures. In: Proc. Int. Conf. on Reconfigurable
Computing: Architectures, Tools and Applications (ARC). Springer; 2014. doi:10.1007/978-3-319-05960-0_38'
apa: 'C. Durelli, G., Copolla, M., Djafarian, K., Koranaros, G., Miele, A., Paolino,
M., Pell, O., Plessl, C., D. Santambrogio, M., & Bolchini, C. (2014). SAVE:
Towards efficient resource management in heterogeneous system architectures. Proc.
Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications
(ARC). https://doi.org/10.1007/978-3-319-05960-0_38'
bibtex: '@inproceedings{C. Durelli_Copolla_Djafarian_Koranaros_Miele_Paolino_Pell_Plessl_D.
Santambrogio_Bolchini_2014, title={SAVE: Towards efficient resource management
in heterogeneous system architectures}, DOI={10.1007/978-3-319-05960-0_38},
booktitle={Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools
and Applications (ARC)}, publisher={Springer}, author={C. Durelli, Gianluca and
Copolla, Marcello and Djafarian, Karim and Koranaros, George and Miele, Antonio
and Paolino, Michele and Pell, Oliver and Plessl, Christian and D. Santambrogio,
Marco and Bolchini, Cristiana}, year={2014} }'
chicago: 'C. Durelli, Gianluca, Marcello Copolla, Karim Djafarian, George Koranaros,
Antonio Miele, Michele Paolino, Oliver Pell, Christian Plessl, Marco D. Santambrogio,
and Cristiana Bolchini. “SAVE: Towards Efficient Resource Management in Heterogeneous
System Architectures.” In Proc. Int. Conf. on Reconfigurable Computing: Architectures,
Tools and Applications (ARC). Springer, 2014. https://doi.org/10.1007/978-3-319-05960-0_38.'
ieee: 'G. C. Durelli et al., “SAVE: Towards efficient resource management
in heterogeneous system architectures,” 2014, doi: 10.1007/978-3-319-05960-0_38.'
mla: 'C. Durelli, Gianluca, et al. “SAVE: Towards Efficient Resource Management
in Heterogeneous System Architectures.” Proc. Int. Conf. on Reconfigurable
Computing: Architectures, Tools and Applications (ARC), Springer, 2014, doi:10.1007/978-3-319-05960-0_38.'
short: 'G. C. Durelli, M. Copolla, K. Djafarian, G. Koranaros, A. Miele, M. Paolino,
O. Pell, C. Plessl, M. D. Santambrogio, C. Bolchini, in: Proc. Int. Conf. on Reconfigurable
Computing: Architectures, Tools and Applications (ARC), Springer, 2014.'
date_created: 2018-03-26T13:45:35Z
date_updated: 2023-09-26T13:36:20Z
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1007/978-3-319-05960-0_38
language:
- iso: eng
project:
- _id: '34'
grant_number: '610996'
name: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous
System Architectures
publication: 'Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and
Applications (ARC)'
publisher: Springer
quality_controlled: '1'
status: public
title: 'SAVE: Towards efficient resource management in heterogeneous system architectures'
type: conference
user_id: '15278'
year: '2014'
...
---
_id: '1779'
author:
- first_name: Heiner
full_name: Giefers, Heiner
last_name: Giefers
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
- first_name: Jens
full_name: Förstner, Jens
id: '158'
last_name: Förstner
orcid: 0000-0001-7059-9862
citation:
ama: Giefers H, Plessl C, Förstner J. Accelerating Finite Difference Time Domain
Simulations with Reconfigurable Dataflow Computers. ACM SIGARCH Computer Architecture
News. 2014;41(5):65-70. doi:10.1145/2641361.2641372
apa: Giefers, H., Plessl, C., & Förstner, J. (2014). Accelerating Finite Difference
Time Domain Simulations with Reconfigurable Dataflow Computers. ACM SIGARCH
Computer Architecture News, 41(5), 65–70. https://doi.org/10.1145/2641361.2641372
bibtex: '@article{Giefers_Plessl_Förstner_2014, title={Accelerating Finite Difference
Time Domain Simulations with Reconfigurable Dataflow Computers}, volume={41},
DOI={10.1145/2641361.2641372},
number={5}, journal={ACM SIGARCH Computer Architecture News}, publisher={ACM},
author={Giefers, Heiner and Plessl, Christian and Förstner, Jens}, year={2014},
pages={65–70} }'
chicago: 'Giefers, Heiner, Christian Plessl, and Jens Förstner. “Accelerating Finite
Difference Time Domain Simulations with Reconfigurable Dataflow Computers.” ACM
SIGARCH Computer Architecture News 41, no. 5 (2014): 65–70. https://doi.org/10.1145/2641361.2641372.'
ieee: 'H. Giefers, C. Plessl, and J. Förstner, “Accelerating Finite Difference Time
Domain Simulations with Reconfigurable Dataflow Computers,” ACM SIGARCH Computer
Architecture News, vol. 41, no. 5, pp. 65–70, 2014, doi: 10.1145/2641361.2641372.'
mla: Giefers, Heiner, et al. “Accelerating Finite Difference Time Domain Simulations
with Reconfigurable Dataflow Computers.” ACM SIGARCH Computer Architecture
News, vol. 41, no. 5, ACM, 2014, pp. 65–70, doi:10.1145/2641361.2641372.
short: H. Giefers, C. Plessl, J. Förstner, ACM SIGARCH Computer Architecture News
41 (2014) 65–70.
date_created: 2018-03-26T13:42:34Z
date_updated: 2023-09-26T13:35:58Z
department:
- _id: '27'
- _id: '518'
- _id: '61'
- _id: '78'
doi: 10.1145/2641361.2641372
intvolume: ' 41'
issue: '5'
keyword:
- funding-maxup
- tet_topic_hpc
language:
- iso: eng
page: 65-70
publication: ACM SIGARCH Computer Architecture News
publication_identifier:
issn:
- 0163-5964
publisher: ACM
quality_controlled: '1'
status: public
title: Accelerating Finite Difference Time Domain Simulations with Reconfigurable
Dataflow Computers
type: journal_article
user_id: '15278'
volume: 41
year: '2014'
...
---
_id: '25117'
author:
- first_name: Bastian
full_name: Koppelmann, Bastian
id: '25260'
last_name: Koppelmann
- first_name: Bernd
full_name: Messidat, Bernd
last_name: Messidat
- first_name: Markus
full_name: Becker, Markus
last_name: Becker
- first_name: Christoph
full_name: Kuznik, Christoph
last_name: Kuznik
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
- first_name: J. Christoph
full_name: Scheytt, J. Christoph
id: '37144'
last_name: Scheytt
orcid: https://orcid.org/0000-0002-5950-6618
citation:
ama: Koppelmann B, Messidat B, Becker M, Kuznik C, Müller W, Scheytt JC. Fast and
Open Virtual Platforms for TriCore-based SoCs Using QEMU. Design and Verification
Conference (DVCON EUROPE). Published online 2014.
apa: Koppelmann, B., Messidat, B., Becker, M., Kuznik, C., Müller, W., & Scheytt,
J. C. (2014). Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU.
Design and Verification Conference (DVCON EUROPE).
bibtex: '@article{Koppelmann_Messidat_Becker_Kuznik_Müller_Scheytt_2014, title={Fast
and Open Virtual Platforms for TriCore-based SoCs Using QEMU}, journal={Design
and Verification Conference (DVCON EUROPE)}, author={Koppelmann, Bastian and Messidat,
Bernd and Becker, Markus and Kuznik, Christoph and Müller, Wolfgang and Scheytt,
J. Christoph}, year={2014} }'
chicago: Koppelmann, Bastian, Bernd Messidat, Markus Becker, Christoph Kuznik, Wolfgang
Müller, and J. Christoph Scheytt. “Fast and Open Virtual Platforms for TriCore-Based
SoCs Using QEMU.” Design and Verification Conference (DVCON EUROPE), 2014.
ieee: B. Koppelmann, B. Messidat, M. Becker, C. Kuznik, W. Müller, and J. C. Scheytt,
“Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU,” Design
and Verification Conference (DVCON EUROPE), 2014.
mla: Koppelmann, Bastian, et al. “Fast and Open Virtual Platforms for TriCore-Based
SoCs Using QEMU.” Design and Verification Conference (DVCON EUROPE), 2014.
short: B. Koppelmann, B. Messidat, M. Becker, C. Kuznik, W. Müller, J.C. Scheytt,
Design and Verification Conference (DVCON EUROPE) (2014).
date_created: 2021-09-29T10:47:35Z
date_updated: 2025-02-26T14:44:48Z
department:
- _id: '672'
language:
- iso: eng
publication: Design and Verification Conference (DVCON EUROPE)
status: public
title: Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU
type: journal_article
user_id: '5786'
year: '2014'
...
---
_id: '25162'
author:
- first_name: Christoph
full_name: Kuznik, Christoph
last_name: Kuznik
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Kuznik C, Müller W. Verific-MM: Systematized Verification Metrics Generation
with UCIS for Improved Automation on Verification Closure. Design, Automation
and Test in Europe DATE, University Booth, Dresden . Published online 2014.'
apa: 'Kuznik, C., & Müller, W. (2014). Verific-MM: Systematized Verification
Metrics Generation with UCIS for Improved Automation on Verification Closure.
Design, Automation and Test in Europe DATE, University Booth, Dresden .'
bibtex: '@article{Kuznik_Müller_2014, title={Verific-MM: Systematized Verification
Metrics Generation with UCIS for Improved Automation on Verification Closure},
journal={Design, Automation and Test in Europe DATE, University Booth, Dresden
}, author={Kuznik, Christoph and Müller, Wolfgang}, year={2014} }'
chicago: 'Kuznik, Christoph, and Wolfgang Müller. “Verific-MM: Systematized Verification
Metrics Generation with UCIS for Improved Automation on Verification Closure.”
Design, Automation and Test in Europe DATE, University Booth, Dresden ,
2014.'
ieee: 'C. Kuznik and W. Müller, “Verific-MM: Systematized Verification Metrics Generation
with UCIS for Improved Automation on Verification Closure,” Design, Automation
and Test in Europe DATE, University Booth, Dresden , 2014.'
mla: 'Kuznik, Christoph, and Wolfgang Müller. “Verific-MM: Systematized Verification
Metrics Generation with UCIS for Improved Automation on Verification Closure.”
Design, Automation and Test in Europe DATE, University Booth, Dresden ,
2014.'
short: C. Kuznik, W. Müller, Design, Automation and Test in Europe DATE, University
Booth, Dresden (2014).
date_created: 2021-09-30T10:05:28Z
date_updated: 2025-02-26T14:45:04Z
department:
- _id: '672'
language:
- iso: eng
publication: 'Design, Automation and Test in Europe DATE, University Booth, Dresden '
status: public
title: 'Verific-MM: Systematized Verification Metrics Generation with UCIS for Improved
Automation on Verification Closure'
type: journal_article
user_id: '5786'
year: '2014'
...