@unpublished{1165,
  author       = {{Witschen, Linus Matthias and Wiersema, Tobias and Platzner, Marco}},
  booktitle    = {{4th Workshop On Approximate Computing (WAPCO 2018)}},
  title        = {{{Making the Case for Proof-carrying Approximate Circuits}}},
  year         = {{2018}},
}

@inproceedings{5547,
  author       = {{Lösch, Achim and Platzner, Marco}},
  booktitle    = {{2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP)}},
  isbn         = {{9781538674796}},
  location     = {{Milan, Italy}},
  publisher    = {{IEEE}},
  title        = {{{A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes}}},
  doi          = {{10.1109/asap.2018.8445098}},
  year         = {{2018}},
}

@inproceedings{10598,
  abstract     = {{Approximate computing has become a very popular design
strategy that exploits error resilient computations to achieve higher
performance and energy efﬁciency. Automated synthesis of approximate
circuits is performed via functional approximation, in which various
parts of the target circuit are extensively examined with a library
of approximate components/transformations to trade off the functional
accuracy and computational budget (i.e., power). However, as the number
of possible approximate transformations increases, traditional search
techniques suffer from a combinatorial explosion due to the large
branching factor. In this work, we present a comprehensive framework
for automated synthesis of approximate circuits from either structural
or behavioral descriptions. We adapt the Monte Carlo Tree Search
(MCTS), as a stochastic search technique, to deal with the large design
space exploration, which enables a broader range of potential possible
approximations through lightweight random simulations. The proposed
framework is able to recognize the design Pareto set even with low
computational budgets. Experimental results highlight the capabilities of
the proposed synthesis framework by resulting in up to 61.69% energy
saving while maintaining the predeﬁned quality constraints.}},
  author       = {{Awais, Muhammad and Ghasemzadeh Mohammadi, Hassan and Platzner, Marco}},
  booktitle    = {{26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)}},
  keywords     = {{Approximate computing, High-level synthesis, Accuracy, Monte-Carlo tree search, Circuit simulation}},
  pages        = {{219--224}},
  title        = {{{An MCTS-based Framework for Synthesis of Approximate Circuits}}},
  doi          = {{10.1109/VLSI-SoC.2018.8645026}},
  year         = {{2018}},
}

@misc{10782,
  author       = {{Clausing, Lennart}},
  publisher    = {{Ruhr-University Bochum}},
  title        = {{{Development of a Hardware / Software Codesign for sonification of LIDAR-based sensor data}}},
  year         = {{2018}},
}

@misc{1097,
  author       = {{Jentzsch, Felix Paul}},
  keywords     = {{Approximate Computing, Proof-Carrying Hardware, Formal Veriﬁcation}},
  publisher    = {{Universität Paderborn}},
  title        = {{{Enforcing IP Core Connection Properties with Verifiable Security Monitors}}},
  year         = {{2018}},
}

@article{12965,
  author       = {{Ghribi, Ines and Abdallah, Riadh Ben and Khalgui, Mohamed and Li, Zhiwu and Alnowibet, Khalid and Platzner, Marco}},
  issn         = {{2169-3536}},
  journal      = {{IEEE Access}},
  pages        = {{14078--14092}},
  title        = {{{R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints}}},
  doi          = {{10.1109/access.2018.2799852}},
  year         = {{2018}},
}

@misc{3580,
  author       = {{Hansmeier, Tim}},
  publisher    = {{Universität Paderborn}},
  title        = {{{An FPGA Accelerator for Checking Resolution Proofs}}},
  year         = {{2017}},
}

@misc{1157,
  author       = {{Witschen, Linus Matthias}},
  publisher    = {{Universität Paderborn}},
  title        = {{{A Framework for the Synthesis of Approximate Circuits}}},
  year         = {{2017}},
}

@misc{74,
  author       = {{Knorr, Christoph}},
  publisher    = {{Universität Paderborn}},
  title        = {{{OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten}}},
  year         = {{2017}},
}

@article{9919,
  abstract     = {{This is a study of a combined load restoration and generator start-up procedure. The procedure is structured into three stages according to the power system status and the goal of load restoration. Moreover, for each load restoration stage, the proposed algorithm determines a load restoration sequence by considering renewable energy such as solar and wind park to achieve objective functions. The validity and performance of the proposed algorithm is demonstrated through simulations using IEEE-39 network.}},
  author       = {{Shen, Cong and Kaufmann, Paul and Braun, Martin}},
  journal      = {{Elsevier International Journal of Electrical Power and Energy Systems (IJEPES)}},
  keywords     = {{Load restorationRestoration stageRenewable energyVoltage/frequency fluctuations}},
  pages        = {{287--299}},
  title        = {{{Three-Stage Power System Restoration Methodology Considering Renewable Energies}}},
  doi          = {{10.1016/j.ijepes.2017.07.007}},
  volume       = {{94}},
  year         = {{2017}},
}

@inproceedings{65,
  abstract     = {{Heterogeneous compute nodes in form of CPUs with attached GPU and FPGA accelerators have strongly gained interested in the last years. Applications differ in their execution characteristics and can therefore benefit from such heterogeneous resources in terms of performance or energy consumption. While performance optimization has been the only goal for a long time, nowadays research is more and more focusing on techniques to minimize energy consumption due to rising electricity costs.This paper presents reMinMin, a novel static list scheduling approach for optimizing the total energy consumption for a set of tasks executed on a heterogeneous compute node. reMinMin bases on a new energy model that differentiates between static and dynamic energy components and covers effects of accelerator tasks on the host CPU. The required energy values are retrieved by measurements on the real computing system. In order to evaluate reMinMin, we compare it with two reference implementations on three task sets with different degrees of heterogeneity. In our experiments, MinMin is consistently better than a scheduler optimizing for dynamic energy only, which requires up to 19.43% more energy, and very close to optimal schedules.}},
  author       = {{Lösch, Achim and Platzner, Marco}},
  booktitle    = {{Proceedings of the 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)}},
  title        = {{{reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements}}},
  doi          = {{10.1109/ASAP.2017.7995272}},
  year         = {{2017}},
}

@article{68,
  abstract     = {{Proof-carrying hardware (PCH) is a principle for achieving safety for dynamically reconfigurable hardware systems. The producer of a hardware module spends huge effort when creating a proof for a safety policy. The proof is then transferred as a certificate together with the configuration bitstream to the consumer of the hardware module, who can quickly verify the given proof. Previous work utilized SAT solvers and resolution traces to set up a PCH technology and corresponding tool flows. In this article, we present a novel technology for PCH based on inductive invariants. For sequential circuits, our approach is fundamentally stronger than the previous SAT-based one since we avoid the limitations of bounded unrolling. We contrast our technology to existing ones and show that it fits into previously proposed tool flows. We conduct experiments with four categories of benchmark circuits and report consumer and producer runtime and peak memory consumption, as well as the size of the certificates and the distribution of the workload between producer and consumer. Experiments clearly show that our new induction-based technology is superior for sequential circuits, whereas the previous SAT-based technology is the better choice for combinational circuits.}},
  author       = {{Isenberg, Tobias and Platzner, Marco and Wehrheim, Heike and Wiersema, Tobias}},
  journal      = {{ACM Transactions on Design Automation of Electronic Systems}},
  number       = {{4}},
  pages        = {{61:1----61:23}},
  publisher    = {{ACM}},
  title        = {{{Proof-Carrying Hardware via Inductive Invariants}}},
  doi          = {{10.1145/3054743}},
  year         = {{2017}},
}

@article{10600,
  author       = {{H.W. Leong, Philip and Amano, Hideharu and Anderson, Jason and Bertels, Koen and M.P. Cardoso, Jo\~{a}o and Diessel, Oliver and Gogniat, Guy and Hutton, Mike and Lee, JunKyu and Luk, Wayne and Lysaght, Patrick and Platzner, Marco and K. Prasanna, Viktor and Rissa, Tero and Silvano, Cristina and So, Hayden and Wang, Yu}},
  journal      = {{ACM Transactions on Reconfigurable Technology and Systems}},
  title        = {{{The First 25 Years of the FPL Conference – Significant Papers}}},
  doi          = {{10.1145/2996468}},
  year         = {{2017}},
}

@article{10601,
  author       = {{F. DeMara, Ronald and Platzner, Marco and Ottavi, Marco}},
  journal      = {{IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing}},
  title        = {{{Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial)}}},
  doi          = {{10.1109/TETC.2016.2641599}},
  year         = {{2017}},
}

@article{10611,
  author       = {{Anwer, Jahanzeb and Platzner, Marco}},
  journal      = {{Microprocessors and Microsystems}},
  pages        = {{160--172}},
  publisher    = {{Elsevier}},
  title        = {{{Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus}}},
  doi          = {{10.1016/j.micpro.2017.06.002}},
  year         = {{2017}},
}

@misc{10613,
  author       = {{Kaltschmidt, Christian}},
  publisher    = {{Paderborn University}},
  title        = {{{An AR-based Training and Assessment System for Myoelectrical Prosthetic Control}}},
  year         = {{2017}},
}

@inproceedings{10630,
  author       = {{Boschmann, Alexander and Thombansen, Georg and Witschen, Linus Matthias and Wiens, Alex and Platzner, Marco}},
  booktitle    = {{Design, Automation and Test in Europe (DATE)}},
  title        = {{{A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller}}},
  doi          = {{10.23919/DATE.2017.7927137}},
  year         = {{2017}},
}

@misc{10666,
  author       = {{Riaz, Umair}},
  publisher    = {{Paderborn University}},
  title        = {{{Acceleration of Industrial Analytics Functions on a Platform FPGA}}},
  year         = {{2017}},
}

@inproceedings{10672,
  author       = {{Ho, Nam and Ashraf, Ishraq Ibne and Kaufmann, Paul and Platzner, Marco}},
  booktitle    = {{Proc. Design, Automation and Test in Europe Conf. (DATE)}},
  title        = {{{Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor}}},
  doi          = {{10.23919/DATE.2017.7927096}},
  year         = {{2017}},
}

@inproceedings{10676,
  author       = {{Ho, Nam and Kaufmann, Paul and Platzner, Marco}},
  booktitle    = {{2017 International Conference on Field Programmable Technology (ICFPT)}},
  keywords     = {{Linux, cache storage, microprocessor chips, multiprocessing systems, LEON3-Linux based multicore processor, MiBench suite, block sizes, cache adaptation, evolvable caches, memory-to-cache-index mapping function, processor caches, reconfigurable cache mapping optimization, reconfigurable hardware technology, replacement strategies, standard Linux OS, time a complete hardware implementation, Hardware, Indexes, Linux, Measurement, Multicore processing, Optimization, Training}},
  pages        = {{215--218}},
  title        = {{{Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor}}},
  doi          = {{10.1109/FPT.2017.8280144}},
  year         = {{2017}},
}

