[{"status":"public","date_created":"2019-08-26T13:33:00Z","publication_status":"published","publication_identifier":{"issn":["2169-3536"]},"author":[{"last_name":"Ghribi","first_name":"Ines","full_name":"Ghribi, Ines"},{"last_name":"Abdallah","first_name":"Riadh Ben","full_name":"Abdallah, Riadh Ben"},{"last_name":"Khalgui","full_name":"Khalgui, Mohamed","first_name":"Mohamed"},{"last_name":"Li","full_name":"Li, Zhiwu","first_name":"Zhiwu"},{"first_name":"Khalid","full_name":"Alnowibet, Khalid","last_name":"Alnowibet"},{"full_name":"Platzner, Marco","first_name":"Marco","id":"398","last_name":"Platzner"}],"department":[{"_id":"78"}],"publication":"IEEE Access","user_id":"398","title":"R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints","language":[{"iso":"eng"}],"type":"journal_article","citation":{"ieee":"I. Ghribi, R. B. Abdallah, M. Khalgui, Z. Li, K. Alnowibet, and M. Platzner, “R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints,” IEEE Access, pp. 14078–14092, 2018.","short":"I. Ghribi, R.B. Abdallah, M. Khalgui, Z. Li, K. Alnowibet, M. Platzner, IEEE Access (2018) 14078–14092.","mla":"Ghribi, Ines, et al. “R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints.” IEEE Access, 2018, pp. 14078–92, doi:10.1109/access.2018.2799852.","bibtex":"@article{Ghribi_Abdallah_Khalgui_Li_Alnowibet_Platzner_2018, title={R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints}, DOI={10.1109/access.2018.2799852}, journal={IEEE Access}, author={Ghribi, Ines and Abdallah, Riadh Ben and Khalgui, Mohamed and Li, Zhiwu and Alnowibet, Khalid and Platzner, Marco}, year={2018}, pages={14078–14092} }","apa":"Ghribi, I., Abdallah, R. B., Khalgui, M., Li, Z., Alnowibet, K., & Platzner, M. (2018). R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints. IEEE Access, 14078–14092. https://doi.org/10.1109/access.2018.2799852","ama":"Ghribi I, Abdallah RB, Khalgui M, Li Z, Alnowibet K, Platzner M. R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints. IEEE Access. 2018:14078-14092. doi:10.1109/access.2018.2799852","chicago":"Ghribi, Ines, Riadh Ben Abdallah, Mohamed Khalgui, Zhiwu Li, Khalid Alnowibet, and Marco Platzner. “R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints.” IEEE Access, 2018, 14078–92. https://doi.org/10.1109/access.2018.2799852."},"year":"2018","page":"14078-14092","doi":"10.1109/access.2018.2799852","_id":"12965","date_updated":"2022-01-06T06:51:27Z"},{"user_id":"3118","title":"An FPGA Accelerator for Checking Resolution Proofs","status":"public","date_created":"2018-07-20T13:44:34Z","project":[{"_id":"1","name":"SFB 901"},{"_id":"3","name":"SFB 901 - Project Area B"},{"_id":"12","name":"SFB 901 - Subproject B4"}],"publisher":"Universität Paderborn","author":[{"first_name":"Tim","orcid":"0000-0003-1377-3339","full_name":"Hansmeier, Tim","last_name":"Hansmeier","id":"49992"}],"department":[{"_id":"78"},{"_id":"34"},{"_id":"7"}],"date_updated":"2022-01-06T06:59:25Z","_id":"3580","supervisor":[{"last_name":"Platzner","id":"398","first_name":"Marco","full_name":"Platzner, Marco"}],"language":[{"iso":"eng"}],"year":"2017","type":"bachelorsthesis","citation":{"ieee":"T. Hansmeier, An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn, 2017.","short":"T. Hansmeier, An FPGA Accelerator for Checking Resolution Proofs, Universität Paderborn, 2017.","bibtex":"@book{Hansmeier_2017, title={An FPGA Accelerator for Checking Resolution Proofs}, publisher={Universität Paderborn}, author={Hansmeier, Tim}, year={2017} }","mla":"Hansmeier, Tim. An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn, 2017.","chicago":"Hansmeier, Tim. An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn, 2017.","ama":"Hansmeier T. An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn; 2017.","apa":"Hansmeier, T. (2017). An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn."}},{"publisher":"Universität Paderborn","author":[{"first_name":"Linus Matthias","full_name":"Witschen, Linus Matthias","last_name":"Witschen","id":"49051"}],"department":[{"_id":"78"},{"_id":"7"}],"status":"public","project":[{"name":"SFB 901","_id":"1"},{"name":"SFB 901 - Project Area B","_id":"3"},{"name":"SFB 901 - Subproject B4","_id":"12"},{"_id":"52","name":"Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"date_created":"2018-02-01T14:21:19Z","user_id":"477","title":"A Framework for the Synthesis of Approximate Circuits","supervisor":[{"id":"398","last_name":"Platzner","full_name":"Platzner, Marco","first_name":"Marco"},{"full_name":"Wiersema, Tobias","first_name":"Tobias","id":"3118","last_name":"Wiersema"}],"language":[{"iso":"eng"}],"citation":{"short":"L.M. Witschen, A Framework for the Synthesis of Approximate Circuits, Universität Paderborn, 2017.","ieee":"L. M. Witschen, A Framework for the Synthesis of Approximate Circuits. Universität Paderborn, 2017.","chicago":"Witschen, Linus Matthias. A Framework for the Synthesis of Approximate Circuits. Universität Paderborn, 2017.","apa":"Witschen, L. M. (2017). A Framework for the Synthesis of Approximate Circuits. Universität Paderborn.","ama":"Witschen LM. A Framework for the Synthesis of Approximate Circuits. Universität Paderborn; 2017.","mla":"Witschen, Linus Matthias. A Framework for the Synthesis of Approximate Circuits. Universität Paderborn, 2017.","bibtex":"@book{Witschen_2017, title={A Framework for the Synthesis of Approximate Circuits}, publisher={Universität Paderborn}, author={Witschen, Linus Matthias}, year={2017} }"},"year":"2017","type":"mastersthesis","date_updated":"2022-01-06T06:51:03Z","_id":"1157"},{"user_id":"477","title":"OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten","status":"public","project":[{"_id":"1","name":"SFB 901"},{"_id":"14","name":"SFB 901 - Subprojekt C2"},{"_id":"4","name":"SFB 901 - Project Area C"}],"date_created":"2017-10-17T12:41:05Z","publisher":"Universität Paderborn","author":[{"last_name":"Knorr","first_name":"Christoph","full_name":"Knorr, Christoph"}],"department":[{"_id":"78"}],"_id":"74","date_updated":"2022-01-06T07:03:36Z","language":[{"iso":"ger"}],"supervisor":[{"full_name":"Lösch, Achim","first_name":"Achim","id":"43646","last_name":"Lösch"},{"id":"398","last_name":"Platzner","full_name":"Platzner, Marco","first_name":"Marco"}],"type":"mastersthesis","year":"2017","citation":{"short":"C. Knorr, OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten, Universität Paderborn, 2017.","ieee":"C. Knorr, OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn, 2017.","ama":"Knorr C. OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn; 2017.","apa":"Knorr, C. (2017). OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn.","chicago":"Knorr, Christoph. OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn, 2017.","mla":"Knorr, Christoph. OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn, 2017.","bibtex":"@book{Knorr_2017, title={OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten}, publisher={Universität Paderborn}, author={Knorr, Christoph}, year={2017} }"}},{"publication_status":"published","volume":94,"status":"public","date_created":"2019-05-22T13:14:20Z","author":[{"full_name":"Shen, Cong","first_name":"Cong","last_name":"Shen"},{"full_name":"Kaufmann, Paul","first_name":"Paul","last_name":"Kaufmann"},{"last_name":"Braun","full_name":"Braun, Martin","first_name":"Martin"}],"department":[{"_id":"78"}],"publication":"Elsevier International Journal of Electrical Power and Energy Systems (IJEPES)","keyword":["Load restorationRestoration stageRenewable energyVoltage/frequency fluctuations"],"title":"Three-Stage Power System Restoration Methodology Considering Renewable Energies","user_id":"3118","abstract":[{"text":"This is a study of a combined load restoration and generator start-up procedure. The procedure is structured into three stages according to the power system status and the goal of load restoration. Moreover, for each load restoration stage, the proposed algorithm determines a load restoration sequence by considering renewable energy such as solar and wind park to achieve objective functions. The validity and performance of the proposed algorithm is demonstrated through simulations using IEEE-39 network.","lang":"eng"}],"type":"journal_article","year":"2017","citation":{"ieee":"C. Shen, P. Kaufmann, and M. Braun, “Three-Stage Power System Restoration Methodology Considering Renewable Energies,” Elsevier International Journal of Electrical Power and Energy Systems (IJEPES), vol. 94, pp. 287–299, 2017.","short":"C. Shen, P. Kaufmann, M. Braun, Elsevier International Journal of Electrical Power and Energy Systems (IJEPES) 94 (2017) 287–299.","bibtex":"@article{Shen_Kaufmann_Braun_2017, title={Three-Stage Power System Restoration Methodology Considering Renewable Energies}, volume={94}, DOI={10.1016/j.ijepes.2017.07.007}, journal={Elsevier International Journal of Electrical Power and Energy Systems (IJEPES)}, author={Shen, Cong and Kaufmann, Paul and Braun, Martin}, year={2017}, pages={287–299} }","mla":"Shen, Cong, et al. “Three-Stage Power System Restoration Methodology Considering Renewable Energies.” Elsevier International Journal of Electrical Power and Energy Systems (IJEPES), vol. 94, 2017, pp. 287–99, doi:10.1016/j.ijepes.2017.07.007.","ama":"Shen C, Kaufmann P, Braun M. Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES). 2017;94:287-299. doi:10.1016/j.ijepes.2017.07.007","apa":"Shen, C., Kaufmann, P., & Braun, M. (2017). Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES), 94, 287–299. https://doi.org/10.1016/j.ijepes.2017.07.007","chicago":"Shen, Cong, Paul Kaufmann, and Martin Braun. “Three-Stage Power System Restoration Methodology Considering Renewable Energies.” Elsevier International Journal of Electrical Power and Energy Systems (IJEPES) 94 (2017): 287–99. https://doi.org/10.1016/j.ijepes.2017.07.007."},"page":"287-299","language":[{"iso":"eng"}],"doi":"10.1016/j.ijepes.2017.07.007","_id":"9919","intvolume":" 94","date_updated":"2019-10-06T21:56:18Z"},{"user_id":"477","ddc":["040"],"title":"reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements","abstract":[{"text":"Heterogeneous compute nodes in form of CPUs with attached GPU and FPGA accelerators have strongly gained interested in the last years. Applications differ in their execution characteristics and can therefore benefit from such heterogeneous resources in terms of performance or energy consumption. While performance optimization has been the only goal for a long time, nowadays research is more and more focusing on techniques to minimize energy consumption due to rising electricity costs.This paper presents reMinMin, a novel static list scheduling approach for optimizing the total energy consumption for a set of tasks executed on a heterogeneous compute node. reMinMin bases on a new energy model that differentiates between static and dynamic energy components and covers effects of accelerator tasks on the host CPU. The required energy values are retrieved by measurements on the real computing system. In order to evaluate reMinMin, we compare it with two reference implementations on three task sets with different degrees of heterogeneity. In our experiments, MinMin is consistently better than a scheduler optimizing for dynamic energy only, which requires up to 19.43% more energy, and very close to optimal schedules.","lang":"eng"}],"has_accepted_license":"1","status":"public","project":[{"_id":"1","name":"SFB 901"},{"name":"SFB 901 - Subprojekt C2","_id":"14"},{"_id":"4","name":"SFB 901 - Project Area C"}],"date_created":"2017-10-17T12:41:04Z","file":[{"file_size":467545,"file_id":"5550","creator":"aloesch","content_type":"application/pdf","date_updated":"2018-11-14T09:37:55Z","relation":"main_file","success":1,"file_name":"loesch_asap2017.pdf","date_created":"2018-11-14T09:37:55Z","access_level":"closed"}],"author":[{"full_name":"Lösch, Achim","first_name":"Achim","id":"43646","last_name":"Lösch"},{"id":"398","last_name":"Platzner","full_name":"Platzner, Marco","first_name":"Marco"}],"publication":"Proceedings of the 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)","file_date_updated":"2018-11-14T09:37:55Z","department":[{"_id":"78"}],"doi":"10.1109/ASAP.2017.7995272","date_updated":"2022-01-06T07:03:08Z","_id":"65","language":[{"iso":"eng"}],"type":"conference","citation":{"chicago":"Lösch, Achim, and Marco Platzner. “ReMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements.” In Proceedings of the 28th Annual IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), 2017. https://doi.org/10.1109/ASAP.2017.7995272.","ama":"Lösch A, Platzner M. reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements. In: Proceedings of the 28th Annual IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP). ; 2017. doi:10.1109/ASAP.2017.7995272","apa":"Lösch, A., & Platzner, M. (2017). reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements. In Proceedings of the 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP). https://doi.org/10.1109/ASAP.2017.7995272","bibtex":"@inproceedings{Lösch_Platzner_2017, title={reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements}, DOI={10.1109/ASAP.2017.7995272}, booktitle={Proceedings of the 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)}, author={Lösch, Achim and Platzner, Marco}, year={2017} }","mla":"Lösch, Achim, and Marco Platzner. “ReMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements.” Proceedings of the 28th Annual IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), 2017, doi:10.1109/ASAP.2017.7995272.","short":"A. Lösch, M. Platzner, in: Proceedings of the 28th Annual IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), 2017.","ieee":"A. Lösch and M. Platzner, “reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements,” in Proceedings of the 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2017."},"year":"2017"},{"abstract":[{"lang":"eng","text":"Proof-carrying hardware (PCH) is a principle for achieving safety for dynamically reconfigurable hardware systems. The producer of a hardware module spends huge effort when creating a proof for a safety policy. The proof is then transferred as a certificate together with the configuration bitstream to the consumer of the hardware module, who can quickly verify the given proof. Previous work utilized SAT solvers and resolution traces to set up a PCH technology and corresponding tool flows. In this article, we present a novel technology for PCH based on inductive invariants. For sequential circuits, our approach is fundamentally stronger than the previous SAT-based one since we avoid the limitations of bounded unrolling. We contrast our technology to existing ones and show that it fits into previously proposed tool flows. We conduct experiments with four categories of benchmark circuits and report consumer and producer runtime and peak memory consumption, as well as the size of the certificates and the distribution of the workload between producer and consumer. Experiments clearly show that our new induction-based technology is superior for sequential circuits, whereas the previous SAT-based technology is the better choice for combinational circuits."}],"user_id":"3118","ddc":["000"],"file":[{"access_level":"closed","file_name":"a61-isenberg.pdf","date_created":"2018-11-02T16:08:17Z","date_updated":"2018-11-02T16:08:17Z","content_type":"application/pdf","relation":"main_file","success":1,"file_size":806356,"creator":"ups","file_id":"5324"}],"publisher":"ACM","author":[{"last_name":"Isenberg","full_name":"Isenberg, Tobias","first_name":"Tobias"},{"last_name":"Platzner","id":"398","first_name":"Marco","full_name":"Platzner, Marco"},{"id":"573","last_name":"Wehrheim","full_name":"Wehrheim, Heike","first_name":"Heike"},{"first_name":"Tobias","full_name":"Wiersema, Tobias","last_name":"Wiersema","id":"3118"}],"file_date_updated":"2018-11-02T16:08:17Z","publication":"ACM Transactions on Design Automation of Electronic Systems","has_accepted_license":"1","status":"public","date_created":"2017-10-17T12:41:04Z","_id":"68","issue":"4","year":"2017","type":"journal_article","citation":{"apa":"Isenberg, T., Platzner, M., Wehrheim, H., & Wiersema, T. (2017). Proof-Carrying Hardware via Inductive Invariants. ACM Transactions on Design Automation of Electronic Systems, (4), 61:1--61:23. https://doi.org/10.1145/3054743","ama":"Isenberg T, Platzner M, Wehrheim H, Wiersema T. Proof-Carrying Hardware via Inductive Invariants. ACM Transactions on Design Automation of Electronic Systems. 2017;(4):61:1--61:23. doi:10.1145/3054743","chicago":"Isenberg, Tobias, Marco Platzner, Heike Wehrheim, and Tobias Wiersema. “Proof-Carrying Hardware via Inductive Invariants.” ACM Transactions on Design Automation of Electronic Systems, no. 4 (2017): 61:1--61:23. https://doi.org/10.1145/3054743.","bibtex":"@article{Isenberg_Platzner_Wehrheim_Wiersema_2017, title={Proof-Carrying Hardware via Inductive Invariants}, DOI={10.1145/3054743}, number={4}, journal={ACM Transactions on Design Automation of Electronic Systems}, publisher={ACM}, author={Isenberg, Tobias and Platzner, Marco and Wehrheim, Heike and Wiersema, Tobias}, year={2017}, pages={61:1--61:23} }","mla":"Isenberg, Tobias, et al. “Proof-Carrying Hardware via Inductive Invariants.” ACM Transactions on Design Automation of Electronic Systems, no. 4, ACM, 2017, pp. 61:1--61:23, doi:10.1145/3054743.","short":"T. Isenberg, M. Platzner, H. Wehrheim, T. Wiersema, ACM Transactions on Design Automation of Electronic Systems (2017) 61:1--61:23.","ieee":"T. Isenberg, M. Platzner, H. Wehrheim, and T. Wiersema, “Proof-Carrying Hardware via Inductive Invariants,” ACM Transactions on Design Automation of Electronic Systems, no. 4, pp. 61:1--61:23, 2017."},"page":"61:1--61:23","title":"Proof-Carrying Hardware via Inductive Invariants","department":[{"_id":"77"},{"_id":"78"}],"project":[{"_id":"1","name":"SFB 901"},{"name":"SFB 901 - Subprojekt B4","_id":"12"},{"name":"SFB 901 - Project Area B","_id":"3"},{"name":"Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"date_updated":"2022-01-06T07:03:20Z","doi":"10.1145/3054743","language":[{"iso":"eng"}]},{"status":"public","date_created":"2019-07-10T09:22:27Z","author":[{"last_name":"H.W. Leong","full_name":"H.W. Leong, Philip","first_name":"Philip"},{"last_name":"Amano","full_name":"Amano, Hideharu","first_name":"Hideharu"},{"last_name":"Anderson","full_name":"Anderson, Jason","first_name":"Jason"},{"first_name":"Koen","full_name":"Bertels, Koen","last_name":"Bertels"},{"last_name":"M.P. Cardoso","full_name":"M.P. Cardoso, Jo\\~{a}o","first_name":"Jo\\~{a}o"},{"full_name":"Diessel, Oliver","first_name":"Oliver","last_name":"Diessel"},{"last_name":"Gogniat","first_name":"Guy","full_name":"Gogniat, Guy"},{"last_name":"Hutton","first_name":"Mike","full_name":"Hutton, Mike"},{"full_name":"Lee, JunKyu","first_name":"JunKyu","last_name":"Lee"},{"full_name":"Luk, Wayne","first_name":"Wayne","last_name":"Luk"},{"first_name":"Patrick","full_name":"Lysaght, Patrick","last_name":"Lysaght"},{"full_name":"Platzner, Marco","first_name":"Marco","id":"398","last_name":"Platzner"},{"first_name":"Viktor","full_name":"K. Prasanna, Viktor","last_name":"K. Prasanna"},{"full_name":"Rissa, Tero","first_name":"Tero","last_name":"Rissa"},{"last_name":"Silvano","first_name":"Cristina","full_name":"Silvano, Cristina"},{"full_name":"So, Hayden","first_name":"Hayden","last_name":"So"},{"last_name":"Wang","first_name":"Yu","full_name":"Wang, Yu"}],"publication":"ACM Transactions on Reconfigurable Technology and Systems","department":[{"_id":"78"}],"title":"The First 25 Years of the FPL Conference – Significant Papers","user_id":"398","citation":{"chicago":"H.W. Leong, Philip, Hideharu Amano, Jason Anderson, Koen Bertels, Jo\\~{a}o M.P. Cardoso, Oliver Diessel, Guy Gogniat, et al. “The First 25 Years of the FPL Conference – Significant Papers.” ACM Transactions on Reconfigurable Technology and Systems, 2017. https://doi.org/10.1145/2996468.","ama":"H.W. Leong P, Amano H, Anderson J, et al. The First 25 Years of the FPL Conference – Significant Papers. ACM Transactions on Reconfigurable Technology and Systems. 2017. doi:10.1145/2996468","apa":"H.W. Leong, P., Amano, H., Anderson, J., Bertels, K., M.P. Cardoso, J., Diessel, O., … Wang, Y. (2017). The First 25 Years of the FPL Conference – Significant Papers. ACM Transactions on Reconfigurable Technology and Systems. https://doi.org/10.1145/2996468","mla":"H.W. Leong, Philip, et al. “The First 25 Years of the FPL Conference – Significant Papers.” ACM Transactions on Reconfigurable Technology and Systems, 2017, doi:10.1145/2996468.","bibtex":"@article{H.W. Leong_Amano_Anderson_Bertels_M.P. Cardoso_Diessel_Gogniat_Hutton_Lee_Luk_et al._2017, title={The First 25 Years of the FPL Conference – Significant Papers}, DOI={10.1145/2996468}, journal={ACM Transactions on Reconfigurable Technology and Systems}, author={H.W. Leong, Philip and Amano, Hideharu and Anderson, Jason and Bertels, Koen and M.P. Cardoso, Jo\\~{a}o and Diessel, Oliver and Gogniat, Guy and Hutton, Mike and Lee, JunKyu and Luk, Wayne and et al.}, year={2017} }","short":"P. H.W. Leong, H. Amano, J. Anderson, K. Bertels, J. M.P. Cardoso, O. Diessel, G. Gogniat, M. Hutton, J. Lee, W. Luk, P. Lysaght, M. Platzner, V. K. Prasanna, T. Rissa, C. Silvano, H. So, Y. Wang, ACM Transactions on Reconfigurable Technology and Systems (2017).","ieee":"P. H.W. Leong et al., “The First 25 Years of the FPL Conference – Significant Papers,” ACM Transactions on Reconfigurable Technology and Systems, 2017."},"year":"2017","type":"journal_article","language":[{"iso":"eng"}],"doi":"10.1145/2996468","date_updated":"2022-01-06T06:50:47Z","_id":"10600"},{"language":[{"iso":"eng"}],"year":"2017","citation":{"apa":"F. DeMara, R., Platzner, M., & Ottavi, M. (2017). Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial). IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing. https://doi.org/10.1109/TETC.2016.2641599","ama":"F. DeMara R, Platzner M, Ottavi M. Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial). IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing. 2017. doi:10.1109/TETC.2016.2641599","chicago":"F. DeMara, Ronald, Marco Platzner, and Marco Ottavi. “Innovation in Reconfigurable Computing Fabrics: From Devices to Architectures (Guest Editorial).” IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing, 2017. https://doi.org/10.1109/TETC.2016.2641599.","bibtex":"@article{F. DeMara_Platzner_Ottavi_2017, title={Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial)}, DOI={10.1109/TETC.2016.2641599}, journal={IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing}, author={F. DeMara, Ronald and Platzner, Marco and Ottavi, Marco}, year={2017} }","mla":"F. DeMara, Ronald, et al. “Innovation in Reconfigurable Computing Fabrics: From Devices to Architectures (Guest Editorial).” IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing, 2017, doi:10.1109/TETC.2016.2641599.","short":"R. F. DeMara, M. Platzner, M. Ottavi, IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing (2017).","ieee":"R. F. DeMara, M. Platzner, and M. Ottavi, “Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial),” IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing, 2017."},"type":"journal_article","_id":"10601","date_updated":"2022-01-06T06:50:47Z","doi":"10.1109/TETC.2016.2641599","author":[{"full_name":"F. DeMara, Ronald","first_name":"Ronald","last_name":"F. DeMara"},{"full_name":"Platzner, Marco","first_name":"Marco","id":"398","last_name":"Platzner"},{"last_name":"Ottavi","full_name":"Ottavi, Marco","first_name":"Marco"}],"department":[{"_id":"78"}],"publication":"IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing","status":"public","date_created":"2019-07-10T09:22:28Z","user_id":"398","title":"Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial)"},{"_id":"10611","date_updated":"2022-01-06T06:50:47Z","doi":"10.1016/j.micpro.2017.06.002","language":[{"iso":"eng"}],"year":"2017","citation":{"short":"J. Anwer, M. Platzner, Microprocessors and Microsystems (2017) 160–172.","ieee":"J. Anwer and M. Platzner, “Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus,” Microprocessors and Microsystems, pp. 160–172, 2017.","apa":"Anwer, J., & Platzner, M. (2017). Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus. Microprocessors and Microsystems, 160–172. https://doi.org/10.1016/j.micpro.2017.06.002","ama":"Anwer J, Platzner M. Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus. Microprocessors and Microsystems. 2017:160-172. doi:10.1016/j.micpro.2017.06.002","chicago":"Anwer, Jahanzeb, and Marco Platzner. “Evaluating Fault-Tolerance of Redundant FPGA Structures Using Boolean Difference Calculus.” Microprocessors and Microsystems, 2017, 160–72. https://doi.org/10.1016/j.micpro.2017.06.002.","bibtex":"@article{Anwer_Platzner_2017, title={Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus}, DOI={10.1016/j.micpro.2017.06.002}, journal={Microprocessors and Microsystems}, publisher={Elsevier}, author={Anwer, Jahanzeb and Platzner, Marco}, year={2017}, pages={160–172} }","mla":"Anwer, Jahanzeb, and Marco Platzner. “Evaluating Fault-Tolerance of Redundant FPGA Structures Using Boolean Difference Calculus.” Microprocessors and Microsystems, Elsevier, 2017, pp. 160–72, doi:10.1016/j.micpro.2017.06.002."},"type":"journal_article","page":"160-172","user_id":"3118","title":"Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus","author":[{"first_name":"Jahanzeb","full_name":"Anwer, Jahanzeb","last_name":"Anwer"},{"full_name":"Platzner, Marco","first_name":"Marco","id":"398","last_name":"Platzner"}],"publisher":"Elsevier","department":[{"_id":"78"}],"publication":"Microprocessors and Microsystems","status":"public","date_created":"2019-07-10T09:23:11Z"},{"language":[{"iso":"eng"}],"year":"2017","citation":{"ieee":"C. Kaltschmidt, An AR-based Training and Assessment System for Myoelectrical Prosthetic Control. Paderborn University, 2017.","short":"C. Kaltschmidt, An AR-Based Training and Assessment System for Myoelectrical Prosthetic Control, Paderborn University, 2017.","mla":"Kaltschmidt, Christian. An AR-Based Training and Assessment System for Myoelectrical Prosthetic Control. Paderborn University, 2017.","bibtex":"@book{Kaltschmidt_2017, title={An AR-based Training and Assessment System for Myoelectrical Prosthetic Control}, publisher={Paderborn University}, author={Kaltschmidt, Christian}, year={2017} }","apa":"Kaltschmidt, C. (2017). An AR-based Training and Assessment System for Myoelectrical Prosthetic Control. Paderborn University.","ama":"Kaltschmidt C. An AR-Based Training and Assessment System for Myoelectrical Prosthetic Control. Paderborn University; 2017.","chicago":"Kaltschmidt, Christian. An AR-Based Training and Assessment System for Myoelectrical Prosthetic Control. Paderborn University, 2017."},"type":"bachelorsthesis","date_updated":"2022-01-06T06:50:47Z","_id":"10613","status":"public","date_created":"2019-07-10T09:25:11Z","publisher":"Paderborn University","author":[{"first_name":"Christian","full_name":"Kaltschmidt, Christian","last_name":"Kaltschmidt"}],"department":[{"_id":"78"}],"user_id":"3118","title":"An AR-based Training and Assessment System for Myoelectrical Prosthetic Control"},{"author":[{"last_name":"Boschmann","full_name":"Boschmann, Alexander","first_name":"Alexander"},{"last_name":"Thombansen","full_name":"Thombansen, Georg","first_name":"Georg"},{"first_name":"Linus Matthias","full_name":"Witschen, Linus Matthias","last_name":"Witschen","id":"49051"},{"first_name":"Alex","full_name":"Wiens, Alex","last_name":"Wiens"},{"id":"398","last_name":"Platzner","full_name":"Platzner, Marco","first_name":"Marco"}],"department":[{"_id":"78"}],"publication":"Design, Automation and Test in Europe (DATE)","status":"public","date_created":"2019-07-10T11:02:56Z","user_id":"3118","title":"A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller","language":[{"iso":"eng"}],"year":"2017","citation":{"short":"A. Boschmann, G. Thombansen, L.M. Witschen, A. Wiens, M. Platzner, in: Design, Automation and Test in Europe (DATE), 2017.","ieee":"A. Boschmann, G. Thombansen, L. M. Witschen, A. Wiens, and M. Platzner, “A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller,” in Design, Automation and Test in Europe (DATE), 2017.","ama":"Boschmann A, Thombansen G, Witschen LM, Wiens A, Platzner M. A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller. In: Design, Automation and Test in Europe (DATE). ; 2017. doi:10.23919/DATE.2017.7927137","apa":"Boschmann, A., Thombansen, G., Witschen, L. M., Wiens, A., & Platzner, M. (2017). A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller. In Design, Automation and Test in Europe (DATE). https://doi.org/10.23919/DATE.2017.7927137","chicago":"Boschmann, Alexander, Georg Thombansen, Linus Matthias Witschen, Alex Wiens, and Marco Platzner. “A Zynq-Based Dynamically Reconfigurable High Density Myoelectric Prosthesis Controller.” In Design, Automation and Test in Europe (DATE), 2017. https://doi.org/10.23919/DATE.2017.7927137.","bibtex":"@inproceedings{Boschmann_Thombansen_Witschen_Wiens_Platzner_2017, title={A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller}, DOI={10.23919/DATE.2017.7927137}, booktitle={Design, Automation and Test in Europe (DATE)}, author={Boschmann, Alexander and Thombansen, Georg and Witschen, Linus Matthias and Wiens, Alex and Platzner, Marco}, year={2017} }","mla":"Boschmann, Alexander, et al. “A Zynq-Based Dynamically Reconfigurable High Density Myoelectric Prosthesis Controller.” Design, Automation and Test in Europe (DATE), 2017, doi:10.23919/DATE.2017.7927137."},"type":"conference","_id":"10630","date_updated":"2022-01-06T06:50:49Z","doi":"10.23919/DATE.2017.7927137"},{"status":"public","date_created":"2019-07-10T11:15:10Z","publisher":"Paderborn University","author":[{"last_name":"Riaz","full_name":"Riaz, Umair","first_name":"Umair"}],"department":[{"_id":"78"}],"user_id":"3118","title":"Acceleration of Industrial Analytics Functions on a Platform FPGA","supervisor":[{"full_name":"Meisner, Sebastian","first_name":"Sebastian","last_name":"Meisner"}],"language":[{"iso":"eng"}],"type":"mastersthesis","citation":{"ieee":"U. Riaz, Acceleration of Industrial Analytics Functions on a Platform FPGA. Paderborn University, 2017.","short":"U. Riaz, Acceleration of Industrial Analytics Functions on a Platform FPGA, Paderborn University, 2017.","bibtex":"@book{Riaz_2017, title={Acceleration of Industrial Analytics Functions on a Platform FPGA}, publisher={Paderborn University}, author={Riaz, Umair}, year={2017} }","mla":"Riaz, Umair. Acceleration of Industrial Analytics Functions on a Platform FPGA. Paderborn University, 2017.","apa":"Riaz, U. (2017). Acceleration of Industrial Analytics Functions on a Platform FPGA. Paderborn University.","ama":"Riaz U. Acceleration of Industrial Analytics Functions on a Platform FPGA. Paderborn University; 2017.","chicago":"Riaz, Umair. Acceleration of Industrial Analytics Functions on a Platform FPGA. Paderborn University, 2017."},"year":"2017","_id":"10666","date_updated":"2022-01-06T06:50:49Z"},{"language":[{"iso":"eng"}],"year":"2017","type":"conference","citation":{"chicago":"Ho, Nam, Ishraq Ibne Ashraf, Paul Kaufmann, and Marco Platzner. “Accurate Private/Shared Classification of Memory Accesses: A Run-Time Analysis System for the LEON3 Multi-Core Processor.” In Proc. Design, Automation and Test in Europe Conf. (DATE), 2017. https://doi.org/10.23919/DATE.2017.7927096.","ama":"Ho N, Ashraf II, Kaufmann P, Platzner M. Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor. In: Proc. Design, Automation and Test in Europe Conf. (DATE). ; 2017. doi:10.23919/DATE.2017.7927096","apa":"Ho, N., Ashraf, I. I., Kaufmann, P., & Platzner, M. (2017). Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor. In Proc. Design, Automation and Test in Europe Conf. (DATE). https://doi.org/10.23919/DATE.2017.7927096","mla":"Ho, Nam, et al. “Accurate Private/Shared Classification of Memory Accesses: A Run-Time Analysis System for the LEON3 Multi-Core Processor.” Proc. Design, Automation and Test in Europe Conf. (DATE), 2017, doi:10.23919/DATE.2017.7927096.","bibtex":"@inproceedings{Ho_Ashraf_Kaufmann_Platzner_2017, title={Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor}, DOI={10.23919/DATE.2017.7927096}, booktitle={Proc. Design, Automation and Test in Europe Conf. (DATE)}, author={Ho, Nam and Ashraf, Ishraq Ibne and Kaufmann, Paul and Platzner, Marco}, year={2017} }","short":"N. Ho, I.I. Ashraf, P. Kaufmann, M. Platzner, in: Proc. Design, Automation and Test in Europe Conf. (DATE), 2017.","ieee":"N. Ho, I. I. Ashraf, P. Kaufmann, and M. Platzner, “Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor,” in Proc. Design, Automation and Test in Europe Conf. (DATE), 2017."},"doi":"10.23919/DATE.2017.7927096","date_updated":"2022-01-06T06:50:49Z","_id":"10672","date_created":"2019-07-10T11:17:58Z","status":"public","department":[{"_id":"78"}],"publication":"Proc. Design, Automation and Test in Europe Conf. (DATE)","author":[{"full_name":"Ho, Nam","first_name":"Nam","last_name":"Ho"},{"first_name":"Ishraq Ibne","full_name":"Ashraf, Ishraq Ibne","last_name":"Ashraf"},{"first_name":"Paul","full_name":"Kaufmann, Paul","last_name":"Kaufmann"},{"id":"398","last_name":"Platzner","full_name":"Platzner, Marco","first_name":"Marco"}],"user_id":"3118","title":"Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor"},{"doi":"10.1109/FPT.2017.8280144","date_updated":"2022-01-06T06:50:49Z","_id":"10676","page":"215-218","type":"conference","citation":{"mla":"Ho, Nam, et al. “Evolvable Caches: Optimization of Reconfigurable Cache Mappings for a LEON3/Linux-Based Multi-Core Processor.” 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–18, doi:10.1109/FPT.2017.8280144.","bibtex":"@inproceedings{Ho_Kaufmann_Platzner_2017, title={Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor}, DOI={10.1109/FPT.2017.8280144}, booktitle={2017 International Conference on Field Programmable Technology (ICFPT)}, author={Ho, Nam and Kaufmann, Paul and Platzner, Marco}, year={2017}, pages={215–218} }","ama":"Ho N, Kaufmann P, Platzner M. Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. In: 2017 International Conference on Field Programmable Technology (ICFPT). ; 2017:215-218. doi:10.1109/FPT.2017.8280144","apa":"Ho, N., Kaufmann, P., & Platzner, M. (2017). Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. In 2017 International Conference on Field Programmable Technology (ICFPT) (pp. 215–218). https://doi.org/10.1109/FPT.2017.8280144","chicago":"Ho, Nam, Paul Kaufmann, and Marco Platzner. “Evolvable Caches: Optimization of Reconfigurable Cache Mappings for a LEON3/Linux-Based Multi-Core Processor.” In 2017 International Conference on Field Programmable Technology (ICFPT), 215–18, 2017. https://doi.org/10.1109/FPT.2017.8280144.","ieee":"N. Ho, P. Kaufmann, and M. Platzner, “Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor,” in 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.","short":"N. Ho, P. Kaufmann, M. Platzner, in: 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218."},"year":"2017","language":[{"iso":"eng"}],"title":"Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor","user_id":"398","date_created":"2019-07-10T11:22:59Z","status":"public","publication":"2017 International Conference on Field Programmable Technology (ICFPT)","keyword":["Linux","cache storage","microprocessor chips","multiprocessing systems","LEON3-Linux based multicore processor","MiBench suite","block sizes","cache adaptation","evolvable caches","memory-to-cache-index mapping function","processor caches","reconfigurable cache mapping optimization","reconfigurable hardware technology","replacement strategies","standard Linux OS","time a complete hardware implementation","Hardware","Indexes","Linux","Measurement","Multicore processing","Optimization","Training"],"department":[{"_id":"78"}],"author":[{"last_name":"Ho","first_name":"Nam","full_name":"Ho, Nam"},{"first_name":"Paul","full_name":"Kaufmann, Paul","last_name":"Kaufmann"},{"last_name":"Platzner","id":"398","first_name":"Marco","full_name":"Platzner, Marco"}]},{"year":"2017","type":"journal_article","citation":{"mla":"Shen, Cong, et al. “Three-Stage Power System Restoration Methodology Considering Renewable Energies.” Elsevier International Journal of Electrical Power and Energy Systems (IJEPES), 2017.","bibtex":"@article{Shen_Kaufmann_Braun_2017, title={Three-Stage Power System Restoration Methodology Considering Renewable Energies}, journal={Elsevier International Journal of Electrical Power and Energy Systems (IJEPES)}, author={Shen, Cong and Kaufmann, Paul and Braun, Martin}, year={2017} }","apa":"Shen, C., Kaufmann, P., & Braun, M. (2017). Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES).","ama":"Shen C, Kaufmann P, Braun M. Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES). 2017.","chicago":"Shen, Cong, Paul Kaufmann, and Martin Braun. “Three-Stage Power System Restoration Methodology Considering Renewable Energies.” Elsevier International Journal of Electrical Power and Energy Systems (IJEPES), 2017.","ieee":"C. Shen, P. Kaufmann, and M. Braun, “Three-Stage Power System Restoration Methodology Considering Renewable Energies,” Elsevier International Journal of Electrical Power and Energy Systems (IJEPES), 2017.","short":"C. Shen, P. Kaufmann, M. Braun, Elsevier International Journal of Electrical Power and Energy Systems (IJEPES) (2017)."},"date_updated":"2022-01-06T06:50:49Z","_id":"10692","author":[{"full_name":"Shen, Cong","first_name":"Cong","last_name":"Shen"},{"full_name":"Kaufmann, Paul","first_name":"Paul","last_name":"Kaufmann"},{"last_name":"Braun","first_name":"Martin","full_name":"Braun, Martin"}],"department":[{"_id":"78"}],"publication":"Elsevier International Journal of Electrical Power and Energy Systems (IJEPES)","status":"public","date_created":"2019-07-10T11:29:58Z","user_id":"3118","title":"Three-Stage Power System Restoration Methodology Considering Renewable Energies"},{"department":[{"_id":"78"}],"publisher":"Paderborn University","author":[{"last_name":"Dietrich","first_name":"Andreas","full_name":"Dietrich, Andreas"}],"date_created":"2019-07-10T11:43:32Z","status":"public","user_id":"3118","title":"Reconfigurable Cryptographic Services","supervisor":[{"last_name":"Kaufmann","full_name":"Kaufmann, Paul","first_name":"Paul"}],"language":[{"iso":"eng"}],"year":"2017","citation":{"ieee":"A. Dietrich, Reconfigurable Cryptographic Services. Paderborn University, 2017.","short":"A. Dietrich, Reconfigurable Cryptographic Services, Paderborn University, 2017.","mla":"Dietrich, Andreas. Reconfigurable Cryptographic Services. Paderborn University, 2017.","bibtex":"@book{Dietrich_2017, title={Reconfigurable Cryptographic Services}, publisher={Paderborn University}, author={Dietrich, Andreas}, year={2017} }","chicago":"Dietrich, Andreas. Reconfigurable Cryptographic Services. Paderborn University, 2017.","apa":"Dietrich, A. (2017). Reconfigurable Cryptographic Services. Paderborn University.","ama":"Dietrich A. Reconfigurable Cryptographic Services. Paderborn University; 2017."},"type":"mastersthesis","_id":"10708","date_updated":"2022-01-06T06:50:50Z"},{"user_id":"3118","title":"Fast Network Restoration by Partitioning of Parallel Black Start Zones","status":"public","date_created":"2019-07-10T11:59:38Z","author":[{"last_name":"Shen","full_name":"Shen, Cong","first_name":"Cong"},{"full_name":"Kaufmann, Paul","first_name":"Paul","last_name":"Kaufmann"},{"first_name":"Martin","full_name":"Braun, Martin","last_name":"Braun"}],"publication":"The Journal of Engineering","department":[{"_id":"78"}],"doi":"10.1049/joe.2017.0032","_id":"10740","date_updated":"2022-01-06T06:50:50Z","year":"2017","type":"journal_article","citation":{"ama":"Shen C, Kaufmann P, Braun M. Fast Network Restoration by Partitioning of Parallel Black Start Zones. The Journal of Engineering. 2017:19pp. doi:10.1049/joe.2017.0032","apa":"Shen, C., Kaufmann, P., & Braun, M. (2017). Fast Network Restoration by Partitioning of Parallel Black Start Zones. The Journal of Engineering, 19pp. https://doi.org/10.1049/joe.2017.0032","chicago":"Shen, Cong, Paul Kaufmann, and Martin Braun. “Fast Network Restoration by Partitioning of Parallel Black Start Zones.” The Journal of Engineering, 2017, 19pp. https://doi.org/10.1049/joe.2017.0032.","bibtex":"@article{Shen_Kaufmann_Braun_2017, title={Fast Network Restoration by Partitioning of Parallel Black Start Zones}, DOI={10.1049/joe.2017.0032}, journal={The Journal of Engineering}, author={Shen, Cong and Kaufmann, Paul and Braun, Martin}, year={2017}, pages={19pp} }","mla":"Shen, Cong, et al. “Fast Network Restoration by Partitioning of Parallel Black Start Zones.” The Journal of Engineering, 2017, p. 19pp, doi:10.1049/joe.2017.0032.","short":"C. Shen, P. Kaufmann, M. Braun, The Journal of Engineering (2017) 19pp.","ieee":"C. Shen, P. Kaufmann, and M. Braun, “Fast Network Restoration by Partitioning of Parallel Black Start Zones,” The Journal of Engineering, p. 19pp, 2017."},"page":"19pp"},{"user_id":"3118","title":"Applications of Evolutionary Computation - 20th European Conference, EvoApplications","department":[{"_id":"78"}],"publisher":"Springer","author":[{"full_name":"Squillero, Giovanni","first_name":"Giovanni","last_name":"Squillero"},{"last_name":"Burelli","full_name":"Burelli, Paolo","first_name":"Paolo"},{"first_name":"Antonio","full_name":"M. Mora, Antonio","last_name":"M. Mora"},{"last_name":"Agapitos","first_name":"Alexandros","full_name":"Agapitos, Alexandros"},{"first_name":"William","full_name":"S. Bush, William","last_name":"S. Bush"},{"first_name":"Stefano","full_name":"Cagnoni, Stefano","last_name":"Cagnoni"},{"full_name":"Cotta, Carlos","first_name":"Carlos","last_name":"Cotta"},{"first_name":"Ivanoe","full_name":"De Falco, Ivanoe","last_name":"De Falco"},{"first_name":"Antonio","full_name":"Della Cioppa, Antonio","last_name":"Della Cioppa"},{"first_name":"Federico","full_name":"Divina, Federico","last_name":"Divina"},{"last_name":"Eiben","full_name":"Eiben, A.E.","first_name":"A.E."},{"first_name":"Anna","full_name":"I. Esparcia-Alc{\\'a}zar, Anna","last_name":"I. Esparcia-Alc{\\'a}zar"},{"first_name":"Francisco","full_name":"Fern{\\'a}ndez de Vega, Francisco","last_name":"Fern{\\'a}ndez de Vega"},{"first_name":"Kyrre","full_name":"Glette, Kyrre","last_name":"Glette"},{"full_name":"Haasdijk, Evert","first_name":"Evert","last_name":"Haasdijk"},{"first_name":"J.","full_name":"Ignacio Hidalgo, J.","last_name":"Ignacio Hidalgo"},{"last_name":"Kampouridis","first_name":"Michael","full_name":"Kampouridis, Michael"},{"full_name":"Kaufmann, Paul","first_name":"Paul","last_name":"Kaufmann"},{"first_name":"Michalis","full_name":"Mavrovouniotis, Michalis","last_name":"Mavrovouniotis"},{"last_name":"Thanh Nguyen","first_name":"Trung","full_name":"Thanh Nguyen, Trung"},{"first_name":"Robert","full_name":"Schaefer, Robert","last_name":"Schaefer"},{"full_name":"Sim, Kevin","first_name":"Kevin","last_name":"Sim"},{"first_name":"Ernesto","full_name":"Tarantino, Ernesto","last_name":"Tarantino"},{"last_name":"Urquhart","first_name":"Neil","full_name":"Urquhart, Neil"},{"last_name":"Zhang (editors)","first_name":"Mengjie","full_name":"Zhang (editors), Mengjie"}],"date_created":"2019-07-10T12:06:37Z","status":"public","_id":"10759","date_updated":"2022-01-06T06:50:50Z","series_title":"Lecture Notes in Computer Science","citation":{"mla":"Squillero, Giovanni, et al. Applications of Evolutionary Computation - 20th European Conference, EvoApplications. Springer, 2017.","bibtex":"@book{Squillero_Burelli_M. Mora_Agapitos_S. Bush_Cagnoni_Cotta_De Falco_Della Cioppa_Divina_et al._2017, series={Lecture Notes in Computer Science}, title={Applications of Evolutionary Computation - 20th European Conference, EvoApplications}, publisher={Springer}, author={Squillero, Giovanni and Burelli, Paolo and M. Mora, Antonio and Agapitos, Alexandros and S. Bush, William and Cagnoni, Stefano and Cotta, Carlos and De Falco, Ivanoe and Della Cioppa, Antonio and Divina, Federico and et al.}, year={2017}, collection={Lecture Notes in Computer Science} }","chicago":"Squillero, Giovanni, Paolo Burelli, Antonio M. Mora, Alexandros Agapitos, William S. Bush, Stefano Cagnoni, Carlos Cotta, et al. Applications of Evolutionary Computation - 20th European Conference, EvoApplications. Lecture Notes in Computer Science. Springer, 2017.","apa":"Squillero, G., Burelli, P., M. Mora, A., Agapitos, A., S. Bush, W., Cagnoni, S., … Zhang (editors), M. (2017). Applications of Evolutionary Computation - 20th European Conference, EvoApplications. Springer.","ama":"Squillero G, Burelli P, M. Mora A, et al. Applications of Evolutionary Computation - 20th European Conference, EvoApplications. Springer; 2017.","ieee":"G. Squillero et al., Applications of Evolutionary Computation - 20th European Conference, EvoApplications. Springer, 2017.","short":"G. Squillero, P. Burelli, A. M. Mora, A. Agapitos, W. S. Bush, S. Cagnoni, C. Cotta, I. De Falco, A. Della Cioppa, F. Divina, A.E. Eiben, A. I. Esparcia-Alc{\\’a}zar, F. Fern{\\’a}ndez de Vega, K. Glette, E. Haasdijk, J. Ignacio Hidalgo, M. Kampouridis, P. Kaufmann, M. Mavrovouniotis, T. Thanh Nguyen, R. Schaefer, K. Sim, E. Tarantino, N. Urquhart, M. Zhang (editors), Applications of Evolutionary Computation - 20th European Conference, EvoApplications, Springer, 2017."},"type":"book","year":"2017"},{"user_id":"3118","title":"Parametrizing Cartesian Genetic Programming: An Empirical Study","status":"public","date_created":"2019-07-10T12:06:38Z","publisher":"Springer International Publishing","author":[{"last_name":"Kaufmann","first_name":"Paul","full_name":"Kaufmann, Paul"},{"last_name":"Kalkreuth","first_name":"Roman","full_name":"Kalkreuth, Roman"}],"publication":"KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI","department":[{"_id":"78"}],"doi":"10.1007/978-3-319-67190-1_26","_id":"10760","date_updated":"2022-01-06T06:50:50Z","language":[{"iso":"eng"}],"year":"2017","citation":{"ama":"Kaufmann P, Kalkreuth R. Parametrizing Cartesian Genetic Programming: An Empirical Study. In: KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI. Springer International Publishing; 2017. doi:10.1007/978-3-319-67190-1_26","apa":"Kaufmann, P., & Kalkreuth, R. (2017). Parametrizing Cartesian Genetic Programming: An Empirical Study. In KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI. Springer International Publishing. https://doi.org/10.1007/978-3-319-67190-1_26","chicago":"Kaufmann, Paul, and Roman Kalkreuth. “Parametrizing Cartesian Genetic Programming: An Empirical Study.” In KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI. Springer International Publishing, 2017. https://doi.org/10.1007/978-3-319-67190-1_26.","mla":"Kaufmann, Paul, and Roman Kalkreuth. “Parametrizing Cartesian Genetic Programming: An Empirical Study.” KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI, Springer International Publishing, 2017, doi:10.1007/978-3-319-67190-1_26.","bibtex":"@inproceedings{Kaufmann_Kalkreuth_2017, title={Parametrizing Cartesian Genetic Programming: An Empirical Study}, DOI={10.1007/978-3-319-67190-1_26}, booktitle={KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI}, publisher={Springer International Publishing}, author={Kaufmann, Paul and Kalkreuth, Roman}, year={2017} }","short":"P. Kaufmann, R. Kalkreuth, in: KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI, Springer International Publishing, 2017.","ieee":"P. Kaufmann and R. Kalkreuth, “Parametrizing Cartesian Genetic Programming: An Empirical Study,” in KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI, 2017."},"type":"conference"}]