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IEEE; 2009:252-255. doi:<a href=\"https://doi.org/10.1109/PRDC.2009.69\">10.1109/PRDC.2009.69</a>","bibtex":"@inproceedings{Ghasemzadeh Mohammadi_Miremadi_Ejlali_2009, title={Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors}, DOI={<a href=\"https://doi.org/10.1109/PRDC.2009.69\">10.1109/PRDC.2009.69</a>}, booktitle={Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium on}, publisher={IEEE}, author={Ghasemzadeh Mohammadi, Hassan and Miremadi, Seyed Ghassem and Ejlali, Alireza}, year={2009}, pages={252–255} }"},"publication":"Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium on","extern":"1","date_created":"2019-07-10T12:11:34Z","department":[{"_id":"78"}],"type":"conference","author":[{"id":"61186","full_name":"Ghasemzadeh Mohammadi, Hassan","first_name":"Hassan","last_name":"Ghasemzadeh Mohammadi"},{"full_name":"Miremadi, Seyed Ghassem","last_name":"Miremadi","first_name":"Seyed Ghassem"},{"last_name":"Ejlali","first_name":"Alireza","full_name":"Ejlali, Alireza"}],"status":"public","title":"Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors","year":"2009","date_updated":"2022-01-06T06:50:50Z","_id":"10777","publisher":"IEEE","language":[{"iso":"eng"}],"page":"252-255","doi":"10.1109/PRDC.2009.69","user_id":"3118"},{"department":[{"_id":"78"}],"type":"conference","date_created":"2019-10-04T22:13:24Z","citation":{"ama":"Happe M, Lübbers E, Platzner M. A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms. In: <i>Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC)</i>. Springer; 2009.","bibtex":"@inproceedings{Happe_Lübbers_Platzner_2009, title={A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms}, booktitle={Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC)}, publisher={Springer}, author={Happe, Markus and Lübbers, Enno and Platzner, Marco}, year={2009} }","mla":"Happe, Markus, et al. “A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms.” <i>Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC)</i>, Springer, 2009.","short":"M. Happe, E. Lübbers, M. Platzner, in: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), Springer, 2009.","chicago":"Happe, Markus, Enno Lübbers, and Marco Platzner. “A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms.” In <i>Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC)</i>. Springer, 2009.","apa":"Happe, M., Lübbers, E., &#38; Platzner, M. (2009). A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms. In <i>Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC)</i>. Springer.","ieee":"M. Happe, E. Lübbers, and M. Platzner, “A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms,” in <i>Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC)</i>, 2009."},"publication":"Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC)","user_id":"398","language":[{"iso":"eng"}],"_id":"13632","publisher":"Springer","date_updated":"2022-01-06T06:51:40Z","author":[{"full_name":"Happe, Markus","first_name":"Markus","last_name":"Happe"},{"first_name":"Enno","last_name":"Lübbers","full_name":"Lübbers, Enno"},{"id":"398","first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco"}],"status":"public","title":"A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms","year":"2009"},{"date_updated":"2022-01-06T06:51:40Z","title":"Towards Models for Many-Cores: The Case for the Reconfigurable Mesh","status":"public","year":"2009","author":[{"first_name":"Heiner","last_name":"Giefers","full_name":"Giefers, Heiner"},{"id":"398","first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco"}],"user_id":"398","_id":"13634","language":[{"iso":"eng"}],"publication":"Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS)","citation":{"bibtex":"@inproceedings{Giefers_Platzner_2009, title={Towards Models for Many-Cores: The Case for the Reconfigurable Mesh}, booktitle={Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS)}, author={Giefers, Heiner and Platzner, Marco}, year={2009} }","ama":"Giefers H, Platzner M. Towards Models for Many-Cores: The Case for the Reconfigurable Mesh. In: <i>Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS)</i>. ; 2009.","mla":"Giefers, Heiner, and Marco Platzner. “Towards Models for Many-Cores: The Case for the Reconfigurable Mesh.” <i>Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS)</i>, 2009.","short":"H. Giefers, M. Platzner, in: Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.","chicago":"Giefers, Heiner, and Marco Platzner. “Towards Models for Many-Cores: The Case for the Reconfigurable Mesh.” In <i>Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS)</i>, 2009.","ieee":"H. Giefers and M. Platzner, “Towards Models for Many-Cores: The Case for the Reconfigurable Mesh,” in <i>Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS)</i>, 2009.","apa":"Giefers, H., &#38; Platzner, M. (2009). Towards Models for Many-Cores: The Case for the Reconfigurable Mesh. In <i>Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS)</i>."},"type":"conference","department":[{"_id":"78"}],"date_created":"2019-10-04T22:16:01Z"},{"publication":"Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium","citation":{"mla":"Giefers, Heiner, and Marco Platzner. “ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores.” <i>Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium</i>, IEEE, 2009.","ama":"Giefers H, Platzner M. ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores. In: <i>Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium</i>. IEEE; 2009.","bibtex":"@inproceedings{Giefers_Platzner_2009, title={ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores}, booktitle={Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium}, publisher={IEEE}, author={Giefers, Heiner and Platzner, Marco}, year={2009} }","apa":"Giefers, H., &#38; Platzner, M. (2009). ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores. In <i>Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium</i>. IEEE.","ieee":"H. Giefers and M. Platzner, “ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores,” in <i>Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium</i>, 2009.","chicago":"Giefers, Heiner, and Marco Platzner. “ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores.” In <i>Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium</i>. IEEE, 2009.","short":"H. Giefers, M. Platzner, in: Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium, IEEE, 2009."},"type":"conference","department":[{"_id":"78"}],"date_created":"2019-10-04T22:17:57Z","date_updated":"2022-01-06T06:51:40Z","year":"2009","status":"public","title":"ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores","author":[{"last_name":"Giefers","first_name":"Heiner","full_name":"Giefers, Heiner"},{"first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco","id":"398"}],"user_id":"398","_id":"13635","publisher":"IEEE","language":[{"iso":"eng"}]},{"_id":"13636","publisher":"IEEE","language":[{"iso":"eng"}],"user_id":"398","status":"public","year":"2009","title":"Cooperative Multithreading in Dynamically Reconfigurable Systems","author":[{"last_name":"Lübbers","first_name":"Enno","full_name":"Lübbers, Enno"},{"id":"398","full_name":"Platzner, Marco","last_name":"Platzner","first_name":"Marco"}],"date_updated":"2022-01-06T06:51:40Z","date_created":"2019-10-04T22:20:12Z","type":"conference","department":[{"_id":"78"}],"publication":"Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) ","citation":{"apa":"Lübbers, E., &#38; Platzner, M. (2009). Cooperative Multithreading in Dynamically Reconfigurable Systems. In <i>Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) </i>. IEEE.","ieee":"E. Lübbers and M. Platzner, “Cooperative Multithreading in Dynamically Reconfigurable Systems,” in <i>Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) </i>, 2009.","short":"E. Lübbers, M. Platzner, in: Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.","chicago":"Lübbers, Enno, and Marco Platzner. “Cooperative Multithreading in Dynamically Reconfigurable Systems.” In <i>Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) </i>. IEEE, 2009.","mla":"Lübbers, Enno, and Marco Platzner. “Cooperative Multithreading in Dynamically Reconfigurable Systems.” <i>Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) </i>, IEEE, 2009.","ama":"Lübbers E, Platzner M. Cooperative Multithreading in Dynamically Reconfigurable Systems. In: <i>Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) </i>. IEEE; 2009.","bibtex":"@inproceedings{Lübbers_Platzner_2009, title={Cooperative Multithreading in Dynamically Reconfigurable Systems}, booktitle={Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) }, publisher={IEEE}, author={Lübbers, Enno and Platzner, Marco}, year={2009} }"}},{"department":[{"_id":"78"}],"type":"conference","date_created":"2019-10-04T22:22:02Z","citation":{"ieee":"H. Giefers and M. Platzner, “Program-driven Fine-grained Power Management for the Reconfigurable Mesh,” in <i>Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) </i>, 2009.","mla":"Giefers, Heiner, and Marco Platzner. “Program-Driven Fine-Grained Power Management for the Reconfigurable Mesh.” <i>Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) </i>, IEEE, 2009.","apa":"Giefers, H., &#38; Platzner, M. (2009). Program-driven Fine-grained Power Management for the Reconfigurable Mesh. In <i>Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) </i>. IEEE.","bibtex":"@inproceedings{Giefers_Platzner_2009, title={Program-driven Fine-grained Power Management for the Reconfigurable Mesh}, booktitle={Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) }, publisher={IEEE}, author={Giefers, Heiner and Platzner, Marco}, year={2009} }","short":"H. Giefers, M. Platzner, in: Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.","ama":"Giefers H, Platzner M. Program-driven Fine-grained Power Management for the Reconfigurable Mesh. In: <i>Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) </i>. IEEE; 2009.","chicago":"Giefers, Heiner, and Marco Platzner. “Program-Driven Fine-Grained Power Management for the Reconfigurable Mesh.” In <i>Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) </i>. IEEE, 2009."},"publication":"Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) ","user_id":"398","_id":"13637","publisher":"IEEE","language":[{"iso":"eng"}],"date_updated":"2022-01-06T06:51:40Z","author":[{"first_name":"Heiner","last_name":"Giefers","full_name":"Giefers, Heiner"},{"id":"398","full_name":"Platzner, Marco","first_name":"Marco","last_name":"Platzner"}],"title":"Program-driven Fine-grained Power Management for the Reconfigurable Mesh","status":"public","year":"2009"},{"department":[{"_id":"78"}],"type":"conference","date_created":"2019-10-04T22:22:52Z","citation":{"bibtex":"@inproceedings{Happe_Lübbers_Platzner_2009, title={An adaptive Sequential Monte Carlo framework with runtime HW/SW repartitioning}, DOI={<a href=\"https://doi.org/10.1109/fpt.2009.5377645\">10.1109/fpt.2009.5377645</a>}, booktitle={Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT)}, publisher={IEEE}, author={Happe, Markus and Lübbers, Enno and Platzner, Marco}, year={2009} }","ama":"Happe M, Lübbers E, Platzner M. An adaptive Sequential Monte Carlo framework with runtime HW/SW repartitioning. In: <i>Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT)</i>. IEEE; 2009. doi:<a href=\"https://doi.org/10.1109/fpt.2009.5377645\">10.1109/fpt.2009.5377645</a>","mla":"Happe, Markus, et al. “An Adaptive Sequential Monte Carlo Framework with Runtime HW/SW Repartitioning.” <i>Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT)</i>, IEEE, 2009, doi:<a href=\"https://doi.org/10.1109/fpt.2009.5377645\">10.1109/fpt.2009.5377645</a>.","chicago":"Happe, Markus, Enno Lübbers, and Marco Platzner. “An Adaptive Sequential Monte Carlo Framework with Runtime HW/SW Repartitioning.” In <i>Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT)</i>. IEEE, 2009. <a href=\"https://doi.org/10.1109/fpt.2009.5377645\">https://doi.org/10.1109/fpt.2009.5377645</a>.","short":"M. Happe, E. Lübbers, M. Platzner, in: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT), IEEE, 2009.","ieee":"M. Happe, E. Lübbers, and M. Platzner, “An adaptive Sequential Monte Carlo framework with runtime HW/SW repartitioning,” in <i>Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT)</i>, 2009.","apa":"Happe, M., Lübbers, E., &#38; Platzner, M. (2009). An adaptive Sequential Monte Carlo framework with runtime HW/SW repartitioning. In <i>Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT)</i>. IEEE. <a href=\"https://doi.org/10.1109/fpt.2009.5377645\">https://doi.org/10.1109/fpt.2009.5377645</a>"},"publication":"Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT)","user_id":"398","doi":"10.1109/fpt.2009.5377645","_id":"13638","language":[{"iso":"eng"}],"publisher":"IEEE","publication_status":"published","date_updated":"2022-01-06T06:51:40Z","author":[{"full_name":"Happe, Markus","last_name":"Happe","first_name":"Markus"},{"full_name":"Lübbers, Enno","first_name":"Enno","last_name":"Lübbers"},{"id":"398","full_name":"Platzner, Marco","first_name":"Marco","last_name":"Platzner"}],"publication_identifier":{"isbn":["9781424443758"]},"year":"2009","status":"public","title":"An adaptive Sequential Monte Carlo framework with runtime HW/SW repartitioning"},{"date_created":"2019-10-04T22:25:10Z","department":[{"_id":"78"}],"type":"conference","citation":{"mla":"Drzevitzky, Stephanie, et al. “Proof-Carrying Hardware: Towards Runtime Verification of Reconfigurable Modules.” <i>Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>, IEEE, 2009.","ama":"Drzevitzky S, Kastens U, Platzner M. Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules. In: <i>Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>. IEEE; 2009.","bibtex":"@inproceedings{Drzevitzky_Kastens_Platzner_2009, title={Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules}, booktitle={Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Drzevitzky, Stephanie and Kastens, Uwe and Platzner, Marco}, year={2009} }","apa":"Drzevitzky, S., Kastens, U., &#38; Platzner, M. (2009). Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules. In <i>Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>. IEEE.","ieee":"S. Drzevitzky, U. Kastens, and M. Platzner, “Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules,” in <i>Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>, 2009.","short":"S. Drzevitzky, U. Kastens, M. Platzner, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2009.","chicago":"Drzevitzky, Stephanie, Uwe Kastens, and Marco Platzner. “Proof-Carrying Hardware: Towards Runtime Verification of Reconfigurable Modules.” In <i>Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>. IEEE, 2009."},"publication":"Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)","language":[{"iso":"eng"}],"_id":"13639","publisher":"IEEE","user_id":"398","author":[{"first_name":"Stephanie","last_name":"Drzevitzky","full_name":"Drzevitzky, Stephanie"},{"full_name":"Kastens, Uwe","last_name":"Kastens","first_name":"Uwe"},{"full_name":"Platzner, Marco","first_name":"Marco","last_name":"Platzner","id":"398"}],"title":"Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules","status":"public","year":"2009","date_updated":"2022-01-06T06:51:40Z"},{"status":"public","page":"275-278","_id":"2350","publisher":"IEEE Computer Society","user_id":"15278","citation":{"short":"T. Schumacher, C. Plessl, M. Platzner, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–278.","ama":"Schumacher T, Plessl C, Platzner M. IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. In: <i>Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM)</i>. IEEE Computer Society; 2009:275-278. doi:<a href=\"https://doi.org/10.1109/FCCM.2009.25\">10.1109/FCCM.2009.25</a>","chicago":"Schumacher, Tobias, Christian Plessl, and Marco Platzner. “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.” In <i>Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM)</i>, 275–78. IEEE Computer Society, 2009. <a href=\"https://doi.org/10.1109/FCCM.2009.25\">https://doi.org/10.1109/FCCM.2009.25</a>.","bibtex":"@inproceedings{Schumacher_Plessl_Platzner_2009, title={IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing}, DOI={<a href=\"https://doi.org/10.1109/FCCM.2009.25\">10.1109/FCCM.2009.25</a>}, booktitle={Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM)}, publisher={IEEE Computer Society}, author={Schumacher, Tobias and Plessl, Christian and Platzner, Marco}, year={2009}, pages={275–278} }","apa":"Schumacher, T., Plessl, C., &#38; Platzner, M. (2009). IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. <i>Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM)</i>, 275–278. <a href=\"https://doi.org/10.1109/FCCM.2009.25\">https://doi.org/10.1109/FCCM.2009.25</a>","mla":"Schumacher, Tobias, et al. “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.” <i>Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM)</i>, IEEE Computer Society, 2009, pp. 275–78, doi:<a href=\"https://doi.org/10.1109/FCCM.2009.25\">10.1109/FCCM.2009.25</a>.","ieee":"T. Schumacher, C. Plessl, and M. Platzner, “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing,” in <i>Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM)</i>, 2009, pp. 275–278, doi: <a href=\"https://doi.org/10.1109/FCCM.2009.25\">10.1109/FCCM.2009.25</a>."},"quality_controlled":"1","year":"2009","title":"IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing","publication_identifier":{"isbn":["978-1-4244-4450-2"]},"author":[{"full_name":"Schumacher, Tobias","last_name":"Schumacher","first_name":"Tobias"},{"last_name":"Plessl","orcid":"0000-0001-5728-9982","first_name":"Christian","full_name":"Plessl, Christian","id":"16153"},{"id":"398","full_name":"Platzner, Marco","first_name":"Marco","last_name":"Platzner"}],"date_updated":"2023-09-26T13:51:44Z","language":[{"iso":"eng"}],"doi":"10.1109/FCCM.2009.25","publication":"Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM)","abstract":[{"lang":"eng","text":"Mapping applications that consist of a collection of cores to FPGA accelerators and optimizing their performance is a challenging task in high performance reconfigurable computing. We present IMORC, an architectural template and highly versatile on-chip interconnect. IMORC links provide asynchronous FIFOs and bitwidth conversion which allows for flexibly composing accelerators from cores running at full speed within their own clock domains, thus facilitating the re-use of cores and portability. Further, IMORC inserts performance counters for monitoring runtime data. In this paper, we first introduce the IMORC architectural template and the on-chip interconnect, and then demonstrate IMORC on the example of accelerating the k-th nearest neighbor thinning problem on an XD1000 reconfigurable computing system. Using IMORC's monitoring infrastructure, we gain insights into the data-dependent behavior of the application which, in turn, allow for optimizing the accelerator. "}],"date_created":"2018-04-16T15:05:52Z","keyword":["IMORC","interconnect","performance"],"type":"conference","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}]},{"page":"11-18","publisher":"IEEE Computer Society","_id":"2262","language":[{"iso":"eng"}],"user_id":"15278","year":"2009","status":"public","title":"EvoCaches: Application-specific Adaptation of Cache Mapping","author":[{"last_name":"Kaufmann","first_name":"Paul","full_name":"Kaufmann, Paul"},{"first_name":"Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","full_name":"Plessl, Christian","id":"16153"},{"first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco","id":"398"}],"date_updated":"2023-09-26T13:53:11Z","date_created":"2018-04-06T15:18:24Z","place":"Los Alamitos, CA, USA","type":"conference","keyword":["EvoCache","evolvable hardware","computer architecture"],"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"publication":"Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS)","citation":{"short":"P. Kaufmann, C. Plessl, M. Platzner, in: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 11–18.","chicago":"Kaufmann, Paul, Christian Plessl, and Marco Platzner. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” In <i>Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS)</i>, 11–18. Los Alamitos, CA, USA: IEEE Computer Society, 2009.","apa":"Kaufmann, P., Plessl, C., &#38; Platzner, M. (2009). EvoCaches: Application-specific Adaptation of Cache Mapping. <i>Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS)</i>, 11–18.","ieee":"P. Kaufmann, C. Plessl, and M. Platzner, “EvoCaches: Application-specific Adaptation of Cache Mapping,” in <i>Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS)</i>, 2009, pp. 11–18.","ama":"Kaufmann P, Plessl C, Platzner M. EvoCaches: Application-specific Adaptation of Cache Mapping. In: <i>Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS)</i>. IEEE Computer Society; 2009:11-18.","bibtex":"@inproceedings{Kaufmann_Plessl_Platzner_2009, place={Los Alamitos, CA, USA}, title={EvoCaches: Application-specific Adaptation of Cache Mapping}, booktitle={Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS)}, publisher={IEEE Computer Society}, author={Kaufmann, Paul and Plessl, Christian and Platzner, Marco}, year={2009}, pages={11–18} }","mla":"Kaufmann, Paul, et al. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” <i>Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS)</i>, IEEE Computer Society, 2009, pp. 11–18."},"quality_controlled":"1","abstract":[{"text":"In this work we present EvoCache, a novel approach for implementing application-specific caches. The key innovation of EvoCache is to make the function that maps memory addresses from the CPU address space to cache indices programmable. We support arbitrary Boolean mapping functions that are implemented within a small reconfigurable logic fabric. For finding suitable cache mapping functions we rely on techniques from the evolvable hardware domain and utilize an evolutionary optimization procedure. We evaluate the use of EvoCache in an embedded processor for two specific applications (JPEG and BZIP2 compression) with respect to execution time, cache miss rate and energy consumption. We show that the evolvable hardware approach for optimizing the cache functions not only significantly improves the cache performance for the training data used during optimization, but that the evolved mapping functions generalize very well. Compared to a conventional cache architecture, EvoCache applied to test data achieves a reduction in execution time of up to 14.31% for JPEG (10.98% for BZIP2), and in energy consumption by 16.43% for JPEG (10.70% for BZIP2). We also discuss the integration of EvoCache into the operating system and show that the area and delay overheads introduced by EvoCache are acceptable. ","lang":"eng"}]}]