[{"status":"public","type":"misc","language":[{"iso":"eng"}],"_id":"13464","department":[{"_id":"78"}],"user_id":"398","year":"1998","page":"106-107","citation":{"ieee":"M. Platzner, B. Rinner, and R. Weiss, <i>A Distributed Computer Architecture for Fast Qualitative Simulation </i>. Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998, pp. 106–107.","chicago":"Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. <i>A Distributed Computer Architecture for Fast Qualitative Simulation </i>. Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998.","ama":"Platzner M, Rinner B, Weiss R. <i>A Distributed Computer Architecture for Fast Qualitative Simulation </i>. Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities; 1998:106-107.","bibtex":"@book{Platzner_Rinner_Weiss_1998, title={A Distributed Computer Architecture for Fast Qualitative Simulation }, publisher={Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities}, author={Platzner, Marco and Rinner, Bernhard and Weiss, Reinhold}, year={1998}, pages={106–107} }","mla":"Platzner, Marco, et al. <i>A Distributed Computer Architecture for Fast Qualitative Simulation </i>. Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998, pp. 106–07.","short":"M. Platzner, B. Rinner, R. Weiss, A Distributed Computer Architecture for Fast Qualitative Simulation , Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998.","apa":"Platzner, M., Rinner, B., &#38; Weiss, R. (1998). <i>A Distributed Computer Architecture for Fast Qualitative Simulation </i> (pp. 106–107). Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities."},"title":"A Distributed Computer Architecture for Fast Qualitative Simulation ","publisher":"Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe's leading Universities","date_updated":"2022-01-06T06:51:36Z","date_created":"2019-09-30T09:33:27Z","author":[{"first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco","id":"398"},{"first_name":"Bernhard","last_name":"Rinner","full_name":"Rinner, Bernhard"},{"first_name":"Reinhold","last_name":"Weiss","full_name":"Weiss, Reinhold"}]},{"year":"1998","place":"Berlin, Heidelberg","page":"69-78","citation":{"ama":"Platzner M, De Micheli G. Acceleration of satisfiability algorithms by reconfigurable hardware. In: <i>Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) </i>. LNCS. Berlin, Heidelberg: Springer ; 1998:69-78. doi:<a href=\"https://doi.org/10.1007/bfb0055234\">10.1007/bfb0055234</a>","chicago":"Platzner, Marco, and Giovanni De Micheli. “Acceleration of Satisfiability Algorithms by Reconfigurable Hardware.” In <i>Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) </i>, 69–78. LNCS. Berlin, Heidelberg: Springer , 1998. <a href=\"https://doi.org/10.1007/bfb0055234\">https://doi.org/10.1007/bfb0055234</a>.","ieee":"M. Platzner and G. De Micheli, “Acceleration of satisfiability algorithms by reconfigurable hardware,” in <i>Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) </i>, 1998, pp. 69–78.","bibtex":"@inproceedings{Platzner_De Micheli_1998, place={Berlin, Heidelberg}, series={LNCS}, title={Acceleration of satisfiability algorithms by reconfigurable hardware}, DOI={<a href=\"https://doi.org/10.1007/bfb0055234\">10.1007/bfb0055234</a>}, booktitle={Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) }, publisher={Springer }, author={Platzner, Marco and De Micheli, Giovanni}, year={1998}, pages={69–78}, collection={LNCS} }","mla":"Platzner, Marco, and Giovanni De Micheli. “Acceleration of Satisfiability Algorithms by Reconfigurable Hardware.” <i>Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) </i>, Springer , 1998, pp. 69–78, doi:<a href=\"https://doi.org/10.1007/bfb0055234\">10.1007/bfb0055234</a>.","short":"M. Platzner, G. De Micheli, in: Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , Springer , Berlin, Heidelberg, 1998, pp. 69–78.","apa":"Platzner, M., &#38; De Micheli, G. (1998). Acceleration of satisfiability algorithms by reconfigurable hardware. In <i>Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) </i> (pp. 69–78). Berlin, Heidelberg: Springer . <a href=\"https://doi.org/10.1007/bfb0055234\">https://doi.org/10.1007/bfb0055234</a>"},"publication_identifier":{"isbn":["9783540649489","9783540680666"],"issn":["0302-9743","1611-3349"]},"publication_status":"published","title":"Acceleration of satisfiability algorithms by reconfigurable hardware","doi":"10.1007/bfb0055234","publisher":"Springer ","date_updated":"2022-01-06T06:51:40Z","date_created":"2019-10-04T20:46:34Z","author":[{"full_name":"Platzner, Marco","id":"398","last_name":"Platzner","first_name":"Marco"},{"first_name":"Giovanni","last_name":"De Micheli","full_name":"De Micheli, Giovanni"}],"status":"public","publication":"Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) ","type":"conference","extern":"1","language":[{"iso":"eng"}],"_id":"13606","department":[{"_id":"78"}],"user_id":"398","series_title":"LNCS"},{"page":"13-18","intvolume":"       114","citation":{"apa":"Platzner, M., Rinner, B., &#38; Weiss, R. (1997). A Computer Architecture to Support Qualitative Simulation in Industrial Applications. <i>E &#38; i Elektrotechnik Und Informationstechnik</i>, <i>114</i>, 13–18.","bibtex":"@article{Platzner_Rinner_Weiss_1997, title={A Computer Architecture to Support Qualitative Simulation in Industrial Applications}, volume={114}, journal={e &#38; i Elektrotechnik und Informationstechnik}, publisher={Springer}, author={Platzner, Marco and Rinner, Bernhard and Weiss, Reinhold}, year={1997}, pages={13–18} }","short":"M. Platzner, B. Rinner, R. Weiss, E &#38; i Elektrotechnik Und Informationstechnik 114 (1997) 13–18.","mla":"Platzner, Marco, et al. “A Computer Architecture to Support Qualitative Simulation in Industrial Applications.” <i>E &#38; i Elektrotechnik Und Informationstechnik</i>, vol. 114, Springer, 1997, pp. 13–18.","ama":"Platzner M, Rinner B, Weiss R. A Computer Architecture to Support Qualitative Simulation in Industrial Applications. <i>e &#38; i Elektrotechnik und Informationstechnik</i>. 1997;114:13-18.","ieee":"M. Platzner, B. Rinner, and R. Weiss, “A Computer Architecture to Support Qualitative Simulation in Industrial Applications,” <i>e &#38; i Elektrotechnik und Informationstechnik</i>, vol. 114, pp. 13–18, 1997.","chicago":"Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “A Computer Architecture to Support Qualitative Simulation in Industrial Applications.” <i>E &#38; i Elektrotechnik Und Informationstechnik</i> 114 (1997): 13–18."},"year":"1997","volume":114,"date_created":"2019-07-10T09:23:09Z","author":[{"last_name":"Platzner","full_name":"Platzner, Marco","id":"398","first_name":"Marco"},{"first_name":"Bernhard","full_name":"Rinner, Bernhard","last_name":"Rinner"},{"first_name":"Reinhold","full_name":"Weiss, Reinhold","last_name":"Weiss"}],"date_updated":"2022-01-06T06:50:47Z","publisher":"Springer","title":"A Computer Architecture to Support Qualitative Simulation in Industrial Applications","publication":"e & i Elektrotechnik und Informationstechnik","type":"journal_article","status":"public","department":[{"_id":"78"}],"user_id":"398","_id":"10609","extern":"1","language":[{"iso":"eng"}]},{"issue":"7-8","citation":{"apa":"Platzner, M., Rinner, B., &#38; Weiss, R. (1997). Parallel qualitative simulation. <i>Simulation Practice and Theory</i>, <i>5</i>(7–8), 623–638. <a href=\"https://doi.org/10.1016/s0928-4869(97)00008-6\">https://doi.org/10.1016/s0928-4869(97)00008-6</a>","short":"M. Platzner, B. Rinner, R. Weiss, Simulation Practice and Theory 5 (1997) 623–638.","bibtex":"@article{Platzner_Rinner_Weiss_1997, title={Parallel qualitative simulation}, volume={5}, DOI={<a href=\"https://doi.org/10.1016/s0928-4869(97)00008-6\">10.1016/s0928-4869(97)00008-6</a>}, number={7–8}, journal={Simulation Practice and Theory}, publisher={Elsevier}, author={Platzner, Marco and Rinner, Bernhard and Weiss, Reinhold}, year={1997}, pages={623–638} }","mla":"Platzner, Marco, et al. “Parallel Qualitative Simulation.” <i>Simulation Practice and Theory</i>, vol. 5, no. 7–8, Elsevier, 1997, pp. 623–38, doi:<a href=\"https://doi.org/10.1016/s0928-4869(97)00008-6\">10.1016/s0928-4869(97)00008-6</a>.","ama":"Platzner M, Rinner B, Weiss R. Parallel qualitative simulation. <i>Simulation Practice and Theory</i>. 1997;5(7-8):623-638. doi:<a href=\"https://doi.org/10.1016/s0928-4869(97)00008-6\">10.1016/s0928-4869(97)00008-6</a>","ieee":"M. Platzner, B. Rinner, and R. Weiss, “Parallel qualitative simulation,” <i>Simulation Practice and Theory</i>, vol. 5, no. 7–8, pp. 623–638, 1997.","chicago":"Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “Parallel Qualitative Simulation.” <i>Simulation Practice and Theory</i> 5, no. 7–8 (1997): 623–38. <a href=\"https://doi.org/10.1016/s0928-4869(97)00008-6\">https://doi.org/10.1016/s0928-4869(97)00008-6</a>."},"page":"623-638","intvolume":"         5","year":"1997","author":[{"last_name":"Platzner","id":"398","full_name":"Platzner, Marco","first_name":"Marco"},{"first_name":"Bernhard","last_name":"Rinner","full_name":"Rinner, Bernhard"},{"first_name":"Reinhold","full_name":"Weiss, Reinhold","last_name":"Weiss"}],"date_created":"2019-07-10T11:54:16Z","volume":5,"publisher":"Elsevier","date_updated":"2022-01-06T06:50:50Z","doi":"10.1016/s0928-4869(97)00008-6","title":"Parallel qualitative simulation","type":"journal_article","publication":"Simulation Practice and Theory","status":"public","user_id":"398","department":[{"_id":"78"}],"_id":"10724","language":[{"iso":"eng"}],"extern":"1"},{"author":[{"last_name":"Platzner","id":"398","full_name":"Platzner, Marco","first_name":"Marco"},{"last_name":"Peters","full_name":"Peters, Liliane","first_name":"Liliane"}],"date_created":"2019-10-04T20:40:55Z","volume":3166,"date_updated":"2022-01-06T06:51:40Z","title":"Fast Signature Segmentation on a Multi-DSP Architecture","citation":{"ama":"Platzner M, Peters L. Fast Signature Segmentation on a Multi-DSP Architecture. In: <i>Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing</i>. Vol 3166. ; 1997.","chicago":"Platzner, Marco, and Liliane Peters. “Fast Signature Segmentation on a Multi-DSP Architecture.” In <i>Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing</i>, Vol. 3166, 1997.","ieee":"M. Platzner and L. Peters, “Fast Signature Segmentation on a Multi-DSP Architecture,” in <i>Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing</i>, 1997, vol. 3166.","apa":"Platzner, M., &#38; Peters, L. (1997). Fast Signature Segmentation on a Multi-DSP Architecture. In <i>Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing</i> (Vol. 3166).","mla":"Platzner, Marco, and Liliane Peters. “Fast Signature Segmentation on a Multi-DSP Architecture.” <i>Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing</i>, vol. 3166, 1997.","bibtex":"@inproceedings{Platzner_Peters_1997, title={Fast Signature Segmentation on a Multi-DSP Architecture}, volume={3166}, booktitle={Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing}, author={Platzner, Marco and Peters, Liliane}, year={1997} }","short":"M. Platzner, L. Peters, in: Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing, 1997."},"intvolume":"      3166","year":"1997","user_id":"398","department":[{"_id":"78"}],"_id":"13603","language":[{"iso":"eng"}],"extern":"1","type":"conference","publication":"Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing","status":"public"},{"author":[{"last_name":"Röwekamp","full_name":"Röwekamp, Thomas","first_name":"Thomas"},{"id":"398","full_name":"Platzner, Marco","last_name":"Platzner","first_name":"Marco"},{"last_name":"Peters","full_name":"Peters, Liliane ","first_name":"Liliane "}],"date_created":"2019-10-04T20:43:29Z","date_updated":"2022-01-06T06:51:40Z","title":"Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP","page":"829-833","citation":{"bibtex":"@inproceedings{Röwekamp_Platzner_Peters_1997, title={Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP}, booktitle={Proceedings of the 8th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)}, author={Röwekamp, Thomas and Platzner, Marco and Peters, Liliane }, year={1997}, pages={829–833} }","short":"T. Röwekamp, M. Platzner, L. Peters, in: Proceedings of the 8th International Conference on Signal Processing Applications &#38; Technology (ICSPAT), 1997, pp. 829–833.","mla":"Röwekamp, Thomas, et al. “Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP.” <i>Proceedings of the 8th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>, 1997, pp. 829–33.","apa":"Röwekamp, T., Platzner, M., &#38; Peters, L. (1997). Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP. In <i>Proceedings of the 8th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i> (pp. 829–833).","ieee":"T. Röwekamp, M. Platzner, and L. Peters, “Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP,” in <i>Proceedings of the 8th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>, 1997, pp. 829–833.","chicago":"Röwekamp, Thomas, Marco Platzner, and Liliane  Peters. “Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP.” In <i>Proceedings of the 8th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>, 829–33, 1997.","ama":"Röwekamp T, Platzner M, Peters L. Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP. In: <i>Proceedings of the 8th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>. ; 1997:829-833."},"year":"1997","department":[{"_id":"78"}],"user_id":"398","_id":"13604","language":[{"iso":"eng"}],"extern":"1","publication":"Proceedings of the 8th International Conference on Signal Processing Applications & Technology (ICSPAT)","type":"conference","status":"public"},{"citation":{"ama":"Lind E, Platzner M, Rinner B. A Multi-DSP System with Dynamically Reconfigurable Processors. In: <i>Proceedings of the 7th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>. ; 1996.","ieee":"E. Lind, M. Platzner, and B. Rinner, “A Multi-DSP System with Dynamically Reconfigurable Processors,” in <i>Proceedings of the 7th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>, 1996.","chicago":"Lind, Erich, Marco Platzner, and Bernhard  Rinner. “A Multi-DSP System with Dynamically Reconfigurable Processors.” In <i>Proceedings of the 7th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>, 1996.","mla":"Lind, Erich, et al. “A Multi-DSP System with Dynamically Reconfigurable Processors.” <i>Proceedings of the 7th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>, 1996.","short":"E. Lind, M. Platzner, B. Rinner, in: Proceedings of the 7th International Conference on Signal Processing Applications &#38; Technology (ICSPAT), 1996.","bibtex":"@inproceedings{Lind_Platzner_Rinner_1996, title={A Multi-DSP System with Dynamically Reconfigurable Processors}, booktitle={Proceedings of the 7th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)}, author={Lind, Erich and Platzner, Marco and Rinner, Bernhard }, year={1996} }","apa":"Lind, E., Platzner, M., &#38; Rinner, B. (1996). A Multi-DSP System with Dynamically Reconfigurable Processors. In <i>Proceedings of the 7th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>."},"year":"1996","date_created":"2019-10-04T20:37:59Z","author":[{"full_name":"Lind, Erich","last_name":"Lind","first_name":"Erich"},{"first_name":"Marco","id":"398","full_name":"Platzner, Marco","last_name":"Platzner"},{"first_name":"Bernhard ","full_name":"Rinner, Bernhard ","last_name":"Rinner"}],"date_updated":"2022-01-06T06:51:40Z","title":"A Multi-DSP System with Dynamically Reconfigurable Processors","publication":"Proceedings of the 7th International Conference on Signal Processing Applications & Technology (ICSPAT)","type":"conference","status":"public","department":[{"_id":"78"}],"user_id":"398","_id":"13602","language":[{"iso":"eng"}],"extern":"1"},{"extern":"1","language":[{"iso":"eng"}],"_id":"10610","user_id":"398","department":[{"_id":"78"}],"status":"public","type":"journal_article","publication":"J.UCS Journal of Universal Computer Science","title":"Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation","publisher":"Springer","date_updated":"2022-01-06T06:50:47Z","author":[{"id":"398","full_name":"Platzner, Marco","last_name":"Platzner","first_name":"Marco"},{"first_name":"Bernhard","last_name":"Rinner","full_name":"Rinner, Bernhard"},{"last_name":"Weiss","full_name":"Weiss, Reinhold","first_name":"Reinhold"}],"date_created":"2019-07-10T09:23:10Z","volume":12,"year":"1995","citation":{"apa":"Platzner, M., Rinner, B., &#38; Weiss, R. (1995). Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation. <i>J.UCS Journal of Universal Computer Science</i>, <i>12</i>, 811–820.","short":"M. Platzner, B. Rinner, R. Weiss, J.UCS Journal of Universal Computer Science 12 (1995) 811–820.","mla":"Platzner, Marco, et al. “Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation.” <i>J.UCS Journal of Universal Computer Science</i>, vol. 12, Springer, 1995, pp. 811–20.","bibtex":"@article{Platzner_Rinner_Weiss_1995, title={Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation}, volume={12}, journal={J.UCS Journal of Universal Computer Science}, publisher={Springer}, author={Platzner, Marco and Rinner, Bernhard and Weiss, Reinhold}, year={1995}, pages={811–820} }","ama":"Platzner M, Rinner B, Weiss R. Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation. <i>JUCS Journal of Universal Computer Science</i>. 1995;12:811-820.","chicago":"Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation.” <i>J.UCS Journal of Universal Computer Science</i> 12 (1995): 811–20.","ieee":"M. Platzner, B. Rinner, and R. Weiss, “Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation,” <i>J.UCS Journal of Universal Computer Science</i>, vol. 12, pp. 811–820, 1995."},"page":"811-820","intvolume":"        12"},{"publisher":"IEEE CS Press","date_updated":"2022-01-06T06:51:36Z","date_created":"2019-09-30T10:56:45Z","author":[{"id":"398","full_name":"Platzner, Marco","last_name":"Platzner","first_name":"Marco"},{"last_name":"Rinner","full_name":"Rinner, Bernhard","first_name":"Bernhard"},{"full_name":"Weiss, Reinhold ","last_name":"Weiss","first_name":"Reinhold "}],"title":"A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs","year":"1995","page":"311-318","citation":{"apa":"Platzner, M., Rinner, B., &#38; Weiss, R. (1995). A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs. In <i>Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing </i> (pp. 311–318). IEEE CS Press.","mla":"Platzner, Marco, et al. “A Distributed Computer Architecture for Qualitative Simulation Based on a Multi-DSP and FPGAs.” <i>Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing </i>, IEEE CS Press, 1995, pp. 311–18.","bibtex":"@inproceedings{Platzner_Rinner_Weiss_1995, title={A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs}, booktitle={Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing }, publisher={IEEE CS Press}, author={Platzner, Marco and Rinner, Bernhard and Weiss, Reinhold }, year={1995}, pages={311–318} }","short":"M. Platzner, B. Rinner, R. Weiss, in: Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing , IEEE CS Press, 1995, pp. 311–318.","ama":"Platzner M, Rinner B, Weiss R. A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs. In: <i>Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing </i>. IEEE CS Press; 1995:311-318.","chicago":"Platzner, Marco, Bernhard Rinner, and Reinhold  Weiss. “A Distributed Computer Architecture for Qualitative Simulation Based on a Multi-DSP and FPGAs.” In <i>Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing </i>, 311–18. IEEE CS Press, 1995.","ieee":"M. Platzner, B. Rinner, and R. Weiss, “A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs,” in <i>Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing </i>, 1995, pp. 311–318."},"_id":"13469","department":[{"_id":"78"}],"user_id":"398","language":[{"iso":"eng"}],"extern":"1","publication":"Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing ","type":"conference","status":"public"},{"author":[{"full_name":"Brenner, Eugen","last_name":"Brenner","first_name":"Eugen"},{"first_name":"Robert","full_name":"Ginthör-Kalcsics, Robert","last_name":"Ginthör-Kalcsics"},{"full_name":"Hranitzky, Robert","last_name":"Hranitzky","first_name":"Robert"},{"first_name":"Marco","id":"398","full_name":"Platzner, Marco","last_name":"Platzner"},{"last_name":"Rinner","full_name":"Rinner, Bernhard ","first_name":"Bernhard "},{"first_name":"Christian ","full_name":"Steger, Christian ","last_name":"Steger"},{"first_name":"Reinhold","full_name":"Weiss, Reinhold","last_name":"Weiss"}],"date_created":"2019-09-30T11:02:15Z","date_updated":"2022-01-06T06:51:36Z","conference":{"name":"Robert Ginthör-Kalcsics"},"title":"High-Performance Simulators Based on Multi-TMS320C40","citation":{"apa":"Brenner, E., Ginthör-Kalcsics, R., Hranitzky, R., Platzner, M., Rinner, B., Steger, C., &#38; Weiss, R. (1995). High-Performance Simulators Based on Multi-TMS320C40. In <i>Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference</i>.","bibtex":"@inproceedings{Brenner_Ginthör-Kalcsics_Hranitzky_Platzner_Rinner_Steger_Weiss_1995, title={High-Performance Simulators Based on Multi-TMS320C40}, booktitle={Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference}, author={Brenner, Eugen and Ginthör-Kalcsics, Robert and Hranitzky, Robert and Platzner, Marco and Rinner, Bernhard  and Steger, Christian  and Weiss, Reinhold}, year={1995} }","short":"E. Brenner, R. Ginthör-Kalcsics, R. Hranitzky, M. Platzner, B. Rinner, C. Steger, R. Weiss, in: Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference, 1995.","mla":"Brenner, Eugen, et al. “High-Performance Simulators Based on Multi-TMS320C40.” <i>Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference</i>, 1995.","ieee":"E. Brenner <i>et al.</i>, “High-Performance Simulators Based on Multi-TMS320C40,” in <i>Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference</i>, 1995.","chicago":"Brenner, Eugen, Robert Ginthör-Kalcsics, Robert Hranitzky, Marco Platzner, Bernhard  Rinner, Christian  Steger, and Reinhold Weiss. “High-Performance Simulators Based on Multi-TMS320C40.” In <i>Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference</i>, 1995.","ama":"Brenner E, Ginthör-Kalcsics R, Hranitzky R, et al. High-Performance Simulators Based on Multi-TMS320C40. In: <i>Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference</i>. ; 1995."},"year":"1995","user_id":"398","department":[{"_id":"78"}],"_id":"13470","language":[{"iso":"eng"}],"type":"conference","publication":"Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference","status":"public"},{"page":"695-698","citation":{"short":"G. Friedl, M. Platzner, B. Rinner, in: Proceedings of the EURO-PAR’95 International Conference on Parallel Processing, Springer International Publishing, 1995, pp. 695–698.","mla":"Friedl, Gerald, et al. “A Special-Purpose Coprocessor for Qualitative Simulation.” <i>Proceedings of the EURO-PAR’95 International Conference on Parallel Processing</i>, Springer International Publishing, 1995, pp. 695–98.","bibtex":"@inproceedings{Friedl_Platzner_Rinner_1995, title={A Special-Purpose Coprocessor for Qualitative Simulation}, booktitle={Proceedings of the EURO-PAR’95 International Conference on Parallel Processing}, publisher={Springer International Publishing}, author={Friedl, Gerald and Platzner, Marco and Rinner, Bernhard}, year={1995}, pages={695–698} }","apa":"Friedl, G., Platzner, M., &#38; Rinner, B. (1995). A Special-Purpose Coprocessor for Qualitative Simulation. In <i>Proceedings of the EURO-PAR’95 International Conference on Parallel Processing</i> (pp. 695–698). Springer International Publishing.","ama":"Friedl G, Platzner M, Rinner B. A Special-Purpose Coprocessor for Qualitative Simulation. In: <i>Proceedings of the EURO-PAR’95 International Conference on Parallel Processing</i>. Springer International Publishing; 1995:695-698.","chicago":"Friedl, Gerald, Marco Platzner, and Bernhard Rinner. “A Special-Purpose Coprocessor for Qualitative Simulation.” In <i>Proceedings of the EURO-PAR’95 International Conference on Parallel Processing</i>, 695–98. Springer International Publishing, 1995.","ieee":"G. Friedl, M. Platzner, and B. Rinner, “A Special-Purpose Coprocessor for Qualitative Simulation,” in <i>Proceedings of the EURO-PAR’95 International Conference on Parallel Processing</i>, 1995, pp. 695–698."},"year":"1995","title":"A Special-Purpose Coprocessor for Qualitative Simulation","date_created":"2019-09-30T11:15:06Z","author":[{"first_name":"Gerald","full_name":"Friedl, Gerald","last_name":"Friedl"},{"first_name":"Marco","id":"398","full_name":"Platzner, Marco","last_name":"Platzner"},{"full_name":"Rinner, Bernhard","last_name":"Rinner","first_name":"Bernhard"}],"date_updated":"2022-01-06T06:51:36Z","publisher":"Springer International Publishing","status":"public","publication":"Proceedings of the EURO-PAR'95 International Conference on Parallel Processing","type":"conference","language":[{"iso":"eng"}],"extern":"1","department":[{"_id":"78"}],"user_id":"398","_id":"13471"},{"type":"conference","publication":"Proceedings of the EUROSIM Congress","status":"public","user_id":"398","department":[{"_id":"78"}],"_id":"13472","extern":"1","language":[{"iso":"eng"}],"citation":{"ama":"Platzner M, Rinner B, Weiss R. Parallel Qualitative Simulation. In: <i>Proceedings of the EUROSIM Congress</i>. Elsevier; 1995:231-236.","chicago":"Platzner, Marco, Bernhard Rinner, and Reinhold  Weiss. “Parallel Qualitative Simulation.” In <i>Proceedings of the EUROSIM Congress</i>, 231–36. Elsevier, 1995.","ieee":"M. Platzner, B. Rinner, and R. Weiss, “Parallel Qualitative Simulation,” in <i>Proceedings of the EUROSIM Congress</i>, 1995, pp. 231–236.","bibtex":"@inproceedings{Platzner_Rinner_Weiss_1995, title={Parallel Qualitative Simulation}, booktitle={Proceedings of the EUROSIM Congress}, publisher={Elsevier}, author={Platzner, Marco and Rinner, Bernhard and Weiss, Reinhold }, year={1995}, pages={231–236} }","mla":"Platzner, Marco, et al. “Parallel Qualitative Simulation.” <i>Proceedings of the EUROSIM Congress</i>, Elsevier, 1995, pp. 231–36.","short":"M. Platzner, B. Rinner, R. Weiss, in: Proceedings of the EUROSIM Congress, Elsevier, 1995, pp. 231–236.","apa":"Platzner, M., Rinner, B., &#38; Weiss, R. (1995). Parallel Qualitative Simulation. In <i>Proceedings of the EUROSIM Congress</i> (pp. 231–236). Elsevier."},"page":"231-236","year":"1995","author":[{"first_name":"Marco","id":"398","full_name":"Platzner, Marco","last_name":"Platzner"},{"full_name":"Rinner, Bernhard","last_name":"Rinner","first_name":"Bernhard"},{"last_name":"Weiss","full_name":"Weiss, Reinhold ","first_name":"Reinhold "}],"date_created":"2019-09-30T11:16:45Z","date_updated":"2022-01-06T06:51:36Z","publisher":"Elsevier","title":"Parallel Qualitative Simulation"},{"year":"1995","page":"494-501","citation":{"chicago":"Platzner, Marco, and Bernhard Rinner. “Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture.” In <i>Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems</i>, 494–501. ISCA, 1995.","ieee":"M. Platzner and B. Rinner, “Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture,” in <i>Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems</i>, 1995, pp. 494–501.","ama":"Platzner M, Rinner B. Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture. In: <i>Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems</i>. ISCA; 1995:494-501.","apa":"Platzner, M., &#38; Rinner, B. (1995). Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture. In <i>Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems</i> (pp. 494–501). ISCA.","mla":"Platzner, Marco, and Bernhard Rinner. “Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture.” <i>Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems</i>, ISCA, 1995, pp. 494–501.","bibtex":"@inproceedings{Platzner_Rinner_1995, title={Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture}, booktitle={Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems}, publisher={ISCA}, author={Platzner, Marco and Rinner, Bernhard}, year={1995}, pages={494–501} }","short":"M. Platzner, B. Rinner, in: Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems, ISCA, 1995, pp. 494–501."},"title":"Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture","date_updated":"2022-01-06T06:51:36Z","publisher":"ISCA","author":[{"first_name":"Marco","last_name":"Platzner","id":"398","full_name":"Platzner, Marco"},{"first_name":"Bernhard","last_name":"Rinner","full_name":"Rinner, Bernhard"}],"date_created":"2019-09-30T11:19:05Z","status":"public","publication":"Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems","type":"conference","extern":"1","language":[{"iso":"eng"}],"_id":"13473","department":[{"_id":"78"}],"user_id":"398"},{"citation":{"short":"M. Platzner, B. Rinner, in: Proceedings of the 6th International Conference on Signal Processing Applications &#38; Technology (ICSPAT), 1995.","bibtex":"@inproceedings{Platzner_Rinner_1995, title={High-Performance Qualitative Simulation on a Multi-DSP Architecture}, booktitle={Proceedings of the 6th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)}, author={Platzner, Marco and Rinner, Bernhard}, year={1995} }","mla":"Platzner, Marco, and Bernhard Rinner. “High-Performance Qualitative Simulation on a Multi-DSP Architecture.” <i>Proceedings of the 6th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>, 1995.","apa":"Platzner, M., &#38; Rinner, B. (1995). High-Performance Qualitative Simulation on a Multi-DSP Architecture. In <i>Proceedings of the 6th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>.","ama":"Platzner M, Rinner B. High-Performance Qualitative Simulation on a Multi-DSP Architecture. In: <i>Proceedings of the 6th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>. ; 1995.","chicago":"Platzner, Marco, and Bernhard Rinner. “High-Performance Qualitative Simulation on a Multi-DSP Architecture.” In <i>Proceedings of the 6th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>, 1995.","ieee":"M. Platzner and B. Rinner, “High-Performance Qualitative Simulation on a Multi-DSP Architecture,” in <i>Proceedings of the 6th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>, 1995."},"year":"1995","title":"High-Performance Qualitative Simulation on a Multi-DSP Architecture","author":[{"last_name":"Platzner","id":"398","full_name":"Platzner, Marco","first_name":"Marco"},{"full_name":"Rinner, Bernhard","last_name":"Rinner","first_name":"Bernhard"}],"date_created":"2019-09-30T11:21:14Z","date_updated":"2022-01-06T06:51:36Z","status":"public","type":"conference","publication":"Proceedings of the 6th International Conference on Signal Processing Applications & Technology (ICSPAT)","language":[{"iso":"eng"}],"extern":"1","user_id":"398","department":[{"_id":"78"}],"_id":"13474"},{"year":"1995","citation":{"ama":"Hranitzky R, Platzner M. Design and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System. In: <i>Proceedings of the 6th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>. ; 1995.","chicago":"Hranitzky, Robert, and Marco Platzner. “Design and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System.” In <i>Proceedings of the 6th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>, 1995.","ieee":"R. Hranitzky and M. Platzner, “Design and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System,” in <i>Proceedings of the 6th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>, 1995.","apa":"Hranitzky, R., &#38; Platzner, M. (1995). Design and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System. In <i>Proceedings of the 6th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>.","bibtex":"@inproceedings{Hranitzky_Platzner_1995, title={Design and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System}, booktitle={Proceedings of the 6th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)}, author={Hranitzky, Robert and Platzner, Marco}, year={1995} }","mla":"Hranitzky, Robert, and Marco Platzner. “Design and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System.” <i>Proceedings of the 6th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>, 1995.","short":"R. Hranitzky, M. Platzner, in: Proceedings of the 6th International Conference on Signal Processing Applications &#38; Technology (ICSPAT), 1995."},"date_updated":"2022-01-06T06:51:36Z","author":[{"first_name":"Robert","last_name":"Hranitzky","full_name":"Hranitzky, Robert"},{"first_name":"Marco","last_name":"Platzner","id":"398","full_name":"Platzner, Marco"}],"date_created":"2019-09-30T12:12:00Z","title":"Design and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System","type":"conference","publication":"Proceedings of the 6th International Conference on Signal Processing Applications & Technology (ICSPAT)","status":"public","_id":"13484","user_id":"398","department":[{"_id":"78"}],"extern":"1","language":[{"iso":"eng"}]},{"type":"conference","publication":"Proceedings of the 7th Mediterranean Electrotechnical Conference","status":"public","_id":"13468","user_id":"398","department":[{"_id":"78"}],"language":[{"iso":"eng"}],"extern":"1","year":"1994","citation":{"ama":"Platzner M, Steger C, Weiss R. Experimental Evaluation of Multi-DSP Architectures in High Performance Applications. In: <i>Proceedings of the 7th Mediterranean Electrotechnical Conference</i>. IEEE Press; 1994.","ieee":"M. Platzner, C. Steger, and R. Weiss, “Experimental Evaluation of Multi-DSP Architectures in High Performance Applications,” in <i>Proceedings of the 7th Mediterranean Electrotechnical Conference</i>, 1994.","chicago":"Platzner, Marco, Christian Steger, and Reinhold Weiss. “Experimental Evaluation of Multi-DSP Architectures in High Performance Applications.” In <i>Proceedings of the 7th Mediterranean Electrotechnical Conference</i>. IEEE Press, 1994.","apa":"Platzner, M., Steger, C., &#38; Weiss, R. (1994). Experimental Evaluation of Multi-DSP Architectures in High Performance Applications. In <i>Proceedings of the 7th Mediterranean Electrotechnical Conference</i>. IEEE Press.","mla":"Platzner, Marco, et al. “Experimental Evaluation of Multi-DSP Architectures in High Performance Applications.” <i>Proceedings of the 7th Mediterranean Electrotechnical Conference</i>, IEEE Press, 1994.","short":"M. Platzner, C. Steger, R. Weiss, in: Proceedings of the 7th Mediterranean Electrotechnical Conference, IEEE Press, 1994.","bibtex":"@inproceedings{Platzner_Steger_Weiss_1994, title={Experimental Evaluation of Multi-DSP Architectures in High Performance Applications}, booktitle={Proceedings of the 7th Mediterranean Electrotechnical Conference}, publisher={IEEE Press}, author={Platzner, Marco and Steger, Christian and Weiss, Reinhold}, year={1994} }"},"date_updated":"2022-01-06T06:51:36Z","publisher":"IEEE Press","author":[{"first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco","id":"398"},{"first_name":"Christian","full_name":"Steger, Christian","last_name":"Steger"},{"first_name":"Reinhold","last_name":"Weiss","full_name":"Weiss, Reinhold"}],"date_created":"2019-09-30T10:53:38Z","title":"Experimental Evaluation of Multi-DSP Architectures in High Performance Applications"},{"type":"journal_article","publication":"Mikroelektronik","status":"public","_id":"13466","user_id":"398","department":[{"_id":"78"}],"language":[{"iso":"ger"}],"extern":"1","year":"1993","citation":{"apa":"Platzner, M., &#38; Steger, C. (1993). Erfahrungen mit einer Multi-Signalprozessorarchitektur (TMS320C40). <i>Mikroelektronik</i>.","bibtex":"@article{Platzner_Steger_1993, title={Erfahrungen mit einer Multi-Signalprozessorarchitektur (TMS320C40)}, journal={Mikroelektronik}, author={Platzner, Marco and Steger, Christian}, year={1993} }","mla":"Platzner, Marco, and Christian Steger. “Erfahrungen mit einer Multi-Signalprozessorarchitektur (TMS320C40).” <i>Mikroelektronik</i>, 1993.","short":"M. Platzner, C. Steger, Mikroelektronik (1993).","ieee":"M. Platzner and C. Steger, “Erfahrungen mit einer Multi-Signalprozessorarchitektur (TMS320C40),” <i>Mikroelektronik</i>, 1993.","chicago":"Platzner, Marco, and Christian Steger. “Erfahrungen mit einer Multi-Signalprozessorarchitektur (TMS320C40).” <i>Mikroelektronik</i>, 1993.","ama":"Platzner M, Steger C. Erfahrungen mit einer Multi-Signalprozessorarchitektur (TMS320C40). <i>Mikroelektronik</i>. 1993."},"date_updated":"2022-01-06T06:51:36Z","date_created":"2019-09-30T09:44:04Z","author":[{"first_name":"Marco","id":"398","full_name":"Platzner, Marco","last_name":"Platzner"},{"full_name":"Steger, Christian","last_name":"Steger","first_name":"Christian"}],"title":"Erfahrungen mit einer Multi-Signalprozessorarchitektur (TMS320C40)"},{"_id":"13467","department":[{"_id":"78"}],"user_id":"398","extern":"1","language":[{"iso":"eng"}],"publication":"Proceedings of the 4th International Conference on Signal Processing Applications & Technology (ICSPAT)","type":"conference","status":"public","publisher":"DSP Associates","date_updated":"2022-01-06T06:51:36Z","author":[{"first_name":"Marco","full_name":"Platzner, Marco","id":"398","last_name":"Platzner"},{"last_name":"Steger","full_name":"Steger, Christian","first_name":"Christian"},{"full_name":"Weiss, Reinhold ","last_name":"Weiss","first_name":"Reinhold "}],"date_created":"2019-09-30T09:47:53Z","title":"Performance Measurements on a Multi-DSP Architecture with TMS320C40","year":"1993","citation":{"mla":"Platzner, Marco, et al. “Performance Measurements on a Multi-DSP Architecture with TMS320C40.” <i>Proceedings of the 4th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>, DSP Associates, 1993.","bibtex":"@inproceedings{Platzner_Steger_Weiss_1993, title={Performance Measurements on a Multi-DSP Architecture with TMS320C40}, booktitle={Proceedings of the 4th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)}, publisher={DSP Associates}, author={Platzner, Marco and Steger, Christian and Weiss, Reinhold }, year={1993} }","short":"M. Platzner, C. Steger, R. Weiss, in: Proceedings of the 4th International Conference on Signal Processing Applications &#38; Technology (ICSPAT), DSP Associates, 1993.","apa":"Platzner, M., Steger, C., &#38; Weiss, R. (1993). Performance Measurements on a Multi-DSP Architecture with TMS320C40. In <i>Proceedings of the 4th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>. DSP Associates.","chicago":"Platzner, Marco, Christian Steger, and Reinhold  Weiss. “Performance Measurements on a Multi-DSP Architecture with TMS320C40.” In <i>Proceedings of the 4th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>. DSP Associates, 1993.","ieee":"M. Platzner, C. Steger, and R. Weiss, “Performance Measurements on a Multi-DSP Architecture with TMS320C40,” in <i>Proceedings of the 4th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>, 1993.","ama":"Platzner M, Steger C, Weiss R. Performance Measurements on a Multi-DSP Architecture with TMS320C40. In: <i>Proceedings of the 4th International Conference on Signal Processing Applications &#38; Technology (ICSPAT)</i>. DSP Associates; 1993."}},{"date_created":"2019-09-30T09:41:10Z","author":[{"first_name":"Robert","full_name":"Ginthör, Robert","last_name":"Ginthör"},{"first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco","id":"398"},{"full_name":"Weiss, Reinhold","last_name":"Weiss","first_name":"Reinhold"}],"date_updated":"2022-01-06T06:51:36Z","title":"Experimental Results to Interprocessor Communication in Distributed Transputer-Systems","citation":{"ama":"Ginthör R, Platzner M, Weiss R. Experimental Results to Interprocessor Communication in Distributed Transputer-Systems. In: <i>Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications</i>. ; 1992:45-54.","chicago":"Ginthör, Robert, Marco Platzner, and Reinhold Weiss. “Experimental Results to Interprocessor Communication in Distributed Transputer-Systems.” In <i>Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications</i>, 45–54, 1992.","ieee":"R. Ginthör, M. Platzner, and R. Weiss, “Experimental Results to Interprocessor Communication in Distributed Transputer-Systems,” in <i>Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications</i>, 1992, pp. 45–54.","apa":"Ginthör, R., Platzner, M., &#38; Weiss, R. (1992). Experimental Results to Interprocessor Communication in Distributed Transputer-Systems. In <i>Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications</i> (pp. 45–54).","bibtex":"@inproceedings{Ginthör_Platzner_Weiss_1992, title={Experimental Results to Interprocessor Communication in Distributed Transputer-Systems}, booktitle={Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications}, author={Ginthör, Robert and Platzner, Marco and Weiss, Reinhold}, year={1992}, pages={45–54} }","short":"R. Ginthör, M. Platzner, R. Weiss, in: Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications, 1992, pp. 45–54.","mla":"Ginthör, Robert, et al. “Experimental Results to Interprocessor Communication in Distributed Transputer-Systems.” <i>Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications</i>, 1992, pp. 45–54."},"page":"45-54","year":"1992","user_id":"398","department":[{"_id":"78"}],"_id":"13465","language":[{"iso":"eng"}],"extern":"1","type":"conference","publication":"Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications","status":"public"}]