TY - GEN AU - Hagedorn, Christoph ID - 10665 TI - Entwicklung einer codegrößenoptimierten Softwarebibliothek für 8-Bit Mikrocontroller in netzunabhängigen Notleuchten ER - TY - CONF AU - Ho, Nam AU - Kaufmann, Paul AU - Platzner, Marco ID - 10674 KW - Linux KW - hardware-software codesign KW - multiprocessing systems KW - parallel processing KW - LEON3 multicore platform KW - Linux kernel KW - PMU KW - hardware counters KW - hardware-software infrastructure KW - high performance embedded computing KW - perf_event KW - performance monitoring unit KW - Computer architecture KW - Hardware KW - Monitoring KW - Phasor measurement units KW - Radiation detectors KW - Registers KW - Software T2 - 24th Intl. Conf. on Field Programmable Logic and Applications (FPL) TI - A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms ER - TY - CONF AU - Ho, Nam AU - Kaufmann, Paul AU - Platzner, Marco ID - 10677 KW - Linux KW - cache storage KW - embedded systems KW - granular computing KW - multiprocessing systems KW - reconfigurable architectures KW - Leon3 SPARe processor KW - custom logic events KW - evolvable-self-adaptable processor cache KW - fine granular profiling KW - integer unit events KW - measurement infrastructure KW - microarchitectural events KW - multicore embedded system KW - perf_event standard Linux performance measurement interface KW - processor properties KW - run-time reconfigurable memory-to-cache address mapping engine KW - run-time reconfigurable multicore infrastructure KW - split-level caching KW - Field programmable gate arrays KW - Frequency locked loops KW - Irrigation KW - Phasor measurement units KW - Registers KW - Weaving T2 - 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES) TI - Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure ER - TY - GEN AU - König, Fabian ID - 10679 TI - EMG-basierte simultane und proportionale Online-Steuerung einer virtuellen Prothese ER - TY - GEN AU - Koch, Benjamin ID - 10701 TI - Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA ER - TY - GEN AU - Mittendorf, Robert ID - 10715 TI - Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs ER - TY - GEN AU - Rüthing, Christoph ID - 10732 TI - The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores ER - TY - THES AB - Monte-Carlo Tree Search (MCTS) is a class of simulation-based search algorithms. It brought about great success in the past few years regarding the evaluation of deterministic two-player games such as the Asian board game Go. In this thesis, we present a parallelization of the most popular MCTS variant for large HPC compute clusters that efficiently shares a single game tree representation in a distributed memory environment and scales up to 128 compute nodes and 2048 cores. It is hereby one of the most powerful MCTS parallelizations to date. In order to measure the impact of our parallelization on the search quality and remain comparable to the most advanced MCTS implementations to date, we implemented it in a state-of-the-art Go engine Gomorra, making it competitive with the strongest Go programs in the world. We further present an empirical comparison of different Bayesian ranking systems when being used for predicting expert moves for the game of Go and introduce a novel technique for automated detection and analysis of evaluation uncertainties that show up during MCTS searches. AU - Schäfers, Lars ID - 10733 SN - 978-3-8325-3748-7 TI - Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go ER - TY - CONF AU - Shen, Cong AU - Kaufmann, Paul AU - Braun, Martin ID - 10738 T2 - IEEE Power and Energy Society General Meeting (IEEE GM) TI - Optimizing the Generator Start-up Sequence After a Power System Blackout ER - TY - CONF AU - Shen, Cong AU - Kaufmann, Paul AU - Braun, Martin ID - 10739 T2 - Power Systems Computation Conference (PSCC) TI - A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm ER -