TY - THES AU - Witschen, Linus Matthias ID - 34041 TI - Frameworks and Methodologies for Search-based Approximate Logic Synthesis ER - TY - CONF AU - Ahmed, Qazi Arbab AU - Platzner, Marco ID - 32342 TI - On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs ER - TY - GEN AU - Mehlich, Florian ID - 42839 TI - An Evaluation of XCS on the OpenAI Gym ER - TY - JOUR AB - Deep neural networks (DNNs) are penetrating into a broad spectrum of applications and replacing manual algorithmic implementations, including the radio frequency communications domain with classical signal processing algorithms. However, the high throughput (gigasamples per second) and low latency requirements of this application domain pose a significant hurdle for adopting computationally demanding DNNs. In this article, we explore highly specialized DNN inference accelerator approaches on field-programmable gate arrays (FPGAs) for RadioML modulation classification. Using an automated end-to-end flow for the generation of the FPGA solution, we can easily explore a spectrum of solutions that optimize for different design targets, including accuracy, power efficiency, resources, throughput, and latency. By leveraging reduced precision arithmetic and customized streaming dataflow, we demonstrate a solution that meets the application requirements and outperforms alternative FPGA efforts by 3.5x in terms of throughput. Against modern embedded graphics processing units (GPUs), we measure >10x higher throughput and >100x lower latency under comparable accuracy and power envelopes. AU - Jentzsch, Felix AU - Umuroglu, Yaman AU - Pappalardo, Alessandro AU - Blott, Michaela AU - Platzner, Marco ID - 33990 IS - 6 JF - IEEE Micro TI - RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures VL - 42 ER - TY - GEN AU - Tcheussi Ngayap, Vanessa Ingrid ID - 45715 TI - FreeRTOS on a MicroBlaze Soft-Core Processor with Hardware Accelerators ER - TY - GEN AU - Manjunatha, Suraj ID - 45914 TI - Dealing With Pre-Processing And Feature Extraction Of Time-Series Data In Predictive Maintenance ER - TY - GEN AU - Kaur , Parvinder ID - 45915 TI - Analysis of Time-Series Classification in Conditional Monitoring Systems ER - TY - THES AB - Previous research in proof-carrying hardware has established the feasibility and utility of the approach, and provided a concrete solution for employing it for the certification of functional equivalence checking against a specification, but fell short in connecting it to state-of-the-art formal verification insights, methods and tools. Due to the immense complexity of modern circuits, and verification challenges such as the state explosion problem for sequential circuits, this restriction of readily-available verification solutions severely limited the applicability of the approach in wider contexts. This thesis closes the gap between the PCH approach and current advances in formal hardware verification, provides methods and tools to express and certify a wide range of circuit properties, both functional and non-functional, and presents for the first time prototypes in which circuits that are implemented on actual reconfigurable hardware are verified with PCH methods. Using these results, designers can now apply PCH to establish trust in more complex circuits, by using more diverse properties which they can express using modern, efficient property specification techniques. AU - Wiersema, Tobias ID - 26746 KW - Proof-Carrying Hardware KW - Formal Verification KW - Sequential Circuits KW - Non-Functional Properties KW - Functional Properties TI - Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware ER - TY - JOUR AB - Robotics applications process large amounts of data in real time and require compute platforms that provide high performance and energy efficiency. FPGAs are well suited for many of these applications, but there is a reluctance in the robotics community to use hardware acceleration due to increased design complexity and a lack of consistent programming models across the software/hardware boundary. In this article, we present ReconROS, a framework that integrates the widely used robot operating system (ROS) with ReconOS, which features multithreaded programming of hardware and software threads for reconfigurable computers. This unique combination gives ROS 2 developers the flexibility to transparently accelerate parts of their robotics applications in hardware. We elaborate on the architecture and the design flow for ReconROS and report on a set of experiments that underline the feasibility and flexibility of our approach. AU - Lienen, Christian AU - Platzner, Marco ID - 29150 JF - ACM Transactions on Reconfigurable Technology and Systems SN - 1936-7406 TI - Design of Distributed Reconfigurable Robotics Systems with ReconROS ER - TY - GEN AB - Automation becomes a vital part in the High-Performance computing system in situational dynamics to take the decisions on the fly. Heterogeneous compute nodes consist of computing resources such as CPU, GPU and FPGA and are the important components of the high-performance computing system that can adapt the automation to achieve the given goal. While implanting automation in the computing resources, management of the resources is one of the essential aspects that need to be taken care of. Tasks are continuously executed on the resources using its unique characteristics. Effective scheduling is essential to make the best use of the characteristics provided by each resource. Scheduling enables the execution of each task by allocating resources so that they take advantage of all the characteristics of the compute resources. Various scheduling heuristics can be used to create effective scheduling, which might require the execution time to schedule the task efficiently. Providing actual execution time is not possible in many cases; hence we can provide the estimations for the actual execution time . The purpose of this master's thesis is to design a predictive model or system that estimates the execution time required to execute tasks using historical execution time data on the heterogeneous compute nodes. In this thesis, regression techniques(SGD Regressor, Passive-Aggressive Regressor, MLP Regressor, and XCSF Regressor) are compared in terms of their prediction accuracy in order to determine which technique produces reliable predictions for the execution time. These estimations must be generated in an online learning environment in which data points arrive in any sequence, one by one, and the regression model must learn from them. After evaluating the regression algorithms, it is seen that the XCSF regressor provides the highest overall prediction accuracy for the supplied data sets. The regression technique's parameters also play a significant role in achieving an acceptable prediction accuracy. As a remark, when using online learning in regression analysis, the accuracy depends upon both the order of sequential data points that are coming to train the model and the parameter configuration for each regression technique. AU - Kashikar, Chinmay ID - 29151 TI - A Comparison of Machine Learning Techniques for the On-line Characterization of Tasks Executed on Heterogeneous Compute Nodes ER -