---
_id: '64112'
author:
- first_name: Farjana
full_name: Jalil, Farjana
last_name: Jalil
- first_name: Muhammad
full_name: Awais, Muhammad
last_name: Awais
- first_name: Qazi Arbab
full_name: Ahmed, Qazi Arbab
last_name: Ahmed
- first_name: Hassan Ghasemzadeh
full_name: Mohammadi, Hassan Ghasemzadeh
last_name: Mohammadi
- first_name: Thorsten
full_name: Jungeblut, Thorsten
last_name: Jungeblut
- first_name: Marco
full_name: Platzner, Marco
last_name: Platzner
citation:
ama: 'Jalil F, Awais M, Ahmed QA, Mohammadi HG, Jungeblut T, Platzner M. Deep&Wide:
Achieving Area Efficiency in Scalable Approximate Accelerators. In: 2025 55th
Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops
(DSN-W). IEEE; 2025. doi:10.1109/dsn-w65791.2025.00048'
apa: 'Jalil, F., Awais, M., Ahmed, Q. A., Mohammadi, H. G., Jungeblut, T., &
Platzner, M. (2025). Deep&Wide: Achieving Area Efficiency in Scalable
Approximate Accelerators. 2025 55th Annual IEEE/IFIP International Conference
on Dependable Systems and Networks Workshops (DSN-W). https://doi.org/10.1109/dsn-w65791.2025.00048'
bibtex: '@inproceedings{Jalil_Awais_Ahmed_Mohammadi_Jungeblut_Platzner_2025, title={Deep&Wide:
Achieving Area Efficiency in Scalable Approximate Accelerators}, DOI={10.1109/dsn-w65791.2025.00048},
booktitle={2025 55th Annual IEEE/IFIP International Conference on Dependable Systems
and Networks Workshops (DSN-W)}, publisher={IEEE}, author={Jalil, Farjana and
Awais, Muhammad and Ahmed, Qazi Arbab and Mohammadi, Hassan Ghasemzadeh and Jungeblut,
Thorsten and Platzner, Marco}, year={2025} }'
chicago: 'Jalil, Farjana, Muhammad Awais, Qazi Arbab Ahmed, Hassan Ghasemzadeh Mohammadi,
Thorsten Jungeblut, and Marco Platzner. “Deep&Wide: Achieving Area Efficiency
in Scalable Approximate Accelerators.” In 2025 55th Annual IEEE/IFIP International
Conference on Dependable Systems and Networks Workshops (DSN-W). IEEE, 2025.
https://doi.org/10.1109/dsn-w65791.2025.00048.'
ieee: 'F. Jalil, M. Awais, Q. A. Ahmed, H. G. Mohammadi, T. Jungeblut, and M. Platzner,
“Deep&Wide: Achieving Area Efficiency in Scalable Approximate Accelerators,”
2025, doi: 10.1109/dsn-w65791.2025.00048.'
mla: 'Jalil, Farjana, et al. “Deep&Wide: Achieving Area Efficiency in Scalable
Approximate Accelerators.” 2025 55th Annual IEEE/IFIP International Conference
on Dependable Systems and Networks Workshops (DSN-W), IEEE, 2025, doi:10.1109/dsn-w65791.2025.00048.'
short: 'F. Jalil, M. Awais, Q.A. Ahmed, H.G. Mohammadi, T. Jungeblut, M. Platzner,
in: 2025 55th Annual IEEE/IFIP International Conference on Dependable Systems
and Networks Workshops (DSN-W), IEEE, 2025.'
date_created: 2026-02-11T10:18:50Z
date_updated: 2026-02-11T10:20:30Z
department:
- _id: '78'
doi: 10.1109/dsn-w65791.2025.00048
publication: 2025 55th Annual IEEE/IFIP International Conference on Dependable Systems
and Networks Workshops (DSN-W)
publication_status: published
publisher: IEEE
status: public
title: 'Deep&Wide: Achieving Area Efficiency in Scalable Approximate Accelerators'
type: conference
user_id: '64665'
year: '2025'
...
---
_id: '64113'
author:
- first_name: Amir Hossein
full_name: Hadipour, Amir Hossein
last_name: Hadipour
- first_name: Atousa
full_name: Jafari, Atousa
last_name: Jafari
- first_name: Muhammad
full_name: Awais, Muhammad
last_name: Awais
- first_name: Marco
full_name: Platzner, Marco
last_name: Platzner
citation:
ama: 'Hadipour AH, Jafari A, Awais M, Platzner M. A Two-Stage Approximation Methodology
for Efficient DNN Hardware Implementation. In: 2025 IEEE 28th International
Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS).
IEEE; 2025. doi:10.1109/ddecs63720.2025.11006769'
apa: Hadipour, A. H., Jafari, A., Awais, M., & Platzner, M. (2025). A Two-Stage
Approximation Methodology for Efficient DNN Hardware Implementation. 2025 IEEE
28th International Symposium on Design and Diagnostics of Electronic Circuits
and Systems (DDECS). https://doi.org/10.1109/ddecs63720.2025.11006769
bibtex: '@inproceedings{Hadipour_Jafari_Awais_Platzner_2025, title={A Two-Stage
Approximation Methodology for Efficient DNN Hardware Implementation}, DOI={10.1109/ddecs63720.2025.11006769},
booktitle={2025 IEEE 28th International Symposium on Design and Diagnostics of
Electronic Circuits and Systems (DDECS)}, publisher={IEEE}, author={Hadipour,
Amir Hossein and Jafari, Atousa and Awais, Muhammad and Platzner, Marco}, year={2025}
}'
chicago: Hadipour, Amir Hossein, Atousa Jafari, Muhammad Awais, and Marco Platzner.
“A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation.”
In 2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic
Circuits and Systems (DDECS). IEEE, 2025. https://doi.org/10.1109/ddecs63720.2025.11006769.
ieee: 'A. H. Hadipour, A. Jafari, M. Awais, and M. Platzner, “A Two-Stage Approximation
Methodology for Efficient DNN Hardware Implementation,” 2025, doi: 10.1109/ddecs63720.2025.11006769.'
mla: Hadipour, Amir Hossein, et al. “A Two-Stage Approximation Methodology for Efficient
DNN Hardware Implementation.” 2025 IEEE 28th International Symposium on Design
and Diagnostics of Electronic Circuits and Systems (DDECS), IEEE, 2025, doi:10.1109/ddecs63720.2025.11006769.
short: 'A.H. Hadipour, A. Jafari, M. Awais, M. Platzner, in: 2025 IEEE 28th International
Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS),
IEEE, 2025.'
date_created: 2026-02-11T10:19:16Z
date_updated: 2026-02-11T10:20:31Z
department:
- _id: '78'
doi: 10.1109/ddecs63720.2025.11006769
publication: 2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic
Circuits and Systems (DDECS)
publication_status: published
publisher: IEEE
status: public
title: A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation
type: conference
user_id: '64665'
year: '2025'
...
---
_id: '61152'
abstract:
- lang: eng
text: While neural network quantization effectively reduces the cost of matrix multiplications,
aggressive quantization can expose non-matrix-multiply operations as significant
performance and resource bottlenecks on embedded systems. Addressing such bottlenecks
requires a comprehensive approach to tailoring the precision across operations
in the inference computation. To this end, we introduce scaled-integer range analysis
(SIRA), a static analysis technique employing interval arithmetic to determine
the range, scale, and bias for tensors in quantized neural networks. We show how
this information can be exploited to reduce the resource footprint of FPGA dataflow
neural network accelerators via tailored bitwidth adaptation for accumulators
and downstream operations, aggregation of scales and biases, and conversion of
consecutive elementwise operations to thresholding operations. We integrate SIRA-driven
optimizations into the open-source FINN framework, then evaluate their effectiveness
across a range of quantized neural network workloads and compare implementation
alternatives for non-matrix-multiply operations. We demonstrate an average reduction
of 17% for LUTs, 66% for DSPs, and 22% for accumulator bitwidths with SIRA optimizations,
providing detailed benchmark analysis and analytical models to guide the implementation
style for non-matrix layers. Finally, we open-source SIRA to facilitate community
exploration of its benefits across various applications and hardware platforms.
author:
- first_name: Yaman
full_name: Umuroglu, Yaman
last_name: Umuroglu
- first_name: Christoph
full_name: Berganski, Christoph
id: '98854'
last_name: Berganski
- first_name: Felix
full_name: Jentzsch, Felix
id: '55631'
last_name: Jentzsch
orcid: 0000-0003-4987-5708
- first_name: Michal
full_name: Danilowicz, Michal
last_name: Danilowicz
- first_name: Tomasz
full_name: Kryjak, Tomasz
last_name: Kryjak
- first_name: Charalampos
full_name: Bezaitis, Charalampos
last_name: Bezaitis
- first_name: Magnus
full_name: Sjalander, Magnus
last_name: Sjalander
- first_name: Ian
full_name: Colbert, Ian
last_name: Colbert
- first_name: Thomas
full_name: Preusser, Thomas
last_name: Preusser
- first_name: Jakoba
full_name: Petri-Koenig, Jakoba
last_name: Petri-Koenig
- first_name: Michaela
full_name: Blott, Michaela
last_name: Blott
citation:
ama: 'Umuroglu Y, Berganski C, Jentzsch F, et al. SIRA: Scaled-Integer Range Analysis
for Optimizing FPGA Dataflow Neural Network Accelerators.'
apa: 'Umuroglu, Y., Berganski, C., Jentzsch, F., Danilowicz, M., Kryjak, T., Bezaitis,
C., Sjalander, M., Colbert, I., Preusser, T., Petri-Koenig, J., & Blott, M.
(n.d.). SIRA: Scaled-Integer Range Analysis for Optimizing FPGA Dataflow Neural
Network Accelerators.'
bibtex: '@article{Umuroglu_Berganski_Jentzsch_Danilowicz_Kryjak_Bezaitis_Sjalander_Colbert_Preusser_Petri-Koenig_et
al., title={SIRA: Scaled-Integer Range Analysis for Optimizing FPGA Dataflow Neural
Network Accelerators}, author={Umuroglu, Yaman and Berganski, Christoph and Jentzsch,
Felix and Danilowicz, Michal and Kryjak, Tomasz and Bezaitis, Charalampos and
Sjalander, Magnus and Colbert, Ian and Preusser, Thomas and Petri-Koenig, Jakoba
and et al.} }'
chicago: 'Umuroglu, Yaman, Christoph Berganski, Felix Jentzsch, Michal Danilowicz,
Tomasz Kryjak, Charalampos Bezaitis, Magnus Sjalander, et al. “SIRA: Scaled-Integer
Range Analysis for Optimizing FPGA Dataflow Neural Network Accelerators,” n.d.'
ieee: 'Y. Umuroglu et al., “SIRA: Scaled-Integer Range Analysis for Optimizing
FPGA Dataflow Neural Network Accelerators.” .'
mla: 'Umuroglu, Yaman, et al. SIRA: Scaled-Integer Range Analysis for Optimizing
FPGA Dataflow Neural Network Accelerators.'
short: Y. Umuroglu, C. Berganski, F. Jentzsch, M. Danilowicz, T. Kryjak, C. Bezaitis,
M. Sjalander, I. Colbert, T. Preusser, J. Petri-Koenig, M. Blott, (n.d.).
date_created: 2025-09-08T14:10:39Z
date_updated: 2025-09-08T14:13:47Z
department:
- _id: '78'
language:
- iso: eng
publication_status: submitted
status: public
title: 'SIRA: Scaled-Integer Range Analysis for Optimizing FPGA Dataflow Neural Network
Accelerators'
type: preprint
user_id: '55631'
year: '2025'
...
---
_id: '62020'
author:
- first_name: Muhammad
full_name: Awais, Muhammad
last_name: Awais
- first_name: Hassan Ghasemzadeh
full_name: Mohammadi, Hassan Ghasemzadeh
last_name: Mohammadi
- first_name: Marco
full_name: Platzner, Marco
last_name: Platzner
citation:
ama: Awais M, Mohammadi HG, Platzner M. Design Space Exploration for Approximate
Circuits via Checkpointing and DNN-Based Estimators. IEEE Transactions on Very
Large Scale Integration (VLSI) Systems. 2025;33(9):2395-2405. doi:10.1109/tvlsi.2025.3559377
apa: Awais, M., Mohammadi, H. G., & Platzner, M. (2025). Design Space Exploration
for Approximate Circuits via Checkpointing and DNN-Based Estimators. IEEE Transactions
on Very Large Scale Integration (VLSI) Systems, 33(9), 2395–2405. https://doi.org/10.1109/tvlsi.2025.3559377
bibtex: '@article{Awais_Mohammadi_Platzner_2025, title={Design Space Exploration
for Approximate Circuits via Checkpointing and DNN-Based Estimators}, volume={33},
DOI={10.1109/tvlsi.2025.3559377},
number={9}, journal={IEEE Transactions on Very Large Scale Integration (VLSI)
Systems}, publisher={Institute of Electrical and Electronics Engineers (IEEE)},
author={Awais, Muhammad and Mohammadi, Hassan Ghasemzadeh and Platzner, Marco},
year={2025}, pages={2395–2405} }'
chicago: 'Awais, Muhammad, Hassan Ghasemzadeh Mohammadi, and Marco Platzner. “Design
Space Exploration for Approximate Circuits via Checkpointing and DNN-Based Estimators.”
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 33, no.
9 (2025): 2395–2405. https://doi.org/10.1109/tvlsi.2025.3559377.'
ieee: 'M. Awais, H. G. Mohammadi, and M. Platzner, “Design Space Exploration for
Approximate Circuits via Checkpointing and DNN-Based Estimators,” IEEE Transactions
on Very Large Scale Integration (VLSI) Systems, vol. 33, no. 9, pp. 2395–2405,
2025, doi: 10.1109/tvlsi.2025.3559377.'
mla: Awais, Muhammad, et al. “Design Space Exploration for Approximate Circuits
via Checkpointing and DNN-Based Estimators.” IEEE Transactions on Very Large
Scale Integration (VLSI) Systems, vol. 33, no. 9, Institute of Electrical
and Electronics Engineers (IEEE), 2025, pp. 2395–405, doi:10.1109/tvlsi.2025.3559377.
short: M. Awais, H.G. Mohammadi, M. Platzner, IEEE Transactions on Very Large Scale
Integration (VLSI) Systems 33 (2025) 2395–2405.
date_created: 2025-10-30T10:07:49Z
date_updated: 2025-10-30T10:08:55Z
department:
- _id: '78'
doi: 10.1109/tvlsi.2025.3559377
intvolume: ' 33'
issue: '9'
page: 2395-2405
publication: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
publication_identifier:
issn:
- 1063-8210
- 1557-9999
publication_status: published
publisher: Institute of Electrical and Electronics Engineers (IEEE)
status: public
title: Design Space Exploration for Approximate Circuits via Checkpointing and DNN-Based
Estimators
type: journal_article
user_id: '64665'
volume: 33
year: '2025'
...
---
_id: '62019'
author:
- first_name: Amir Hossein
full_name: Hadipour, Amir Hossein
last_name: Hadipour
- first_name: Atousa
full_name: Jafari, Atousa
last_name: Jafari
- first_name: Muhammad
full_name: Awais, Muhammad
last_name: Awais
- first_name: Marco
full_name: Platzner, Marco
last_name: Platzner
citation:
ama: 'Hadipour AH, Jafari A, Awais M, Platzner M. A Two-Stage Approximation Methodology
for Efficient DNN Hardware Implementation. In: 2025 IEEE 28th International
Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS).
IEEE; 2025. doi:10.1109/ddecs63720.2025.11006769'
apa: Hadipour, A. H., Jafari, A., Awais, M., & Platzner, M. (2025). A Two-Stage
Approximation Methodology for Efficient DNN Hardware Implementation. 2025 IEEE
28th International Symposium on Design and Diagnostics of Electronic Circuits
and Systems (DDECS). https://doi.org/10.1109/ddecs63720.2025.11006769
bibtex: '@inproceedings{Hadipour_Jafari_Awais_Platzner_2025, title={A Two-Stage
Approximation Methodology for Efficient DNN Hardware Implementation}, DOI={10.1109/ddecs63720.2025.11006769},
booktitle={2025 IEEE 28th International Symposium on Design and Diagnostics of
Electronic Circuits and Systems (DDECS)}, publisher={IEEE}, author={Hadipour,
Amir Hossein and Jafari, Atousa and Awais, Muhammad and Platzner, Marco}, year={2025}
}'
chicago: Hadipour, Amir Hossein, Atousa Jafari, Muhammad Awais, and Marco Platzner.
“A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation.”
In 2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic
Circuits and Systems (DDECS). IEEE, 2025. https://doi.org/10.1109/ddecs63720.2025.11006769.
ieee: 'A. H. Hadipour, A. Jafari, M. Awais, and M. Platzner, “A Two-Stage Approximation
Methodology for Efficient DNN Hardware Implementation,” 2025, doi: 10.1109/ddecs63720.2025.11006769.'
mla: Hadipour, Amir Hossein, et al. “A Two-Stage Approximation Methodology for Efficient
DNN Hardware Implementation.” 2025 IEEE 28th International Symposium on Design
and Diagnostics of Electronic Circuits and Systems (DDECS), IEEE, 2025, doi:10.1109/ddecs63720.2025.11006769.
short: 'A.H. Hadipour, A. Jafari, M. Awais, M. Platzner, in: 2025 IEEE 28th International
Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS),
IEEE, 2025.'
date_created: 2025-10-30T10:07:11Z
date_updated: 2025-10-30T10:08:50Z
department:
- _id: '78'
doi: 10.1109/ddecs63720.2025.11006769
publication: 2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic
Circuits and Systems (DDECS)
publication_status: published
publisher: IEEE
status: public
title: A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation
type: conference
user_id: '64665'
year: '2025'
...
---
_id: '62268'
author:
- first_name: Prajwal
full_name: Bengaluru Amarnath, Prajwal
last_name: Bengaluru Amarnath
citation:
ama: Bengaluru Amarnath P. Design and Integration of Intra-Process Communication
for ROS 2 into ReconROS. Paderborn University; 2025.
apa: Bengaluru Amarnath, P. (2025). Design and Integration of Intra-Process Communication
for ROS 2 into ReconROS. Paderborn University.
bibtex: '@book{Bengaluru Amarnath_2025, title={Design and Integration of Intra-Process
Communication for ROS 2 into ReconROS}, publisher={Paderborn University}, author={Bengaluru
Amarnath, Prajwal}, year={2025} }'
chicago: Bengaluru Amarnath, Prajwal. Design and Integration of Intra-Process
Communication for ROS 2 into ReconROS. Paderborn University, 2025.
ieee: P. Bengaluru Amarnath, Design and Integration of Intra-Process Communication
for ROS 2 into ReconROS. Paderborn University, 2025.
mla: Bengaluru Amarnath, Prajwal. Design and Integration of Intra-Process Communication
for ROS 2 into ReconROS. Paderborn University, 2025.
short: P. Bengaluru Amarnath, Design and Integration of Intra-Process Communication
for ROS 2 into ReconROS, Paderborn University, 2025.
date_created: 2025-11-20T10:15:20Z
date_updated: 2025-11-20T10:17:09Z
department:
- _id: '78'
language:
- iso: eng
publisher: Paderborn University
status: public
supervisor:
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Alexander Philipp
full_name: Nowosad, Alexander Philipp
id: '68801'
last_name: Nowosad
orcid: 0009-0009-3783-3843
title: Design and Integration of Intra-Process Communication for ROS 2 into ReconROS
type: mastersthesis
user_id: '68801'
year: '2025'
...
---
_id: '52686'
author:
- first_name: Qazi Arbab
full_name: Ahmed, Qazi Arbab
id: '72764'
last_name: Ahmed
orcid: 0000-0002-1837-2254
- first_name: Tobias
full_name: Wiersema, Tobias
id: '3118'
last_name: Wiersema
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: Ahmed QA, Wiersema T, Platzner M. Post-configuration Activation of Hardware
Trojans in FPGAs. Journal of Hardware and Systems Security. Published online
2024. doi:10.1007/s41635-024-00147-5
apa: Ahmed, Q. A., Wiersema, T., & Platzner, M. (2024). Post-configuration Activation
of Hardware Trojans in FPGAs. Journal of Hardware and Systems Security.
https://doi.org/10.1007/s41635-024-00147-5
bibtex: '@article{Ahmed_Wiersema_Platzner_2024, title={Post-configuration Activation
of Hardware Trojans in FPGAs}, DOI={10.1007/s41635-024-00147-5},
journal={Journal of Hardware and Systems Security}, publisher={Springer Science
and Business Media LLC}, author={Ahmed, Qazi Arbab and Wiersema, Tobias and Platzner,
Marco}, year={2024} }'
chicago: Ahmed, Qazi Arbab, Tobias Wiersema, and Marco Platzner. “Post-Configuration
Activation of Hardware Trojans in FPGAs.” Journal of Hardware and Systems Security,
2024. https://doi.org/10.1007/s41635-024-00147-5.
ieee: 'Q. A. Ahmed, T. Wiersema, and M. Platzner, “Post-configuration Activation
of Hardware Trojans in FPGAs,” Journal of Hardware and Systems Security,
2024, doi: 10.1007/s41635-024-00147-5.'
mla: Ahmed, Qazi Arbab, et al. “Post-Configuration Activation of Hardware Trojans
in FPGAs.” Journal of Hardware and Systems Security, Springer Science and
Business Media LLC, 2024, doi:10.1007/s41635-024-00147-5.
short: Q.A. Ahmed, T. Wiersema, M. Platzner, Journal of Hardware and Systems Security
(2024).
date_created: 2024-03-20T12:24:50Z
date_updated: 2024-03-20T12:31:36Z
department:
- _id: '78'
doi: 10.1007/s41635-024-00147-5
keyword:
- General Engineering
- Energy Engineering and Power Technology
language:
- iso: eng
publication: Journal of Hardware and Systems Security
publication_identifier:
issn:
- 2509-3428
- 2509-3436
publication_status: published
publisher: Springer Science and Business Media LLC
status: public
title: Post-configuration Activation of Hardware Trojans in FPGAs
type: journal_article
user_id: '72764'
year: '2024'
...
---
_id: '54245'
author:
- first_name: Luca-Sebastian
full_name: Henke, Luca-Sebastian
last_name: Henke
citation:
ama: Henke L-S. Exploring Custom FPGA Accelerators for DNN-Based RF Fingerprinting.;
2024.
apa: Henke, L.-S. (2024). Exploring Custom FPGA Accelerators for DNN-based RF
Fingerprinting.
bibtex: '@book{Henke_2024, title={Exploring Custom FPGA Accelerators for DNN-based
RF Fingerprinting}, author={Henke, Luca-Sebastian}, year={2024} }'
chicago: Henke, Luca-Sebastian. Exploring Custom FPGA Accelerators for DNN-Based
RF Fingerprinting, 2024.
ieee: L.-S. Henke, Exploring Custom FPGA Accelerators for DNN-based RF Fingerprinting.
2024.
mla: Henke, Luca-Sebastian. Exploring Custom FPGA Accelerators for DNN-Based
RF Fingerprinting. 2024.
short: L.-S. Henke, Exploring Custom FPGA Accelerators for DNN-Based RF Fingerprinting,
2024.
date_created: 2024-05-13T14:00:01Z
date_updated: 2024-05-13T14:01:23Z
department:
- _id: '78'
language:
- iso: eng
status: public
supervisor:
- first_name: Felix
full_name: Jentzsch, Felix
id: '55631'
last_name: Jentzsch
orcid: 0000-0003-4987-5708
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
title: Exploring Custom FPGA Accelerators for DNN-based RF Fingerprinting
type: mastersthesis
user_id: '55631'
year: '2024'
...
---
_id: '54468'
author:
- first_name: Muhammad
full_name: Awais, Muhammad
id: '64665'
last_name: Awais
orcid: https://orcid.org/0000-0003-4148-2969
- first_name: Hassan
full_name: Ghasemzadeh Mohammadi, Hassan
id: '61186'
last_name: Ghasemzadeh Mohammadi
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Awais M, Ghasemzadeh Mohammadi H, Platzner M. DeepApprox: Rapid Deep Learning
based Design Space Exploration of Approximate Circuits via Check-pointing. In:
To Apear in IEEE ISVLSI 2024. ; 2024.'
apa: 'Awais, M., Ghasemzadeh Mohammadi, H., & Platzner, M. (2024). DeepApprox:
Rapid Deep Learning based Design Space Exploration of Approximate Circuits via
Check-pointing. To Apear in IEEE ISVLSI 2024. IEEE Computer Society Annual
Symposium on VLSI, Knoxville, Tennessee, USA.'
bibtex: '@inproceedings{Awais_Ghasemzadeh Mohammadi_Platzner_2024, title={DeepApprox:
Rapid Deep Learning based Design Space Exploration of Approximate Circuits via
Check-pointing}, booktitle={To apear in IEEE ISVLSI 2024}, author={Awais, Muhammad
and Ghasemzadeh Mohammadi, Hassan and Platzner, Marco}, year={2024} }'
chicago: 'Awais, Muhammad, Hassan Ghasemzadeh Mohammadi, and Marco Platzner. “DeepApprox:
Rapid Deep Learning Based Design Space Exploration of Approximate Circuits via
Check-Pointing.” In To Apear in IEEE ISVLSI 2024, 2024.'
ieee: 'M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “DeepApprox: Rapid Deep
Learning based Design Space Exploration of Approximate Circuits via Check-pointing,”
presented at the IEEE Computer Society Annual Symposium on VLSI, Knoxville, Tennessee,
USA, 2024.'
mla: 'Awais, Muhammad, et al. “DeepApprox: Rapid Deep Learning Based Design Space
Exploration of Approximate Circuits via Check-Pointing.” To Apear in IEEE ISVLSI
2024, 2024.'
short: 'M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: To Apear in IEEE ISVLSI
2024, 2024.'
conference:
end_date: 2024-07-03
location: Knoxville, Tennessee, USA
name: IEEE Computer Society Annual Symposium on VLSI
start_date: 2024-07-01
date_created: 2024-05-28T08:14:43Z
date_updated: 2024-05-29T08:26:29Z
department:
- _id: '78'
language:
- iso: eng
publication: To apear in IEEE ISVLSI 2024
status: public
title: 'DeepApprox: Rapid Deep Learning based Design Space Exploration of Approximate
Circuits via Check-pointing'
type: conference
user_id: '64665'
year: '2024'
...
---
_id: '56481'
author:
- first_name: Christoph
full_name: Berganski, Christoph
id: '98854'
last_name: Berganski
- first_name: Felix
full_name: Jentzsch, Felix
id: '55631'
last_name: Jentzsch
orcid: 0000-0003-4987-5708
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Max
full_name: Kuhmichel, Max
last_name: Kuhmichel
- first_name: Heiner
full_name: Giefers, Heiner
last_name: Giefers
citation:
ama: 'Berganski C, Jentzsch F, Platzner M, Kuhmichel M, Giefers H. FINN-T: Compiling
Custom Dataflow Accelerators for Quantized Transformers. In: ; 2024.'
apa: 'Berganski, C., Jentzsch, F., Platzner, M., Kuhmichel, M., & Giefers, H.
(2024). FINN-T: Compiling Custom Dataflow Accelerators for Quantized Transformers.
International Conference on Field Programmable Technology, Sydney.'
bibtex: '@inproceedings{Berganski_Jentzsch_Platzner_Kuhmichel_Giefers_2024, title={FINN-T:
Compiling Custom Dataflow Accelerators for Quantized Transformers}, author={Berganski,
Christoph and Jentzsch, Felix and Platzner, Marco and Kuhmichel, Max and Giefers,
Heiner}, year={2024} }'
chicago: 'Berganski, Christoph, Felix Jentzsch, Marco Platzner, Max Kuhmichel, and
Heiner Giefers. “FINN-T: Compiling Custom Dataflow Accelerators for Quantized
Transformers,” 2024.'
ieee: 'C. Berganski, F. Jentzsch, M. Platzner, M. Kuhmichel, and H. Giefers, “FINN-T:
Compiling Custom Dataflow Accelerators for Quantized Transformers,” presented
at the International Conference on Field Programmable Technology, Sydney, 2024.'
mla: 'Berganski, Christoph, et al. FINN-T: Compiling Custom Dataflow Accelerators
for Quantized Transformers. 2024.'
short: 'C. Berganski, F. Jentzsch, M. Platzner, M. Kuhmichel, H. Giefers, in: 2024.'
conference:
end_date: 2024-12-12
location: Sydney
name: International Conference on Field Programmable Technology
start_date: 2024-12-10
date_created: 2024-10-10T07:49:13Z
date_updated: 2024-10-10T07:52:06Z
department:
- _id: '78'
language:
- iso: eng
status: public
title: 'FINN-T: Compiling Custom Dataflow Accelerators for Quantized Transformers'
type: conference
user_id: '98854'
year: '2024'
...
---
_id: '58132'
author:
- first_name: Maximilian
full_name: Hartinger, Maximilian
last_name: Hartinger
citation:
ama: Hartinger M. Controlling I/O Devices from Hardware-Mapped ReconROS Nodes.
Paderborn University; 2024.
apa: Hartinger, M. (2024). Controlling I/O Devices from Hardware-Mapped ReconROS
Nodes. Paderborn University.
bibtex: '@book{Hartinger_2024, title={Controlling I/O Devices from Hardware-Mapped
ReconROS Nodes}, publisher={Paderborn University}, author={Hartinger, Maximilian},
year={2024} }'
chicago: Hartinger, Maximilian. Controlling I/O Devices from Hardware-Mapped
ReconROS Nodes. Paderborn University, 2024.
ieee: M. Hartinger, Controlling I/O Devices from Hardware-Mapped ReconROS Nodes.
Paderborn University, 2024.
mla: Hartinger, Maximilian. Controlling I/O Devices from Hardware-Mapped ReconROS
Nodes. Paderborn University, 2024.
short: M. Hartinger, Controlling I/O Devices from Hardware-Mapped ReconROS Nodes,
Paderborn University, 2024.
date_created: 2025-01-09T15:29:16Z
date_updated: 2025-01-09T15:32:54Z
department:
- _id: '78'
language:
- iso: eng
publisher: Paderborn University
status: public
supervisor:
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Alexander Philipp
full_name: Nowosad, Alexander Philipp
id: '68801'
last_name: Nowosad
orcid: 0009-0009-3783-3843
title: Controlling I/O Devices from Hardware-Mapped ReconROS Nodes
type: bachelorsthesis
user_id: '68801'
year: '2024'
...
---
_id: '47837'
author:
- first_name: Tim
full_name: Hansmeier, Tim
last_name: Hansmeier
citation:
ama: Hansmeier T. XCS for Self-Awareness in Autonomous Computing Systems.;
2023.
apa: Hansmeier, T. (2023). XCS for Self-awareness in Autonomous Computing Systems.
bibtex: '@book{Hansmeier_2023, title={XCS for Self-awareness in Autonomous Computing
Systems}, author={Hansmeier, Tim}, year={2023} }'
chicago: Hansmeier, Tim. XCS for Self-Awareness in Autonomous Computing Systems,
2023.
ieee: T. Hansmeier, XCS for Self-awareness in Autonomous Computing Systems.
2023.
mla: Hansmeier, Tim. XCS for Self-Awareness in Autonomous Computing Systems.
2023.
short: T. Hansmeier, XCS for Self-Awareness in Autonomous Computing Systems, 2023.
date_created: 2023-10-06T12:45:58Z
date_updated: 2023-10-06T12:46:08Z
department:
- _id: '78'
language:
- iso: eng
project:
- _id: '1'
grant_number: '160364472'
name: 'SFB 901: SFB 901: On-The-Fly Computing - Individualisierte IT-Dienstleistungen
in dynamischen Märkten '
- _id: '4'
name: 'SFB 901 - C: SFB 901 - Project Area C'
- _id: '14'
grant_number: '160364472'
name: 'SFB 901 - C2: SFB 901 - On-The-Fly Compute Centers I: Heterogene Ausführungsumgebungen
(Subproject C2)'
status: public
supervisor:
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
title: XCS for Self-awareness in Autonomous Computing Systems
type: dissertation
user_id: '15504'
year: '2023'
...
---
_id: '53794'
author:
- first_name: Christian
full_name: Lienen, Christian
id: '60323'
last_name: Lienen
- first_name: Mathis
full_name: Brede, Mathis
last_name: Brede
- first_name: Daniel
full_name: Karger, Daniel
last_name: Karger
- first_name: Kevin
full_name: Koch, Kevin
last_name: Koch
- first_name: Dalisha
full_name: Logan, Dalisha
last_name: Logan
- first_name: Janet
full_name: Mazur, Janet
last_name: Mazur
- first_name: Alexander Philipp
full_name: Nowosad, Alexander Philipp
last_name: Nowosad
- first_name: Alexander
full_name: Schnelle, Alexander
last_name: Schnelle
- first_name: Mohness
full_name: Waizy, Mohness
last_name: Waizy
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Lienen C, Brede M, Karger D, et al. AutonomROS: A ReconROS-based Autonomous
Driving Unit. In: 2023 Seventh IEEE International Conference on Robotic Computing
(IRC). IEEE; 2023. doi:10.1109/irc59093.2023.00056'
apa: 'Lienen, C., Brede, M., Karger, D., Koch, K., Logan, D., Mazur, J., Nowosad,
A. P., Schnelle, A., Waizy, M., & Platzner, M. (2023). AutonomROS: A ReconROS-based
Autonomous Driving Unit. 2023 Seventh IEEE International Conference on Robotic
Computing (IRC). https://doi.org/10.1109/irc59093.2023.00056'
bibtex: '@inproceedings{Lienen_Brede_Karger_Koch_Logan_Mazur_Nowosad_Schnelle_Waizy_Platzner_2023,
title={AutonomROS: A ReconROS-based Autonomous Driving Unit}, DOI={10.1109/irc59093.2023.00056},
booktitle={2023 Seventh IEEE International Conference on Robotic Computing (IRC)},
publisher={IEEE}, author={Lienen, Christian and Brede, Mathis and Karger, Daniel
and Koch, Kevin and Logan, Dalisha and Mazur, Janet and Nowosad, Alexander Philipp
and Schnelle, Alexander and Waizy, Mohness and Platzner, Marco}, year={2023} }'
chicago: 'Lienen, Christian, Mathis Brede, Daniel Karger, Kevin Koch, Dalisha Logan,
Janet Mazur, Alexander Philipp Nowosad, Alexander Schnelle, Mohness Waizy, and
Marco Platzner. “AutonomROS: A ReconROS-Based Autonomous Driving Unit.” In 2023
Seventh IEEE International Conference on Robotic Computing (IRC). IEEE, 2023.
https://doi.org/10.1109/irc59093.2023.00056.'
ieee: 'C. Lienen et al., “AutonomROS: A ReconROS-based Autonomous Driving
Unit,” 2023, doi: 10.1109/irc59093.2023.00056.'
mla: 'Lienen, Christian, et al. “AutonomROS: A ReconROS-Based Autonomous Driving
Unit.” 2023 Seventh IEEE International Conference on Robotic Computing (IRC),
IEEE, 2023, doi:10.1109/irc59093.2023.00056.'
short: 'C. Lienen, M. Brede, D. Karger, K. Koch, D. Logan, J. Mazur, A.P. Nowosad,
A. Schnelle, M. Waizy, M. Platzner, in: 2023 Seventh IEEE International Conference
on Robotic Computing (IRC), IEEE, 2023.'
date_created: 2024-04-30T09:04:55Z
date_updated: 2024-04-30T09:16:01Z
department:
- _id: '78'
doi: 10.1109/irc59093.2023.00056
language:
- iso: eng
publication: 2023 Seventh IEEE International Conference on Robotic Computing (IRC)
publication_status: published
publisher: IEEE
status: public
title: 'AutonomROS: A ReconROS-based Autonomous Driving Unit'
type: conference
user_id: '398'
year: '2023'
...
---
_id: '45913'
author:
- first_name: Lennart
full_name: Clausing, Lennart
id: '74287'
last_name: Clausing
orcid: 0000-0003-3789-6034
- first_name: Zakarya
full_name: Guetattfi, Zakarya
last_name: Guetattfi
- first_name: Paul
full_name: Kaufmann, Paul
last_name: Kaufmann
- first_name: Christian
full_name: Lienen, Christian
id: '60323'
last_name: Lienen
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Clausing L, Guetattfi Z, Kaufmann P, Lienen C, Platzner M. On Guaranteeing
Schedulability of Periodic Real-time Hardware Tasks under ReconOS64. In: Proceedings
of the 19th International Symposium on Applied Reconfigurable Computing (ARC).
; 2023. doi:https://doi.org/10.1007/978-3-031-42921-7_17'
apa: Clausing, L., Guetattfi, Z., Kaufmann, P., Lienen, C., & Platzner, M. (2023).
On Guaranteeing Schedulability of Periodic Real-time Hardware Tasks under ReconOS64.
Proceedings of the 19th International Symposium on Applied Reconfigurable Computing
(ARC). https://doi.org/10.1007/978-3-031-42921-7_17
bibtex: '@inproceedings{Clausing_Guetattfi_Kaufmann_Lienen_Platzner_2023, title={On
Guaranteeing Schedulability of Periodic Real-time Hardware Tasks under ReconOS64},
DOI={https://doi.org/10.1007/978-3-031-42921-7_17},
booktitle={Proceedings of the 19th International Symposium on Applied Reconfigurable
Computing (ARC)}, author={Clausing, Lennart and Guetattfi, Zakarya and Kaufmann,
Paul and Lienen, Christian and Platzner, Marco}, year={2023} }'
chicago: Clausing, Lennart, Zakarya Guetattfi, Paul Kaufmann, Christian Lienen,
and Marco Platzner. “On Guaranteeing Schedulability of Periodic Real-Time Hardware
Tasks under ReconOS64.” In Proceedings of the 19th International Symposium
on Applied Reconfigurable Computing (ARC), 2023. https://doi.org/10.1007/978-3-031-42921-7_17.
ieee: 'L. Clausing, Z. Guetattfi, P. Kaufmann, C. Lienen, and M. Platzner, “On Guaranteeing
Schedulability of Periodic Real-time Hardware Tasks under ReconOS64,” 2023, doi:
https://doi.org/10.1007/978-3-031-42921-7_17.'
mla: Clausing, Lennart, et al. “On Guaranteeing Schedulability of Periodic Real-Time
Hardware Tasks under ReconOS64.” Proceedings of the 19th International Symposium
on Applied Reconfigurable Computing (ARC), 2023, doi:https://doi.org/10.1007/978-3-031-42921-7_17.
short: 'L. Clausing, Z. Guetattfi, P. Kaufmann, C. Lienen, M. Platzner, in: Proceedings
of the 19th International Symposium on Applied Reconfigurable Computing (ARC),
2023.'
date_created: 2023-07-09T12:50:32Z
date_updated: 2024-04-30T09:11:26Z
department:
- _id: '78'
doi: https://doi.org/10.1007/978-3-031-42921-7_17
language:
- iso: eng
project:
- _id: '83'
name: 'SFB 901 - T1: SFB 901 -Subproject T1'
- _id: '82'
name: 'SFB 901 - T: SFB 901 - Project Area T'
- _id: '1'
grant_number: '160364472'
name: 'SFB 901: SFB 901: On-The-Fly Computing - Individualisierte IT-Dienstleistungen
in dynamischen Märkten '
publication: Proceedings of the 19th International Symposium on Applied Reconfigurable
Computing (ARC)
status: public
title: On Guaranteeing Schedulability of Periodic Real-time Hardware Tasks under ReconOS64
type: conference
user_id: '398'
year: '2023'
...
---
_id: '46229'
author:
- first_name: Christian
full_name: Lienen, Christian
id: '60323'
last_name: Lienen
- first_name: Alexander Philipp
full_name: Nowosad, Alexander Philipp
last_name: Nowosad
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Lienen C, Nowosad AP, Platzner M. Mapping and Optimizing Communication in
ROS 2-based Applications on Configurable System-on-Chip Platforms. In: Proceedings
of the 2023 9th International Conference on Robotics and Artificial Intelligence
(ICRAI). doi:https://doi.org/10.1145/3637843.3637846'
apa: Lienen, C., Nowosad, A. P., & Platzner, M. (n.d.). Mapping and Optimizing
Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms.
Proceedings of the 2023 9th International Conference on Robotics and Artificial
Intelligence (ICRAI). https://doi.org/10.1145/3637843.3637846
bibtex: '@inproceedings{Lienen_Nowosad_Platzner, title={Mapping and Optimizing Communication
in ROS 2-based Applications on Configurable System-on-Chip Platforms}, DOI={https://doi.org/10.1145/3637843.3637846},
booktitle={Proceedings of the 2023 9th International Conference on Robotics and
Artificial Intelligence (ICRAI)}, author={Lienen, Christian and Nowosad, Alexander
Philipp and Platzner, Marco} }'
chicago: Lienen, Christian, Alexander Philipp Nowosad, and Marco Platzner. “Mapping
and Optimizing Communication in ROS 2-Based Applications on Configurable System-on-Chip
Platforms.” In Proceedings of the 2023 9th International Conference on Robotics
and Artificial Intelligence (ICRAI), n.d. https://doi.org/10.1145/3637843.3637846.
ieee: 'C. Lienen, A. P. Nowosad, and M. Platzner, “Mapping and Optimizing Communication
in ROS 2-based Applications on Configurable System-on-Chip Platforms,” doi: https://doi.org/10.1145/3637843.3637846.'
mla: Lienen, Christian, et al. “Mapping and Optimizing Communication in ROS 2-Based
Applications on Configurable System-on-Chip Platforms.” Proceedings of the
2023 9th International Conference on Robotics and Artificial Intelligence (ICRAI),
doi:https://doi.org/10.1145/3637843.3637846.
short: 'C. Lienen, A.P. Nowosad, M. Platzner, in: Proceedings of the 2023 9th International
Conference on Robotics and Artificial Intelligence (ICRAI), n.d.'
date_created: 2023-07-31T11:56:47Z
date_updated: 2024-04-30T09:13:08Z
department:
- _id: '78'
doi: https://doi.org/10.1145/3637843.3637846
language:
- iso: eng
main_file_link:
- url: https://arxiv.org/pdf/2306.12761.pdf
publication: Proceedings of the 2023 9th International Conference on Robotics and
Artificial Intelligence (ICRAI)
publication_status: accepted
status: public
title: Mapping and Optimizing Communication in ROS 2-based Applications on Configurable
System-on-Chip Platforms
type: conference
user_id: '398'
year: '2023'
...
---
_id: '43048'
author:
- first_name: Christian
full_name: Lienen, Christian
id: '60323'
last_name: Lienen
- first_name: Sorel Horst
full_name: Middeke, Sorel Horst
last_name: Middeke
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Lienen C, Middeke SH, Platzner M. fpgaDDS: An Intra-FPGA Data Distribution
Service for ROS 2 Robotics Applications. In: Proceedings of the 2023 IEEE/RSJ
International Conference on Intelligent Robots and Systems (IROS). ; 2023.
doi:10.1109/IROS55552.2023.10341921'
apa: 'Lienen, C., Middeke, S. H., & Platzner, M. (2023). fpgaDDS: An Intra-FPGA
Data Distribution Service for ROS 2 Robotics Applications. Proceedings of
the 2023 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS).
https://doi.org/10.1109/IROS55552.2023.10341921'
bibtex: '@inproceedings{Lienen_Middeke_Platzner_2023, title={fpgaDDS: An Intra-FPGA
Data Distribution Service for ROS 2 Robotics Applications}, DOI={10.1109/IROS55552.2023.10341921},
booktitle={ Proceedings of the 2023 IEEE/RSJ International Conference on Intelligent
Robots and Systems (IROS)}, author={Lienen, Christian and Middeke, Sorel Horst
and Platzner, Marco}, year={2023} }'
chicago: 'Lienen, Christian, Sorel Horst Middeke, and Marco Platzner. “FpgaDDS:
An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications.” In
Proceedings of the 2023 IEEE/RSJ International Conference on Intelligent Robots
and Systems (IROS), 2023. https://doi.org/10.1109/IROS55552.2023.10341921.'
ieee: 'C. Lienen, S. H. Middeke, and M. Platzner, “fpgaDDS: An Intra-FPGA Data Distribution
Service for ROS 2 Robotics Applications,” 2023, doi: 10.1109/IROS55552.2023.10341921.'
mla: 'Lienen, Christian, et al. “FpgaDDS: An Intra-FPGA Data Distribution Service
for ROS 2 Robotics Applications.” Proceedings of the 2023 IEEE/RSJ International
Conference on Intelligent Robots and Systems (IROS), 2023, doi:10.1109/IROS55552.2023.10341921.'
short: 'C. Lienen, S.H. Middeke, M. Platzner, in: Proceedings of the 2023 IEEE/RSJ
International Conference on Intelligent Robots and Systems (IROS), 2023.'
date_created: 2023-03-20T07:41:47Z
date_updated: 2024-04-30T09:13:03Z
department:
- _id: '78'
doi: 10.1109/IROS55552.2023.10341921
language:
- iso: eng
main_file_link:
- url: https://arxiv.org/pdf/2303.00532.pdf
publication: ' Proceedings of the 2023 IEEE/RSJ International Conference on Intelligent
Robots and Systems (IROS)'
status: public
title: 'fpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications'
type: conference
user_id: '398'
year: '2023'
...
---
_id: '45888'
author:
- first_name: Heike
full_name: Wehrheim, Heike
id: '573'
last_name: Wehrheim
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Eric
full_name: Bodden, Eric
id: '59256'
last_name: Bodden
orcid: 0000-0003-3470-3647
- first_name: 'Philipp '
full_name: 'Schubert, Philipp '
last_name: Schubert
- first_name: Felix
full_name: Pauck, Felix
id: '22398'
last_name: Pauck
- first_name: Marie-Christine
full_name: Jakobs, Marie-Christine
last_name: Jakobs
citation:
ama: 'Wehrheim H, Platzner M, Bodden E, Schubert P, Pauck F, Jakobs M-C. Verifying
Software and Reconfigurable Hardware Services. In: Haake C-J, Meyer auf der Heide
F, Platzner M, Wachsmuth H, Wehrheim H, eds. On-The-Fly Computing -- Individualized
IT-Services in Dynamic Markets. Vol 412. Verlagsschriftenreihe des Heinz Nixdorf
Instituts. Heinz Nixdorf Institut, Universität Paderborn; 2023:125-144. doi:10.5281/zenodo.8068583'
apa: Wehrheim, H., Platzner, M., Bodden, E., Schubert, P., Pauck, F., & Jakobs,
M.-C. (2023). Verifying Software and Reconfigurable Hardware Services. In C.-J.
Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, & H. Wehrheim (Eds.),
On-The-Fly Computing -- Individualized IT-services in dynamic markets (Vol.
412, pp. 125–144). Heinz Nixdorf Institut, Universität Paderborn. https://doi.org/10.5281/zenodo.8068583
bibtex: '@inbook{Wehrheim_Platzner_Bodden_Schubert_Pauck_Jakobs_2023, place={Paderborn},
series={Verlagsschriftenreihe des Heinz Nixdorf Instituts}, title={Verifying Software
and Reconfigurable Hardware Services}, volume={412}, DOI={10.5281/zenodo.8068583},
booktitle={On-The-Fly Computing -- Individualized IT-services in dynamic markets},
publisher={Heinz Nixdorf Institut, Universität Paderborn}, author={Wehrheim, Heike
and Platzner, Marco and Bodden, Eric and Schubert, Philipp and Pauck, Felix and
Jakobs, Marie-Christine}, editor={Haake, Claus-Jochen and Meyer auf der Heide,
Friedhelm and Platzner, Marco and Wachsmuth, Henning and Wehrheim, Heike}, year={2023},
pages={125–144}, collection={Verlagsschriftenreihe des Heinz Nixdorf Instituts}
}'
chicago: 'Wehrheim, Heike, Marco Platzner, Eric Bodden, Philipp Schubert, Felix
Pauck, and Marie-Christine Jakobs. “Verifying Software and Reconfigurable Hardware
Services.” In On-The-Fly Computing -- Individualized IT-Services in Dynamic
Markets, edited by Claus-Jochen Haake, Friedhelm Meyer auf der Heide, Marco
Platzner, Henning Wachsmuth, and Heike Wehrheim, 412:125–44. Verlagsschriftenreihe
Des Heinz Nixdorf Instituts. Paderborn: Heinz Nixdorf Institut, Universität Paderborn,
2023. https://doi.org/10.5281/zenodo.8068583.'
ieee: 'H. Wehrheim, M. Platzner, E. Bodden, P. Schubert, F. Pauck, and M.-C. Jakobs,
“Verifying Software and Reconfigurable Hardware Services,” in On-The-Fly Computing
-- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F.
Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn:
Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 125–144.'
mla: Wehrheim, Heike, et al. “Verifying Software and Reconfigurable Hardware Services.”
On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets,
edited by Claus-Jochen Haake et al., vol. 412, Heinz Nixdorf Institut, Universität
Paderborn, 2023, pp. 125–44, doi:10.5281/zenodo.8068583.
short: 'H. Wehrheim, M. Platzner, E. Bodden, P. Schubert, F. Pauck, M.-C. Jakobs,
in: C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, H. Wehrheim
(Eds.), On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets,
Heinz Nixdorf Institut, Universität Paderborn, Paderborn, 2023, pp. 125–144.'
date_created: 2023-07-07T08:01:23Z
date_updated: 2024-05-02T10:29:31Z
ddc:
- '004'
department:
- _id: '7'
- _id: '78'
doi: 10.5281/zenodo.8068583
editor:
- first_name: Claus-Jochen
full_name: Haake, Claus-Jochen
last_name: Haake
- first_name: Friedhelm
full_name: Meyer auf der Heide, Friedhelm
last_name: Meyer auf der Heide
- first_name: Marco
full_name: Platzner, Marco
last_name: Platzner
- first_name: Henning
full_name: Wachsmuth, Henning
last_name: Wachsmuth
- first_name: Heike
full_name: Wehrheim, Heike
last_name: Wehrheim
file:
- access_level: open_access
content_type: application/pdf
creator: florida
date_created: 2023-07-07T08:01:12Z
date_updated: 2023-07-07T11:18:59Z
file_id: '45889'
file_name: B4-Chapter-SFB-Buch-Final.pdf
file_size: 840964
relation: main_file
file_date_updated: 2023-07-07T11:18:59Z
has_accepted_license: '1'
intvolume: ' 412'
language:
- iso: eng
oa: '1'
page: 125-144
place: Paderborn
project:
- _id: '1'
grant_number: '160364472'
name: 'SFB 901: SFB 901: On-The-Fly Computing - Individualisierte IT-Dienstleistungen
in dynamischen Märkten '
- _id: '3'
name: 'SFB 901 - B: SFB 901 - Project Area B'
- _id: '12'
name: 'SFB 901 - B4: SFB 901 - Subproject B4'
publication: On-The-Fly Computing -- Individualized IT-services in dynamic markets
publisher: Heinz Nixdorf Institut, Universität Paderborn
series_title: Verlagsschriftenreihe des Heinz Nixdorf Instituts
status: public
title: Verifying Software and Reconfigurable Hardware Services
type: book_chapter
user_id: '398'
volume: 412
year: '2023'
...
---
_id: '45893'
author:
- first_name: Tim
full_name: Hansmeier, Tim
id: '49992'
last_name: Hansmeier
orcid: 0000-0003-1377-3339
- first_name: Tobias
full_name: Kenter, Tobias
id: '3145'
last_name: Kenter
- first_name: Marius
full_name: Meyer, Marius
id: '40778'
last_name: Meyer
- first_name: Heinrich
full_name: Riebler, Heinrich
id: '8961'
last_name: Riebler
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Christian
full_name: Plessl, Christian
id: '16153'
last_name: Plessl
orcid: 0000-0001-5728-9982
citation:
ama: 'Hansmeier T, Kenter T, Meyer M, Riebler H, Platzner M, Plessl C. Compute Centers
I: Heterogeneous Execution Environments. In: Haake C-J, Meyer auf der Heide F,
Platzner M, Wachsmuth H, Wehrheim H, eds. On-The-Fly Computing -- Individualized
IT-Services in Dynamic Markets. Vol 412. Verlagsschriftenreihe des Heinz Nixdorf
Instituts. Heinz Nixdorf Institut, Universität Paderborn; 2023:165-182. doi:10.5281/zenodo.8068642'
apa: 'Hansmeier, T., Kenter, T., Meyer, M., Riebler, H., Platzner, M., & Plessl,
C. (2023). Compute Centers I: Heterogeneous Execution Environments. In C.-J. Haake,
F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, & H. Wehrheim (Eds.), On-The-Fly
Computing -- Individualized IT-services in dynamic markets (Vol. 412, pp.
165–182). Heinz Nixdorf Institut, Universität Paderborn. https://doi.org/10.5281/zenodo.8068642'
bibtex: '@inbook{Hansmeier_Kenter_Meyer_Riebler_Platzner_Plessl_2023, place={Paderborn},
series={Verlagsschriftenreihe des Heinz Nixdorf Instituts}, title={Compute Centers
I: Heterogeneous Execution Environments}, volume={412}, DOI={10.5281/zenodo.8068642},
booktitle={On-The-Fly Computing -- Individualized IT-services in dynamic markets},
publisher={Heinz Nixdorf Institut, Universität Paderborn}, author={Hansmeier,
Tim and Kenter, Tobias and Meyer, Marius and Riebler, Heinrich and Platzner, Marco
and Plessl, Christian}, editor={Haake, Claus-Jochen and Meyer auf der Heide, Friedhelm
and Platzner, Marco and Wachsmuth, Henning and Wehrheim, Heike}, year={2023},
pages={165–182}, collection={Verlagsschriftenreihe des Heinz Nixdorf Instituts}
}'
chicago: 'Hansmeier, Tim, Tobias Kenter, Marius Meyer, Heinrich Riebler, Marco Platzner,
and Christian Plessl. “Compute Centers I: Heterogeneous Execution Environments.”
In On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets,
edited by Claus-Jochen Haake, Friedhelm Meyer auf der Heide, Marco Platzner, Henning
Wachsmuth, and Heike Wehrheim, 412:165–82. Verlagsschriftenreihe Des Heinz Nixdorf
Instituts. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023. https://doi.org/10.5281/zenodo.8068642.'
ieee: 'T. Hansmeier, T. Kenter, M. Meyer, H. Riebler, M. Platzner, and C. Plessl,
“Compute Centers I: Heterogeneous Execution Environments,” in On-The-Fly Computing
-- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F.
Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn:
Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 165–182.'
mla: 'Hansmeier, Tim, et al. “Compute Centers I: Heterogeneous Execution Environments.”
On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets,
edited by Claus-Jochen Haake et al., vol. 412, Heinz Nixdorf Institut, Universität
Paderborn, 2023, pp. 165–82, doi:10.5281/zenodo.8068642.'
short: 'T. Hansmeier, T. Kenter, M. Meyer, H. Riebler, M. Platzner, C. Plessl, in:
C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, H. Wehrheim (Eds.),
On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets, Heinz Nixdorf
Institut, Universität Paderborn, Paderborn, 2023, pp. 165–182.'
date_created: 2023-07-07T08:15:45Z
date_updated: 2024-05-02T10:33:00Z
ddc:
- '004'
department:
- _id: '7'
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.5281/zenodo.8068642
editor:
- first_name: Claus-Jochen
full_name: Haake, Claus-Jochen
last_name: Haake
- first_name: Friedhelm
full_name: Meyer auf der Heide, Friedhelm
last_name: Meyer auf der Heide
- first_name: Marco
full_name: Platzner, Marco
last_name: Platzner
- first_name: Henning
full_name: Wachsmuth, Henning
last_name: Wachsmuth
- first_name: Heike
full_name: Wehrheim, Heike
last_name: Wehrheim
file:
- access_level: open_access
content_type: application/pdf
creator: florida
date_created: 2023-07-07T08:15:35Z
date_updated: 2023-07-07T11:17:33Z
file_id: '45894'
file_name: C2-Chapter-SFB-Buch-Final.pdf
file_size: 2288788
relation: main_file
file_date_updated: 2023-07-07T11:17:33Z
has_accepted_license: '1'
intvolume: ' 412'
language:
- iso: eng
oa: '1'
page: 165-182
place: Paderborn
project:
- _id: '1'
grant_number: '160364472'
name: 'SFB 901: SFB 901: On-The-Fly Computing - Individualisierte IT-Dienstleistungen
in dynamischen Märkten '
- _id: '4'
name: 'SFB 901 - C: SFB 901 - Project Area C'
- _id: '14'
grant_number: '160364472'
name: 'SFB 901 - C2: SFB 901 - On-The-Fly Compute Centers I: Heterogene Ausführungsumgebungen
(Subproject C2)'
publication: On-The-Fly Computing -- Individualized IT-services in dynamic markets
publisher: Heinz Nixdorf Institut, Universität Paderborn
series_title: Verlagsschriftenreihe des Heinz Nixdorf Instituts
status: public
title: 'Compute Centers I: Heterogeneous Execution Environments'
type: book_chapter
user_id: '398'
volume: 412
year: '2023'
...
---
_id: '45899'
author:
- first_name: Alexander
full_name: Boschmann, Alexander
last_name: Boschmann
- first_name: Lennart
full_name: Clausing, Lennart
id: '74287'
last_name: Clausing
orcid: 0000-0003-3789-6034
- first_name: Felix
full_name: Jentzsch, Felix
id: '55631'
last_name: Jentzsch
orcid: 0000-0003-4987-5708
- first_name: Hassan
full_name: Ghasemzadeh Mohammadi, Hassan
id: '61186'
last_name: Ghasemzadeh Mohammadi
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Boschmann A, Clausing L, Jentzsch F, Ghasemzadeh Mohammadi H, Platzner M.
Flexible Industrial Analytics on Reconfigurable Systems-On-Chip. In: Haake C-J,
Meyer auf der Heide F, Platzner M, Wachsmuth H, Wehrheim H, eds. On-The-Fly
Computing -- Individualized IT-Services in Dynamic Markets. Vol 412. Verlagsschriftenreihe
des Heinz Nixdorf Instituts. Heinz Nixdorf Institut, Universität Paderborn; 2023:225-236.
doi:10.5281/zenodo.8068713'
apa: Boschmann, A., Clausing, L., Jentzsch, F., Ghasemzadeh Mohammadi, H., &
Platzner, M. (2023). Flexible Industrial Analytics on Reconfigurable Systems-On-Chip.
In C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, & H. Wehrheim
(Eds.), On-The-Fly Computing -- Individualized IT-services in dynamic markets
(Vol. 412, pp. 225–236). Heinz Nixdorf Institut, Universität Paderborn. https://doi.org/10.5281/zenodo.8068713
bibtex: '@inbook{Boschmann_Clausing_Jentzsch_Ghasemzadeh Mohammadi_Platzner_2023,
place={Paderborn}, series={Verlagsschriftenreihe des Heinz Nixdorf Instituts},
title={Flexible Industrial Analytics on Reconfigurable Systems-On-Chip}, volume={412},
DOI={10.5281/zenodo.8068713},
booktitle={On-The-Fly Computing -- Individualized IT-services in dynamic markets},
publisher={Heinz Nixdorf Institut, Universität Paderborn}, author={Boschmann,
Alexander and Clausing, Lennart and Jentzsch, Felix and Ghasemzadeh Mohammadi,
Hassan and Platzner, Marco}, editor={Haake, Claus-Jochen and Meyer auf der Heide,
Friedhelm and Platzner, Marco and Wachsmuth, Henning and Wehrheim, Heike}, year={2023},
pages={225–236}, collection={Verlagsschriftenreihe des Heinz Nixdorf Instituts}
}'
chicago: 'Boschmann, Alexander, Lennart Clausing, Felix Jentzsch, Hassan Ghasemzadeh
Mohammadi, and Marco Platzner. “Flexible Industrial Analytics on Reconfigurable
Systems-On-Chip.” In On-The-Fly Computing -- Individualized IT-Services in
Dynamic Markets, edited by Claus-Jochen Haake, Friedhelm Meyer auf der Heide,
Marco Platzner, Henning Wachsmuth, and Heike Wehrheim, 412:225–36. Verlagsschriftenreihe
Des Heinz Nixdorf Instituts. Paderborn: Heinz Nixdorf Institut, Universität Paderborn,
2023. https://doi.org/10.5281/zenodo.8068713.'
ieee: 'A. Boschmann, L. Clausing, F. Jentzsch, H. Ghasemzadeh Mohammadi, and M.
Platzner, “Flexible Industrial Analytics on Reconfigurable Systems-On-Chip,” in
On-The-Fly Computing -- Individualized IT-services in dynamic markets,
vol. 412, C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and
H. Wehrheim, Eds. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023,
pp. 225–236.'
mla: Boschmann, Alexander, et al. “Flexible Industrial Analytics on Reconfigurable
Systems-On-Chip.” On-The-Fly Computing -- Individualized IT-Services in Dynamic
Markets, edited by Claus-Jochen Haake et al., vol. 412, Heinz Nixdorf Institut,
Universität Paderborn, 2023, pp. 225–36, doi:10.5281/zenodo.8068713.
short: 'A. Boschmann, L. Clausing, F. Jentzsch, H. Ghasemzadeh Mohammadi, M. Platzner,
in: C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, H. Wehrheim
(Eds.), On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets,
Heinz Nixdorf Institut, Universität Paderborn, Paderborn, 2023, pp. 225–236.'
date_created: 2023-07-07T08:36:58Z
date_updated: 2024-05-02T10:33:26Z
ddc:
- '004'
department:
- _id: '7'
- _id: '78'
doi: 10.5281/zenodo.8068713
editor:
- first_name: Claus-Jochen
full_name: Haake, Claus-Jochen
last_name: Haake
- first_name: Friedhelm
full_name: Meyer auf der Heide, Friedhelm
last_name: Meyer auf der Heide
- first_name: Marco
full_name: Platzner, Marco
last_name: Platzner
- first_name: Henning
full_name: Wachsmuth, Henning
last_name: Wachsmuth
- first_name: Heike
full_name: Wehrheim, Heike
last_name: Wehrheim
file:
- access_level: open_access
content_type: application/pdf
creator: florida
date_created: 2023-07-07T08:36:40Z
date_updated: 2023-07-07T11:14:23Z
file_id: '45900'
file_name: T1-Chapter-SFB-Buch-Final.pdf
file_size: 468973
relation: main_file
file_date_updated: 2023-07-07T11:14:23Z
has_accepted_license: '1'
intvolume: ' 412'
language:
- iso: eng
oa: '1'
page: 225-236
place: Paderborn
project:
- _id: '1'
grant_number: '160364472'
name: 'SFB 901: SFB 901: On-The-Fly Computing - Individualisierte IT-Dienstleistungen
in dynamischen Märkten '
- _id: '82'
name: 'SFB 901 - T: SFB 901 - Project Area T'
- _id: '83'
name: 'SFB 901 - T1: SFB 901 -Subproject T1'
publication: On-The-Fly Computing -- Individualized IT-services in dynamic markets
publisher: Heinz Nixdorf Institut, Universität Paderborn
series_title: Verlagsschriftenreihe des Heinz Nixdorf Instituts
status: public
title: Flexible Industrial Analytics on Reconfigurable Systems-On-Chip
type: book_chapter
user_id: '398'
volume: 412
year: '2023'
...
---
_id: '54127'
author:
- first_name: Deepak Bhardwaj
full_name: Anantha Rao, Deepak Bhardwaj
last_name: Anantha Rao
citation:
ama: Anantha Rao DB. Efficient Neural Network Inference for Velocity Estimation
in Athletic Relay Races on a Microcontroller. Paderborn University; 2023.
apa: Anantha Rao, D. B. (2023). Efficient Neural Network Inference for Velocity
Estimation in Athletic Relay Races on a Microcontroller. Paderborn University.
bibtex: '@book{Anantha Rao_2023, title={Efficient Neural Network Inference for Velocity
Estimation in Athletic Relay Races on a Microcontroller}, publisher={Paderborn
University}, author={Anantha Rao, Deepak Bhardwaj}, year={2023} }'
chicago: Anantha Rao, Deepak Bhardwaj. Efficient Neural Network Inference for
Velocity Estimation in Athletic Relay Races on a Microcontroller. Paderborn
University, 2023.
ieee: D. B. Anantha Rao, Efficient Neural Network Inference for Velocity Estimation
in Athletic Relay Races on a Microcontroller. Paderborn University, 2023.
mla: Anantha Rao, Deepak Bhardwaj. Efficient Neural Network Inference for Velocity
Estimation in Athletic Relay Races on a Microcontroller. Paderborn University,
2023.
short: D.B. Anantha Rao, Efficient Neural Network Inference for Velocity Estimation
in Athletic Relay Races on a Microcontroller, Paderborn University, 2023.
date_created: 2024-05-08T15:40:17Z
date_updated: 2024-05-08T15:51:52Z
department:
- _id: '78'
extern: '1'
language:
- iso: eng
publisher: Paderborn University
status: public
supervisor:
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Christoph
full_name: Berganski, Christoph
id: '98854'
last_name: Berganski
- first_name: Andre
full_name: Diekwisch, Andre
id: '9451'
last_name: Diekwisch
title: Efficient Neural Network Inference for Velocity Estimation in Athletic Relay
Races on a Microcontroller
type: mastersthesis
user_id: '98854'
year: '2023'
...