--- _id: '10702' author: - first_name: Alexander full_name: Kostin, Alexander last_name: Kostin citation: ama: Kostin A. Evolvable Robot Controller. Paderborn University; 2009. apa: Kostin, A. (2009). Evolvable Robot Controller. Paderborn University. bibtex: '@book{Kostin_2009, title={Evolvable Robot Controller}, publisher={Paderborn University}, author={Kostin, Alexander}, year={2009} }' chicago: Kostin, Alexander. Evolvable Robot Controller. Paderborn University, 2009. ieee: A. Kostin, Evolvable Robot Controller. Paderborn University, 2009. mla: Kostin, Alexander. Evolvable Robot Controller. Paderborn University, 2009. short: A. Kostin, Evolvable Robot Controller, Paderborn University, 2009. date_created: 2019-07-10T11:38:28Z date_updated: 2022-01-06T06:50:50Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public supervisor: - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann title: Evolvable Robot Controller type: mastersthesis user_id: '3118' year: '2009' ... --- _id: '10703' author: - first_name: Enno full_name: Lübbers, Enno last_name: Lübbers - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Lübbers E, Platzner M. ReconOS: Multithreaded Programming for Reconfigurable Computers. ACM Transactions on Embedded Computing Systems. 2009;9(1):8:1-8:33. doi:10.1145/1596532.1596540' apa: 'Lübbers, E., & Platzner, M. (2009). ReconOS: Multithreaded Programming for Reconfigurable Computers. ACM Transactions on Embedded Computing Systems, 9(1), 8:1-8:33. https://doi.org/10.1145/1596532.1596540' bibtex: '@article{Lübbers_Platzner_2009, title={ReconOS: Multithreaded Programming for Reconfigurable Computers}, volume={9}, DOI={10.1145/1596532.1596540}, number={1}, journal={ACM Transactions on Embedded Computing Systems}, author={Lübbers, Enno and Platzner, Marco}, year={2009}, pages={8:1-8:33} }' chicago: 'Lübbers, Enno, and Marco Platzner. “ReconOS: Multithreaded Programming for Reconfigurable Computers.” ACM Transactions on Embedded Computing Systems 9, no. 1 (2009): 8:1-8:33. https://doi.org/10.1145/1596532.1596540.' ieee: 'E. Lübbers and M. Platzner, “ReconOS: Multithreaded Programming for Reconfigurable Computers,” ACM Transactions on Embedded Computing Systems, vol. 9, no. 1, pp. 8:1-8:33, 2009.' mla: 'Lübbers, Enno, and Marco Platzner. “ReconOS: Multithreaded Programming for Reconfigurable Computers.” ACM Transactions on Embedded Computing Systems, vol. 9, no. 1, 2009, pp. 8:1-8:33, doi:10.1145/1596532.1596540.' short: E. Lübbers, M. Platzner, ACM Transactions on Embedded Computing Systems 9 (2009) 8:1-8:33. date_created: 2019-07-10T11:41:17Z date_updated: 2022-01-06T06:50:50Z department: - _id: '78' doi: 10.1145/1596532.1596540 intvolume: ' 9' issue: '1' keyword: - Reconfigurable computing - multithreading - operating systems language: - iso: eng page: 8:1-8:33 publication: ACM Transactions on Embedded Computing Systems publication_identifier: issn: - 1539-9087 status: public title: 'ReconOS: Multithreaded Programming for Reconfigurable Computers' type: journal_article user_id: '3118' volume: 9 year: '2009' ... --- _id: '10746' author: - first_name: Martin full_name: Tofall, Martin last_name: Tofall citation: ama: Tofall M. Compiler for a Custom Instruction Set CPU. Paderborn University; 2009. apa: Tofall, M. (2009). Compiler for a Custom Instruction Set CPU. Paderborn University. bibtex: '@book{Tofall_2009, title={Compiler for a Custom Instruction Set CPU}, publisher={Paderborn University}, author={Tofall, Martin}, year={2009} }' chicago: Tofall, Martin. Compiler for a Custom Instruction Set CPU. Paderborn University, 2009. ieee: M. Tofall, Compiler for a Custom Instruction Set CPU. Paderborn University, 2009. mla: Tofall, Martin. Compiler for a Custom Instruction Set CPU. Paderborn University, 2009. short: M. Tofall, Compiler for a Custom Instruction Set CPU, Paderborn University, 2009. date_created: 2019-07-10T12:01:52Z date_updated: 2022-01-06T06:50:50Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public title: Compiler for a Custom Instruction Set CPU type: mastersthesis user_id: '3118' year: '2009' ... --- _id: '10749' author: - first_name: Alexander full_name: Warkentin, Alexander last_name: Warkentin citation: ama: Warkentin A. Coarse-Grained CGP Model Using Xilinx Virtex5 DSP48E Functional Units. Paderborn University; 2009. apa: Warkentin, A. (2009). Coarse-grained CGP Model using Xilinx Virtex5 DSP48E Functional Units. Paderborn University. bibtex: '@book{Warkentin_2009, title={Coarse-grained CGP Model using Xilinx Virtex5 DSP48E Functional Units}, publisher={Paderborn University}, author={Warkentin, Alexander}, year={2009} }' chicago: Warkentin, Alexander. Coarse-Grained CGP Model Using Xilinx Virtex5 DSP48E Functional Units. Paderborn University, 2009. ieee: A. Warkentin, Coarse-grained CGP Model using Xilinx Virtex5 DSP48E Functional Units. Paderborn University, 2009. mla: Warkentin, Alexander. Coarse-Grained CGP Model Using Xilinx Virtex5 DSP48E Functional Units. Paderborn University, 2009. short: A. Warkentin, Coarse-Grained CGP Model Using Xilinx Virtex5 DSP48E Functional Units, Paderborn University, 2009. date_created: 2019-07-10T12:02:58Z date_updated: 2022-01-06T06:50:50Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public supervisor: - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann title: Coarse-grained CGP Model using Xilinx Virtex5 DSP48E Functional Units type: mastersthesis user_id: '3118' year: '2009' ... --- _id: '10753' author: - first_name: Benedikt full_name: Wildenhain, Benedikt last_name: Wildenhain citation: ama: Wildenhain B. Implementierung von Kryptographie-Hardwarebeschleunigern Für Das HW/SW-Betriebssystem ReconOS. Paderborn University; 2009. apa: Wildenhain, B. (2009). Implementierung von Kryptographie-Hardwarebeschleunigern für das HW/SW-Betriebssystem ReconOS. Paderborn University. bibtex: '@book{Wildenhain_2009, title={Implementierung von Kryptographie-Hardwarebeschleunigern für das HW/SW-Betriebssystem ReconOS}, publisher={Paderborn University}, author={Wildenhain, Benedikt}, year={2009} }' chicago: Wildenhain, Benedikt. Implementierung von Kryptographie-Hardwarebeschleunigern Für Das HW/SW-Betriebssystem ReconOS. Paderborn University, 2009. ieee: B. Wildenhain, Implementierung von Kryptographie-Hardwarebeschleunigern für das HW/SW-Betriebssystem ReconOS. Paderborn University, 2009. mla: Wildenhain, Benedikt. Implementierung von Kryptographie-Hardwarebeschleunigern Für Das HW/SW-Betriebssystem ReconOS. Paderborn University, 2009. short: B. Wildenhain, Implementierung von Kryptographie-Hardwarebeschleunigern Für Das HW/SW-Betriebssystem ReconOS, Paderborn University, 2009. date_created: 2019-07-10T12:05:17Z date_updated: 2022-01-06T06:50:50Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public title: Implementierung von Kryptographie-Hardwarebeschleunigern für das HW/SW-Betriebssystem ReconOS type: bachelorsthesis user_id: '3118' year: '2009' ... --- _id: '10777' author: - first_name: Hassan full_name: Ghasemzadeh Mohammadi, Hassan id: '61186' last_name: Ghasemzadeh Mohammadi - first_name: Seyed Ghassem full_name: Miremadi, Seyed Ghassem last_name: Miremadi - first_name: Alireza full_name: Ejlali, Alireza last_name: Ejlali citation: ama: 'Ghasemzadeh Mohammadi H, Miremadi SG, Ejlali A. Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors. In: Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium On. IEEE; 2009:252-255. doi:10.1109/PRDC.2009.69' apa: 'Ghasemzadeh Mohammadi, H., Miremadi, S. G., & Ejlali, A. (2009). Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors. In Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium on (pp. 252–255). IEEE. https://doi.org/10.1109/PRDC.2009.69' bibtex: '@inproceedings{Ghasemzadeh Mohammadi_Miremadi_Ejlali_2009, title={Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors}, DOI={10.1109/PRDC.2009.69}, booktitle={Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium on}, publisher={IEEE}, author={Ghasemzadeh Mohammadi, Hassan and Miremadi, Seyed Ghassem and Ejlali, Alireza}, year={2009}, pages={252–255} }' chicago: 'Ghasemzadeh Mohammadi, Hassan, Seyed Ghassem Miremadi, and Alireza Ejlali. “Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors.” In Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium On, 252–55. IEEE, 2009. https://doi.org/10.1109/PRDC.2009.69.' ieee: 'H. Ghasemzadeh Mohammadi, S. G. Miremadi, and A. Ejlali, “Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors,” in Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium on, 2009, pp. 252–255.' mla: 'Ghasemzadeh Mohammadi, Hassan, et al. “Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors.” Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium On, IEEE, 2009, pp. 252–55, doi:10.1109/PRDC.2009.69.' short: 'H. Ghasemzadeh Mohammadi, S.G. Miremadi, A. Ejlali, in: Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium On, IEEE, 2009, pp. 252–255.' date_created: 2019-07-10T12:11:34Z date_updated: 2022-01-06T06:50:50Z department: - _id: '78' doi: 10.1109/PRDC.2009.69 extern: '1' language: - iso: eng page: 252-255 publication: Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium on publisher: IEEE status: public title: 'Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors' type: conference user_id: '3118' year: '2009' ... --- _id: '13632' author: - first_name: Markus full_name: Happe, Markus last_name: Happe - first_name: Enno full_name: Lübbers, Enno last_name: Lübbers - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Happe M, Lübbers E, Platzner M. A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms. In: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC). Springer; 2009.' apa: Happe, M., Lübbers, E., & Platzner, M. (2009). A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms. In Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC). Springer. bibtex: '@inproceedings{Happe_Lübbers_Platzner_2009, title={A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms}, booktitle={Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC)}, publisher={Springer}, author={Happe, Markus and Lübbers, Enno and Platzner, Marco}, year={2009} }' chicago: Happe, Markus, Enno Lübbers, and Marco Platzner. “A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms.” In Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC). Springer, 2009. ieee: M. Happe, E. Lübbers, and M. Platzner, “A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms,” in Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), 2009. mla: Happe, Markus, et al. “A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms.” Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), Springer, 2009. short: 'M. Happe, E. Lübbers, M. Platzner, in: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), Springer, 2009.' date_created: 2019-10-04T22:13:24Z date_updated: 2022-01-06T06:51:40Z department: - _id: '78' language: - iso: eng publication: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC) publisher: Springer status: public title: A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms type: conference user_id: '398' year: '2009' ... --- _id: '13634' author: - first_name: Heiner full_name: Giefers, Heiner last_name: Giefers - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Giefers H, Platzner M. Towards Models for Many-Cores: The Case for the Reconfigurable Mesh. In: Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS). ; 2009.' apa: 'Giefers, H., & Platzner, M. (2009). Towards Models for Many-Cores: The Case for the Reconfigurable Mesh. In Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS).' bibtex: '@inproceedings{Giefers_Platzner_2009, title={Towards Models for Many-Cores: The Case for the Reconfigurable Mesh}, booktitle={Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS)}, author={Giefers, Heiner and Platzner, Marco}, year={2009} }' chicago: 'Giefers, Heiner, and Marco Platzner. “Towards Models for Many-Cores: The Case for the Reconfigurable Mesh.” In Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.' ieee: 'H. Giefers and M. Platzner, “Towards Models for Many-Cores: The Case for the Reconfigurable Mesh,” in Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.' mla: 'Giefers, Heiner, and Marco Platzner. “Towards Models for Many-Cores: The Case for the Reconfigurable Mesh.” Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.' short: 'H. Giefers, M. Platzner, in: Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.' date_created: 2019-10-04T22:16:01Z date_updated: 2022-01-06T06:51:40Z department: - _id: '78' language: - iso: eng publication: Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS) status: public title: 'Towards Models for Many-Cores: The Case for the Reconfigurable Mesh' type: conference user_id: '398' year: '2009' ... --- _id: '13635' author: - first_name: Heiner full_name: Giefers, Heiner last_name: Giefers - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Giefers H, Platzner M. ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores. In: Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium. IEEE; 2009.' apa: 'Giefers, H., & Platzner, M. (2009). ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores. In Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium. IEEE.' bibtex: '@inproceedings{Giefers_Platzner_2009, title={ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores}, booktitle={Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium}, publisher={IEEE}, author={Giefers, Heiner and Platzner, Marco}, year={2009} }' chicago: 'Giefers, Heiner, and Marco Platzner. “ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores.” In Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium. IEEE, 2009.' ieee: 'H. Giefers and M. Platzner, “ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores,” in Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium, 2009.' mla: 'Giefers, Heiner, and Marco Platzner. “ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores.” Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium, IEEE, 2009.' short: 'H. Giefers, M. Platzner, in: Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium, IEEE, 2009.' date_created: 2019-10-04T22:17:57Z date_updated: 2022-01-06T06:51:40Z department: - _id: '78' language: - iso: eng publication: Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium publisher: IEEE status: public title: 'ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores' type: conference user_id: '398' year: '2009' ... --- _id: '13636' author: - first_name: Enno full_name: Lübbers, Enno last_name: Lübbers - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Lübbers E, Platzner M. Cooperative Multithreading in Dynamically Reconfigurable Systems. In: Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) . IEEE; 2009.' apa: Lübbers, E., & Platzner, M. (2009). Cooperative Multithreading in Dynamically Reconfigurable Systems. In Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) . IEEE. bibtex: '@inproceedings{Lübbers_Platzner_2009, title={Cooperative Multithreading in Dynamically Reconfigurable Systems}, booktitle={Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) }, publisher={IEEE}, author={Lübbers, Enno and Platzner, Marco}, year={2009} }' chicago: Lübbers, Enno, and Marco Platzner. “Cooperative Multithreading in Dynamically Reconfigurable Systems.” In Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) . IEEE, 2009. ieee: E. Lübbers and M. Platzner, “Cooperative Multithreading in Dynamically Reconfigurable Systems,” in Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , 2009. mla: Lübbers, Enno, and Marco Platzner. “Cooperative Multithreading in Dynamically Reconfigurable Systems.” Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009. short: 'E. Lübbers, M. Platzner, in: Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.' date_created: 2019-10-04T22:20:12Z date_updated: 2022-01-06T06:51:40Z department: - _id: '78' language: - iso: eng publication: 'Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) ' publisher: IEEE status: public title: Cooperative Multithreading in Dynamically Reconfigurable Systems type: conference user_id: '398' year: '2009' ...