--- _id: '10628' alternative_title: - Effects of Pattern Matching Algorithms on Long-term Electromyography Signals author: - first_name: Alexander full_name: Boschmann, Alexander last_name: Boschmann citation: ama: Boschmann A. Aufbau Und Experimentelle Bewertung Eines Systems Zur Langzeitklassifikation von EMG-Signalen. Paderborn University; 2008. apa: Boschmann, A. (2008). Aufbau und experimentelle Bewertung eines Systems zur Langzeitklassifikation von EMG-Signalen. Paderborn University. bibtex: '@book{Boschmann_2008, title={Aufbau und experimentelle Bewertung eines Systems zur Langzeitklassifikation von EMG-Signalen}, publisher={Paderborn University}, author={Boschmann, Alexander}, year={2008} }' chicago: Boschmann, Alexander. Aufbau Und Experimentelle Bewertung Eines Systems Zur Langzeitklassifikation von EMG-Signalen. Paderborn University, 2008. ieee: A. Boschmann, Aufbau und experimentelle Bewertung eines Systems zur Langzeitklassifikation von EMG-Signalen. Paderborn University, 2008. mla: Boschmann, Alexander. Aufbau Und Experimentelle Bewertung Eines Systems Zur Langzeitklassifikation von EMG-Signalen. Paderborn University, 2008. short: A. Boschmann, Aufbau Und Experimentelle Bewertung Eines Systems Zur Langzeitklassifikation von EMG-Signalen, Paderborn University, 2008. date_created: 2019-07-10T09:40:26Z date_updated: 2022-01-06T06:50:48Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public supervisor: - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann title: Aufbau und experimentelle Bewertung eines Systems zur Langzeitklassifikation von EMG-Signalen type: bachelorsthesis user_id: '3118' year: '2008' ... --- _id: '10641' alternative_title: - Self-optimizing Cache Controller author: - first_name: Daniel full_name: Breitlauch, Daniel last_name: Breitlauch citation: ama: Breitlauch D. Selbstoptimierender Cache-Kontroller. Paderborn University; 2008. apa: Breitlauch, D. (2008). Selbstoptimierender Cache-Kontroller. Paderborn University. bibtex: '@book{Breitlauch_2008, title={Selbstoptimierender Cache-Kontroller}, publisher={Paderborn University}, author={Breitlauch, Daniel}, year={2008} }' chicago: Breitlauch, Daniel. Selbstoptimierender Cache-Kontroller. Paderborn University, 2008. ieee: D. Breitlauch, Selbstoptimierender Cache-Kontroller. Paderborn University, 2008. mla: Breitlauch, Daniel. Selbstoptimierender Cache-Kontroller. Paderborn University, 2008. short: D. Breitlauch, Selbstoptimierender Cache-Kontroller, Paderborn University, 2008. date_created: 2019-07-10T11:03:42Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public supervisor: - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann title: Selbstoptimierender Cache-Kontroller type: bachelorsthesis user_id: '3118' year: '2008' ... --- _id: '10644' alternative_title: - Distributed Simulation of mobile Robots using EyeSim author: - first_name: Toni full_name: Ceylan, Toni last_name: Ceylan - first_name: Coni full_name: Yalcin, Coni last_name: Yalcin citation: ama: Ceylan T, Yalcin C. Verteilte Simulation von Mobilen Robotern Mit EyeSim. Paderborn University; 2008. apa: Ceylan, T., & Yalcin, C. (2008). Verteilte Simulation von mobilen Robotern mit EyeSim. Paderborn University. bibtex: '@book{Ceylan_Yalcin_2008, title={Verteilte Simulation von mobilen Robotern mit EyeSim}, publisher={Paderborn University}, author={Ceylan, Toni and Yalcin, Coni}, year={2008} }' chicago: Ceylan, Toni, and Coni Yalcin. Verteilte Simulation von Mobilen Robotern Mit EyeSim. Paderborn University, 2008. ieee: T. Ceylan and C. Yalcin, Verteilte Simulation von mobilen Robotern mit EyeSim. Paderborn University, 2008. mla: Ceylan, Toni, and Coni Yalcin. Verteilte Simulation von Mobilen Robotern Mit EyeSim. Paderborn University, 2008. short: T. Ceylan, C. Yalcin, Verteilte Simulation von Mobilen Robotern Mit EyeSim, Paderborn University, 2008. date_created: 2019-07-10T11:03:45Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public supervisor: - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann title: Verteilte Simulation von mobilen Robotern mit EyeSim type: bachelorsthesis user_id: '3118' year: '2008' ... --- _id: '10653' author: - first_name: Kyrre full_name: Glette, Kyrre last_name: Glette - first_name: Thiemo full_name: Gruber, Thiemo last_name: Gruber - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann - first_name: Jim full_name: Torresen, Jim last_name: Torresen - first_name: Bernhard full_name: Sick, Bernhard last_name: Sick - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Glette K, Gruber T, Kaufmann P, Torresen J, Sick B, Platzner M. Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control. In: IEEE Adaptive Hardware and Systems (AHS). IEEE; 2008:32-39.' apa: Glette, K., Gruber, T., Kaufmann, P., Torresen, J., Sick, B., & Platzner, M. (2008). Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control. In IEEE Adaptive Hardware and Systems (AHS) (pp. 32–39). IEEE. bibtex: '@inproceedings{Glette_Gruber_Kaufmann_Torresen_Sick_Platzner_2008, title={Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control}, booktitle={IEEE Adaptive Hardware and Systems (AHS)}, publisher={IEEE}, author={Glette, Kyrre and Gruber, Thiemo and Kaufmann, Paul and Torresen, Jim and Sick, Bernhard and Platzner, Marco}, year={2008}, pages={32–39} }' chicago: Glette, Kyrre, Thiemo Gruber, Paul Kaufmann, Jim Torresen, Bernhard Sick, and Marco Platzner. “Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control.” In IEEE Adaptive Hardware and Systems (AHS), 32–39. IEEE, 2008. ieee: K. Glette, T. Gruber, P. Kaufmann, J. Torresen, B. Sick, and M. Platzner, “Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control,” in IEEE Adaptive Hardware and Systems (AHS), 2008, pp. 32–39. mla: Glette, Kyrre, et al. “Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control.” IEEE Adaptive Hardware and Systems (AHS), IEEE, 2008, pp. 32–39. short: 'K. Glette, T. Gruber, P. Kaufmann, J. Torresen, B. Sick, M. Platzner, in: IEEE Adaptive Hardware and Systems (AHS), IEEE, 2008, pp. 32–39.' date_created: 2019-07-10T11:13:13Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' language: - iso: eng page: 32-39 publication: IEEE Adaptive Hardware and Systems (AHS) publisher: IEEE status: public title: Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control type: conference user_id: '3118' year: '2008' ... --- _id: '10656' author: - first_name: Kyrre full_name: Glette, Kyrre last_name: Glette - first_name: Jim full_name: Torresen, Jim last_name: Torresen - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Glette K, Torresen J, Kaufmann P, Platzner M. A Comparison of Evolvable Hardware Architectures for Classification Tasks. In: IEEE Intl. Conf. on Evolvable Systems (ICES). Vol 5216. LNCS. Springer; 2008:22-33.' apa: Glette, K., Torresen, J., Kaufmann, P., & Platzner, M. (2008). A Comparison of Evolvable Hardware Architectures for Classification Tasks. In IEEE Intl. Conf. on Evolvable Systems (ICES) (Vol. 5216, pp. 22–33). Springer. bibtex: '@inproceedings{Glette_Torresen_Kaufmann_Platzner_2008, series={LNCS}, title={A Comparison of Evolvable Hardware Architectures for Classification Tasks}, volume={5216}, booktitle={IEEE Intl. Conf. on Evolvable Systems (ICES)}, publisher={Springer}, author={Glette, Kyrre and Torresen, Jim and Kaufmann, Paul and Platzner, Marco}, year={2008}, pages={22–33}, collection={LNCS} }' chicago: Glette, Kyrre, Jim Torresen, Paul Kaufmann, and Marco Platzner. “A Comparison of Evolvable Hardware Architectures for Classification Tasks.” In IEEE Intl. Conf. on Evolvable Systems (ICES), 5216:22–33. LNCS. Springer, 2008. ieee: K. Glette, J. Torresen, P. Kaufmann, and M. Platzner, “A Comparison of Evolvable Hardware Architectures for Classification Tasks,” in IEEE Intl. Conf. on Evolvable Systems (ICES), 2008, vol. 5216, pp. 22–33. mla: Glette, Kyrre, et al. “A Comparison of Evolvable Hardware Architectures for Classification Tasks.” IEEE Intl. Conf. on Evolvable Systems (ICES), vol. 5216, Springer, 2008, pp. 22–33. short: 'K. Glette, J. Torresen, P. Kaufmann, M. Platzner, in: IEEE Intl. Conf. on Evolvable Systems (ICES), Springer, 2008, pp. 22–33.' date_created: 2019-07-10T11:13:31Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' intvolume: ' 5216' language: - iso: eng page: 22-33 publication: IEEE Intl. Conf. on Evolvable Systems (ICES) publisher: Springer series_title: LNCS status: public title: A Comparison of Evolvable Hardware Architectures for Classification Tasks type: conference user_id: '3118' volume: 5216 year: '2008' ... --- _id: '10669' author: - first_name: Markus full_name: Happe, Markus last_name: Happe citation: ama: Happe M. Parallelisierung Und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University; 2008. apa: Happe, M. (2008). Parallelisierung und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University. bibtex: '@book{Happe_2008, title={Parallelisierung und Hardware- / Software - Codesign von Partikelfiltern}, publisher={Paderborn University}, author={Happe, Markus}, year={2008} }' chicago: Happe, Markus. Parallelisierung Und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University, 2008. ieee: M. Happe, Parallelisierung und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University, 2008. mla: Happe, Markus. Parallelisierung Und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University, 2008. short: M. Happe, Parallelisierung Und Hardware- / Software - Codesign von Partikelfiltern, Paderborn University, 2008. date_created: 2019-07-10T11:15:14Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public title: Parallelisierung und Hardware- / Software - Codesign von Partikelfiltern type: mastersthesis user_id: '3118' year: '2008' ... --- _id: '10690' author: - first_name: Jim full_name: Torresen, Jim last_name: Torresen - first_name: Kyrre full_name: Glette, Kyrre last_name: Glette - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann citation: ama: Torresen J, Glette K, Platzner M, Kaufmann P. Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS). 2008. apa: Torresen, J., Glette, K., Platzner, M., & Kaufmann, P. (2008). Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS). bibtex: '@article{Torresen_Glette_Platzner_Kaufmann_2008, title={Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS)}, author={Torresen, Jim and Glette, Kyrre and Platzner, Marco and Kaufmann, Paul}, year={2008} }' chicago: Torresen, Jim, Kyrre Glette, Marco Platzner, and Paul Kaufmann. “Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS),” 2008. ieee: J. Torresen, K. Glette, M. Platzner, and P. Kaufmann, “Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS).” 2008. mla: Torresen, Jim, et al. Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS). 2008. short: J. Torresen, K. Glette, M. Platzner, P. Kaufmann, (2008). date_created: 2019-07-10T11:29:14Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' language: - iso: eng status: public title: Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS) type: preprint user_id: '398' year: '2008' ... --- _id: '10691' author: - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Kaufmann P, Platzner M. Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming. In: Genetic and Evolutionary Computation (GECCO). ACM Press; 2008:1219-1226.' apa: Kaufmann, P., & Platzner, M. (2008). Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming. In Genetic and Evolutionary Computation (GECCO) (pp. 1219–1226). ACM Press. bibtex: '@inproceedings{Kaufmann_Platzner_2008, title={Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming}, booktitle={Genetic and Evolutionary Computation (GECCO)}, publisher={ACM Press}, author={Kaufmann, Paul and Platzner, Marco}, year={2008}, pages={1219–1226} }' chicago: Kaufmann, Paul, and Marco Platzner. “Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming.” In Genetic and Evolutionary Computation (GECCO), 1219–26. ACM Press, 2008. ieee: P. Kaufmann and M. Platzner, “Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming,” in Genetic and Evolutionary Computation (GECCO), 2008, pp. 1219–1226. mla: Kaufmann, Paul, and Marco Platzner. “Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming.” Genetic and Evolutionary Computation (GECCO), ACM Press, 2008, pp. 1219–26. short: 'P. Kaufmann, M. Platzner, in: Genetic and Evolutionary Computation (GECCO), ACM Press, 2008, pp. 1219–1226.' date_created: 2019-07-10T11:29:57Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' language: - iso: eng page: 1219 - 1226 publication: Genetic and Evolutionary Computation (GECCO) publisher: ACM Press status: public title: Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming type: conference user_id: '3118' year: '2008' ... --- _id: '10696' alternative_title: - Multi-objective Optimizer IBEA for Digital Logic Design author: - first_name: Tobias full_name: Knieper, Tobias last_name: Knieper citation: ama: Knieper T. Implementierung Und Bewertung Des Multikriteriellen Optimierungsverfahrens IBEA Für Den Automatisierten Schaltungsentwurf. Paderborn University; 2008. apa: Knieper, T. (2008). Implementierung und Bewertung des multikriteriellen Optimierungsverfahrens IBEA für den automatisierten Schaltungsentwurf. Paderborn University. bibtex: '@book{Knieper_2008, title={Implementierung und Bewertung des multikriteriellen Optimierungsverfahrens IBEA für den automatisierten Schaltungsentwurf}, publisher={Paderborn University}, author={Knieper, Tobias}, year={2008} }' chicago: Knieper, Tobias. Implementierung Und Bewertung Des Multikriteriellen Optimierungsverfahrens IBEA Für Den Automatisierten Schaltungsentwurf. Paderborn University, 2008. ieee: T. Knieper, Implementierung und Bewertung des multikriteriellen Optimierungsverfahrens IBEA für den automatisierten Schaltungsentwurf. Paderborn University, 2008. mla: Knieper, Tobias. Implementierung Und Bewertung Des Multikriteriellen Optimierungsverfahrens IBEA Für Den Automatisierten Schaltungsentwurf. Paderborn University, 2008. short: T. Knieper, Implementierung Und Bewertung Des Multikriteriellen Optimierungsverfahrens IBEA Für Den Automatisierten Schaltungsentwurf, Paderborn University, 2008. date_created: 2019-07-10T11:30:22Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public supervisor: - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann title: Implementierung und Bewertung des multikriteriellen Optimierungsverfahrens IBEA für den automatisierten Schaltungsentwurf type: bachelorsthesis user_id: '3118' year: '2008' ... --- _id: '10698' author: - first_name: Tobias full_name: Knieper, Tobias last_name: Knieper - first_name: Bertrand full_name: Defo, Bertrand last_name: Defo - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Knieper T, Defo B, Kaufmann P, Platzner M. On Robust Evolution of Digital Hardware. In: Biologically Inspired Collaborative Computing (BICC). Vol 268. IFIP International Federation for Information Processing. Springer; 2008:2313-222.' apa: Knieper, T., Defo, B., Kaufmann, P., & Platzner, M. (2008). On Robust Evolution of Digital Hardware. In Biologically Inspired Collaborative Computing (BICC) (Vol. 268, pp. 2313–222). Springer. bibtex: '@inproceedings{Knieper_Defo_Kaufmann_Platzner_2008, series={IFIP International Federation for Information Processing}, title={On Robust Evolution of Digital Hardware}, volume={268}, booktitle={Biologically Inspired Collaborative Computing (BICC)}, publisher={Springer}, author={Knieper, Tobias and Defo, Bertrand and Kaufmann, Paul and Platzner, Marco}, year={2008}, pages={2313–222}, collection={IFIP International Federation for Information Processing} }' chicago: Knieper, Tobias, Bertrand Defo, Paul Kaufmann, and Marco Platzner. “On Robust Evolution of Digital Hardware.” In Biologically Inspired Collaborative Computing (BICC), 268:2313–222. IFIP International Federation for Information Processing. Springer, 2008. ieee: T. Knieper, B. Defo, P. Kaufmann, and M. Platzner, “On Robust Evolution of Digital Hardware,” in Biologically Inspired Collaborative Computing (BICC), 2008, vol. 268, pp. 2313–222. mla: Knieper, Tobias, et al. “On Robust Evolution of Digital Hardware.” Biologically Inspired Collaborative Computing (BICC), vol. 268, Springer, 2008, pp. 2313–222. short: 'T. Knieper, B. Defo, P. Kaufmann, M. Platzner, in: Biologically Inspired Collaborative Computing (BICC), Springer, 2008, pp. 2313–222.' date_created: 2019-07-10T11:38:02Z date_updated: 2022-01-06T06:50:49Z department: - _id: '78' intvolume: ' 268' language: - iso: eng page: 2313-222 publication: Biologically Inspired Collaborative Computing (BICC) publisher: Springer series_title: IFIP International Federation for Information Processing status: public title: On Robust Evolution of Digital Hardware type: conference user_id: '3118' volume: 268 year: '2008' ... --- _id: '10718' author: - first_name: Jörg full_name: Niklas, Jörg last_name: Niklas citation: ama: Niklas J. Eine Monitoring- Und Debugging-Infrastruktur Für Hybride HW/SW-Systeme. Paderborn University; 2008. apa: Niklas, J. (2008). Eine Monitoring- und Debugging-Infrastruktur für hybride HW/SW-Systeme. Paderborn University. bibtex: '@book{Niklas_2008, title={Eine Monitoring- und Debugging-Infrastruktur für hybride HW/SW-Systeme}, publisher={Paderborn University}, author={Niklas, Jörg}, year={2008} }' chicago: Niklas, Jörg. Eine Monitoring- Und Debugging-Infrastruktur Für Hybride HW/SW-Systeme. Paderborn University, 2008. ieee: J. Niklas, Eine Monitoring- und Debugging-Infrastruktur für hybride HW/SW-Systeme. Paderborn University, 2008. mla: Niklas, Jörg. Eine Monitoring- Und Debugging-Infrastruktur Für Hybride HW/SW-Systeme. Paderborn University, 2008. short: J. Niklas, Eine Monitoring- Und Debugging-Infrastruktur Für Hybride HW/SW-Systeme, Paderborn University, 2008. date_created: 2019-07-10T11:48:29Z date_updated: 2022-01-06T06:50:50Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public title: Eine Monitoring- und Debugging-Infrastruktur für hybride HW/SW-Systeme type: bachelorsthesis user_id: '3118' year: '2008' ... --- _id: '10721' author: - first_name: Marco full_name: Östermann, Marco last_name: Östermann citation: ama: Östermann M. Raytracing on a Custom Instruction Set CPU. Paderborn University; 2008. apa: Östermann, M. (2008). Raytracing on a Custom Instruction Set CPU. Paderborn University. bibtex: '@book{Östermann_2008, title={Raytracing on a Custom Instruction Set CPU}, publisher={Paderborn University}, author={Östermann, Marco}, year={2008} }' chicago: Östermann, Marco. Raytracing on a Custom Instruction Set CPU. Paderborn University, 2008. ieee: M. Östermann, Raytracing on a Custom Instruction Set CPU. Paderborn University, 2008. mla: Östermann, Marco. Raytracing on a Custom Instruction Set CPU. Paderborn University, 2008. short: M. Östermann, Raytracing on a Custom Instruction Set CPU, Paderborn University, 2008. date_created: 2019-07-10T11:52:51Z date_updated: 2022-01-06T06:50:50Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public title: Raytracing on a Custom Instruction Set CPU type: bachelorsthesis user_id: '3118' year: '2008' ... --- _id: '10751' author: - first_name: Nico full_name: Westerheide, Nico last_name: Westerheide citation: ama: Westerheide N. Design and Evaluation of MicroBlaze Multi-Core Architectures. Paderborn University; 2008. apa: Westerheide, N. (2008). Design and Evaluation of MicroBlaze Multi-core Architectures. Paderborn University. bibtex: '@book{Westerheide_2008, title={Design and Evaluation of MicroBlaze Multi-core Architectures}, publisher={Paderborn University}, author={Westerheide, Nico}, year={2008} }' chicago: Westerheide, Nico. Design and Evaluation of MicroBlaze Multi-Core Architectures. Paderborn University, 2008. ieee: N. Westerheide, Design and Evaluation of MicroBlaze Multi-core Architectures. Paderborn University, 2008. mla: Westerheide, Nico. Design and Evaluation of MicroBlaze Multi-Core Architectures. Paderborn University, 2008. short: N. Westerheide, Design and Evaluation of MicroBlaze Multi-Core Architectures, Paderborn University, 2008. date_created: 2019-07-10T12:03:01Z date_updated: 2022-01-06T06:50:50Z department: - _id: '78' language: - iso: eng publisher: Paderborn University status: public title: Design and Evaluation of MicroBlaze Multi-core Architectures type: bachelorsthesis user_id: '3118' year: '2008' ... --- _id: '10778' author: - first_name: Hassan full_name: Ghasemzadeh Mohammadi, Hassan id: '61186' last_name: Ghasemzadeh Mohammadi - first_name: Hamed full_name: Tabkhi, Hamed last_name: Tabkhi - first_name: Seyed Ghassem full_name: Miremadi, Seyed Ghassem last_name: Miremadi - first_name: Alireza full_name: Ejlali, Alireza last_name: Ejlali citation: ama: 'Ghasemzadeh Mohammadi H, Tabkhi H, Miremadi SG, Ejlali A. A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic. In: 2008 International Conference on Microelectronics. IEEE; 2008:444-447. doi:10.1109/ICM.2008.5393497' apa: Ghasemzadeh Mohammadi, H., Tabkhi, H., Miremadi, S. G., & Ejlali, A. (2008). A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic. In 2008 International Conference on Microelectronics (pp. 444–447). IEEE. https://doi.org/10.1109/ICM.2008.5393497 bibtex: '@inproceedings{Ghasemzadeh Mohammadi_Tabkhi_Miremadi_Ejlali_2008, title={A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic}, DOI={10.1109/ICM.2008.5393497}, booktitle={2008 International Conference on Microelectronics}, publisher={IEEE}, author={Ghasemzadeh Mohammadi, Hassan and Tabkhi, Hamed and Miremadi, Seyed Ghassem and Ejlali, Alireza}, year={2008}, pages={444–447} }' chicago: Ghasemzadeh Mohammadi, Hassan, Hamed Tabkhi, Seyed Ghassem Miremadi, and Alireza Ejlali. “A Cost-Effective Error Detection and Roll-Back Recovery Technique for Embedded Microprocessor Control Logic.” In 2008 International Conference on Microelectronics, 444–47. IEEE, 2008. https://doi.org/10.1109/ICM.2008.5393497. ieee: H. Ghasemzadeh Mohammadi, H. Tabkhi, S. G. Miremadi, and A. Ejlali, “A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic,” in 2008 International Conference on Microelectronics, 2008, pp. 444–447. mla: Ghasemzadeh Mohammadi, Hassan, et al. “A Cost-Effective Error Detection and Roll-Back Recovery Technique for Embedded Microprocessor Control Logic.” 2008 International Conference on Microelectronics, IEEE, 2008, pp. 444–47, doi:10.1109/ICM.2008.5393497. short: 'H. Ghasemzadeh Mohammadi, H. Tabkhi, S.G. Miremadi, A. Ejlali, in: 2008 International Conference on Microelectronics, IEEE, 2008, pp. 444–447.' date_created: 2019-07-10T12:11:35Z date_updated: 2022-01-06T06:50:50Z department: - _id: '78' doi: 10.1109/ICM.2008.5393497 extern: '1' language: - iso: eng page: 444-447 publication: 2008 International Conference on Microelectronics publisher: IEEE status: public title: A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic type: conference user_id: '3118' year: '2008' ... --- _id: '13629' author: - first_name: Heiner full_name: Giefers, Heiner last_name: Giefers - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Giefers H, Platzner M. Realizing Reconfigurable Mesh Algorithms on Softcore Arrays. In: Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS). IEEE; 2008.' apa: Giefers, H., & Platzner, M. (2008). Realizing Reconfigurable Mesh Algorithms on Softcore Arrays. In Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS). IEEE. bibtex: '@inproceedings{Giefers_Platzner_2008, title={Realizing Reconfigurable Mesh Algorithms on Softcore Arrays}, booktitle={Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS)}, publisher={IEEE}, author={Giefers, Heiner and Platzner, Marco}, year={2008} }' chicago: Giefers, Heiner, and Marco Platzner. “Realizing Reconfigurable Mesh Algorithms on Softcore Arrays.” In Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS). IEEE, 2008. ieee: H. Giefers and M. Platzner, “Realizing Reconfigurable Mesh Algorithms on Softcore Arrays,” in Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS), 2008. mla: Giefers, Heiner, and Marco Platzner. “Realizing Reconfigurable Mesh Algorithms on Softcore Arrays.” Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS), IEEE, 2008. short: 'H. Giefers, M. Platzner, in: Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS), IEEE, 2008.' date_created: 2019-10-04T22:05:22Z date_updated: 2022-01-06T06:51:40Z department: - _id: '78' language: - iso: eng publication: Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS) publisher: IEEE status: public title: Realizing Reconfigurable Mesh Algorithms on Softcore Arrays type: conference user_id: '398' year: '2008' ... --- _id: '13630' author: - first_name: Enno full_name: Lübbers, Enno last_name: Lübbers - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Lübbers E, Platzner M. Communication and Synchronization in Multithreaded Reconfigurable Computing Systems. In: Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2008.' apa: Lübbers, E., & Platzner, M. (2008). Communication and Synchronization in Multithreaded Reconfigurable Computing Systems. In Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press. bibtex: '@inproceedings{Lübbers_Platzner_2008, title={Communication and Synchronization in Multithreaded Reconfigurable Computing Systems}, booktitle={Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA)}, publisher={CSREA Press}, author={Lübbers, Enno and Platzner, Marco}, year={2008} }' chicago: Lübbers, Enno, and Marco Platzner. “Communication and Synchronization in Multithreaded Reconfigurable Computing Systems.” In Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2008. ieee: E. Lübbers and M. Platzner, “Communication and Synchronization in Multithreaded Reconfigurable Computing Systems,” in Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008. mla: Lübbers, Enno, and Marco Platzner. “Communication and Synchronization in Multithreaded Reconfigurable Computing Systems.” Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008. short: 'E. Lübbers, M. Platzner, in: Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008.' date_created: 2019-10-04T22:07:14Z date_updated: 2022-01-06T06:51:40Z department: - _id: '78' language: - iso: eng publication: Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA) publisher: CSREA Press status: public title: Communication and Synchronization in Multithreaded Reconfigurable Computing Systems type: conference user_id: '398' year: '2008' ... --- _id: '13631' author: - first_name: Enno full_name: Lübbers, Enno last_name: Lübbers - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Lübbers E, Platzner M. A portable abstraction layer for hardware threads. In: Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2008. doi:10.1109/fpl.2008.4629901' apa: Lübbers, E., & Platzner, M. (2008). A portable abstraction layer for hardware threads. In Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL). IEEE. https://doi.org/10.1109/fpl.2008.4629901 bibtex: '@inproceedings{Lübbers_Platzner_2008, title={A portable abstraction layer for hardware threads}, DOI={10.1109/fpl.2008.4629901}, booktitle={Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL)}, publisher={IEEE}, author={Lübbers, Enno and Platzner, Marco}, year={2008} }' chicago: Lübbers, Enno, and Marco Platzner. “A Portable Abstraction Layer for Hardware Threads.” In Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2008. https://doi.org/10.1109/fpl.2008.4629901. ieee: E. Lübbers and M. Platzner, “A portable abstraction layer for hardware threads,” in Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), 2008. mla: Lübbers, Enno, and Marco Platzner. “A Portable Abstraction Layer for Hardware Threads.” Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2008, doi:10.1109/fpl.2008.4629901. short: 'E. Lübbers, M. Platzner, in: Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2008.' date_created: 2019-10-04T22:07:43Z date_updated: 2022-01-06T06:51:40Z department: - _id: '78' doi: 10.1109/fpl.2008.4629901 language: - iso: eng publication: Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL) publication_identifier: isbn: - '9781424419609' publication_status: published publisher: IEEE status: public title: A portable abstraction layer for hardware threads type: conference user_id: '398' year: '2008' ... --- _id: '2364' author: - first_name: Tobias full_name: Schumacher, Tobias last_name: Schumacher - first_name: Robert full_name: Meiche, Robert last_name: Meiche - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann - first_name: Enno full_name: Lübbers, Enno last_name: Lübbers - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Schumacher T, Meiche R, Kaufmann P, Lübbers E, Plessl C, Platzner M. A Hardware Accelerator for k-th Nearest Neighbor Thinning. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2008:245-251.' apa: Schumacher, T., Meiche, R., Kaufmann, P., Lübbers, E., Plessl, C., & Platzner, M. (2008). A Hardware Accelerator for k-th Nearest Neighbor Thinning. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 245–251. bibtex: '@inproceedings{Schumacher_Meiche_Kaufmann_Lübbers_Plessl_Platzner_2008, title={A Hardware Accelerator for k-th Nearest Neighbor Thinning}, booktitle={Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)}, publisher={CSREA Press}, author={Schumacher, Tobias and Meiche, Robert and Kaufmann, Paul and Lübbers, Enno and Plessl, Christian and Platzner, Marco}, year={2008}, pages={245–251} }' chicago: Schumacher, Tobias, Robert Meiche, Paul Kaufmann, Enno Lübbers, Christian Plessl, and Marco Platzner. “A Hardware Accelerator for K-Th Nearest Neighbor Thinning.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 245–51. CSREA Press, 2008. ieee: T. Schumacher, R. Meiche, P. Kaufmann, E. Lübbers, C. Plessl, and M. Platzner, “A Hardware Accelerator for k-th Nearest Neighbor Thinning,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008, pp. 245–251. mla: Schumacher, Tobias, et al. “A Hardware Accelerator for K-Th Nearest Neighbor Thinning.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–51. short: 'T. Schumacher, R. Meiche, P. Kaufmann, E. Lübbers, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–251.' date_created: 2018-04-17T11:33:32Z date_updated: 2023-09-26T13:54:24Z department: - _id: '27' - _id: '518' - _id: '78' language: - iso: eng page: 245-251 publication: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) publication_identifier: isbn: - 1-60132-064-7 publisher: CSREA Press quality_controlled: '1' status: public title: A Hardware Accelerator for k-th Nearest Neighbor Thinning type: conference user_id: '15278' year: '2008' ... --- _id: '2372' author: - first_name: Tobias full_name: Schumacher, Tobias last_name: Schumacher - first_name: Christian full_name: Plessl, Christian id: '16153' last_name: Plessl orcid: 0000-0001-5728-9982 - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Schumacher T, Plessl C, Platzner M. IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers. In: Many-Core and Reconfigurable Supercomputing Conference (MRSC). ; 2008.' apa: 'Schumacher, T., Plessl, C., & Platzner, M. (2008). IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers. Many-Core and Reconfigurable Supercomputing Conference (MRSC).' bibtex: '@inproceedings{Schumacher_Plessl_Platzner_2008, title={IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers}, booktitle={Many-core and Reconfigurable Supercomputing Conference (MRSC)}, author={Schumacher, Tobias and Plessl, Christian and Platzner, Marco}, year={2008} }' chicago: 'Schumacher, Tobias, Christian Plessl, and Marco Platzner. “IMORC: An Infrastructure for Performance Monitoring and Optimization of Reconfigurable Computers.” In Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.' ieee: 'T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers,” 2008.' mla: 'Schumacher, Tobias, et al. “IMORC: An Infrastructure for Performance Monitoring and Optimization of Reconfigurable Computers.” Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.' short: 'T. Schumacher, C. Plessl, M. Platzner, in: Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.' date_created: 2018-04-17T12:05:28Z date_updated: 2023-09-26T13:55:51Z department: - _id: '27' - _id: '518' - _id: '78' keyword: - IMORC - IP core - interconnect language: - iso: eng publication: Many-core and Reconfigurable Supercomputing Conference (MRSC) quality_controlled: '1' status: public title: 'IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers' type: conference user_id: '15278' year: '2008' ... --- _id: '6508' abstract: - lang: eng text: 'In this paper, we present a framework that supports experimenting with evolutionary hardware design. We describe the framework''s modules for composing evolutionary optimizers and for setting up, controlling, and analyzing experiments. Two case studies demonstrate the usefulness of the framework: evolution of hash functions and evolution based on pre-engineered circuits.' author: - first_name: Paul full_name: Kaufmann, Paul last_name: Kaufmann - first_name: Marco full_name: Platzner, Marco id: '398' last_name: Platzner citation: ama: 'Kaufmann P, Platzner M. MOVES: A Modular Framework for Hardware Evolution. In: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007). IEEE; 2007:447-454. doi:10.1109/ahs.2007.73' apa: 'Kaufmann, P., & Platzner, M. (2007). MOVES: A Modular Framework for Hardware Evolution. In Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007) (pp. 447–454). Edinburgh, UK: IEEE. https://doi.org/10.1109/ahs.2007.73' bibtex: '@inproceedings{Kaufmann_Platzner_2007, title={MOVES: A Modular Framework for Hardware Evolution}, DOI={10.1109/ahs.2007.73}, booktitle={Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007)}, publisher={IEEE}, author={Kaufmann, Paul and Platzner, Marco}, year={2007}, pages={447–454} }' chicago: 'Kaufmann, Paul, and Marco Platzner. “MOVES: A Modular Framework for Hardware Evolution.” In Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 447–54. IEEE, 2007. https://doi.org/10.1109/ahs.2007.73.' ieee: 'P. Kaufmann and M. Platzner, “MOVES: A Modular Framework for Hardware Evolution,” in Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), Edinburgh, UK, 2007, pp. 447–454.' mla: 'Kaufmann, Paul, and Marco Platzner. “MOVES: A Modular Framework for Hardware Evolution.” Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), IEEE, 2007, pp. 447–54, doi:10.1109/ahs.2007.73.' short: 'P. Kaufmann, M. Platzner, in: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), IEEE, 2007, pp. 447–454.' conference: end_date: 2007-08-08 location: Edinburgh, UK name: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007) start_date: 2007-08-05 date_created: 2019-01-08T09:52:43Z date_updated: 2022-01-06T07:03:08Z department: - _id: '78' doi: 10.1109/ahs.2007.73 keyword: - integrated circuit design - hardware evolution - evolutionary hardware design - evolutionary optimizers - hash functions - preengineered circuits - Hardware - Circuits - Design optimization - Visualization - Genetic programming - Genetic mutations - Clustering algorithms - Biological cells - Field programmable gate arrays - Routing language: - iso: eng page: 447-454 publication: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007) publication_identifier: isbn: - 076952866X - '9780769528663' publication_status: published publisher: IEEE status: public title: 'MOVES: A Modular Framework for Hardware Evolution' type: conference user_id: '3118' year: '2007' ...